@W: MO111 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\mss_ccc_0\webserver_tmp_mss_ccc_0_mss_ccc.v":64:7:64:18|Tristate driver LPXIN_CLKOUT on net LPXIN_CLKOUT has its enable tied to GND (module Webserver_tmp_MSS_CCC_0_MSS_CCC) 
@W: MO111 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\mss_ccc_0\webserver_tmp_mss_ccc_0_mss_ccc.v":63:7:63:20|Tristate driver MAINXIN_CLKOUT on net MAINXIN_CLKOUT has its enable tied to GND (module Webserver_tmp_MSS_CCC_0_MSS_CCC) 
@W: MO111 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\mss_ccc_0\webserver_tmp_mss_ccc_0_mss_ccc.v":62:7:62:18|Tristate driver RCOSC_CLKOUT on net RCOSC_CLKOUT has its enable tied to GND (module Webserver_tmp_MSS_CCC_0_MSS_CCC) 
@W: MT462 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\mss_ccc_0\webserver_tmp_mss_ccc_0_mss_ccc.v":78:41:78:48|Net Webserver_0.MSS_ADLIB_INST_MACCLKCCC appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\mss_ccc_0\webserver_tmp_mss_ccc_0_mss_ccc.v":78:41:78:48|Net Webserver_0.MSS_ADLIB_INST_FCLK appears to be an unidentified clock source. Assuming default frequency. 
@W: MT246 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\webserver.v":274:11:274:22|Blackbox MSSINT is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT246 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\webserver.v":106:54:106:65|Blackbox TRIBUFF_MSS is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT246 :"c:\actelprj\a2f_webserver_uiprtos_softconsole_df\webserver_uiprtos_sc_df\eval_kit\sf_webserver_demo\component\work\webserver\mss_ccc_0\webserver_tmp_mss_ccc_0_mss_ccc.v":96:15:96:22|Blackbox MSS_XTLOSC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock Webserver|MSS_ADLIB_INST_EMCCLK_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:Webserver_0.MSS_ADLIB_INST_EMCCLK"
