@N|Running in 32-bit mode
@N: CD720 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N:"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\work\SmartFusion_MPM_Reference_Design\SmartFusion_MPM_Reference_Design.vhd":18:7:18:38|Top entity is set to SmartFusion_MPM_Reference_Design.
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\work\SmartFusion_MPM_Reference_Design\SmartFusion_MPM_Reference_Design.vhd":18:7:18:38|Synthesizing work.smartfusion_mpm_reference_design.def_arch 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":13:7:13:14|Synthesizing coregpio_lib.coregpio.cgpioo 
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":2812:10:2812:12|Synthesizing smartfusion.vcc.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":1998:10:1998:12|Synthesizing smartfusion.inv.syn_black_box 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":13:7:13:14|Synthesizing coregpio_lib.coregpio.cgpioo 
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":592:0:592:6|Removed redundant assignment
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":595:0:595:6|Removed redundant assignment
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":424:10:424:14|Synthesizing smartfusion.bibuf.syn_black_box 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\corepwm\4.1.106\rtl\vhdl\core_obfuscated\corepwm.vhd":16:7:16:13|Synthesizing corepwm_lib.corepwm.cpwmo 
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\corepwm\4.1.106\rtl\vhdl\core_obfuscated\corepwm.vhd":1407:0:1407:10|Removed redundant assignment
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\corepwm\4.1.106\rtl\vhdl\core_obfuscated\pwm_gen.vhd":17:7:17:13|Synthesizing corepwm_lib.pwm_gen.cpwmo 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\corepwm\4.1.106\rtl\vhdl\core_obfuscated\timebase.vhd":15:7:15:14|Synthesizing corepwm_lib.timebase.cpwmo 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\corepwm\4.1.106\rtl\vhdl\core_obfuscated\reg_if.vhd":16:7:16:12|Synthesizing corepwm_lib.reg_if.cpwmo 
@N: CD364 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\corepwm\4.1.106\rtl\vhdl\core_obfuscated\reg_if.vhd":148:0:148:7|Removed redundant assignment
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":1796:10:1796:12|Synthesizing smartfusion.gnd.syn_black_box 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2c.vhd":13:7:13:13|Synthesizing corei2c_lib.corei2c.rtl 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":13:7:13:17|Synthesizing corei2c_lib.corei2creal.rtl 
@N: CD231 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":124:14:124:15|Using onehot encoding for type ci2cioil (ci2colil="1000000")
@N: CD231 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":120:14:120:15|Using onehot encoding for type ci2ciill (ci2co0ll="10000000")
@N: CD231 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":116:14:116:15|Using onehot encoding for type ci2cooll (ci2cloll="1000000")
@N: CD232 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":112:13:112:14|Using gray code encoding for type ci2ci10
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":14:7:14:14|Synthesizing coreapb3_lib.coreapb3.capb3i0l 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3_muxptob3.vhd":14:7:14:12|Synthesizing coreapb3_lib.capb3o.capb3ll 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\work\SF_MPM_RefDesign_MSS\SF_MPM_RefDesign_MSS.vhd":8:7:8:26|Synthesizing work.sf_mpm_refdesign_mss.def_arch 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":4:7:4:15|Synthesizing work.inbuf_mss.def_arch 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":24:7:24:16|Synthesizing work.outbuf_mss.def_arch 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":44:7:44:17|Synthesizing work.tribuff_mss.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":1828:10:1828:16|Synthesizing smartfusion.inbuf_a.syn_black_box 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":87:7:87:21|Synthesizing work.bibuf_opend_mss.def_arch 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":168:7:168:12|Synthesizing work.mssint.def_arch 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\work\SF_MPM_RefDesign_MSS\mss_tshell.vhd":4:7:4:13|Synthesizing work.mss_apb.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":2337:10:2337:17|Synthesizing smartfusion.outbuf_a.syn_black_box 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\work\SF_MPM_RefDesign_MSS\MSS_CCC_0\SF_MPM_RefDesign_MSS_tmp_MSS_CCC_0_MSS_CCC.vhd":8:7:8:48|Synthesizing work.sf_mpm_refdesign_mss_tmp_mss_ccc_0_mss_ccc.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.0\Synopsys\synplify_F201109M\lib\proasic\smartfusion.vhd":3773:10:3773:14|Synthesizing smartfusion.rcosc.syn_black_box 
@N: CD630 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":472:7:472:13|Synthesizing work.mss_ccc.def_arch 
@N: CL201 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":1655:0:1655:1|Trying to extract state machine for register CI2CLL0l
@N: CL201 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":1525:0:1525:1|Trying to extract state machine for register CI2Cii0L
@N: CL201 :"C:\Microsemi\SF_MPM_RefDesign_v4.0\design_files_orig\Libero_project\SF_MPM_RefDesign\component\Actel\DirectCore\COREI2C\7.0.102\rtl\vhdl\core_obfuscated\corei2creal.vhd":1058:0:1058:1|Trying to extract state machine for register CI2COI0l

