Timing Report Max Delay Analysis

SmartTime Version v10.1 SP1
Actel Corporation - Actel Designer Software Release v10.1 SP1 (Version 10.1.1.6)
Copyright (c) 1989-2012
Date: Fri Nov 23 09:02:00 2012


Design: MultichannelFFT
Family: SmartFusion
Die: A2F200M3F
Package: 484 FBGA
Temperature: COM
Voltage: COM
Speed Grade: STD
Design State: Post-Layout
Data source: Silicon verified
Min Operating Condition: BEST
Max Operating Condition: WORST
Using Enhanced Min Delay Analysis
Scenario for Timing Analysis: Primary


-----------------------------------------------------
SUMMARY

Clock Domain:               mss_aclk
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       12.500
Required Frequency (MHz):   80.000
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               mss_fabric_interface_clock
Period (ns):                9.213
Frequency (MHz):            108.542
Required Period (ns):       12.500
Required Frequency (MHz):   80.000
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               mss_pclk1
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       12.500
Required Frequency (MHz):   80.000
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               mss_ccc_gla1
Period (ns):                18.358
Frequency (MHz):            54.472
Required Period (ns):       12.500
Required Frequency (MHz):   80.000
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               mss_ccc_gla0
Period (ns):                12.500
Frequency (MHz):            80.000
Required Period (ns):       12.500
Required Frequency (MHz):   80.000
External Setup (ns):        -5.434
External Hold (ns):         4.176
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               MultichannelFFT_MSS_0/MSS_CCC_0/I_RCOSC:CLKOUT
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       10.000
Required Frequency (MHz):   100.000
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

                            Input to Output
Min Delay (ns):             N/A
Max Delay (ns):             N/A

END SUMMARY
-----------------------------------------------------

Clock Domain mss_aclk

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain mss_fabric_interface_clock

SET Register to Register

Path 1
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[13]
  Delay (ns):                  11.447
  Slack (ns):                  3.287
  Arrival (ns):                15.622
  Required (ns):               18.909
  Setup (ns):                  -2.234
  Minimum Period (ns):         9.213

Path 2
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[0]
  Delay (ns):                  11.107
  Slack (ns):                  3.608
  Arrival (ns):                15.282
  Required (ns):               18.890
  Setup (ns):                  -2.215
  Minimum Period (ns):         8.892

Path 3
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[6]
  Delay (ns):                  10.810
  Slack (ns):                  3.924
  Arrival (ns):                14.985
  Required (ns):               18.909
  Setup (ns):                  -2.234
  Minimum Period (ns):         8.576

Path 4
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[9]
  Delay (ns):                  10.704
  Slack (ns):                  4.023
  Arrival (ns):                14.879
  Required (ns):               18.902
  Setup (ns):                  -2.227
  Minimum Period (ns):         8.477

Path 5
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[3]
  Delay (ns):                  10.635
  Slack (ns):                  4.085
  Arrival (ns):                14.810
  Required (ns):               18.895
  Setup (ns):                  -2.220
  Minimum Period (ns):         8.415


Expanded Path 1
  From: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[13]
  data required time                             18.909
  data arrival time                          -   15.622
  slack                                          3.287
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_fabric_interface_clock
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB (r)
               +     4.175          Clock generation
  4.175
               +     2.981          cell: ADLIB:MSS_APB_IP
  7.156                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPSEL (r)
               +     0.123          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSELINT_NET
  7.279                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_42:PIN1INT (r)
               +     0.089          cell: ADLIB:MSS_IF
  7.368                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_42:PIN1 (r)
               +     1.194          net: MultichannelFFT_MSS_0_MSS_MASTER_APB_PSELx
  8.562                        CoreAPB3_0/iPSELS_2[0]:A (r)
               +     0.604          cell: ADLIB:NOR3A
  9.166                        CoreAPB3_0/iPSELS_2[0]:Y (r)
               +     0.340          net: CoreAPB3_0/iPSELS_2[0]
  9.506                        CoreAPB3_0/iPSELS[0]:A (r)
               +     0.478          cell: ADLIB:OR3A
  9.984                        CoreAPB3_0/iPSELS[0]:Y (f)
               +     2.107          net: CoreAPB3_0_APBmslave0_PSELx
  12.091                       CoreAPB3_0/u_mux_p_to_b3/PRDATA_13:B (f)
               +     0.445          cell: ADLIB:NOR2A
  12.536                       CoreAPB3_0/u_mux_p_to_b3/PRDATA_13:Y (r)
               +     2.439          net: MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[13]
  14.975                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_41:PIN5 (r)
               +     0.216          cell: ADLIB:MSS_IF
  15.191                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_41:PIN5INT (r)
               +     0.431          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[13]INT_NET
  15.622                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[13] (r)
                                    
  15.622                       data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_fabric_interface_clock
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB (r)
               +     4.175          Clock generation
  16.675
               -    -2.234          Library setup time: ADLIB:MSS_APB_IP
  18.909                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[13]
                                    
  18.909                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

SET mss_ccc_gla1 to mss_fabric_interface_clock

Path 1
  From:                        Aapb_int_fft_0/PREADY0:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY
  Delay (ns):                  4.720
  Slack (ns):                  6.706
  Arrival (ns):                10.617
  Required (ns):               17.323
  Setup (ns):                  -0.648

Path 2
  From:                        Aapb_int_fft_0/PREADY1:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY
  Delay (ns):                  4.621
  Slack (ns):                  6.844
  Arrival (ns):                10.479
  Required (ns):               17.323
  Setup (ns):                  -0.648

Path 3
  From:                        Aapb_int_fft_0/EMPTY_OUT_REG:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY
  Delay (ns):                  4.420
  Slack (ns):                  7.069
  Arrival (ns):                10.317
  Required (ns):               17.386
  Setup (ns):                  -0.711

Path 4
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U1:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY
  Delay (ns):                  4.319
  Slack (ns):                  7.085
  Arrival (ns):                10.238
  Required (ns):               17.323
  Setup (ns):                  -0.648

Path 5
  From:                        Aapb_int_fft_0/fifo256x16_inst/\\DFN1E1C0_Q[13]\\:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPRDATA[13]
  Delay (ns):                  4.670
  Slack (ns):                  8.390
  Arrival (ns):                10.540
  Required (ns):               18.930
  Setup (ns):                  -2.255


Expanded Path 1
  From: Aapb_int_fft_0/PREADY0:CLK
  To: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY
  data required time                             17.323
  data arrival time                          -   10.617
  slack                                          6.706
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_ccc_gla1
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  5.249
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.648          net: FAB_CLK
  5.897                        Aapb_int_fft_0/PREADY0:CLK (r)
               +     0.671          cell: ADLIB:DFN1P0
  6.568                        Aapb_int_fft_0/PREADY0:Q (f)
               +     0.369          net: Aapb_int_fft_0/PREADY0
  6.937                        Aapb_int_fft_0/PREADY1_RNIA7US:A (f)
               +     0.620          cell: ADLIB:NOR3B
  7.557                        Aapb_int_fft_0/PREADY1_RNIA7US:Y (f)
               +     0.855          net: Aapb_int_fft_0/un5_pready
  8.412                        Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_RNIT1EF1:A (f)
               +     0.527          cell: ADLIB:MX2
  8.939                        Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_RNIT1EF1:Y (f)
               +     0.328          net: CoreAPB3_0_APBmslave0_PREADY
  9.267                        CoreAPB3_0/u_mux_p_to_b3/PREADY:A (f)
               +     0.462          cell: ADLIB:OR2
  9.729                        CoreAPB3_0/u_mux_p_to_b3/PREADY:Y (f)
               +     0.276          net: MultichannelFFT_MSS_0_MSS_MASTER_APB_PREADY
  10.005                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_36:PIN5 (f)
               +     0.190          cell: ADLIB:MSS_IF
  10.195                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_36:PIN5INT (f)
               +     0.422          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPREADYINT_NET
  10.617                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY (f)
                                    
  10.617                       data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_fabric_interface_clock
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB (r)
               +     4.175          Clock generation
  16.675
               -    -0.648          Library setup time: ADLIB:MSS_APB_IP
  17.323                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPREADY
                                    
  17.323                       data required time


END SET mss_ccc_gla1 to mss_fabric_interface_clock

----------------------------------------------------

Clock Domain mss_pclk1

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

SET mss_ccc_gla1 to mss_pclk1

Path 1
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U1:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[0]
  Delay (ns):                  2.669
  Slack (ns):                  8.148
  Arrival (ns):                8.588
  Required (ns):               16.736
  Setup (ns):                  -0.061

Path 2
  From:                        Aapb_int_fft_0/fifo256x16_inst/DFN1P0_EMPTY:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[3]
  Delay (ns):                  2.622
  Slack (ns):                  8.492
  Arrival (ns):                8.466
  Required (ns):               16.958
  Setup (ns):                  -0.283

Path 3
  From:                        Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[2]
  Delay (ns):                  2.288
  Slack (ns):                  8.718
  Arrival (ns):                8.145
  Required (ns):               16.863
  Setup (ns):                  -0.188

Path 4
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rEn_int:CLK
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[1]
  Delay (ns):                  1.016
  Slack (ns):                  9.831
  Arrival (ns):                6.912
  Required (ns):               16.743
  Setup (ns):                  -0.068


Expanded Path 1
  From: Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U1:CLK
  To: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[0]
  data required time                             16.736
  data arrival time                          -   8.588
  slack                                          8.148
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_ccc_gla1
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  5.249
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.670          net: FAB_CLK
  5.919                        Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U1:CLK (r)
               +     0.528          cell: ADLIB:DFN1C0
  6.447                        Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U1:Q (r)
               +     2.062          net: Aapb_int_fft_0_FFT_IP_RDY
  8.509                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_20:PIN5 (r)
               +     0.079          cell: ADLIB:MSS_IF
  8.588                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_20:PIN5INT (r)
               +     0.000          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[0]INT_NET
  8.588                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[0] (r)
                                    
  8.588                        data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_pclk1
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:PCLK1 (r)
               +     4.175          Clock generation
  16.675
               -    -0.061          Library setup time: ADLIB:MSS_APB_IP
  16.736                       MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GPI[0]
                                    
  16.736                       data required time


END SET mss_ccc_gla1 to mss_pclk1

----------------------------------------------------

Clock Domain mss_ccc_gla1

SET Register to Register

Path 1
  From:                        Aapb_int_fft_0/PENABLE_reg:CLK
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
  Delay (ns):                  17.822
  Slack (ns):                  -5.858
  Arrival (ns):                23.725
  Required (ns):               17.867
  Setup (ns):                  0.490
  Minimum Period (ns):         18.358

Path 2
  From:                        Aapb_int_fft_0/ifoY_valid:CLK
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL:D
  Delay (ns):                  17.180
  Slack (ns):                  -5.196
  Arrival (ns):                23.075
  Required (ns):               17.879
  Setup (ns):                  0.522
  Minimum Period (ns):         17.696

Path 3
  From:                        Aapb_int_fft_0/fifo256x16_inst/DFN1C0_FULL:CLK
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL:D
  Delay (ns):                  16.815
  Slack (ns):                  -4.831
  Arrival (ns):                22.710
  Required (ns):               17.879
  Setup (ns):                  0.522
  Minimum Period (ns):         17.331

Path 4
  From:                        Aapb_int_fft_0/fifo256x16_inst/\\DFN1C0_MEM_WADDR[0]\\:CLK
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL:D
  Delay (ns):                  16.173
  Slack (ns):                  -4.195
  Arrival (ns):                22.074
  Required (ns):               17.879
  Setup (ns):                  0.522
  Minimum Period (ns):         16.695

Path 5
  From:                        Aapb_int_fft_0/fifo256x16_inst/DFN1P0_EMPTY:CLK
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
  Delay (ns):                  15.958
  Slack (ns):                  -3.935
  Arrival (ns):                21.802
  Required (ns):               17.867
  Setup (ns):                  0.490
  Minimum Period (ns):         16.435


Expanded Path 1
  From: Aapb_int_fft_0/PENABLE_reg:CLK
  To: Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
  data required time                             17.867
  data arrival time                          -   23.725
  slack                                          -5.858
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_ccc_gla1
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  5.249
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.654          net: FAB_CLK
  5.903                        Aapb_int_fft_0/PENABLE_reg:CLK (r)
               +     0.671          cell: ADLIB:DFN1P0
  6.574                        Aapb_int_fft_0/PENABLE_reg:Q (f)
               +     0.306          net: Aapb_int_fft_0/PENABLE_reg_i_0
  6.880                        Aapb_int_fft_0/PENABLE_reg_RNIE8K93:B (f)
               +     0.584          cell: ADLIB:NOR3B
  7.464                        Aapb_int_fft_0/PENABLE_reg_RNIE8K93:Y (f)
               +     1.849          net: Aapb_int_fft_0/REP
  9.313                        Aapb_int_fft_0/fifo256x16_inst/AND2_MEMORYRE:B (f)
               +     0.571          cell: ADLIB:AND2A
  9.884                        Aapb_int_fft_0/fifo256x16_inst/AND2_MEMORYRE:Y (f)
               +     0.369          net: Aapb_int_fft_0/fifo256x16_inst/MEMORYRE
  10.253                       Aapb_int_fft_0/fifo256x16_inst/AND2_77:B (f)
               +     0.574          cell: ADLIB:AND2
  10.827                       Aapb_int_fft_0/fifo256x16_inst/AND2_77:Y (f)
               +     0.369          net: Aapb_int_fft_0/fifo256x16_inst/AND2_77_Y
  11.196                       Aapb_int_fft_0/fifo256x16_inst/AO1_24:B (f)
               +     0.574          cell: ADLIB:NOR2B
  11.770                       Aapb_int_fft_0/fifo256x16_inst/AO1_24:Y (f)
               +     0.437          net: Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y
  12.207                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RBINNXTSHIFT[2]\\:B (f)
               +     0.899          cell: ADLIB:XOR2
  13.106                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RBINNXTSHIFT[2]\\:Y (f)
               +     0.917          net: Aapb_int_fft_0/fifo256x16_inst/Z_RBINNXTSHIFT[2]_
  14.023                       Aapb_int_fft_0/fifo256x16_inst/INV_14:A (f)
               +     0.462          cell: ADLIB:INV
  14.485                       Aapb_int_fft_0/fifo256x16_inst/INV_14:Y (r)
               +     0.440          net: Aapb_int_fft_0/fifo256x16_inst/INV_14_Y
  14.925                       Aapb_int_fft_0/fifo256x16_inst/AND2_46:B (r)
               +     0.470          cell: ADLIB:AND2
  15.395                       Aapb_int_fft_0/fifo256x16_inst/AND2_46:Y (r)
               +     0.322          net: Aapb_int_fft_0/fifo256x16_inst/AND2_46_Y
  15.717                       Aapb_int_fft_0/fifo256x16_inst/AO1_5:C (r)
               +     0.698          cell: ADLIB:AO1
  16.415                       Aapb_int_fft_0/fifo256x16_inst/AO1_5:Y (r)
               +     0.910          net: Aapb_int_fft_0/fifo256x16_inst/AO1_5_Y
  17.325                       Aapb_int_fft_0/fifo256x16_inst/AO1_40:B (r)
               +     0.516          cell: ADLIB:AO1
  17.841                       Aapb_int_fft_0/fifo256x16_inst/AO1_40:Y (r)
               +     0.604          net: Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y
  18.445                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RDIFF[5]\\:C (r)
               +     0.897          cell: ADLIB:XOR3
  19.342                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RDIFF[5]\\:Y (f)
               +     0.382          net: Aapb_int_fft_0/fifo256x16_inst/Z_RDIFF[5]_
  19.724                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_4:C (f)
               +     0.683          cell: ADLIB:OR3
  20.407                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_4:Y (f)
               +     0.334          net: Aapb_int_fft_0/fifo256x16_inst/NAND3A_6_Y
  20.741                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_0:C (f)
               +     0.642          cell: ADLIB:AO1
  21.383                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_0:Y (f)
               +     1.188          net: Aapb_int_fft_0/fifo256x16_inst/AO1_38_Y
  22.571                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO:B (f)
               +     0.848          cell: ADLIB:AOI1
  23.419                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO:Y (r)
               +     0.306          net: Aapb_int_fft_0/fifo256x16_inst/AOI1_0_Y
  23.725                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D (r)
                                    
  23.725                       data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_ccc_gla1
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  17.749
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.608          net: FAB_CLK
  18.357                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:CLK (r)
               -     0.490          Library setup time: ADLIB:DFN1P0
  17.867                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
                                    
  17.867                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

Path 1
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1:CLR
  Delay (ns):                  5.017
  Slack (ns):                  7.258
  Arrival (ns):                10.846
  Required (ns):               18.104
  Recovery (ns):               0.271
  Minimum Period (ns):         5.242
  Skew (ns):                   -0.046

Path 2
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/U1:CLR
  Delay (ns):                  4.776
  Slack (ns):                  7.472
  Arrival (ns):                10.605
  Required (ns):               18.077
  Recovery (ns):               0.271
  Minimum Period (ns):         5.028
  Skew (ns):                   -0.019

Path 3
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out:CLR
  Delay (ns):                  4.506
  Slack (ns):                  7.778
  Arrival (ns):                10.335
  Required (ns):               18.113
  Recovery (ns):               0.271
  Minimum Period (ns):         4.722
  Skew (ns):                   -0.055

Path 4
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/U1:CLR
  Delay (ns):                  4.355
  Slack (ns):                  7.980
  Arrival (ns):                10.184
  Required (ns):               18.164
  Recovery (ns):               0.271
  Minimum Period (ns):         4.520
  Skew (ns):                   -0.106

Path 5
  From:                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/U1:CLR
  Delay (ns):                  4.291
  Slack (ns):                  7.991
  Arrival (ns):                10.120
  Required (ns):               18.111
  Recovery (ns):               0.271
  Minimum Period (ns):         4.509
  Skew (ns):                   -0.053


Expanded Path 1
  From: Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK
  To: Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1:CLR
  data required time                             18.104
  data arrival time                          -   10.846
  slack                                          7.258
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_ccc_gla1
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  5.249
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  5.249                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.580          net: FAB_CLK
  5.829                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:CLK (r)
               +     0.671          cell: ADLIB:DFN1P0
  6.500                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int:Q (f)
               +     1.485          net: Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst
  7.985                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K_0:B (f)
               +     0.445          cell: ADLIB:NOR2A
  8.430                        Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K_0:Y (r)
               +     2.416          net: Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1
  10.846                       Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1:CLR (r)
                                    
  10.846                       data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_ccc_gla1
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  17.749
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.626          net: FAB_CLK
  18.375                       Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1:CLK (r)
               -     0.271          Library recovery time: ADLIB:DFN1C0
  18.104                       Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1:CLR
                                    
  18.104                       data required time


END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

SET mss_fabric_interface_clock to mss_ccc_gla1

Path 1
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
  Delay (ns):                  23.565
  Slack (ns):                  -9.873
  Arrival (ns):                27.740
  Required (ns):               17.867
  Setup (ns):                  0.490

Path 2
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          Aapb_int_fft_0/fifo256x16_inst/DFN1P0_EMPTY:D
  Delay (ns):                  19.913
  Slack (ns):                  -6.266
  Arrival (ns):                24.088
  Required (ns):               17.822
  Setup (ns):                  0.522

Path 3
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          Aapb_int_fft_0/fifo256x16_inst/\\DFN1C0_MEM_RADDR[6]\\:D
  Delay (ns):                  15.783
  Slack (ns):                  -2.120
  Arrival (ns):                19.958
  Required (ns):               17.838
  Setup (ns):                  0.522

Path 4
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          Aapb_int_fft_0/fifo256x16_inst/\\DFN1C0_MEM_RADDR[7]\\:D
  Delay (ns):                  15.711
  Slack (ns):                  -2.048
  Arrival (ns):                19.886
  Required (ns):               17.838
  Setup (ns):                  0.522

Path 5
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To:                          Aapb_int_fft_0/fifo256x16_inst/\\DFN1C0_MEM_RADDR[4]\\:D
  Delay (ns):                  15.181
  Slack (ns):                  -1.486
  Arrival (ns):                19.356
  Required (ns):               17.870
  Setup (ns):                  0.490


Expanded Path 1
  From: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB
  To: Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
  data required time                             17.867
  data arrival time                          -   27.740
  slack                                          -9.873
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_fabric_interface_clock
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:GLB (r)
               +     4.175          Clock generation
  4.175
               +     2.912          cell: ADLIB:MSS_APB_IP
  7.087                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSPSEL (f)
               +     0.157          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSELINT_NET
  7.244                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_42:PIN1INT (f)
               +     0.088          cell: ADLIB:MSS_IF
  7.332                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_42:PIN1 (f)
               +     1.134          net: MultichannelFFT_MSS_0_MSS_MASTER_APB_PSELx
  8.466                        CoreAPB3_0/iPSELS_2[0]:A (f)
               +     0.584          cell: ADLIB:NOR3A
  9.050                        CoreAPB3_0/iPSELS_2[0]:Y (f)
               +     0.328          net: CoreAPB3_0/iPSELS_2[0]
  9.378                        CoreAPB3_0/iPSELS[0]:A (f)
               +     0.422          cell: ADLIB:OR3A
  9.800                        CoreAPB3_0/iPSELS[0]:Y (r)
               +     0.285          net: CoreAPB3_0_APBmslave0_PSELx
  10.085                       Aapb_int_fft_0/un3_fifo_rd_en_1:B (r)
               +     0.468          cell: ADLIB:NOR2A
  10.553                       Aapb_int_fft_0/un3_fifo_rd_en_1:Y (f)
               +     0.306          net: Aapb_int_fft_0/un3_fifo_rd_en_1
  10.859                       Aapb_int_fft_0/PENABLE_reg_RNIE8K93:A (f)
               +     0.620          cell: ADLIB:NOR3B
  11.479                       Aapb_int_fft_0/PENABLE_reg_RNIE8K93:Y (f)
               +     1.849          net: Aapb_int_fft_0/REP
  13.328                       Aapb_int_fft_0/fifo256x16_inst/AND2_MEMORYRE:B (f)
               +     0.571          cell: ADLIB:AND2A
  13.899                       Aapb_int_fft_0/fifo256x16_inst/AND2_MEMORYRE:Y (f)
               +     0.369          net: Aapb_int_fft_0/fifo256x16_inst/MEMORYRE
  14.268                       Aapb_int_fft_0/fifo256x16_inst/AND2_77:B (f)
               +     0.574          cell: ADLIB:AND2
  14.842                       Aapb_int_fft_0/fifo256x16_inst/AND2_77:Y (f)
               +     0.369          net: Aapb_int_fft_0/fifo256x16_inst/AND2_77_Y
  15.211                       Aapb_int_fft_0/fifo256x16_inst/AO1_24:B (f)
               +     0.574          cell: ADLIB:NOR2B
  15.785                       Aapb_int_fft_0/fifo256x16_inst/AO1_24:Y (f)
               +     0.437          net: Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y
  16.222                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RBINNXTSHIFT[2]\\:B (f)
               +     0.899          cell: ADLIB:XOR2
  17.121                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RBINNXTSHIFT[2]\\:Y (f)
               +     0.917          net: Aapb_int_fft_0/fifo256x16_inst/Z_RBINNXTSHIFT[2]_
  18.038                       Aapb_int_fft_0/fifo256x16_inst/INV_14:A (f)
               +     0.462          cell: ADLIB:INV
  18.500                       Aapb_int_fft_0/fifo256x16_inst/INV_14:Y (r)
               +     0.440          net: Aapb_int_fft_0/fifo256x16_inst/INV_14_Y
  18.940                       Aapb_int_fft_0/fifo256x16_inst/AND2_46:B (r)
               +     0.470          cell: ADLIB:AND2
  19.410                       Aapb_int_fft_0/fifo256x16_inst/AND2_46:Y (r)
               +     0.322          net: Aapb_int_fft_0/fifo256x16_inst/AND2_46_Y
  19.732                       Aapb_int_fft_0/fifo256x16_inst/AO1_5:C (r)
               +     0.698          cell: ADLIB:AO1
  20.430                       Aapb_int_fft_0/fifo256x16_inst/AO1_5:Y (r)
               +     0.910          net: Aapb_int_fft_0/fifo256x16_inst/AO1_5_Y
  21.340                       Aapb_int_fft_0/fifo256x16_inst/AO1_40:B (r)
               +     0.516          cell: ADLIB:AO1
  21.856                       Aapb_int_fft_0/fifo256x16_inst/AO1_40:Y (r)
               +     0.604          net: Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y
  22.460                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RDIFF[5]\\:C (r)
               +     0.897          cell: ADLIB:XOR3
  23.357                       Aapb_int_fft_0/fifo256x16_inst/\\XOR2_RDIFF[5]\\:Y (f)
               +     0.382          net: Aapb_int_fft_0/fifo256x16_inst/Z_RDIFF[5]_
  23.739                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_4:C (f)
               +     0.683          cell: ADLIB:OR3
  24.422                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_4:Y (f)
               +     0.334          net: Aapb_int_fft_0/fifo256x16_inst/NAND3A_6_Y
  24.756                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_0:C (f)
               +     0.642          cell: ADLIB:AO1
  25.398                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_0:Y (f)
               +     1.188          net: Aapb_int_fft_0/fifo256x16_inst/AO1_38_Y
  26.586                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO:B (f)
               +     0.848          cell: ADLIB:AOI1
  27.434                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO:Y (r)
               +     0.306          net: Aapb_int_fft_0/fifo256x16_inst/AOI1_0_Y
  27.740                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D (r)
                                    
  27.740                       data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_ccc_gla1
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  17.749
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.608          net: FAB_CLK
  18.357                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:CLK (r)
               -     0.490          Library setup time: ADLIB:DFN1P0
  17.867                       Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY:D
                                    
  17.867                       data required time


END SET mss_fabric_interface_clock to mss_ccc_gla1

----------------------------------------------------

SET mss_ccc_gla0 to mss_ccc_gla1

Path 1
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out:CLR
  Delay (ns):                  10.684
  Slack (ns):                  3.254
  Arrival (ns):                14.859
  Required (ns):               18.113
  Setup (ns):

Path 2
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1:CLR
  Delay (ns):                  10.656
  Slack (ns):                  3.273
  Arrival (ns):                14.831
  Required (ns):               18.104
  Setup (ns):

Path 3
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/U1:CLR
  Delay (ns):                  10.655
  Slack (ns):                  3.334
  Arrival (ns):                14.830
  Required (ns):               18.164
  Setup (ns):

Path 4
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/U1:CLR
  Delay (ns):                  10.591
  Slack (ns):                  3.345
  Arrival (ns):                14.766
  Required (ns):               18.111
  Setup (ns):

Path 5
  From:                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK
  To:                          Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/U1:CLR
  Delay (ns):                  10.415
  Slack (ns):                  3.487
  Arrival (ns):                14.590
  Required (ns):               18.077
  Setup (ns):


Expanded Path 1
  From: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK
  To: Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out:CLR
  data required time                             18.113
  data arrival time                          -   14.859
  slack                                          3.254
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_ccc_gla0
               +     0.000          Clock source
  0.000                        MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLAMSS (r)
               +     3.545          Clock generation
  3.545
               +     0.630          net: MultichannelFFT_MSS_0/GLA0
  4.175                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK (r)
               +     3.632          cell: ADLIB:MSS_APB_IP
  7.807                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:M2FRESETn (r)
               +     0.122          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST/M2FRESETnINT_NET
  7.929                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_46:PIN2INT (r)
               +     0.095          cell: ADLIB:MSS_IF
  8.024                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_46:PIN2 (r)
               +     2.625          net: MultichannelFFT_MSS_0/MSS_ADLIB_INST_M2FRESETn
  10.649                       MultichannelFFT_MSS_0/MSS_ADLIB_INST_RNIC3SC/U_CLKSRC:A (r)
               +     0.699          cell: ADLIB:CLKSRC
  11.348                       MultichannelFFT_MSS_0/MSS_ADLIB_INST_RNIC3SC/U_CLKSRC:Y (r)
               +     0.586          net: MultichannelFFT_MSS_0_M2F_RESET_N
  11.934                       Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K:A (r)
               +     0.470          cell: ADLIB:NOR2A
  12.404                       Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K:Y (r)
               +     2.455          net: Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst
  14.859                       Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out:CLR (r)
                                    
  14.859                       data arrival time
  ________________________________________________________
  Data required time calculation
  12.500                       mss_ccc_gla1
               +     0.000          Clock source
  12.500                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLA (r)
               +     5.249          Clock generation
  17.749
               +     0.000          net: MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5INT (r)
               +     0.000          cell: ADLIB:MSS_CCC_GL_IF
  17.749                       MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1:PIN5 (r)
               +     0.635          net: FAB_CLK
  18.384                       Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out:CLK (r)
               -     0.271          Library recovery time: ADLIB:DFN1C0
  18.113                       Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out:CLR
                                    
  18.113                       data required time


END SET mss_ccc_gla0 to mss_ccc_gla1

----------------------------------------------------

Clock Domain mss_ccc_gla0

Info: The maximum frequency of this clock domain is limited by the period of pin MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Setup

Path 1
  From:                        MSS_RESET_N
  To:                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSRESETn
  Delay (ns):                  0.937
  Slack (ns):
  Arrival (ns):                0.937
  Required (ns):
  Setup (ns):                  -2.196
  External Setup (ns):         -5.434


Expanded Path 1
  From: MSS_RESET_N
  To: MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSRESETn
  data required time                             N/C
  data arrival time                          -   0.937
  slack                                          N/C
  ________________________________________________________
  Data arrival time calculation
  0.000                        MSS_RESET_N (r)
               +     0.000          net: MSS_RESET_N
  0.000                        MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N:PAD (r)
               +     0.937          cell: ADLIB:IOPAD_IN
  0.937                        MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N:Y (r)
               +     0.000          net: MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N_Y
  0.937                        MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSRESETn (r)
                                    
  0.937                        data arrival time
  ________________________________________________________
  Data required time calculation
  N/C                          mss_ccc_gla0
               +     0.000          Clock source
  N/C                          MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLAMSS (r)
               +     3.545          Clock generation
  N/C
               +     0.630          net: MultichannelFFT_MSS_0/GLA0
  N/C                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:FCLK (r)
               -    -2.196          Library setup time: ADLIB:MSS_APB_IP
  N/C                          MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE:MSSRESETn


END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain MultichannelFFT_MSS_0/MSS_CCC_0/I_RCOSC:CLKOUT

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Path set Pin to Pin

SET Input to Output

No Path

END SET Input to Output

----------------------------------------------------

Path set User Sets

