-- Version: 10.1 SP1 10.1.1.6
-- File used only for Simulation

library ieee;
use ieee.std_logic_1164.all;
library smartfusion;
use smartfusion.all;

entity MultichannelFFT is

    port( ADC0_ch0    : in    std_logic;
          ADC0_ch1    : in    std_logic;
          ADC1_ch0    : in    std_logic;
          ADC1_ch1    : in    std_logic;
          MSS_RESET_N : in    std_logic;
          UART_0_RXD  : in    std_logic;
          VAREF0      : in    std_logic;
          VAREF1      : in    std_logic;
          UART_0_TXD  : out   std_logic
        );

end MultichannelFFT;

architecture DEF_ARCH of MultichannelFFT is 

  component MX2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          S : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XOR2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFN1
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component XNOR2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AX1D
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR2A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component INV
    port( A : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component MSS_IF
    port( PIN4    : in    std_logic := 'U';
          PIN5    : in    std_logic := 'U';
          PIN6    : in    std_logic := 'U';
          PIN1    : out   std_logic;
          PIN2    : out   std_logic;
          PIN3    : out   std_logic;
          PIN4INT : out   std_logic;
          PIN5INT : out   std_logic;
          PIN6INT : out   std_logic;
          PIN1INT : in    std_logic := 'U';
          PIN2INT : in    std_logic := 'U';
          PIN3INT : in    std_logic := 'U'
        );
  end component;

  component AND2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR3A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XOR3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component MX2A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          S : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AX1A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR2A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR3B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR2B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AX1B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFN1C0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          CLR : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component MX2C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          S : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR2B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AND3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component MAJ3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AX1C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component BUFF
    port( A : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR3A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFN1E0C0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          CLR : in    std_logic := 'U';
          E   : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component AXOI1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFN1P0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          PRE : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component AX1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XA1A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XA1B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO1B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XA1C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OA1C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AOI1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO13
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFN1E1C0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          CLR : in    std_logic := 'U';
          E   : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component MSS_CCC_IP
    generic (VCOFREQUENCY:real := 0.0);

    port( CLKA      : in    std_logic := 'U';
          EXTFB     : in    std_logic := 'U';
          GLA       : out   std_logic;
          GLAMSS    : out   std_logic;
          LOCK      : out   std_logic;
          LOCKMSS   : out   std_logic;
          CLKB      : in    std_logic := 'U';
          GLB       : out   std_logic;
          YB        : out   std_logic;
          CLKC      : in    std_logic := 'U';
          GLC       : out   std_logic;
          YC        : out   std_logic;
          MACCLK    : out   std_logic;
          SDIN      : in    std_logic := 'U';
          SCLK      : in    std_logic := 'U';
          SSHIFT    : in    std_logic := 'U';
          SUPDATE   : in    std_logic := 'U';
          MODE      : in    std_logic := 'U';
          SDOUT     : out   std_logic;
          PLLEN     : in    std_logic := 'U';
          OADIV     : in    std_logic_vector(4 downto 0) := (others => 'U');
          OADIVHALF : in    std_logic := 'U';
          OADIVRST  : in    std_logic := 'U';
          OAMUX     : in    std_logic_vector(2 downto 0) := (others => 'U');
          BYPASSA   : in    std_logic := 'U';
          DLYGLA    : in    std_logic_vector(4 downto 0) := (others => 'U');
          DLYGLAMSS : in    std_logic_vector(4 downto 0) := (others => 'U');
          DLYGLAFAB : in    std_logic_vector(4 downto 0) := (others => 'U');
          OBDIV     : in    std_logic_vector(4 downto 0) := (others => 'U');
          OBDIVHALF : in    std_logic := 'U';
          OBDIVRST  : in    std_logic := 'U';
          OBMUX     : in    std_logic_vector(2 downto 0) := (others => 'U');
          BYPASSB   : in    std_logic := 'U';
          DLYGLB    : in    std_logic_vector(4 downto 0) := (others => 'U');
          OCDIV     : in    std_logic_vector(4 downto 0) := (others => 'U');
          OCDIVHALF : in    std_logic := 'U';
          OCDIVRST  : in    std_logic := 'U';
          OCMUX     : in    std_logic_vector(2 downto 0) := (others => 'U');
          BYPASSC   : in    std_logic := 'U';
          DLYGLC    : in    std_logic_vector(4 downto 0) := (others => 'U');
          FINDIV    : in    std_logic_vector(6 downto 0) := (others => 'U');
          FBDIV     : in    std_logic_vector(6 downto 0) := (others => 'U');
          FBDLY     : in    std_logic_vector(4 downto 0) := (others => 'U');
          FBSEL     : in    std_logic_vector(1 downto 0) := (others => 'U');
          XDLYSEL   : in    std_logic := 'U';
          VCOSEL    : in    std_logic_vector(2 downto 0) := (others => 'U');
          GLMUXINT  : in    std_logic := 'U';
          GLMUXSEL  : in    std_logic_vector(1 downto 0) := (others => 'U');
          GLMUXCFG  : in    std_logic_vector(1 downto 0) := (others => 'U')
        );
  end component;

  component AND2A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO1A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AXOI5
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO16
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NAND2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OAI1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR3C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFN1E1
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          E   : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component MX2B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          S : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AXO2
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR3B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XA1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component XNOR3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OA1B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AXOI4
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component NOR3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component MSS_CCC_GL_IF
    port( PIN2    : in    std_logic := 'U';
          PIN3    : in    std_logic := 'U';
          PIN4    : in    std_logic := 'U';
          PIN1    : out   std_logic;
          PIN5    : out   std_logic;
          PIN2INT : out   std_logic;
          PIN3INT : out   std_logic;
          PIN4INT : out   std_logic;
          PIN1INT : in    std_logic := 'U';
          PIN5INT : in    std_logic := 'U'
        );
  end component;

  component OA1
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component IOPAD_A_IN
    port( PAD : in    std_logic := 'U';
          Y   : out   std_logic
        );
  end component;

  component MSS_APB_IP
    generic (ACT_CONFIG:integer := 0; ACT_FCLK:integer := 0; 
        ACT_DIE:string := ""; ACT_PKG:string := "");

    port( FCLK           : in    std_logic := 'U';
          MACCLKCCC      : in    std_logic := 'U';
          RCOSC          : in    std_logic := 'U';
          MACCLK         : in    std_logic := 'U';
          PLLLOCK        : in    std_logic := 'U';
          MSSRESETn      : in    std_logic := 'U';
          GPOE           : out   std_logic_vector(31 downto 0);
          SPI0DO         : out   std_logic;
          SPI0DOE        : out   std_logic;
          SPI0DI         : in    std_logic := 'U';
          SPI0CLKI       : in    std_logic := 'U';
          SPI0CLKO       : out   std_logic;
          SPI0MODE       : out   std_logic;
          SPI0SSI        : in    std_logic := 'U';
          SPI0SSO        : out   std_logic_vector(7 downto 0);
          UART0TXD       : out   std_logic;
          UART0RXD       : in    std_logic := 'U';
          I2C0SDAI       : in    std_logic := 'U';
          I2C0SDAO       : out   std_logic;
          I2C0SCLI       : in    std_logic := 'U';
          I2C0SCLO       : out   std_logic;
          SPI1DO         : out   std_logic;
          SPI1DOE        : out   std_logic;
          SPI1DI         : in    std_logic := 'U';
          SPI1CLKI       : in    std_logic := 'U';
          SPI1CLKO       : out   std_logic;
          SPI1MODE       : out   std_logic;
          SPI1SSI        : in    std_logic := 'U';
          SPI1SSO        : out   std_logic_vector(7 downto 0);
          UART1TXD       : out   std_logic;
          UART1RXD       : in    std_logic := 'U';
          I2C1SDAI       : in    std_logic := 'U';
          I2C1SDAO       : out   std_logic;
          I2C1SCLI       : in    std_logic := 'U';
          I2C1SCLO       : out   std_logic;
          MACTXD         : out   std_logic_vector(1 downto 0);
          MACRXD         : in    std_logic_vector(1 downto 0) := (others => 'U');
          MACTXEN        : out   std_logic;
          MACCRSDV       : in    std_logic := 'U';
          MACRXER        : in    std_logic := 'U';
          MACMDI         : in    std_logic := 'U';
          MACMDO         : out   std_logic;
          MACMDEN        : out   std_logic;
          MACMDC         : out   std_logic;
          EMCCLK         : out   std_logic;
          EMCCLKRTN      : in    std_logic := 'U';
          EMCRDB         : in    std_logic_vector(15 downto 0) := (others => 'U');
          EMCAB          : out   std_logic_vector(25 downto 0);
          EMCWDB         : out   std_logic_vector(15 downto 0);
          EMCRWn         : out   std_logic;
          EMCCS0n        : out   std_logic;
          EMCCS1n        : out   std_logic;
          EMCOEN0n       : out   std_logic;
          EMCOEN1n       : out   std_logic;
          EMCBYTEN       : out   std_logic_vector(1 downto 0);
          EMCDBOE        : out   std_logic;
          ADC0           : in    std_logic := 'U';
          ADC1           : in    std_logic := 'U';
          ADC2           : in    std_logic := 'U';
          ADC3           : in    std_logic := 'U';
          ADC4           : in    std_logic := 'U';
          ADC5           : in    std_logic := 'U';
          ADC6           : in    std_logic := 'U';
          ADC7           : in    std_logic := 'U';
          ADC8           : in    std_logic := 'U';
          ADC9           : in    std_logic := 'U';
          ADC10          : in    std_logic := 'U';
          ADC11          : in    std_logic := 'U';
          SDD0           : out   std_logic;
          SDD1           : out   std_logic;
          SDD2           : out   std_logic;
          ABPS0          : in    std_logic := 'U';
          ABPS1          : in    std_logic := 'U';
          ABPS2          : in    std_logic := 'U';
          ABPS3          : in    std_logic := 'U';
          ABPS4          : in    std_logic := 'U';
          ABPS5          : in    std_logic := 'U';
          ABPS6          : in    std_logic := 'U';
          ABPS7          : in    std_logic := 'U';
          ABPS8          : in    std_logic := 'U';
          ABPS9          : in    std_logic := 'U';
          ABPS10         : in    std_logic := 'U';
          ABPS11         : in    std_logic := 'U';
          TM0            : in    std_logic := 'U';
          TM1            : in    std_logic := 'U';
          TM2            : in    std_logic := 'U';
          TM3            : in    std_logic := 'U';
          TM4            : in    std_logic := 'U';
          TM5            : in    std_logic := 'U';
          CM0            : in    std_logic := 'U';
          CM1            : in    std_logic := 'U';
          CM2            : in    std_logic := 'U';
          CM3            : in    std_logic := 'U';
          CM4            : in    std_logic := 'U';
          CM5            : in    std_logic := 'U';
          GNDTM0         : in    std_logic := 'U';
          GNDTM1         : in    std_logic := 'U';
          GNDTM2         : in    std_logic := 'U';
          VAREF0         : in    std_logic := 'U';
          VAREF1         : in    std_logic := 'U';
          VAREF2         : in    std_logic := 'U';
          VAREFOUT       : out   std_logic;
          GNDVAREF       : in    std_logic := 'U';
          PUn            : in    std_logic := 'U';
          MSSPADDR       : out   std_logic_vector(19 downto 0);
          MSSPWDATA      : out   std_logic_vector(31 downto 0);
          MSSPRDATA      : in    std_logic_vector(31 downto 0) := (others => 'U');
          FABPADDR       : in    std_logic_vector(31 downto 0) := (others => 'U');
          FABPWDATA      : in    std_logic_vector(31 downto 0) := (others => 'U');
          FABPRDATA      : out   std_logic_vector(31 downto 0);
          DMAREADY       : in    std_logic_vector(1 downto 0) := (others => 'U');
          MSSINT         : out   std_logic_vector(7 downto 0);
          GPI            : in    std_logic_vector(31 downto 0) := (others => 'U');
          GPO            : out   std_logic_vector(31 downto 0);
          MACM2FTXD      : out   std_logic_vector(1 downto 0);
          MACF2MRXD      : in    std_logic_vector(1 downto 0) := (others => 'U');
          ACEFLAGS       : out   std_logic_vector(31 downto 0);
          UART0CTSn      : in    std_logic := 'U';
          UART0DSRn      : in    std_logic := 'U';
          UART0RTSn      : out   std_logic;
          UART0DTRn      : out   std_logic;
          UART0RIn       : in    std_logic := 'U';
          UART0DCDn      : in    std_logic := 'U';
          UART1CTSn      : in    std_logic := 'U';
          UART1DSRn      : in    std_logic := 'U';
          UART1RIn       : in    std_logic := 'U';
          UART1DCDn      : in    std_logic := 'U';
          I2C0SMBALERTNO : out   std_logic;
          I2C0BCLK       : in    std_logic := 'U';
          I2C0SMBALERTNI : in    std_logic := 'U';
          I2C0SMBUSNI    : in    std_logic := 'U';
          I2C1SMBALERTNO : out   std_logic;
          I2C1BCLK       : in    std_logic := 'U';
          I2C1SMBALERTNI : in    std_logic := 'U';
          I2C1SMBUSNI    : in    std_logic := 'U';
          UART1RTSn      : out   std_logic;
          UART1DTRn      : out   std_logic;
          TXEV           : out   std_logic;
          RXEV           : in    std_logic := 'U';
          VRON           : in    std_logic := 'U';
          MACM2FTXEN     : out   std_logic;
          MACF2MCRSDV    : in    std_logic := 'U';
          MACM2FMDEN     : out   std_logic;
          MACF2MRXER     : in    std_logic := 'U';
          MACM2FMDO      : out   std_logic;
          MACF2MMDI      : in    std_logic := 'U';
          MACM2FMDC      : out   std_logic;
          I2C0SMBUSNO    : out   std_logic;
          I2C1SMBUSNO    : out   std_logic;
          CALIBOUT       : out   std_logic;
          CALIBIN        : in    std_logic := 'U';
          LVTTL0         : out   std_logic;
          LVTTL1         : out   std_logic;
          LVTTL2         : out   std_logic;
          LVTTL0EN       : in    std_logic := 'U';
          LVTTL1EN       : in    std_logic := 'U';
          LVTTL2EN       : in    std_logic := 'U';
          LVTTL3         : out   std_logic;
          LVTTL4         : out   std_logic;
          LVTTL5         : out   std_logic;
          LVTTL3EN       : in    std_logic := 'U';
          LVTTL4EN       : in    std_logic := 'U';
          LVTTL5EN       : in    std_logic := 'U';
          LVTTL6         : out   std_logic;
          LVTTL7         : out   std_logic;
          LVTTL8         : out   std_logic;
          LVTTL6EN       : in    std_logic := 'U';
          LVTTL7EN       : in    std_logic := 'U';
          LVTTL8EN       : in    std_logic := 'U';
          LVTTL9         : out   std_logic;
          LVTTL10        : out   std_logic;
          LVTTL11        : out   std_logic;
          LVTTL9EN       : in    std_logic := 'U';
          LVTTL10EN      : in    std_logic := 'U';
          LVTTL11EN      : in    std_logic := 'U';
          CMP0           : out   std_logic;
          CMP1           : out   std_logic;
          CMP2           : out   std_logic;
          CMP3           : out   std_logic;
          CMP4           : out   std_logic;
          CMP5           : out   std_logic;
          FABSDD0D       : in    std_logic := 'U';
          FABSDD1D       : in    std_logic := 'U';
          FABSDD2D       : in    std_logic := 'U';
          CMP6           : out   std_logic;
          CMP7           : out   std_logic;
          CMP8           : out   std_logic;
          FABACETRIG     : in    std_logic := 'U';
          CMP9           : out   std_logic;
          FABSDD0CLK     : in    std_logic := 'U';
          FABSDD1CLK     : in    std_logic := 'U';
          FABSDD2CLK     : in    std_logic := 'U';
          VCC15GOOD      : out   std_logic;
          VCC33GOOD      : out   std_logic;
          PUFABn         : out   std_logic;
          MSSPREADY      : in    std_logic := 'U';
          MSSPSLVERR     : in    std_logic := 'U';
          MSSPSEL        : out   std_logic;
          MSSPENABLE     : out   std_logic;
          MSSPWRITE      : out   std_logic;
          FABPSEL        : in    std_logic := 'U';
          FABPENABLE     : in    std_logic := 'U';
          FABPWRITE      : in    std_logic := 'U';
          FABPREADY      : out   std_logic;
          FABPSLVERR     : out   std_logic;
          DEEPSLEEP      : out   std_logic;
          SLEEP          : out   std_logic;
          M2FRESETn      : out   std_logic;
          WDINT          : out   std_logic;
          FABINT         : in    std_logic := 'U';
          F2MRESETn      : in    std_logic := 'U';
          SYNCCLKFDBK    : in    std_logic := 'U';
          CMP10          : out   std_logic;
          CMP11          : out   std_logic
        );
  end component;

  component AND3C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AOI1B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component CLKSRC
    port( A : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component OR3C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component RAM512X18
    generic (MEMORYFILE:string := "");

    port( RADDR8 : in    std_logic := 'U';
          RADDR7 : in    std_logic := 'U';
          RADDR6 : in    std_logic := 'U';
          RADDR5 : in    std_logic := 'U';
          RADDR4 : in    std_logic := 'U';
          RADDR3 : in    std_logic := 'U';
          RADDR2 : in    std_logic := 'U';
          RADDR1 : in    std_logic := 'U';
          RADDR0 : in    std_logic := 'U';
          WADDR8 : in    std_logic := 'U';
          WADDR7 : in    std_logic := 'U';
          WADDR6 : in    std_logic := 'U';
          WADDR5 : in    std_logic := 'U';
          WADDR4 : in    std_logic := 'U';
          WADDR3 : in    std_logic := 'U';
          WADDR2 : in    std_logic := 'U';
          WADDR1 : in    std_logic := 'U';
          WADDR0 : in    std_logic := 'U';
          WD17   : in    std_logic := 'U';
          WD16   : in    std_logic := 'U';
          WD15   : in    std_logic := 'U';
          WD14   : in    std_logic := 'U';
          WD13   : in    std_logic := 'U';
          WD12   : in    std_logic := 'U';
          WD11   : in    std_logic := 'U';
          WD10   : in    std_logic := 'U';
          WD9    : in    std_logic := 'U';
          WD8    : in    std_logic := 'U';
          WD7    : in    std_logic := 'U';
          WD6    : in    std_logic := 'U';
          WD5    : in    std_logic := 'U';
          WD4    : in    std_logic := 'U';
          WD3    : in    std_logic := 'U';
          WD2    : in    std_logic := 'U';
          WD1    : in    std_logic := 'U';
          WD0    : in    std_logic := 'U';
          RW0    : in    std_logic := 'U';
          RW1    : in    std_logic := 'U';
          WW0    : in    std_logic := 'U';
          WW1    : in    std_logic := 'U';
          PIPE   : in    std_logic := 'U';
          REN    : in    std_logic := 'U';
          WEN    : in    std_logic := 'U';
          RCLK   : in    std_logic := 'U';
          WCLK   : in    std_logic := 'U';
          RESET  : in    std_logic := 'U';
          RD17   : out   std_logic;
          RD16   : out   std_logic;
          RD15   : out   std_logic;
          RD14   : out   std_logic;
          RD13   : out   std_logic;
          RD12   : out   std_logic;
          RD11   : out   std_logic;
          RD10   : out   std_logic;
          RD9    : out   std_logic;
          RD8    : out   std_logic;
          RD7    : out   std_logic;
          RD6    : out   std_logic;
          RD5    : out   std_logic;
          RD4    : out   std_logic;
          RD3    : out   std_logic;
          RD2    : out   std_logic;
          RD1    : out   std_logic;
          RD0    : out   std_logic
        );
  end component;

  component DFN1E0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          E   : in    std_logic := 'U';
          Q   : out   std_logic
        );
  end component;

  component AO18
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO15
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component IOPAD_IN
    port( PAD : in    std_logic := 'U';
          Y   : out   std_logic
        );
  end component;

  component DFI1C0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          CLR : in    std_logic := 'U';
          QN  : out   std_logic
        );
  end component;

  component DFI1P0
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          PRE : in    std_logic := 'U';
          QN  : out   std_logic
        );
  end component;

  component MSS_CCC_IF
    port( PIN2    : in    std_logic := 'U';
          PIN3    : in    std_logic := 'U';
          PIN4    : in    std_logic := 'U';
          PIN1    : out   std_logic;
          PIN2INT : out   std_logic;
          PIN3INT : out   std_logic;
          PIN4INT : out   std_logic;
          PIN1INT : in    std_logic := 'U'
        );
  end component;

  component AXO3
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AO1C
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AND2B
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component IOPAD_TRI
    port( D   : in    std_logic := 'U';
          E   : in    std_logic := 'U';
          PAD : out   std_logic
        );
  end component;

  component AO12
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AX1E
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component RCOSC
    port( CLKOUT : out   std_logic
        );
  end component;

  component AXO7
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component AOI1A
    port( A : in    std_logic := 'U';
          B : in    std_logic := 'U';
          C : in    std_logic := 'U';
          Y : out   std_logic
        );
  end component;

  component DFI1
    port( D   : in    std_logic := 'U';
          CLK : in    std_logic := 'U';
          QN  : out   std_logic
        );
  end component;

  component GND
    port(Y : out std_logic); 
  end component;

  component VCC
    port(Y : out std_logic); 
  end component;

    signal MultichannelFFT_MSS_0_M2F_RESET_N, FAB_CLK, 
        \CoreAPB3_0_APBmslave0_PRDATA[0]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[1]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[2]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[3]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[4]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[5]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[6]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[7]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[8]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[9]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[10]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[11]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[12]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[13]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[14]\, 
        \CoreAPB3_0_APBmslave0_PRDATA[15]\, 
        Aapb_int_fft_0_FFT_IP_RDY, Aapb_int_fft_0_FFT_OP_RDY, 
        Aapb_int_fft_0_AEMPTY_OUT, Aapb_int_fft_0_EMPTY_OUT, 
        \CoreAPB3_0_APBmslave0_PADDR[8]\, 
        \CoreAPB3_0_APBmslave0_PADDR[9]\, 
        \CoreAPB3_0_APBmslave0_PADDR[10]\, 
        \CoreAPB3_0_APBmslave0_PADDR[11]\, 
        CoreAPB3_0_APBmslave0_PWRITE, 
        CoreAPB3_0_APBmslave0_PENABLE, 
        MultichannelFFT_MSS_0_MSS_MASTER_APB_PSELx, 
        \CoreAPB3_0_APBmslave0_PWDATA[0]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[1]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[2]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[3]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[4]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[5]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[6]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[7]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[8]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[9]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[10]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[11]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[12]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[13]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[14]\, 
        \CoreAPB3_0_APBmslave0_PWDATA[15]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[0]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[1]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[2]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[3]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[4]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[5]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[6]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[7]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[8]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[9]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[10]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[11]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[12]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[13]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[14]\, 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[15]\, 
        MultichannelFFT_MSS_0_MSS_MASTER_APB_PREADY, 
        CoreAPB3_0_APBmslave0_PSELx, CoreAPB3_0_APBmslave0_PREADY, 
        CoreAPB3_0_APBmslave0_PENABLE_i, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_M2FRESETn\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_EMCCLK\, 
        \MultichannelFFT_MSS_0/GLA0\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_PLLLOCK\, 
        \MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N_Y\, 
        \MultichannelFFT_MSS_0/MSS_UART_0_TXD_D\, 
        \MultichannelFFT_MSS_0/MSS_UART_0_RXD_Y\, 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC2_Y\, 
        \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF0_Y\, 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC3_Y\, 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC5_Y\, 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC4_Y\, 
        \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF1_Y\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/N_CLKA_RCOSC\, 
        \CoreAPB3_0/iPSELS_2[0]_net_1\, \Aapb_int_fft_0/WEP\, 
        \Aapb_int_fft_0/ifoY_wire_i\, \Aapb_int_fft_0/psel_reg_i\, 
        \Aapb_int_fft_0/psel_reg\, \Aapb_int_fft_0/un5_pready\, 
        \Aapb_int_fft_0/PREADY0_net_1\, 
        \Aapb_int_fft_0/PREADY1_net_1\, 
        \Aapb_int_fft_0/EMPTY_OUT_REG_net_1\, 
        \Aapb_int_fft_0/REP\, 
        \Aapb_int_fft_0/un3_fifo_rd_en_1_net_1\, 
        \Aapb_int_fft_0/PENABLE_reg_i_0\, 
        \Aapb_int_fft_0/PSEL_reg_i_0\, 
        \Aapb_int_fft_0/START_FFT_net_1\, 
        \Aapb_int_fft_0/flag_i_0\, 
        \Aapb_int_fft_0/fft_out_en_net_1\, 
        \Aapb_int_fft_0/afull_wire_i\, 
        \Aapb_int_fft_0/data_out_reg[0]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[0]\, 
        \Aapb_int_fft_0/data_out_reg[1]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[1]\, 
        \Aapb_int_fft_0/data_out_reg[2]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[2]\, 
        \Aapb_int_fft_0/data_out_reg[3]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[3]\, 
        \Aapb_int_fft_0/data_out_reg[4]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[4]\, 
        \Aapb_int_fft_0/data_out_reg[5]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[5]\, 
        \Aapb_int_fft_0/data_out_reg[6]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[6]\, 
        \Aapb_int_fft_0/data_out_reg[7]_net_1\, 
        \Aapb_int_fft_0/ifoY_re[7]\, 
        \Aapb_int_fft_0/data_out_reg[8]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[0]\, 
        \Aapb_int_fft_0/data_out_reg[9]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[1]\, 
        \Aapb_int_fft_0/data_out_reg[10]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[2]\, 
        \Aapb_int_fft_0/data_out_reg[11]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[3]\, 
        \Aapb_int_fft_0/data_out_reg[12]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[4]\, 
        \Aapb_int_fft_0/data_out_reg[13]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[5]\, 
        \Aapb_int_fft_0/data_out_reg[14]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[6]\, 
        \Aapb_int_fft_0/data_out_reg[15]_net_1\, 
        \Aapb_int_fft_0/ifoY_im[7]\, 
        \Aapb_int_fft_0/fifo256x16_inst/G_9_0_a3_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_5_net_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_a4_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_o4_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_o4_0\, 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_a3_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[3]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_8_net_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/N_17\, 
        \Aapb_int_fft_0/fifo256x16_inst/OR2_0_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_FULL_net_1\, 
        \Aapb_int_fft_0/fifo256x16_inst/OR2A_2_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[6]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_8_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/NOR3A_5_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AOI1_0_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_0_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_38_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_11_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_5_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_6_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[1]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[5]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_36_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/INV_11_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_21_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_56_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_23_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[2]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/XNOR2_14_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\, 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_4_Y\, 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_46_Y\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N124\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N110\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_0\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N120\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[3]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[3]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N133\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N102\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[2]_net_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_0\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N135\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N136\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\, 
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        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I26_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_2\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N117_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N147\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N149\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_3\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_3\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_5\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N128\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[14]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[13]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[12]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[11]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[10]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[9]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[8]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[6]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[5]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[4]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[3]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[2]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[1]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[0]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N127\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I28_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I29_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I30_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I21_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N128_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_1[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[7]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[7]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N106\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I25_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I26_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I23_un1_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I27_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[4]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[4]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I24_Y\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_2\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2[0]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[0]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[0]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N127_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[4]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[5]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[6]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I21_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N128_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_1[7]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[7]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[7]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[4]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[4]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[2]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[3]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I23_un1_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_3\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y_0\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[1]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[0]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[0]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[0]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_4\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y_1\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N153\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[4]\, 
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        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[2]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[0]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[2]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[3]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[4]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[5]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[6]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w_0[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wTimerTC_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst_0_a2_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/y_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_10\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_4\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_2\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_4\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_6\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_18\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_44\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_14\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_22\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_12\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_41\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_10\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_19\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_1_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_2\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_6_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_33\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_41\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_34\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_42\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_35\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_43\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_36\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_45\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_55\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_6\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_32\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_40\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_31\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/closeLoad_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_49\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_37\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/temp_output\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/in_t1_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe22_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/un1_rA_TC_w_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rA_TC_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/un1_preoutbuf_ren3\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/N_12\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rdCtl_reg_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe12_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe11_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/outBufwEnFall_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_5\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_3\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_4\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_14\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_27\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_16\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_28\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_18\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_44\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_63\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_12_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_25\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_10\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_24\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_54_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNO_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowtimer_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/rstAfterInit\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/preRstAfterInit_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_25_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_26_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_17\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_19\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[6]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowtimer_w_3\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowtimer_w_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_21_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_16\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_14\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_24\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_23_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_22_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_18\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_w_int_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[6]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[7]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un7_bflya_w_int[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftDone_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftRd_done_w\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un34_cnten\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_2\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_1_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_5\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/N_35\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe1_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe2_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/y_0_sqmuxa_0_a2_2\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_3\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_2_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_55_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_16\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_28\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_10\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un30_cnten_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_12\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_59\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_14\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/y_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_18\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_30\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_44\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_54_i\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/un1_rst_0_a2_0\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_16\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/y_0_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_10\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_24\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_10\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_14\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_23\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_9\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_13\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_22\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_8\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_12\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_21\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_11\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_20\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_19\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_18\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_5\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_7\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_4\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_6\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_3\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_2\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[6]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[6]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[7]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un7_bflya_w_int[0]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[1]_net_1\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[2]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[7]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[4]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[1]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[5]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[3]\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[5]\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SDIN_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SCLK_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SSHIFT_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SDOUT_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/EXTFB_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/LOCK_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/CLKB_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLB_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/YB_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/MODE_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/CLKC_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SUPDATE_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLC_INT\, 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/YC_INT\, 
        GLMUXINT_GND, PLLEN_VCC, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[21]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[21]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[22]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[23]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[24]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[22]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[23]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[24]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[25]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[26]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[27]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[25]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[26]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[27]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[28]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[29]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[30]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[28]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[29]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[30]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[31]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[31]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0CTSnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DSRnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0RTSnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DTRnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0RInINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DCDnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1CTSnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DSRnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1RInINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DCDnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBALERTNOINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0BCLKINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBALERTNIINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBUSNIINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBALERTNOINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1BCLKINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBALERTNIINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBUSNIINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1RTSnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DTRnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/TXEVINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/RXEVINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VRONINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CALIBININT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBUSNOINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBUSNOINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CALIBOUTINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[8]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[8]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[9]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[10]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[11]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[9]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[10]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[11]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[12]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[13]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[14]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[12]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[13]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[14]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[15]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[15]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPREADYINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSLVERRINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[8]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[9]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[8]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[9]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[10]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[11]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[12]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[10]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[11]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[12]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[13]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[14]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[15]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[13]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[14]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[15]INT_NET\, 
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        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWRITEINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPSELINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPENABLEINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWRITEINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPREADYINT_NET\, 
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        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SLEEPINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[21]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[22]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[23]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[24]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[25]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[26]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[5]INT_NET\, 
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        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[27]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[28]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[29]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/WDINTINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[30]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[31]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[2]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[3]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[4]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[5]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[6]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[8]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[9]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[7]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[8]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[9]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[10]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[11]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[12]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[10]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[11]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[12]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[13]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[14]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[15]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[13]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[14]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[15]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[21]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[21]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[22]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[23]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[24]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[22]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[23]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[24]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[25]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[26]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[27]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[25]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[26]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[27]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[28]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[29]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[30]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[28]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[29]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[30]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[31]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[31]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABINTINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/F2MRESETnINT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DMAREADY[0]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DMAREADY[1]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[16]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[17]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[18]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[21]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[19]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[20]INT_NET\, 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[21]INT_NET\, 
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        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[24]INT_NET\, 
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        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[23]INT_NET\, 
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        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[1]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[0]/Y\, 
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        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[2]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[1]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[1]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[3]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[1]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[0]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[7]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[7]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[6]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/tc_out/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[6]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[1]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[2]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[7]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[0]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[3]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[5]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/tc_out/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[4]/Y\, 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[0]/Y\, 
        AFLSDF_VCC, AFLSDF_GND, \AFLSDF_INV_0\ : std_logic;
    signal GND_power_net1 : std_logic;
    signal VCC_power_net1 : std_logic;
    signal nc47, nc34, nc98, nc89, nc70, nc60, nc74, nc64, nc9, 
        nc92, nc91, nc13, nc23, nc55, nc80, nc33, nc84, nc16, 
        nc26, nc45, nc73, nc58, nc63, nc27, nc17, nc36, nc48, 
        nc37, nc5, nc52, nc76, nc51, nc66, nc77, nc67, nc4, nc42, 
        nc83, nc41, nc90, nc94, nc86, nc59, nc25, nc15, nc87, 
        nc35, nc49, nc28, nc18, nc75, nc65, nc38, nc93, nc1, nc2, 
        nc50, nc22, nc12, nc21, nc11, nc78, nc54, nc68, nc3, nc32, 
        nc40, nc31, nc96, nc44, nc7, nc97, nc85, nc72, nc6, nc71, 
        nc62, nc61, nc19, nc29, nc88, nc53, nc39, nc8, nc82, nc81, 
        nc79, nc43, nc69, nc56, nc20, nc10, nc57, nc95, nc24, 
        nc14, nc46, nc30 : std_logic;

begin 

    GLMUXINT_GND <= GND_power_net1;
    AFLSDF_GND <= GND_power_net1;
    PLLEN_VCC <= VCC_power_net1;
    AFLSDF_VCC <= VCC_power_net1;

    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_10\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_8\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_2_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNISVRN1[4]\ : 
        XNOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_16\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_26_i\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I29_Y\ : 
        AX1D
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I20_un1_Y_0\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa_0_a2\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/N_12\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rdCtl_reg_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_27\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_24\ : 
        INV
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I0_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[0]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[0]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[0]_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_81\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[17]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[18]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[19]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[1]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_25\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_25_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_21\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => 
        Aapb_int_fft_0_FFT_OP_RDY, PIN6 => GLMUXINT_GND, PIN1 => 
        OPEN, PIN2 => OPEN, PIN3 => OPEN, PIN4INT => OPEN, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[1]INT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[1]INT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[1]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[1]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_15\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_15_Y\);
    
    \CoreAPB3_0/iPSELS[0]\ : OR3A
      port map(A => \CoreAPB3_0/iPSELS_2[0]_net_1\, B => 
        \CoreAPB3_0_APBmslave0_PADDR[10]\, C => 
        \CoreAPB3_0_APBmslave0_PADDR[11]\, Y => 
        CoreAPB3_0_APBmslave0_PSELx);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_13\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_13_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[13]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[12]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_25_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_34\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_34_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m58\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_48\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_58\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_63_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m44\ : AX1A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_45\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I25_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I25_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_12\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[6]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_53\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_53_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_31_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[2]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[2]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_7\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_7_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_17\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_17_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIUMH3[3]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_41\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_42\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[9]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[9]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rEn_int\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe12_net_1\, 
        CLK => FAB_CLK, Q => Aapb_int_fft_0_FFT_OP_RDY);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_11\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_80_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_11_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_65\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/PUFABnINT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AND2_S[0]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_53_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNI694E1[2]\ : 
        OR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_14\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_16\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_RNI1NOL[2]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst_0_a2_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[14]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[14]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I26_un1_Y_0\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N133\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_un1_Y_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_7_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_21\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_16\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_16_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIHSK03[0]\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/N_24\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        Y => \Aapb_int_fft_0/fftTop_inst/wEn_odd_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_7\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_3\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_51_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I43_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_13\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_73\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[2]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_73_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_16\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_23_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_41_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_16_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[7]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[7]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\);
    
    \Aapb_int_fft_0/data_out_reg[1]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[1]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_8\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_8_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_31\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[10]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[10]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[10]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m144\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_144\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_48\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/m144\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_6\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_80_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_11\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[12]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[12]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I27_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N123\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I27_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[11]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[10]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNI7DFJ[1]\ : 
        OR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[1]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\, 
        Y => \Aapb_int_fft_0/fftTop_inst/twid_wEn_w\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m74\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/lut_0/N_31\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_75\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[10]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[10]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[15]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[14]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[14]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_5\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_77_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_69\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_69_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m175\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_175\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_127\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[9]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_13\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_23\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_16\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_16_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I25_Y\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I25_Y_0_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N136\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[4]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[12]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[12]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_3\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_43_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_3_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_83\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[23]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[24]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[25]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_16\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_23_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_41_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_16_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_23\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => 
        Aapb_int_fft_0_EMPTY_OUT, PIN6 => GLMUXINT_GND, PIN1 => 
        OPEN, PIN2 => OPEN, PIN3 => OPEN, PIN4INT => OPEN, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[3]INT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[3]INT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out_RNO\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_4\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_44\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_62\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_62_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_13\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_33_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_27_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_49\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_49_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_38\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_38_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un7_bflya_w_int_ADD_7x7_fast_I0_S\ : 
        AX1D
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[6]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un7_bflya_w_int[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_47_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_53\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_53_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_24_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K_1\ : 
        NOR2A
      port map(A => MultichannelFFT_MSS_0_M2F_RESET_N, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_9\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[9]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_12\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_7\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[0]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_7_0\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[2]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[2]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[13]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[13]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_15\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_15_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/NOR2A_1\ : NOR2A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[0]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/NOR2A_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_13\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[14]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_13\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_33_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_27_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_2\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_2_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_21\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_56_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_23_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[12]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[12]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[5]\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[6]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[6]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[0]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[6]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[6]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_77\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_77_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_36\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_36_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_3\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_68_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_5_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_38_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_3_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_5\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_7_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/OR3_1_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_46_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[9]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[0]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[9]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[4]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[2]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[3]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_16\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_24_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/validOut_xhdl3\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyValid_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_50\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[4]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_33\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_33_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I13_un1_Y_0\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0\);
    
    \Aapb_int_fft_0/fifo256x16_inst/OR3_0\ : OR3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_58_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_50_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_7_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/OR3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m13\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_12\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_13\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_14\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_9_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I25_un1_Y\ : 
        NOR3A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_2\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y_0\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[8]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[8]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_25\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_25_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy/U0\ : MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_0_sqmuxa_i\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_2_sqmuxa\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_70\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_70_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_39\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_39_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_37\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_37_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_1\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out_RNI1UU73\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/closeLoad_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/wEn_odd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_10_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0[8]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[5]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_20\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_12\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_40_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[13]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[13]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AND2_S[3]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[8]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_65_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_26_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[8]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m127\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_119\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_128\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_1\ : 
        XNOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_29_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_39_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_30_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_33\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/Y\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_7\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[7]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_14\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_43_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_12_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[6]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[10]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[10]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[10]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_1[3]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_26\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_11\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_11_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_6\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[7]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_69_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[6]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[6]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[6]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_9\ : NOR2B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[5]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_10_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_17_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNI47N61[2]\ : 
        OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_18\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_19\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m35\ : NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_20\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_36\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_50\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_50_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_17\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_4\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_17_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[2]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_4\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[0]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[15]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[15]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_10\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_29\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_6\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_80_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I9_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_3\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[2]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[5]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[13]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m4\ : AXOI1
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_5\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[11]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[11]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_17\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_24_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_35_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_17_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_77\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_77_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_12\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_0_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_2_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_13_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I25_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[2]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[2]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[2]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_4_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[7]\\\\\);
    
    \Aapb_int_fft_0/flag\ : DFN1P0
      port map(D => GLMUXINT_GND, CLK => FAB_CLK, PRE => 
        MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/flag_i_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_83\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_83_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[2]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[2]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_8\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[9]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[9]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I25_un1_Y\ : 
        NOR3A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N119\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_35\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_35_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn_RNO_0\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/N_12\, B
         => \Aapb_int_fft_0/fftTop_inst/outBuf_wEn_w\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rA_TC_w\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/un1_preoutbuf_ren3\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_8\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[9]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[11]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_1\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0_RNI71Q8[8]\ : 
        INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_3_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNI694E1_0[2]\ : 
        AX1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_14\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\, 
        C => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_25_i\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[6]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[6]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_32_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m115\ : NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_20\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_116\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[2]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_23_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_12\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO[4]\ : 
        XA1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_20\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_10\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_32\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_32_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m7\ : XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_8\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_1\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_38\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_38_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[9]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[9]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_3\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_49_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I28_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_2\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K\ : 
        NOR2A
      port map(A => MultichannelFFT_MSS_0_M2F_RESET_N, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNI4I1K_0\ : 
        NOR2A
      port map(A => MultichannelFFT_MSS_0_M2F_RESET_N, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_8\ : INV
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/NOR2A_0_Y\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_36_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_30\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_54_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_30_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w_un20_addrp_w_25\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[0]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[6]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_11_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[11]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_72\ : AND2
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_22_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_46_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_72_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out_RNO_2\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_3\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_2\ : AO1B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[5]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_a3_1\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[5]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_o4_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[5]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[14]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_10\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_7\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_9_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_59\ : 
        BUFF
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_59_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r_0[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[8]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_31\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_31_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_10\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_40_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_10_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[15]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[14]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[14]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_47\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_47_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_20\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_20_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I40_Y\ : 
        XNOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_7\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/output_reg_RNI6U3K\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/outBufwEnFall_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/N_12\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_79\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_79_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m47\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_40\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_47\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_48\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m169\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_169\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_105\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_24\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_70_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_44\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/EBAR\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_44_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_2\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_5_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[2]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_35\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_39_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_2_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_16_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_35_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I2_CO1\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m147\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_70\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_50\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_148\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[0]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[1]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[4]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_42\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_34\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_5\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[6]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_22\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_7\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_7_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_80\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_80_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_52\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[14]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[13]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[15]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[13]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[14]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[15]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[12]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[12]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[12]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_RNO_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_15\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_4\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_6\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_13\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_23\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_3_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_23_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_9\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1RInINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DSRnINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DCDnINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[1]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[2]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[3]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_16\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_16_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[0]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m174\ : OA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_116\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_175\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0[7]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[4]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_19\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m77\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_75\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_77\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_78\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_24\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_70_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[11]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_24_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[13]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[8]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[8]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_4\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_4_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_61\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => PLLEN_VCC, PIN6 => 
        GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => OPEN, 
        PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DMAREADY[0]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/F2MRESETnINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DMAREADY[1]INT_NET\, 
        PIN1INT => GLMUXINT_GND, PIN2INT => GLMUXINT_GND, PIN3INT
         => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_13\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[14]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO_0[3]\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un30_cnten_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, C
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_59\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_8\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_5_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_38_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_68_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I25_Y_0\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[2]_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[2]_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I25_Y_0_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m33\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_27\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_33\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_34_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[2]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_10\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[2]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w_un20_addrp_w_25\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_4\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_16\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_76_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[10]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_2\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_32_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_10\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_47\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_47_Y\);
    
    \Aapb_int_fft_0/PREADY0_RNO\ : INV
      port map(A => \Aapb_int_fft_0/psel_reg\, Y => 
        \Aapb_int_fft_0/psel_reg_i\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_9\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_0\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_0_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_11\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[7]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[1]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[7]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[7]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[7]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[1]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[1]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[1]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[2]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_14\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_5\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_14_0\);
    
    \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_MSSCCC\ : 
        MSS_CCC_IP
      generic map(VCOFREQUENCY => 80.0)

      port map(CLKA => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/N_CLKA_RCOSC\, EXTFB => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/EXTFB_INT\, GLA
         => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT\, 
        GLAMSS => \MultichannelFFT_MSS_0/GLA0\, LOCK => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/LOCK_INT\, 
        LOCKMSS => \MultichannelFFT_MSS_0/MSS_ADLIB_INST_PLLLOCK\, 
        CLKB => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/CLKB_INT\, GLB
         => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLB_INT\, 
        YB => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/YB_INT\, 
        CLKC => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/CLKC_INT\, GLC
         => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLC_INT\, 
        YC => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/YC_INT\, 
        MACCLK => OPEN, SDIN => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SDIN_INT\, SCLK
         => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SCLK_INT\, 
        SSHIFT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SSHIFT_INT\, 
        SUPDATE => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SUPDATE_INT\, 
        MODE => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/MODE_INT\, 
        SDOUT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SDOUT_INT\, 
        PLLEN => PLLEN_VCC, OADIV(4) => GLMUXINT_GND, OADIV(3)
         => GLMUXINT_GND, OADIV(2) => GLMUXINT_GND, OADIV(1) => 
        GLMUXINT_GND, OADIV(0) => GLMUXINT_GND, OADIVHALF => 
        GLMUXINT_GND, OADIVRST => GLMUXINT_GND, OAMUX(2) => 
        PLLEN_VCC, OAMUX(1) => GLMUXINT_GND, OAMUX(0) => 
        GLMUXINT_GND, BYPASSA => GLMUXINT_GND, DLYGLA(4) => 
        GLMUXINT_GND, DLYGLA(3) => GLMUXINT_GND, DLYGLA(2) => 
        GLMUXINT_GND, DLYGLA(1) => GLMUXINT_GND, DLYGLA(0) => 
        GLMUXINT_GND, DLYGLAMSS(4) => GLMUXINT_GND, DLYGLAMSS(3)
         => PLLEN_VCC, DLYGLAMSS(2) => GLMUXINT_GND, DLYGLAMSS(1)
         => GLMUXINT_GND, DLYGLAMSS(0) => GLMUXINT_GND, 
        DLYGLAFAB(4) => GLMUXINT_GND, DLYGLAFAB(3) => PLLEN_VCC, 
        DLYGLAFAB(2) => PLLEN_VCC, DLYGLAFAB(1) => PLLEN_VCC, 
        DLYGLAFAB(0) => PLLEN_VCC, OBDIV(4) => GLMUXINT_GND, 
        OBDIV(3) => GLMUXINT_GND, OBDIV(2) => GLMUXINT_GND, 
        OBDIV(1) => GLMUXINT_GND, OBDIV(0) => GLMUXINT_GND, 
        OBDIVHALF => GLMUXINT_GND, OBDIVRST => GLMUXINT_GND, 
        OBMUX(2) => GLMUXINT_GND, OBMUX(1) => GLMUXINT_GND, 
        OBMUX(0) => GLMUXINT_GND, BYPASSB => PLLEN_VCC, DLYGLB(4)
         => GLMUXINT_GND, DLYGLB(3) => GLMUXINT_GND, DLYGLB(2)
         => GLMUXINT_GND, DLYGLB(1) => GLMUXINT_GND, DLYGLB(0)
         => GLMUXINT_GND, OCDIV(4) => GLMUXINT_GND, OCDIV(3) => 
        GLMUXINT_GND, OCDIV(2) => GLMUXINT_GND, OCDIV(1) => 
        GLMUXINT_GND, OCDIV(0) => GLMUXINT_GND, OCDIVHALF => 
        GLMUXINT_GND, OCDIVRST => GLMUXINT_GND, OCMUX(2) => 
        GLMUXINT_GND, OCMUX(1) => GLMUXINT_GND, OCMUX(0) => 
        GLMUXINT_GND, BYPASSC => PLLEN_VCC, DLYGLC(4) => 
        GLMUXINT_GND, DLYGLC(3) => GLMUXINT_GND, DLYGLC(2) => 
        GLMUXINT_GND, DLYGLC(1) => GLMUXINT_GND, DLYGLC(0) => 
        GLMUXINT_GND, FINDIV(6) => GLMUXINT_GND, FINDIV(5) => 
        GLMUXINT_GND, FINDIV(4) => PLLEN_VCC, FINDIV(3) => 
        GLMUXINT_GND, FINDIV(2) => GLMUXINT_GND, FINDIV(1) => 
        PLLEN_VCC, FINDIV(0) => PLLEN_VCC, FBDIV(6) => 
        GLMUXINT_GND, FBDIV(5) => GLMUXINT_GND, FBDIV(4) => 
        GLMUXINT_GND, FBDIV(3) => PLLEN_VCC, FBDIV(2) => 
        PLLEN_VCC, FBDIV(1) => PLLEN_VCC, FBDIV(0) => PLLEN_VCC, 
        FBDLY(4) => GLMUXINT_GND, FBDLY(3) => GLMUXINT_GND, 
        FBDLY(2) => GLMUXINT_GND, FBDLY(1) => GLMUXINT_GND, 
        FBDLY(0) => PLLEN_VCC, FBSEL(1) => GLMUXINT_GND, FBSEL(0)
         => PLLEN_VCC, XDLYSEL => GLMUXINT_GND, VCOSEL(2) => 
        GLMUXINT_GND, VCOSEL(1) => GLMUXINT_GND, VCOSEL(0) => 
        GLMUXINT_GND, GLMUXINT => GLMUXINT_GND, GLMUXSEL(1) => 
        GLMUXINT_GND, GLMUXSEL(0) => GLMUXINT_GND, GLMUXCFG(1)
         => GLMUXINT_GND, GLMUXCFG(0) => GLMUXINT_GND);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_0\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[0]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[13]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[13]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_1\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_1_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_3\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[20]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[19]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[21]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[19]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[20]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[21]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[0]\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_49\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[12]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[12]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_40\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_40_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_5\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[10]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_9\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_17_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_3_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_10_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_20\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_20_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_13\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_33_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_27_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_16_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[2]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_63\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VCC15GOODINT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VCC33GOODINT_NET\, 
        PIN3INT => GLMUXINT_GND);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_10\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[10]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_12\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_12_Q\);
    
    \Aapb_int_fft_0/data_out_reg[13]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[5]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[13]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[5]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_7\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[10]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[9]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_46\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_46_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_43\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_43_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_15\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_18_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_34_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_9\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_22\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_3\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe5[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe4[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe5[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_7\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_7_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_49\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[5]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[4]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[6]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[4]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[5]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[6]INT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[4]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[4]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_0[4]\ : 
        AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[8]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_23\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_6\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_42_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_28_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_31\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_79_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[8]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[8]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[8]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m68\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_63\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_68\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_69\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_36\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_36_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_46\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_46_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[7]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_34\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_36_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_21_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_61_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_34_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[0]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[0]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[2]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[2]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_20_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_11\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[12]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[12]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_47\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_47_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy/U1\ : DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy/Y\, CLK => 
        FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[13]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[12]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_25_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m41\ : AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_42\);
    
    \Aapb_int_fft_0/PREADY0\ : DFN1P0
      port map(D => \Aapb_int_fft_0/psel_reg_i\, CLK => FAB_CLK, 
        PRE => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/PREADY0_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_10\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_23_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_41_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_19\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_1\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_64_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[11]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn/Y\, CLK
         => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[4]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_10\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_21\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_28_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_5\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_9\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_39_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_73_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_9_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[8]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[8]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[4]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m89\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_45\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_84\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_177\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[1]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_5_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_79\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[11]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[12]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[13]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_39\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[7]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_13_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_39_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m114\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_115\);
    
    \Aapb_int_fft_0/fft_out_en\ : DFN1P0
      port map(D => \Aapb_int_fft_0/afull_wire_i\, CLK => FAB_CLK, 
        PRE => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/fft_out_en_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_22\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_22_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m20\ : AXOI5
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_21\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_61\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_61_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_10_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m71\ : AO16
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_72\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[7]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_13\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIN1IL[4]\ : 
        AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_45\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_6\, 
        C => \Aapb_int_fft_0/fftTop_inst/startLoad_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[1]_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_40\ : MSS_IF
      port map(PIN4 => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[11]\, PIN5
         => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[10]\, 
        PIN6 => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[12]\, 
        PIN1 => \CoreAPB3_0_APBmslave0_PWDATA[10]\, PIN2 => 
        \CoreAPB3_0_APBmslave0_PWDATA[11]\, PIN3 => 
        \CoreAPB3_0_APBmslave0_PWDATA[12]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[11]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[10]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[12]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[10]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[11]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[12]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_6\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_13_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_0_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_2_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_6\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[7]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_13\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_18_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_34_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_0_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_59_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[14]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_66\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_66_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[5]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_8\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m128\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_128\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_116\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_129\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_9\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_0\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_16_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_32\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_32_Q\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_95\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBALERTNIINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1BCLKINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBUSNIINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[6]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[7]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBALERTNOINT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_5\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_0\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[4]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[4]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AOI1_E[0]\\\\\ : 
        NAND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I5_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[5]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[5]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_1\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_17\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[4]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_17_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[1]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_4\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_8_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[12]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[7]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[7]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_14\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe5[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_54\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_54_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[9]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_59_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[14]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_49\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_49_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_24\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I19_Y\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_9\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_7\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N133\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_10\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_23_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_41_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[5]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_43\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_35\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_2\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_2_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_RNO[0]\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_20\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AOI1_E[3]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_26\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_61_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_41\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_41_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_18\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_18_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[11]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[11]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[11]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_9_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/tc_out/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/y_0_sqmuxa\, 
        B => \Aapb_int_fft_0/fftTop_inst/wLastStage_w\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/tc_out/Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_5\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[5]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[5]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[5]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_28\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_16\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_11\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_42\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_42_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_12\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_0_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_2_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_13_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_12_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_35\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[16]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[15]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[17]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[15]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[16]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[17]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[8]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_23_2\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_43\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_17_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_43_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[7]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_45\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_37\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m126\ : OAI1
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_115\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_127\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_8\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I0_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[0]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_36\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_36_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[8]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[8]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[8]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_3\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_49_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_21_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_39\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_39_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_25\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[7]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[7]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_44\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_20\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[1]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_8\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[1]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_10\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I28_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_10\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_40_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[11]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[11]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_61\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_61_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\MX2_PP1[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_22_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[6]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_18\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[6]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m141\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_141\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_7\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_142\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[12]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[12]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_0_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_33\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_33_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_22\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[2]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[2]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_22_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/un1_rA_TC_w_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/un1_preoutbuf_ren3\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[0]\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[8]\, B
         => \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[0]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[4]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_43_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_1[3]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_7_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[1]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_39\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_0_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_5_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_81_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_39_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_11\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_80_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/pipe1\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/inBufValid_w\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/pipe1_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I38_Y\ : 
        XNOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_3\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_3\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_26\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_2\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_5_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[1]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[9]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[9]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_32\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_32_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_27\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[10]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[10]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0_RNILCMT2[3]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowtimer_w_3\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/N_114\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowtimer_w\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full/U0\ : MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb_i\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full_2_sqmuxa\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_29\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_29_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIEOIK[1]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un30_cnten_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m98\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_20\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_99\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_19\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_19_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/swCrossOut_xhdl4_0\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[5]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[5]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[5]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[12]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[11]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_4\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_4_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_82\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[20]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[21]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[22]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m148\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_147\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_148\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_149\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_22\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => 
        Aapb_int_fft_0_AEMPTY_OUT, PIN6 => GLMUXINT_GND, PIN1 => 
        OPEN, PIN2 => OPEN, PIN3 => OPEN, PIN4INT => OPEN, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[2]INT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[2]INT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\MX2_PP1[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_22_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_12\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_0_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_2_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_13_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_1\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/MEMORYWE\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_16\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[5]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[9]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[9]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[9]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_1\ : 
        XNOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_29_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_39_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_24\ : NOR2B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_77_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe4[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe3[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe4[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_8\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_7\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I2_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[2]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_38\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_38_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[15]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_7\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_6\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_11_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_21\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_11\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_21\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_4\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_10_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_17_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_3_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2[0]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[5]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_37\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_0\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_0_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[13]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[13]\\\\\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E
         => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_14_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m102\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_102\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_103\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_23\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_23_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[5]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_35\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[5]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_28\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_28_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_64\ : NOR3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_63_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_9_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_64_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_76\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_10_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_76_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[8]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_15\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_18_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_34_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_15_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_2\ : AND3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_35_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND3_4_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_3_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/rstAfterInit_int\ : 
        DFN1E1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/preRstAfterInit_net_1\, 
        CLK => FAB_CLK, E => MultichannelFFT_MSS_0_M2F_RESET_N, Q
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/rstAfterInit\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[4]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[4]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[1]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[2]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_30\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_30_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_7\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[8]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_14\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_14_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m160_e\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_184\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_39\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_39_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_16\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_24_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_16_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNIN4QP[1]\ : 
        OR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_18\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I25_Y_0\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[2]_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[2]_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I25_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m155\ : XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_155\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_156\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m146\ : MX2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_23\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_146\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_147\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[11]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[11]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[11]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_31_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[1]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_18\ : BUFF
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_18_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[4]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_18\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_18_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[3]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I19_Y\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N123\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[2]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_3\ : AND3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_20_Y\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_0_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/XNOR2_5_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m117\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/N_114\, B => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_117\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_118\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AND2_S[1]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[1]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[4]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[4]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_55\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_55_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_15\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_15_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[11]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[11]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[0]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[0]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_1\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_29\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_29_Q\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_44\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[22]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[21]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[23]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SLEEPINT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[0]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[1]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_7\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_7_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_38\ : MSS_IF
      port map(PIN4 => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[5]\, PIN5
         => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[4]\, 
        PIN6 => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[6]\, 
        PIN1 => \CoreAPB3_0_APBmslave0_PWDATA[4]\, PIN2 => 
        \CoreAPB3_0_APBmslave0_PWDATA[5]\, PIN3 => 
        \CoreAPB3_0_APBmslave0_PWDATA[6]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[5]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[4]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[6]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[4]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[5]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[6]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_39\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_39_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_2\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_32_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_7\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_83_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_0\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_60_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[7]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AND2_S[2]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_81_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_0\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_11\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_9_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_1_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_20_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_59_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[14]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_26\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_66_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_29\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_29_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_63_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[0]_net_1\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_7\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_13\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[14]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[3]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_11_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[11]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_29\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m59\ : AXO2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_60\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_46\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_M2FRESETn\, PIN3
         => OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[28]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[27]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[29]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[5]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/M2FRESETnINT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[6]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_8\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[9]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_37\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_16\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_76_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_10_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I9_CO1\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_12\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_12\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I13_CO1\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[5]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[5]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_42\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_42_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[1]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[9]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[5]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[5]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_12\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[2]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_15_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_44\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_44_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNIIJBA[2]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_24\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_25\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AOI1_E[0]\\\\\ : 
        NAND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_17\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_24_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_35_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_17_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_2\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_7\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[8]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_12\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[8]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[8]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[8]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[4]_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_74\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD1CLKINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD0CLKINT_NET\, 
        PIN6INT => OPEN, PIN1INT => GLMUXINT_GND, PIN2INT => 
        GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_91\ : MSS_IF
      port map(PIN4 => FAB_CLK, PIN5 => GLMUXINT_GND, PIN6 => 
        GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => OPEN, 
        PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SYNCCLKFDBKINT_NET\, 
        PIN5INT => OPEN, PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[31]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[31]INT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_20\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_4_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m10\ : XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_34\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_0\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[3]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[3]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[3]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_34\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_34_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs/U0\ : MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_0_sqmuxa\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_2_sqmuxa\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_2\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[6]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[7]\, C => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un3_bflyriskov_w\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un12_bflyriskov_w_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[1]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[1]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa_0_a2\ : 
        AOI1
      port map(A => \Aapb_int_fft_0/un3_fifo_rd_en_1_net_1\, B
         => CoreAPB3_0_APBmslave0_PWRITE, C => 
        \Aapb_int_fft_0/fftTop_inst/startLoad_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_22\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_22_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[6]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_44_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[6]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_76\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[2]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[3]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[4]INT_NET\);
    
    \Aapb_int_fft_0/data_out_reg[6]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[6]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_38\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_38_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[10]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[10]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_22\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_7\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_22\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_22_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_4_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_31\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_31_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_24_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[10]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_20\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_4_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_0\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_20\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w_0[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_14_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\MX2_PP2[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_12_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I13_Y_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[3]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[3]_net_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N120\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m26\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_22\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_26\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_27\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_81\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_4_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_81_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_32_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_35\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_35_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I24_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_3\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_15\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[15]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_21\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_28_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_43\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_43_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[0]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_3\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_20_2\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_4\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_18\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_18_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_31\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[4]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[3]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[5]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[3]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[4]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[5]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_3\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_43_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_22\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_22_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I4_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[4]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[4]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_8_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_0\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_0_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_93\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBUSNOINT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBUSNOINT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CALIBOUTINT_NET\);
    
    \Aapb_int_fft_0/data_out_reg[8]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[0]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[8]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/rst_VHDL_i_a2\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un3_sync_rawa\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn/U0\ : MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_29\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_22\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_15\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I20_Y_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[5]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[5]_net_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m135\ : MX2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_45\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_136\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m171\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_117\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_171\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_172\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_36_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[3]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I13_Y_0\ : 
        MAJ3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[3]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[13]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_5\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_8_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_37_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_1\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_15\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_26_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_6\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[5]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_9\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_42_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_28_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_21\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_5\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_10\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_62\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_62_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[8]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[7]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_24_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[7]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_59\ : 
        BUFF
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_59_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[7]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_20_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[12]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[15]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[15]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_3\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_7\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_7_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY\ : DFN1P0
      port map(D => \Aapb_int_fft_0/fifo256x16_inst/AOI1_0_Y\, 
        CLK => FAB_CLK, PRE => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => Aapb_int_fft_0_AEMPTY_OUT);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_7\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_7_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_7\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_43_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_79\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_79_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out_RNO_1\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[7]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_4\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_13\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[13]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I42_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_12\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_43_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_81_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_43_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn/U0\ : MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_29\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_24\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_20_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_6\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_42_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_28_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_42\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_42_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_12\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[0]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[5]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_9\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_25_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_18\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_18_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_33\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => 
        \CoreAPB3_0_APBmslave0_PADDR[9]\, PIN2 => 
        \CoreAPB3_0_APBmslave0_PADDR[10]\, PIN3 => 
        \CoreAPB3_0_APBmslave0_PADDR[11]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[10]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[9]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[11]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[9]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[10]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[11]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_72\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[2]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_39_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_72_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_21\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_21_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_9\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_42_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_28_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_13\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_13_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_17\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_17_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_6\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[13]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[13]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[13]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m133_e\ : 
        NOR3A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_195\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_26\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_61_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_26_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[8]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_23_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m45\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_35\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_45\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_46\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_14\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_77_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_68\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_68_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I4_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[4]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[4]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N123\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_25\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_38_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_25_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_7\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_43_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_24\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_70_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[9]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m82\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_81\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_82\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_83\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I30_Y_1\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[7]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[7]_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_1[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_10\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_23_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_41_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_3\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_15\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_18_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_34_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_15_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_29\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_0_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_29_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_62\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL1ENINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL0ENINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL2ENINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL0INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL1INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL2INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_16\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_76_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_16_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_12\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[13]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0[4]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_26_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[11]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[3]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_26\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_26_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_23\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_23_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m154\ : AO16
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_155\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[8]\\\\\ : 
        XNOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[8]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[8]\\\\\, 
        C => \Aapb_int_fft_0/fifo256x16_inst/AO1_35_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_27_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_8\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_7\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AOI1_E[1]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m75\ : AOI1
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I26_Y_0\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[6]_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[6]_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_60\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_60_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_24\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_24_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[7]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[7]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_14\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_33_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_27_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_30_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_7\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_22\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_22_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_12\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNIQ4QD[3]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_25\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_27\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[11]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_2\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_2_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[1]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[1]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_7\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[3]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_42\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_42_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_15\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_10\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[4]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_28\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_41_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_28_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I34_un1_Y\ : 
        OA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_68\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_68_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[3]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_18_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_1_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_15\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_26_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_4\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[7]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_20\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m30\ : AXOI4
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_31\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_27\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_27_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I0_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[0]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_11\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_9_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_1_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_20_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w_un20_addrp_w_27\ : 
        NOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_5\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[15]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[15]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m111\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_105\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_111\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_64\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_64_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_50\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_33\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_33_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m162\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_161\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_162\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_163\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_7\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_2\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I39_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_1\ : 
        AND2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_17\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_15\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_8_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_22\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_2\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_2_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[13]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[13]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_1\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_39_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_29_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_11\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_80_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I44_Y\ : 
        XNOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[7]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N128\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_12\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_1\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_43\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_17_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_43_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I12_Y\ : 
        MAJ3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_4\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_12\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_12_2\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[3]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_25\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_12_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_13\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_8\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO[6]\ : 
        XA1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_22\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_14\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_5_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m118\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_7\, B => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_119\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_3\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[4]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[3]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[4]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[4]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AOI1_E[3]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[4]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[5]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[0]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_44\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/EBAR\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_44_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_0\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_60_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_0\ : 
        AND2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_0_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO\ : AOI1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND3_0_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_38_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_11_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AOI1_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[8]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[7]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_24_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[8]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\MX2_PP0[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_18_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/EBAR\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_82\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[4]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_46_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_82_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_25\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_10\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[11]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_24\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_56_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m84\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_31\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_84\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_85\);
    
    \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE2\ : 
        MSS_CCC_GL_IF
      port map(PIN2 => GLMUXINT_GND, PIN3 => GLMUXINT_GND, PIN4
         => GLMUXINT_GND, PIN1 => OPEN, PIN5 => OPEN, PIN2INT => 
        OPEN, PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/CLKB_INT\, 
        PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/MODE_INT\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/YB_INT\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLB_INT\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_7\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_15_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_44_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m43\ : XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_35\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_12_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_34\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_42_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_34_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_18\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_13_Y\, 
        S => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_18_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_RNIBD1I[2]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/un1_rst_0_a2_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_2_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_11\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_13\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_14\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[2]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I26_un1_Y\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I26_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_30\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_54_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_30_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_8\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[6]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[5]\ : 
        XA1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_28\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_16\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I25_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_24\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_56_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_8\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_31_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_8\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_5_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_38_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_68_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[6]\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_44\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_63\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_18\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XNOR2_RDIFF[1]\\\\\ : 
        XNOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_0_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/NOR2A_1_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_0\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_4_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m134\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_34_0\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_19\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/m134\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m73\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_71\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_73\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_74\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[2]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_10\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[2]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I6_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[6]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[6]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N128_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[5]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[3]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_12_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[3]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[7]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_RNO_1\ : 
        XOR2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[7]\, B => 
        \CoreAPB3_0_APBmslave0_PWDATA[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un7_ldriskov_w\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m116\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_115\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_116\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_117\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[6]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[6]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_16\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_4\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[14]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[6]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I17_Y\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_13\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_11\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_16\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_24_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_3\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_49_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_26\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_26_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_16\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_23_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_41_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_49\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_49_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_19\ : NOR2B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_72_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_0\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_62_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_0_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_0\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND3_5_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/NAND3A_8_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_6_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_38_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_27\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_27_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftDone_int\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftDone_w\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftRd_done_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_25_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_5\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[9]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[9]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_7\ : AND2
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/INV_5_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_8_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m16\ : AX1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_17\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_RNO_0\ : 
        OA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un7_ldriskov_w\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un3_ldriskov_w\, 
        C => \Aapb_int_fft_0/fftTop_inst/N_24\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldriskov\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_9\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_39_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_73_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_12_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[3]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_85\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[2]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_15_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_85_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m69\ : AX1A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_70\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_19\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_19_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_14\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[15]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[15]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[15]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[14]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[14]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_63_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_29\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_65_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[12]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[12]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[12]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[12]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[12]\\\\\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E
         => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[14]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[11]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[11]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I24_Y\ : 
        XOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_4\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_13\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[0]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[0]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_1\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_64_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[14]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I26_Y_1\ : 
        AO1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_0\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_11_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[6]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_22\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[5]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_2_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_22_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_7\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[0]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_7_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_2\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_5_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_5\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_8_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_37_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe3[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe2[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe3[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_8\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_23\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[15]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_65\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_65_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w_un20_addrp_w_22\ : 
        OAI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m157\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_84\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_157\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_158\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_18\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[4]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[11]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[11]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[1]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[1]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_40\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_75_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_5_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_12_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_17\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_24_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_35_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_17_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rdValid_xhdl5\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe2_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/inBufValid_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftDone_int_RNIHGGN\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftRd_done_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_2_sqmuxa\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_3\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_20_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_45\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_45_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[0]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[10]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[10]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[2]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_4\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[23]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[22]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[24]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[22]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[23]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[24]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_21\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_21_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m52\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_5\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_53\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn/U1\ : DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn/Y\, CLK
         => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_15_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_56\ : AND2
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_15_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_38_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_56_Y\);
    
    \Aapb_int_fft_0/PSEL_reg_RNI5D462\ : NOR2A
      port map(A => \Aapb_int_fft_0/PSEL_reg_i_0\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \Aapb_int_fft_0/psel_reg\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_17\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_71_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_17_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_16\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[1]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_4\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_25\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_25_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_14\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I30_Y\ : 
        AX1D
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I21_un1_Y_0\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N128_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_1[7]\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[9]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[9]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[9]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/tc_out/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/tc_out/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/wLastStage_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[6]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_18\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[6]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[9]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[8]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[9]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST_RNIC3SC_0\ : INV
      port map(A => CoreAPB3_0_APBmslave0_PENABLE, Y => 
        CoreAPB3_0_APBmslave0_PENABLE_i);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_31\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_79_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_63\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_63_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_1\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out_RNO_1\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m8\ : NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_8\, B => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_9\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_19\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_40_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_21_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_28_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\MX2_PP3[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_32_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_4\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_1_sqmuxa\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/stageEnd_w\, B
         => \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_1_sqmuxa_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_8\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_8_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RDIFF[5]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_16_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_40_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNO[9]\ : 
        INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I21_un1_Y\ : 
        OA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I20_un1_Y_0\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I21_un1_Y_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_47\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_47_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_32\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_32_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_10\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_6\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_6_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_7\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0CTSnINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[31]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DSRnINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[31]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[1]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[2]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_0\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[1]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_10\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_8\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[7]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[7]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/y_0_sqmuxa\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[0]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_35\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_35_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[5]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_10_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_43_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[5]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[3]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[3]\);
    
    \MultichannelFFT_MSS_0/MSS_ACE_0_ADC2\ : IOPAD_A_IN
      port map(PAD => ADC0_ch0, Y => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_31_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[1]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_8\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[1]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_43\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_43_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_51\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_51_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_CORE\ : MSS_APB_IP
      generic map(ACT_CONFIG => 0, ACT_FCLK => 80000000,
         ACT_DIE => "IP4X3M1", ACT_PKG => "fg484")

      port map(FCLK => \MultichannelFFT_MSS_0/GLA0\, MACCLKCCC
         => GLMUXINT_GND, RCOSC => GLMUXINT_GND, MACCLK => 
        GLMUXINT_GND, PLLLOCK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_PLLLOCK\, MSSRESETn
         => \MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N_Y\, 
        GPOE(31) => nc47, GPOE(30) => nc34, GPOE(29) => nc98, 
        GPOE(28) => nc89, GPOE(27) => nc70, GPOE(26) => nc60, 
        GPOE(25) => nc74, GPOE(24) => nc64, GPOE(23) => nc9, 
        GPOE(22) => nc92, GPOE(21) => nc91, GPOE(20) => nc13, 
        GPOE(19) => nc23, GPOE(18) => nc55, GPOE(17) => nc80, 
        GPOE(16) => nc33, GPOE(15) => nc84, GPOE(14) => nc16, 
        GPOE(13) => nc26, GPOE(12) => nc45, GPOE(11) => nc73, 
        GPOE(10) => nc58, GPOE(9) => nc63, GPOE(8) => nc27, 
        GPOE(7) => nc17, GPOE(6) => nc36, GPOE(5) => nc48, 
        GPOE(4) => nc37, GPOE(3) => nc5, GPOE(2) => nc52, GPOE(1)
         => nc76, GPOE(0) => nc51, SPI0DO => OPEN, SPI0DOE => 
        OPEN, SPI0DI => GLMUXINT_GND, SPI0CLKI => GLMUXINT_GND, 
        SPI0CLKO => OPEN, SPI0MODE => OPEN, SPI0SSI => 
        GLMUXINT_GND, SPI0SSO(7) => nc66, SPI0SSO(6) => nc77, 
        SPI0SSO(5) => nc67, SPI0SSO(4) => nc4, SPI0SSO(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[3]INT_NET\, 
        SPI0SSO(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[2]INT_NET\, 
        SPI0SSO(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[1]INT_NET\, 
        SPI0SSO(0) => nc42, UART0TXD => 
        \MultichannelFFT_MSS_0/MSS_UART_0_TXD_D\, UART0RXD => 
        \MultichannelFFT_MSS_0/MSS_UART_0_RXD_Y\, I2C0SDAI => 
        GLMUXINT_GND, I2C0SDAO => OPEN, I2C0SCLI => GLMUXINT_GND, 
        I2C0SCLO => OPEN, SPI1DO => OPEN, SPI1DOE => OPEN, SPI1DI
         => GLMUXINT_GND, SPI1CLKI => GLMUXINT_GND, SPI1CLKO => 
        OPEN, SPI1MODE => OPEN, SPI1SSI => GLMUXINT_GND, 
        SPI1SSO(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[7]INT_NET\, 
        SPI1SSO(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[6]INT_NET\, 
        SPI1SSO(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[5]INT_NET\, 
        SPI1SSO(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[4]INT_NET\, 
        SPI1SSO(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[3]INT_NET\, 
        SPI1SSO(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[2]INT_NET\, 
        SPI1SSO(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[1]INT_NET\, 
        SPI1SSO(0) => nc83, UART1TXD => OPEN, UART1RXD => 
        GLMUXINT_GND, I2C1SDAI => GLMUXINT_GND, I2C1SDAO => OPEN, 
        I2C1SCLI => GLMUXINT_GND, I2C1SCLO => OPEN, MACTXD(1) => 
        nc41, MACTXD(0) => nc90, MACRXD(1) => GLMUXINT_GND, 
        MACRXD(0) => GLMUXINT_GND, MACTXEN => OPEN, MACCRSDV => 
        GLMUXINT_GND, MACRXER => GLMUXINT_GND, MACMDI => 
        GLMUXINT_GND, MACMDO => OPEN, MACMDEN => OPEN, MACMDC => 
        OPEN, EMCCLK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_EMCCLK\, EMCCLKRTN
         => \MultichannelFFT_MSS_0/MSS_ADLIB_INST_EMCCLK\, 
        EMCRDB(15) => GLMUXINT_GND, EMCRDB(14) => GLMUXINT_GND, 
        EMCRDB(13) => GLMUXINT_GND, EMCRDB(12) => GLMUXINT_GND, 
        EMCRDB(11) => GLMUXINT_GND, EMCRDB(10) => GLMUXINT_GND, 
        EMCRDB(9) => GLMUXINT_GND, EMCRDB(8) => GLMUXINT_GND, 
        EMCRDB(7) => GLMUXINT_GND, EMCRDB(6) => GLMUXINT_GND, 
        EMCRDB(5) => GLMUXINT_GND, EMCRDB(4) => GLMUXINT_GND, 
        EMCRDB(3) => GLMUXINT_GND, EMCRDB(2) => GLMUXINT_GND, 
        EMCRDB(1) => GLMUXINT_GND, EMCRDB(0) => GLMUXINT_GND, 
        EMCAB(25) => nc94, EMCAB(24) => nc86, EMCAB(23) => nc59, 
        EMCAB(22) => nc25, EMCAB(21) => nc15, EMCAB(20) => nc87, 
        EMCAB(19) => nc35, EMCAB(18) => nc49, EMCAB(17) => nc28, 
        EMCAB(16) => nc18, EMCAB(15) => nc75, EMCAB(14) => nc65, 
        EMCAB(13) => nc38, EMCAB(12) => nc93, EMCAB(11) => nc1, 
        EMCAB(10) => nc2, EMCAB(9) => nc50, EMCAB(8) => nc22, 
        EMCAB(7) => nc12, EMCAB(6) => nc21, EMCAB(5) => nc11, 
        EMCAB(4) => nc78, EMCAB(3) => nc54, EMCAB(2) => nc68, 
        EMCAB(1) => nc3, EMCAB(0) => nc32, EMCWDB(15) => nc40, 
        EMCWDB(14) => nc31, EMCWDB(13) => nc96, EMCWDB(12) => 
        nc44, EMCWDB(11) => nc7, EMCWDB(10) => nc97, EMCWDB(9)
         => nc85, EMCWDB(8) => nc72, EMCWDB(7) => nc6, EMCWDB(6)
         => nc71, EMCWDB(5) => nc62, EMCWDB(4) => nc61, EMCWDB(3)
         => nc19, EMCWDB(2) => nc29, EMCWDB(1) => nc88, EMCWDB(0)
         => nc53, EMCRWn => OPEN, EMCCS0n => OPEN, EMCCS1n => 
        OPEN, EMCOEN0n => OPEN, EMCOEN1n => OPEN, EMCBYTEN(1) => 
        nc39, EMCBYTEN(0) => nc8, EMCDBOE => OPEN, ADC0 => 
        GLMUXINT_GND, ADC1 => GLMUXINT_GND, ADC2 => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC2_Y\, ADC3 => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC3_Y\, ADC4 => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC4_Y\, ADC5 => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC5_Y\, ADC6 => 
        GLMUXINT_GND, ADC7 => GLMUXINT_GND, ADC8 => GLMUXINT_GND, 
        ADC9 => GLMUXINT_GND, ADC10 => GLMUXINT_GND, ADC11 => 
        GLMUXINT_GND, SDD0 => OPEN, SDD1 => OPEN, SDD2 => OPEN, 
        ABPS0 => GLMUXINT_GND, ABPS1 => GLMUXINT_GND, ABPS2 => 
        GLMUXINT_GND, ABPS3 => GLMUXINT_GND, ABPS4 => 
        GLMUXINT_GND, ABPS5 => GLMUXINT_GND, ABPS6 => 
        GLMUXINT_GND, ABPS7 => GLMUXINT_GND, ABPS8 => 
        GLMUXINT_GND, ABPS9 => GLMUXINT_GND, ABPS10 => 
        GLMUXINT_GND, ABPS11 => GLMUXINT_GND, TM0 => GLMUXINT_GND, 
        TM1 => GLMUXINT_GND, TM2 => GLMUXINT_GND, TM3 => 
        GLMUXINT_GND, TM4 => GLMUXINT_GND, TM5 => GLMUXINT_GND, 
        CM0 => GLMUXINT_GND, CM1 => GLMUXINT_GND, CM2 => 
        GLMUXINT_GND, CM3 => GLMUXINT_GND, CM4 => GLMUXINT_GND, 
        CM5 => GLMUXINT_GND, GNDTM0 => GLMUXINT_GND, GNDTM1 => 
        GLMUXINT_GND, GNDTM2 => GLMUXINT_GND, VAREF0 => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF0_Y\, VAREF1 => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF1_Y\, VAREF2 => 
        GLMUXINT_GND, VAREFOUT => OPEN, GNDVAREF => GLMUXINT_GND, 
        PUn => GLMUXINT_GND, MSSPADDR(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[19]INT_NET\, 
        MSSPADDR(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[18]INT_NET\, 
        MSSPADDR(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[17]INT_NET\, 
        MSSPADDR(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[16]INT_NET\, 
        MSSPADDR(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[15]INT_NET\, 
        MSSPADDR(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[14]INT_NET\, 
        MSSPADDR(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[13]INT_NET\, 
        MSSPADDR(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[12]INT_NET\, 
        MSSPADDR(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[11]INT_NET\, 
        MSSPADDR(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[10]INT_NET\, 
        MSSPADDR(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[9]INT_NET\, 
        MSSPADDR(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[8]INT_NET\, 
        MSSPADDR(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[7]INT_NET\, 
        MSSPADDR(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[6]INT_NET\, 
        MSSPADDR(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[5]INT_NET\, 
        MSSPADDR(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[4]INT_NET\, 
        MSSPADDR(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[3]INT_NET\, 
        MSSPADDR(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[2]INT_NET\, 
        MSSPADDR(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[1]INT_NET\, 
        MSSPADDR(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[0]INT_NET\, 
        MSSPWDATA(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[31]INT_NET\, 
        MSSPWDATA(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[30]INT_NET\, 
        MSSPWDATA(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[29]INT_NET\, 
        MSSPWDATA(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[28]INT_NET\, 
        MSSPWDATA(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[27]INT_NET\, 
        MSSPWDATA(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[26]INT_NET\, 
        MSSPWDATA(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[25]INT_NET\, 
        MSSPWDATA(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[24]INT_NET\, 
        MSSPWDATA(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[23]INT_NET\, 
        MSSPWDATA(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[22]INT_NET\, 
        MSSPWDATA(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[21]INT_NET\, 
        MSSPWDATA(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[20]INT_NET\, 
        MSSPWDATA(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[19]INT_NET\, 
        MSSPWDATA(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[18]INT_NET\, 
        MSSPWDATA(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[17]INT_NET\, 
        MSSPWDATA(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[16]INT_NET\, 
        MSSPWDATA(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[15]INT_NET\, 
        MSSPWDATA(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[14]INT_NET\, 
        MSSPWDATA(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[13]INT_NET\, 
        MSSPWDATA(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[12]INT_NET\, 
        MSSPWDATA(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[11]INT_NET\, 
        MSSPWDATA(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[10]INT_NET\, 
        MSSPWDATA(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[9]INT_NET\, 
        MSSPWDATA(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[8]INT_NET\, 
        MSSPWDATA(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[7]INT_NET\, 
        MSSPWDATA(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[6]INT_NET\, 
        MSSPWDATA(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[5]INT_NET\, 
        MSSPWDATA(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[4]INT_NET\, 
        MSSPWDATA(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[3]INT_NET\, 
        MSSPWDATA(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[2]INT_NET\, 
        MSSPWDATA(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[1]INT_NET\, 
        MSSPWDATA(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[0]INT_NET\, 
        MSSPRDATA(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[31]INT_NET\, 
        MSSPRDATA(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[30]INT_NET\, 
        MSSPRDATA(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[29]INT_NET\, 
        MSSPRDATA(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[28]INT_NET\, 
        MSSPRDATA(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[27]INT_NET\, 
        MSSPRDATA(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[26]INT_NET\, 
        MSSPRDATA(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[25]INT_NET\, 
        MSSPRDATA(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[24]INT_NET\, 
        MSSPRDATA(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[23]INT_NET\, 
        MSSPRDATA(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[22]INT_NET\, 
        MSSPRDATA(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[21]INT_NET\, 
        MSSPRDATA(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[20]INT_NET\, 
        MSSPRDATA(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[19]INT_NET\, 
        MSSPRDATA(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[18]INT_NET\, 
        MSSPRDATA(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[17]INT_NET\, 
        MSSPRDATA(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[16]INT_NET\, 
        MSSPRDATA(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[15]INT_NET\, 
        MSSPRDATA(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[14]INT_NET\, 
        MSSPRDATA(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[13]INT_NET\, 
        MSSPRDATA(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[12]INT_NET\, 
        MSSPRDATA(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[11]INT_NET\, 
        MSSPRDATA(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[10]INT_NET\, 
        MSSPRDATA(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[9]INT_NET\, 
        MSSPRDATA(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[8]INT_NET\, 
        MSSPRDATA(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[7]INT_NET\, 
        MSSPRDATA(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[6]INT_NET\, 
        MSSPRDATA(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[5]INT_NET\, 
        MSSPRDATA(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[4]INT_NET\, 
        MSSPRDATA(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[3]INT_NET\, 
        MSSPRDATA(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[2]INT_NET\, 
        MSSPRDATA(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[1]INT_NET\, 
        MSSPRDATA(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[0]INT_NET\, 
        FABPADDR(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[31]INT_NET\, 
        FABPADDR(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[30]INT_NET\, 
        FABPADDR(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[29]INT_NET\, 
        FABPADDR(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[28]INT_NET\, 
        FABPADDR(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[27]INT_NET\, 
        FABPADDR(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[26]INT_NET\, 
        FABPADDR(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[25]INT_NET\, 
        FABPADDR(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[24]INT_NET\, 
        FABPADDR(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[23]INT_NET\, 
        FABPADDR(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[22]INT_NET\, 
        FABPADDR(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[21]INT_NET\, 
        FABPADDR(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[20]INT_NET\, 
        FABPADDR(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[19]INT_NET\, 
        FABPADDR(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[18]INT_NET\, 
        FABPADDR(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[17]INT_NET\, 
        FABPADDR(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[16]INT_NET\, 
        FABPADDR(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[15]INT_NET\, 
        FABPADDR(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[14]INT_NET\, 
        FABPADDR(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[13]INT_NET\, 
        FABPADDR(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[12]INT_NET\, 
        FABPADDR(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[11]INT_NET\, 
        FABPADDR(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[10]INT_NET\, 
        FABPADDR(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[9]INT_NET\, 
        FABPADDR(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[8]INT_NET\, 
        FABPADDR(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[7]INT_NET\, 
        FABPADDR(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[6]INT_NET\, 
        FABPADDR(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[5]INT_NET\, 
        FABPADDR(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[4]INT_NET\, 
        FABPADDR(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[3]INT_NET\, 
        FABPADDR(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[2]INT_NET\, 
        FABPADDR(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[1]INT_NET\, 
        FABPADDR(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[0]INT_NET\, 
        FABPWDATA(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[31]INT_NET\, 
        FABPWDATA(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[30]INT_NET\, 
        FABPWDATA(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[29]INT_NET\, 
        FABPWDATA(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[28]INT_NET\, 
        FABPWDATA(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[27]INT_NET\, 
        FABPWDATA(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[26]INT_NET\, 
        FABPWDATA(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[25]INT_NET\, 
        FABPWDATA(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[24]INT_NET\, 
        FABPWDATA(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[23]INT_NET\, 
        FABPWDATA(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[22]INT_NET\, 
        FABPWDATA(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[21]INT_NET\, 
        FABPWDATA(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[20]INT_NET\, 
        FABPWDATA(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[19]INT_NET\, 
        FABPWDATA(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[18]INT_NET\, 
        FABPWDATA(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[17]INT_NET\, 
        FABPWDATA(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[16]INT_NET\, 
        FABPWDATA(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[15]INT_NET\, 
        FABPWDATA(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[14]INT_NET\, 
        FABPWDATA(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[13]INT_NET\, 
        FABPWDATA(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[12]INT_NET\, 
        FABPWDATA(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[11]INT_NET\, 
        FABPWDATA(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[10]INT_NET\, 
        FABPWDATA(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[9]INT_NET\, 
        FABPWDATA(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[8]INT_NET\, 
        FABPWDATA(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[7]INT_NET\, 
        FABPWDATA(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[6]INT_NET\, 
        FABPWDATA(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[5]INT_NET\, 
        FABPWDATA(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[4]INT_NET\, 
        FABPWDATA(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[3]INT_NET\, 
        FABPWDATA(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[2]INT_NET\, 
        FABPWDATA(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[1]INT_NET\, 
        FABPWDATA(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[0]INT_NET\, 
        FABPRDATA(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[31]INT_NET\, 
        FABPRDATA(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[30]INT_NET\, 
        FABPRDATA(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[29]INT_NET\, 
        FABPRDATA(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[28]INT_NET\, 
        FABPRDATA(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[27]INT_NET\, 
        FABPRDATA(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[26]INT_NET\, 
        FABPRDATA(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[25]INT_NET\, 
        FABPRDATA(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[24]INT_NET\, 
        FABPRDATA(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[23]INT_NET\, 
        FABPRDATA(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[22]INT_NET\, 
        FABPRDATA(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[21]INT_NET\, 
        FABPRDATA(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[20]INT_NET\, 
        FABPRDATA(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[19]INT_NET\, 
        FABPRDATA(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[18]INT_NET\, 
        FABPRDATA(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[17]INT_NET\, 
        FABPRDATA(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[16]INT_NET\, 
        FABPRDATA(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[15]INT_NET\, 
        FABPRDATA(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[14]INT_NET\, 
        FABPRDATA(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[13]INT_NET\, 
        FABPRDATA(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[12]INT_NET\, 
        FABPRDATA(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[11]INT_NET\, 
        FABPRDATA(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[10]INT_NET\, 
        FABPRDATA(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[9]INT_NET\, 
        FABPRDATA(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[8]INT_NET\, 
        FABPRDATA(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[7]INT_NET\, 
        FABPRDATA(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[6]INT_NET\, 
        FABPRDATA(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[5]INT_NET\, 
        FABPRDATA(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[4]INT_NET\, 
        FABPRDATA(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[3]INT_NET\, 
        FABPRDATA(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[2]INT_NET\, 
        FABPRDATA(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[1]INT_NET\, 
        FABPRDATA(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[0]INT_NET\, 
        DMAREADY(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DMAREADY[1]INT_NET\, 
        DMAREADY(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DMAREADY[0]INT_NET\, 
        MSSINT(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[7]INT_NET\, 
        MSSINT(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[6]INT_NET\, 
        MSSINT(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[5]INT_NET\, 
        MSSINT(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[4]INT_NET\, 
        MSSINT(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[3]INT_NET\, 
        MSSINT(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[2]INT_NET\, 
        MSSINT(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[1]INT_NET\, 
        MSSINT(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[0]INT_NET\, 
        GPI(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[31]INT_NET\, 
        GPI(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[30]INT_NET\, 
        GPI(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[29]INT_NET\, 
        GPI(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[28]INT_NET\, 
        GPI(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[27]INT_NET\, 
        GPI(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[26]INT_NET\, 
        GPI(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[25]INT_NET\, 
        GPI(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[24]INT_NET\, 
        GPI(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[23]INT_NET\, 
        GPI(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[22]INT_NET\, 
        GPI(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[21]INT_NET\, 
        GPI(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[20]INT_NET\, 
        GPI(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[19]INT_NET\, 
        GPI(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[18]INT_NET\, 
        GPI(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[17]INT_NET\, 
        GPI(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[16]INT_NET\, 
        GPI(15) => GLMUXINT_GND, GPI(14) => GLMUXINT_GND, GPI(13)
         => GLMUXINT_GND, GPI(12) => GLMUXINT_GND, GPI(11) => 
        GLMUXINT_GND, GPI(10) => GLMUXINT_GND, GPI(9) => 
        GLMUXINT_GND, GPI(8) => GLMUXINT_GND, GPI(7) => 
        GLMUXINT_GND, GPI(6) => GLMUXINT_GND, GPI(5) => 
        GLMUXINT_GND, GPI(4) => GLMUXINT_GND, GPI(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[3]INT_NET\, 
        GPI(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[2]INT_NET\, 
        GPI(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[1]INT_NET\, 
        GPI(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[0]INT_NET\, 
        GPO(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[31]INT_NET\, 
        GPO(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[30]INT_NET\, 
        GPO(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[29]INT_NET\, 
        GPO(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[28]INT_NET\, 
        GPO(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[27]INT_NET\, 
        GPO(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[26]INT_NET\, 
        GPO(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[25]INT_NET\, 
        GPO(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[24]INT_NET\, 
        GPO(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[23]INT_NET\, 
        GPO(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[22]INT_NET\, 
        GPO(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[21]INT_NET\, 
        GPO(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[20]INT_NET\, 
        GPO(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[19]INT_NET\, 
        GPO(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[18]INT_NET\, 
        GPO(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[17]INT_NET\, 
        GPO(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[16]INT_NET\, 
        GPO(15) => nc82, GPO(14) => nc81, GPO(13) => nc79, 
        GPO(12) => nc43, GPO(11) => nc69, GPO(10) => nc56, GPO(9)
         => nc20, GPO(8) => nc10, GPO(7) => nc57, GPO(6) => nc95, 
        GPO(5) => nc24, GPO(4) => nc14, GPO(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[3]INT_NET\, 
        GPO(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[2]INT_NET\, 
        GPO(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[1]INT_NET\, 
        GPO(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[0]INT_NET\, 
        MACM2FTXD(1) => nc46, MACM2FTXD(0) => nc30, MACF2MRXD(1)
         => GLMUXINT_GND, MACF2MRXD(0) => GLMUXINT_GND, 
        ACEFLAGS(31) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[31]INT_NET\, 
        ACEFLAGS(30) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[30]INT_NET\, 
        ACEFLAGS(29) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[29]INT_NET\, 
        ACEFLAGS(28) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[28]INT_NET\, 
        ACEFLAGS(27) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[27]INT_NET\, 
        ACEFLAGS(26) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[26]INT_NET\, 
        ACEFLAGS(25) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[25]INT_NET\, 
        ACEFLAGS(24) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[24]INT_NET\, 
        ACEFLAGS(23) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[23]INT_NET\, 
        ACEFLAGS(22) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[22]INT_NET\, 
        ACEFLAGS(21) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[21]INT_NET\, 
        ACEFLAGS(20) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[20]INT_NET\, 
        ACEFLAGS(19) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[19]INT_NET\, 
        ACEFLAGS(18) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[18]INT_NET\, 
        ACEFLAGS(17) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[17]INT_NET\, 
        ACEFLAGS(16) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[16]INT_NET\, 
        ACEFLAGS(15) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[15]INT_NET\, 
        ACEFLAGS(14) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[14]INT_NET\, 
        ACEFLAGS(13) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[13]INT_NET\, 
        ACEFLAGS(12) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[12]INT_NET\, 
        ACEFLAGS(11) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[11]INT_NET\, 
        ACEFLAGS(10) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[10]INT_NET\, 
        ACEFLAGS(9) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[9]INT_NET\, 
        ACEFLAGS(8) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[8]INT_NET\, 
        ACEFLAGS(7) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[7]INT_NET\, 
        ACEFLAGS(6) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[6]INT_NET\, 
        ACEFLAGS(5) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[5]INT_NET\, 
        ACEFLAGS(4) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[4]INT_NET\, 
        ACEFLAGS(3) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[3]INT_NET\, 
        ACEFLAGS(2) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[2]INT_NET\, 
        ACEFLAGS(1) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[1]INT_NET\, 
        ACEFLAGS(0) => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[0]INT_NET\, 
        UART0CTSn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0CTSnINT_NET\, 
        UART0DSRn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DSRnINT_NET\, 
        UART0RTSn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0RTSnINT_NET\, 
        UART0DTRn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DTRnINT_NET\, 
        UART0RIn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0RInINT_NET\, 
        UART0DCDn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DCDnINT_NET\, 
        UART1CTSn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1CTSnINT_NET\, 
        UART1DSRn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DSRnINT_NET\, 
        UART1RIn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1RInINT_NET\, 
        UART1DCDn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DCDnINT_NET\, 
        I2C0SMBALERTNO => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBALERTNOINT_NET\, 
        I2C0BCLK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0BCLKINT_NET\, 
        I2C0SMBALERTNI => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBALERTNIINT_NET\, 
        I2C0SMBUSNI => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBUSNIINT_NET\, 
        I2C1SMBALERTNO => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBALERTNOINT_NET\, 
        I2C1BCLK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1BCLKINT_NET\, 
        I2C1SMBALERTNI => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBALERTNIINT_NET\, 
        I2C1SMBUSNI => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBUSNIINT_NET\, 
        UART1RTSn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1RTSnINT_NET\, 
        UART1DTRn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DTRnINT_NET\, 
        TXEV => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/TXEVINT_NET\, RXEV
         => \MultichannelFFT_MSS_0/MSS_ADLIB_INST/RXEVINT_NET\, 
        VRON => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VRONINT_NET\, 
        MACM2FTXEN => OPEN, MACF2MCRSDV => GLMUXINT_GND, 
        MACM2FMDEN => OPEN, MACF2MRXER => GLMUXINT_GND, MACM2FMDO
         => OPEN, MACF2MMDI => GLMUXINT_GND, MACM2FMDC => OPEN, 
        I2C0SMBUSNO => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBUSNOINT_NET\, 
        I2C1SMBUSNO => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C1SMBUSNOINT_NET\, 
        CALIBOUT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CALIBOUTINT_NET\, 
        CALIBIN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CALIBININT_NET\, 
        LVTTL0 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL0INT_NET\, 
        LVTTL1 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL1INT_NET\, 
        LVTTL2 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL2INT_NET\, 
        LVTTL0EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL0ENINT_NET\, 
        LVTTL1EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL1ENINT_NET\, 
        LVTTL2EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL2ENINT_NET\, 
        LVTTL3 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL3INT_NET\, 
        LVTTL4 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL4INT_NET\, 
        LVTTL5 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL5INT_NET\, 
        LVTTL3EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL3ENINT_NET\, 
        LVTTL4EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL4ENINT_NET\, 
        LVTTL5EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL5ENINT_NET\, 
        LVTTL6 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL6INT_NET\, 
        LVTTL7 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL7INT_NET\, 
        LVTTL8 => OPEN, LVTTL6EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL6ENINT_NET\, 
        LVTTL7EN => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL7ENINT_NET\, 
        LVTTL8EN => OPEN, LVTTL9 => OPEN, LVTTL10 => OPEN, 
        LVTTL11 => OPEN, LVTTL9EN => OPEN, LVTTL10EN => OPEN, 
        LVTTL11EN => OPEN, CMP0 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP0INT_NET\, CMP1
         => \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP1INT_NET\, 
        CMP2 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP2INT_NET\, CMP3
         => \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP3INT_NET\, 
        CMP4 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP4INT_NET\, CMP5
         => \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP5INT_NET\, 
        FABSDD0D => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD0DINT_NET\, 
        FABSDD1D => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD1DINT_NET\, 
        FABSDD2D => OPEN, CMP6 => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP6INT_NET\, CMP7
         => \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP7INT_NET\, 
        CMP8 => OPEN, FABACETRIG => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABACETRIGINT_NET\, 
        CMP9 => OPEN, FABSDD0CLK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD0CLKINT_NET\, 
        FABSDD1CLK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD1CLKINT_NET\, 
        FABSDD2CLK => OPEN, VCC15GOOD => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VCC15GOODINT_NET\, 
        VCC33GOOD => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VCC33GOODINT_NET\, 
        PUFABn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/PUFABnINT_NET\, 
        MSSPREADY => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPREADYINT_NET\, 
        MSSPSLVERR => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSLVERRINT_NET\, 
        MSSPSEL => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSELINT_NET\, 
        MSSPENABLE => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPENABLEINT_NET\, 
        MSSPWRITE => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWRITEINT_NET\, 
        FABPSEL => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPSELINT_NET\, 
        FABPENABLE => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPENABLEINT_NET\, 
        FABPWRITE => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWRITEINT_NET\, 
        FABPREADY => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPREADYINT_NET\, 
        FABPSLVERR => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPSLVERRINT_NET\, 
        DEEPSLEEP => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DEEPSLEEPINT_NET\, 
        SLEEP => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SLEEPINT_NET\, 
        M2FRESETn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/M2FRESETnINT_NET\, 
        WDINT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/WDINTINT_NET\, 
        FABINT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABINTINT_NET\, 
        F2MRESETn => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/F2MRESETnINT_NET\, 
        SYNCCLKFDBK => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SYNCCLKFDBKINT_NET\, 
        CMP10 => OPEN, CMP11 => OPEN);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_0\ : AND3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[6]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[7]\\\\\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[8]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNO[2]\ : 
        XNOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_14\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_23_i\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AND2_S[2]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[9]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[9]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_26\ : NOR3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_18_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_1_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m120\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_120\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_116\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_121\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_53_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_33\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_33_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_56\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_56_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_3_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_71\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_71_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[3]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[3]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[3]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I13_Y\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I25_Y\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I25_Y_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y_0\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_0\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_43\ : NOR3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[3]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_8_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_43_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_24\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_70_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_25\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_25_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[6]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_38\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_38_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_76\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_76_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[1]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_5_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I27_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_65\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_65_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_25\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_38_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_25_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[3]\ : 
        NOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_5\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_59\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_12\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_44\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_44_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_17\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_4\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_17\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_25\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_25_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_20\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_3\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I30_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/I21_un1_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/N128_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_1[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I30_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_10\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_20\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[5]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[5]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_34\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[4]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I40_Y\ : 
        XNOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_12\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_12_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[1]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[6]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[15]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m87\ : MX2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_85\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_87\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_88\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[14]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[14]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_45\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_45_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_63_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m36\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_36\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_12\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_37\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_14\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_5\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_14_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m99\ : NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_99\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_100\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_RNO[0]\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_16\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_20\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_31\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[3]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_7_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m137\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_137\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_41\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_138\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_23_Y\);
    
    \Aapb_int_fft_0/EMPTY_OUT_REG\ : DFN1E1C0
      port map(D => Aapb_int_fft_0_EMPTY_OUT, CLK => FAB_CLK, CLR
         => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/psel_reg\, Q => 
        \Aapb_int_fft_0/EMPTY_OUT_REG_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[11]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[3]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_EMPTY\ : DFN1P0
      port map(D => \Aapb_int_fft_0/fifo256x16_inst/EMPTYINT\, 
        CLK => FAB_CLK, PRE => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => Aapb_int_fft_0_EMPTY_OUT);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I29_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_50\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_16\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_22\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_60\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_60_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m54\ : OAI1
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[1]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I13_un1_Y_0\ : 
        XA1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[3]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_RNIJBEF\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy\, Y => 
        \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_1\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[2]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa_0_a2\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wTimerTC_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe4[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe3[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe4[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_28\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_41_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_81_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_3\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_9\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_9_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[4]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RDIFF[8]\\\\\ : 
        XNOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[8]\\\\\, C
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_34_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_77\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_77_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_8_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[12]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_18\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_18_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_0\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO[5]\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_22\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_41\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_12\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_1\ : 
        AOI1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un12_bflyriskov_w_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un12_bflyriskov_w_0\, 
        C => \Aapb_int_fft_0/fftTop_inst/bflyValid_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyriskov\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_1\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[2]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[14]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[14]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[0]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_12\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_12_Y\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_12\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[12]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[12]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_16\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_5\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_7\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_14\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_2\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_2_Q\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_45\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[25]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[24]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[26]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[2]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[3]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[4]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_1\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_51\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_51_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I26_Y_1\ : 
        AO1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0_0\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_6\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out_RNO\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/y_0_sqmuxa_0_a2_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_0\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/y_0_sqmuxa\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14_RNIUN74/U_CLKSRC\ : 
        CLKSRC
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[3]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[3]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_7\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_9_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_10\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNITRKQ[0]\ : 
        OR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_14\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_23\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_23_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_92\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => GLMUXINT_GND, PIN2INT => GLMUXINT_GND, PIN3INT
         => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_3\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_10\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_0\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[4]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[4]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[4]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_26_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_1\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I35_un1_Y\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_10\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_40_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[0]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[0]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[0]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_71\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_71_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_1\ : 
        XNOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_29_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_39_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I6_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[6]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[6]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_24\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_8\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_31_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AOI1_E[1]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_8\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_62_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_8_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_4\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[3]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_5\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_43_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_12_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[14]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[7]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[7]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wTimerTC_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AND2_S[2]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[0]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_54_i\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[0]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[13]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[12]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_25_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNI19B[5]\ : 
        OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_28\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_30\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_3\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_26\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_66_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m140\ : MX2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_141\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[9]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[8]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_32\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_32_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_7\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_14_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_17_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_25_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[6]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[6]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_3\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[15]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[14]\, C => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un15_bflyriskov_w\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un12_bflyriskov_w_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\MX2_PP2[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_12_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[8]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_3\ : NAND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[4]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[3]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_o4_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_24\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_24_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[0]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_22\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_22_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_75\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => GLMUXINT_GND, PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[0]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[1]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_32\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_32_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_15\ : 
        MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/wEn_even_w\, B
         => \Aapb_int_fft_0/fftTop_inst/inBuf_wEn_w\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_14\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_6\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[7]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_29\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_66_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_17_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_29_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_32\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        \CoreAPB3_0_APBmslave0_PADDR[8]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[7]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[6]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[8]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[6]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[7]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[8]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[3]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[3]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out_RNO_3\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_81\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_81_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[11]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[11]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_22_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_3\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_10\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_34_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_16_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_1[5]\ : 
        OA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_4\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[7]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[6]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_21_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[7]\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_11\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[11]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I11_CO1\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[3]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[3]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_46\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_46_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_62\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_62_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_5_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[8]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_10\ : BUFF
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[4]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[4]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_17\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_17_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I5_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[5]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[5]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_21\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[3]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_8\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_0[1]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_38\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_38_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I6_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[6]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[6]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N128_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m151\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_150\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_151\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_152\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_29\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_66_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_17_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m81\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_34\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_82\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out_RNO_2\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_0\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_5\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[3]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_7_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\MX2_PP2[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_12_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[6]_net_1\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PREADY\ : OR2
      port map(A => CoreAPB3_0_APBmslave0_PREADY, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        MultichannelFFT_MSS_0_MSS_MASTER_APB_PREADY);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_49\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_49_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[12]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[11]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_21\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_21_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_36\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_11_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_36_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_27\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_27_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_1\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[3]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_3\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_3_Y\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_4\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[4]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rst_comb_i\ : 
        INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb_i\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_0\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_60_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => \Aapb_int_fft_0/fftTop_inst/rA_w[6]\, RADDR5
         => \Aapb_int_fft_0/fftTop_inst/rA_w[5]\, RADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[4]\, RADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[3]\, RADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[2]\, RADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[1]\, RADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[0]\, WADDR8 => 
        AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[6]_net_1\, 
        WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[5]_net_1\, 
        WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[4]_net_1\, 
        WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[3]_net_1\, 
        WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[2]_net_1\, 
        WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[1]_net_1\, 
        WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[0]_net_1\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[15]\, 
        WD15 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[14]\, 
        WD14 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[13]\, 
        WD13 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[12]\, 
        WD12 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[11]\, 
        WD11 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[10]\, 
        WD10 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[9]\, 
        WD9 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[8]\, 
        WD8 => GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[7]\, 
        WD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[6]\, 
        WD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[5]\, 
        WD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[4]\, 
        WD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[3]\, 
        WD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[2]\, 
        WD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[1]\, 
        WD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[0]\, 
        RW0 => GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => 
        GLMUXINT_GND, WW1 => PLLEN_VCC, PIPE => PLLEN_VCC, REN
         => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl3\, 
        RCLK => FAB_CLK, WCLK => FAB_CLK, RESET => PLLEN_VCC, 
        RD17 => OPEN, RD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[15]\, 
        RD15 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[14]\, 
        RD14 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[13]\, 
        RD13 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[12]\, 
        RD12 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[11]\, 
        RD11 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[10]\, 
        RD10 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[9]\, 
        RD9 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[8]\, 
        RD8 => OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[7]\, 
        RD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[6]\, 
        RD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[5]\, 
        RD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[4]\, 
        RD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[3]\, 
        RD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[2]\, 
        RD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[1]\, 
        RD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_14\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_2_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m105\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_102\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_106\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_RNIGQS[2]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wTimerTC_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst_0_a2_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[1]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_22_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_17_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_27\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_27_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_27_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => \Aapb_int_fft_0/fftTop_inst/rA_w[6]\, RADDR5
         => \Aapb_int_fft_0/fftTop_inst/rA_w[5]\, RADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[4]\, RADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[3]\, RADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[2]\, RADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[1]\, RADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[0]\, WADDR8 => 
        AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[6]_net_1\, 
        WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[5]_net_1\, 
        WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[4]_net_1\, 
        WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[3]_net_1\, 
        WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[2]_net_1\, 
        WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[1]_net_1\, 
        WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[0]_net_1\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[15]\, 
        WD15 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[14]\, 
        WD14 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[13]\, 
        WD13 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[12]\, 
        WD12 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[11]\, 
        WD11 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[10]\, 
        WD10 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[9]\, 
        WD9 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[8]\, 
        WD8 => GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[7]\, 
        WD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[6]\, 
        WD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[5]\, 
        WD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[4]\, 
        WD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[3]\, 
        WD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[2]\, 
        WD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[1]\, 
        WD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[0]\, 
        RW0 => GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => 
        GLMUXINT_GND, WW1 => PLLEN_VCC, PIPE => PLLEN_VCC, REN
         => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl4\, 
        RCLK => FAB_CLK, WCLK => FAB_CLK, RESET => PLLEN_VCC, 
        RD17 => OPEN, RD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[15]\, 
        RD15 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[14]\, 
        RD14 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[13]\, 
        RD13 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[12]\, 
        RD12 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[11]\, 
        RD11 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[10]\, 
        RD10 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[9]\, 
        RD9 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[8]\, 
        RD8 => OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[7]\, 
        RD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[6]\, 
        RD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[5]\, 
        RD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[4]\, 
        RD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[3]\, 
        RD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[2]\, 
        RD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[1]\, 
        RD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_3\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_1\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[0]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un7_bflya_w_int[0]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[2]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I3_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[3]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[3]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I40_Y\ : 
        XNOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[10]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[9]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[14]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_17_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m158\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_156\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_158\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_159\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m5\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_4\, B => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_5\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_6\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_7\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_22\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_3\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_29\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_65_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_6\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[8]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_23_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_41\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_41_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I23_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I23_un1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I17_Y\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_0\ : 
        DFN1E0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_4\, 
        CLK => FAB_CLK, E => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_1_sqmuxa_net_1\, 
        Q => \Aapb_int_fft_0/fftTop_inst/upScale_w_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_5\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_26\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_45_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[1]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[1]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[1]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_9\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_42_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_28_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa_0_a2\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[13]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[13]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_2\ : 
        OR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I22_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_8_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_16\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_1\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_27\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_13\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_33_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_27_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_3\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_1\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_64_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_16\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_23_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_41_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_26\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_45_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_7\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_43_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_19\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_19_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_48\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[2]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[1]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[3]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[1]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[2]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[3]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_81\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_81_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_19\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_3\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RDIFF[7]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_11_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_21_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_16_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_8\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_5\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[6]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un15_bflyriskov_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_20\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_20_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_14\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[2]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[8]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_37\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_37_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I9_CO1\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I5_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m156\ : AO18
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_157\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[2]\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[8]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[8]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I26_Y\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_un1_Y_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/N128\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_11\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_17_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_17\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_4\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_17_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_4\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_44_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[0]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_44\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[1]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_1\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_12\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m62\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_61\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_62\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_63\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_10\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out_RNO\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_6\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m28\ : NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_28\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_29\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_14\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_77_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_47\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_47_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_0[3]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[6]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m57\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_52\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_57\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_58\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_5_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_24\ : 
        INV
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I38_Y\ : 
        XNOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[1]_net_1\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_6\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[0]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[0]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_29\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_29_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_9_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m123\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_121\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_123\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_124\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNIHEED2[5]\ : 
        OR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_20\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_22\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[6]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_78\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[8]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[9]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[10]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_11\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[3]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_12\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[3]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_11\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_11_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[8]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[8]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[4]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_1\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[0]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[0]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[4]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[13]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_0\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_4\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[15]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[14]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un3_bflyriskov_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_41\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_41_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe2[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe1[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe2[0]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_RNIUBCS1[2]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/un1_rst_0_a2_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_16\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIIG7[3]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un30_cnten_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_22\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_2\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[13]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_16\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_16_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_10\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_10_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_22\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_1\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNIASG21\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_4\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_2\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_2_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/closeLoad_w\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[13]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[13]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[13]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_35\ : XA1A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[6]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[6]\\\\\, 
        C => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_7_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_35_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_6\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_42_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_28_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[7]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_37\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[7]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[3]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_24\ : 
        INV
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I25_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_7\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[0]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_7\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[0]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[0]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_int\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_w_int_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_9\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m138\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_136\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_138\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_139\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_41\ : MSS_IF
      port map(PIN4 => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[14]\, PIN5
         => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[13]\, 
        PIN6 => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[15]\, 
        PIN1 => \CoreAPB3_0_APBmslave0_PWDATA[13]\, PIN2 => 
        \CoreAPB3_0_APBmslave0_PWDATA[14]\, PIN3 => 
        \CoreAPB3_0_APBmslave0_PWDATA[15]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[14]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[13]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[15]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[13]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[14]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[15]INT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_0\ : OA1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/m45_0_o4_0\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/m45_0_o4_1\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_a4_1\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/N_17\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[6]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_7_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[7]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[1]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0_RNI61Q8[7]\ : 
        INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I28_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[9]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[9]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_72\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[2]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_39_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_72_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_3\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => \Aapb_int_fft_0/fftTop_inst/rA_w[6]\, RADDR5
         => \Aapb_int_fft_0/fftTop_inst/rA_w[5]\, RADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[4]\, RADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[3]\, RADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[2]\, RADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[1]\, RADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[0]\, WADDR8 => 
        AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[6]_net_1\, 
        WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[5]_net_1\, 
        WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[4]_net_1\, 
        WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[3]_net_1\, 
        WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[2]_net_1\, 
        WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[1]_net_1\, 
        WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[0]_net_1\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[15]\, 
        WD15 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[14]\, 
        WD14 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[13]\, 
        WD13 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[12]\, 
        WD12 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[11]\, 
        WD11 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[10]\, 
        WD10 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[9]\, 
        WD9 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[8]\, 
        WD8 => GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[7]\, 
        WD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[6]\, 
        WD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[5]\, 
        WD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[4]\, 
        WD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[3]\, 
        WD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[2]\, 
        WD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[1]\, 
        WD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[0]\, 
        RW0 => GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => 
        GLMUXINT_GND, WW1 => PLLEN_VCC, PIPE => PLLEN_VCC, REN
         => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl3\, 
        RCLK => FAB_CLK, WCLK => FAB_CLK, RESET => PLLEN_VCC, 
        RD17 => OPEN, RD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[15]\, RD15
         => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[14]\, 
        RD14 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[13]\, 
        RD13 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[12]\, 
        RD12 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[11]\, 
        RD11 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[10]\, 
        RD10 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[9]\, 
        RD9 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[8]\, 
        RD8 => OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[7]\, RD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[6]\, RD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[5]\, RD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[4]\, RD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[3]\, RD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[2]\, RD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[1]\, RD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m170\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_95\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_171\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_19\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_64\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_64_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_6\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_6_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_42\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_42_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_24\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_10\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_14\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_24\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[3]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[3]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[4]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[5]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14_RNO\ : OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_41\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_21\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_22_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_0_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_61\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_11_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_61_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_8\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[15]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[14]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[14]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[5]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_1\ : NOR2B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_30_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_1_Y\);
    
    \Aapb_int_fft_0/data_out_reg[12]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[4]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[12]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_3_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_RNO[1]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_16\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_8\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_5\ : AND2A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[6]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/OR2A_2_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_5_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_19_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_14\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_43_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_12_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_11\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m40\ : AO15
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_41\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_5\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_8_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_37_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_1[1]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_31\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_31_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_15\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_8_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_10\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_10_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_71\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP0INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP1INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP2INT_NET\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_43\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[19]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[18]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[20]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPREADYINT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPSLVERRINT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/DEEPSLEEPINT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_10\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_40_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m136\ : AXOI4
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_137\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_20\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[3]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[3]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_20_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[8]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_23_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[7]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[7]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m64\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_64\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_38\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_65\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_14\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_43_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_12_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_36\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_36_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[1]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[10]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_1\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_64_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_4\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I43_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m104\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_100\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_104\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_105\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_50\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[4]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m70\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_36_0\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_70\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_71\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_6\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m143\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_139\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_143\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_144\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m51\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_49\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_51\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_52\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out_RNO_0\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_3\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/y_0_sqmuxa_0_a2_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_70\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_70_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_7\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[7]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[6]\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_45\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_55\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_36\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_7\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[8]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[8]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe2[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe1[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe2[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_2\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_4\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_11\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I12_Y\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[1]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[1]_net_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_3\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w_i\, 
        B => Aapb_int_fft_0_FFT_IP_RDY, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_1_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_2\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_7\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[8]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[1]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[0]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_54_i\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[0]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_18\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_13_Y\, 
        S => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[6]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[10]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[2]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_73\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABACETRIGINT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP6INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP7INT_NET\, 
        PIN3INT => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_5\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[8]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[8]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[7]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_63_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_44_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe5[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m92\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_177\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_178\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_93\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/output_reg\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/temp_output\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/load_done_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_47_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_20_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_54\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_54_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_11\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_9_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_1_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_20_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[15]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_11\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[12]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[12]\);
    
    \MultichannelFFT_MSS_0/MSS_UART_0_RXD\ : IOPAD_IN
      port map(PAD => UART_0_RXD, Y => 
        \MultichannelFFT_MSS_0/MSS_UART_0_RXD_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_5\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_77_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIFO3[4]\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_22\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[12]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[12]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe1[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/preSwValid_w\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe1[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[8]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[8]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[8]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIDRO1[1]\ : 
        OR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_40\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[6]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[5]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[6]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[2]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[2]_net_1\);
    
    \Aapb_int_fft_0/PSEL_reg\ : DFN1P0
      port map(D => CoreAPB3_0_APBmslave0_PSELx, CLK => FAB_CLK, 
        PRE => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/PSEL_reg_i_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_31\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m110\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_108\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_110\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_111\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I18_Y\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[4]_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[4]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_3\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[3]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_19\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_82\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[4]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_46_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_82_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[12]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m165\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_101\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_107\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_166\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_0_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[3]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[2]_net_1\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_5\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_21_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_9\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_9_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_28\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[2]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[12]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[12]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_30\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_54_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_30_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\MX2_PP3[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_32_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I12_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_9\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[11]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[10]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_21\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[13]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[4]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[4]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I13_Y_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[3]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[3]_net_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_12\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_16_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w_un20_addrp_w_27\ : 
        NOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[7]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_33\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_5_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_20_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_31_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_33_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_1[5]\ : 
        OA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_5\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_43_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_12_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wEn_r_RNIHTKD\ : INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/wEn_r\, Y => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wEn_r_i\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_RNO\ : AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldriskov\, B => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/startLoad_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_RNO_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_9\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_25_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_9_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_FULL\ : DFN1C0
      port map(D => \Aapb_int_fft_0/fifo256x16_inst/FULLINT\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q
         => \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_FULL_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_19_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[14]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_19_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_53\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_53_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL\ : DFI1C0
      port map(D => \Aapb_int_fft_0/fifo256x16_inst/OR2_0_Y\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, QN
         => \Aapb_int_fft_0/afull_wire_i\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_66\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_66_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_46\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_46_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO_0[5]\ : 
        OA1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_20\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_41\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_4\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_44_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_0[1]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_7_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[1]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/OR2A_3\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_14_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/OR3_1_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/OR2A_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_1\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_1_Y\);
    
    \Aapb_int_fft_0/ifoY_valid\ : DFI1P0
      port map(D => \Aapb_int_fft_0/ifoY_wire_i\, CLK => FAB_CLK, 
        PRE => MultichannelFFT_MSS_0_M2F_RESET_N, QN => 
        \Aapb_int_fft_0/WEP\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/int_outp[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_5\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_37\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m6\ : NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_7\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I2_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_49\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_49_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I10_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_5\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\MX2_PP3[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_32_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I26_Y_0\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[6]_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[6]_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[6]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m18\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_10\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_18\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_19\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_8_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_3\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_51_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AND2_S[1]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[3]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[10]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\);
    
    \Aapb_int_fft_0/data_out_reg[10]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[2]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[10]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_7\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_83_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_10\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_23_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_41_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I41_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N123\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_23\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_3_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_23_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[0]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[0]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[0]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[0]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[8]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[7]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_24_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_7\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_19_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[14]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_80\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_80_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_28_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_17\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_71_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_17_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_27_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[7]\\\\\);
    
    \Aapb_int_fft_0/data_out_reg[4]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[4]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_10\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_10_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m94\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_95\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_31\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[3]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn_RNO\ : AO1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn_1_sqmuxa_1_i_a2_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/un3_sync_rawa\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_29\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_22\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_19\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_2\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_20_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_9_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_1_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_2_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[2]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[2]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_15_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/OR3_0_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[2]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[2]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[2]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_19\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_40_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_23\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_3_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[4]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[4]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AOI1_E[1]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m85\ : OA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_86\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[0]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[0]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[0]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[0]\);
    
    \Aapb_int_fft_0/PENABLE_reg_RNIE8K93\ : NOR3B
      port map(A => \Aapb_int_fft_0/un3_fifo_rd_en_1_net_1\, B
         => \Aapb_int_fft_0/PENABLE_reg_i_0\, C => 
        CoreAPB3_0_APBmslave0_PWRITE, Y => \Aapb_int_fft_0/REP\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_2\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_3\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_43_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_8\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_31_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_EBAR\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/EBAR\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_62\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_62_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[15]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[15]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[15]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_22_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_21\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_6\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_13_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_0_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_2_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[6]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[11]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[11]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[4]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[4]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_3_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_33_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_12\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[2]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[9]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[9]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/in_t1\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/in_t1_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE0\ : 
        MSS_CCC_IF
      port map(PIN2 => GLMUXINT_GND, PIN3 => GLMUXINT_GND, PIN4
         => GLMUXINT_GND, PIN1 => OPEN, PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SDIN_INT\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SCLK_INT\, 
        PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SSHIFT_INT\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SDOUT_INT\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_55\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_55_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[5]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[5]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_2_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_37_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_2\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_20_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_9_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_1_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[8]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[8]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[8]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_16_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_81_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIPC9[4]\ : 
        OR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_5\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_28\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[6]_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N\ : IOPAD_IN
      port map(PAD => MSS_RESET_N, Y => 
        \MultichannelFFT_MSS_0/MSS_RESET_0_MSS_RESET_N_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m107\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_106\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_107\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_108\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_41\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_41_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_20\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_12_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/OR3_0_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_85_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[3]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[3]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_4\ : AND3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_1_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_18_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/XNOR2_22_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m67\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_65\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_67\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_68\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_40\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_40_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_1\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[2]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_13\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_83_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I39_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_5\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[3]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[3]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_7_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_20_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_65\ : NOR3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_1_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_19_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_65_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_40\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_40_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[2]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_12\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I33_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AOI1_E[3]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_1[2]\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[5]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[5]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[4]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[4]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[8]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[8]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AND2_S[3]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_83\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[5]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_2_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_83_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I11_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_7\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_11\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[12]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_53\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_53_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_49\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_49_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_0[3]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[4]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_10\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_10_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_10\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[10]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[10]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_4\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[5]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_20\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_33_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_20_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_9_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[5]\\\\\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_1\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[1]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_9\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[10]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[10]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_28\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_73\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[2]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_73_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[2]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[2]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_21_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_44\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_44_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/swCrossOut_xhdl4\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe6[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out_RNO_3\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_13\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[2]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[2]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_28\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_28_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_5_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m46\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_43\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_46\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_47\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_35\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_35_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_20\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_33_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[11]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[11]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[10]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[10]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[5]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[2]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_17\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_29\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_66_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_17_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_24\ : 
        INV
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_12\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r1_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I22_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N123\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[2]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[2]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I44_Y\ : 
        AX1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I26_un1_Y_0\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_1[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_3\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_68_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_5_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_38_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[4]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_14\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[4]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_24\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_5\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_5_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[12]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[12]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m164\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_164\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_89\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[11]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_38\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_10_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_38_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[10]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[10]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_7_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m76\ : NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_77\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[14]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[14]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_2_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[6]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_23\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_38_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_44_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_76_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_23_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AOI1_E[2]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_55\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_55_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[6]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_79\ : XA1A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, C
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_19_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_79_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_58\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[1]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_5_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_58_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m83\ : AXOI5
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_84\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_1\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[15]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[15]\\\\\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E
         => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[15]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_0_sqmuxa\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m9\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_6\, B => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_9\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_10\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_57\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[29]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[28]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[30]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[28]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[29]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[30]INT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_4\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_46_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_83_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_26_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[9]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[9]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m38\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_38\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_39\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[3]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_9\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[10]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I22_Y\ : 
        OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[0]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_22_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_37\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[9]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[9]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[9]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_12\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_12_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_10\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[5]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_15\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_8_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_27_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_19\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_19_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/MEMWEBUBBLE\ : INV
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/MEMORYWE\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/MEMWENEG\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO_0[7]\ : 
        OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_30\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_44\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I43_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N127\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_3\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_68_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_5_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_38_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_5\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_77_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[3]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_25_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO_0[6]\ : 
        OA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_43\, 
        C => \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_55\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_15\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[6]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[6]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNO[1]\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_22_i\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[12]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[12]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[0]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[1]\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[2]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_19_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[14]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[10]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[10]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_0[5]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un5_addrp_w[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_26\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_66_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_26_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        Aapb_int_fft_0_FFT_IP_RDY);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_50\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[4]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_50_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[2]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_10\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[2]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_2\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m61\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_12\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_62\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_18\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[4]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[2]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_13\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_9\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_17_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_3_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_10_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_1[1]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[2]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_2\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[6]_net_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I35_un1_Y\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_7\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_70\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_70_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[9]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_RNIREOV2\ : 
        NOR3C
      port map(A => CoreAPB3_0_APBmslave0_PWRITE, B => 
        \Aapb_int_fft_0/un3_fifo_rd_en_1_net_1\, C => 
        Aapb_int_fft_0_FFT_IP_RDY, Y => 
        \Aapb_int_fft_0/fftTop_inst/N_24\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m113\ : NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_20\, Y => 
        \Aapb_int_fft_0/fftTop_inst/N_114\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[7]\ : 
        XA1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_44\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_20\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[4]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[5]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[5]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[5]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[0]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_6\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_80_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNO[0]\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_21_i\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNO\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowtimer_w\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNO_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[14]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[14]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_6\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_6_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_7\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_7_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/NOR3A_5\ : XA1
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[0]\\\\\, 
        C => \Aapb_int_fft_0/fifo256x16_inst/OR2A_3_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/NOR3A_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_0\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[1]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[1]\);
    
    \Aapb_int_fft_0/data_out_reg[9]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[1]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[9]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_18\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_13_Y\, 
        S => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_16\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[1]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_31\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[1]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_3\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_49_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_16\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[1]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_4\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[13]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[13]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[14]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[13]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_1\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_1_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_28_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[5]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIUG7[3]\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_55_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r_0[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[0]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[1]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_4\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[7]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_20_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_9\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m97\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_89\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_97\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[3]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[0]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[0]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_9\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[10]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[10]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_w\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_9\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_9_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[13]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[13]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_23\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_8\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_5_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_38_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_68_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_83\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_83_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_60\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_60_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_69\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_69_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_75\ : AND2
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_0_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_43_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_75_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[13]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[13]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[2]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_32\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[2]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_32\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_32_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[5]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[5]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[1]\ : 
        AOI1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_11_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_10\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[11]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[11]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_9\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_39_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_73_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_32\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_32_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m55\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_54\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_56\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[4]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[3]_net_1\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_4\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[4]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int\ : 
        DFN1P0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/twidInit_int_RNO_net_1\, 
        CLK => FAB_CLK, PRE => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/initRst\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_2\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_5_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_6\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_13\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[0]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[0]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m129\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_129\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_130\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[13]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_24_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[13]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_10\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_34_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_0\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_0_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/_RAM512X18_QXI[15]_\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\, 
        RADDR6 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[6]\\\\\, 
        RADDR5 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[5]\\\\\, 
        RADDR4 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[4]\\\\\, 
        RADDR3 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[3]\\\\\, 
        RADDR2 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[2]\\\\\, 
        RADDR1 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[1]\\\\\, 
        RADDR0 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[0]\\\\\, 
        WADDR8 => AFLSDF_GND, WADDR7 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, 
        WADDR6 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, 
        WADDR5 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, 
        WADDR4 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, 
        WADDR3 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, 
        WADDR2 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, 
        WADDR1 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, 
        WADDR0 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/data_out_reg[15]_net_1\, WD15 => 
        \Aapb_int_fft_0/data_out_reg[14]_net_1\, WD14 => 
        \Aapb_int_fft_0/data_out_reg[13]_net_1\, WD13 => 
        \Aapb_int_fft_0/data_out_reg[12]_net_1\, WD12 => 
        \Aapb_int_fft_0/data_out_reg[11]_net_1\, WD11 => 
        \Aapb_int_fft_0/data_out_reg[10]_net_1\, WD10 => 
        \Aapb_int_fft_0/data_out_reg[9]_net_1\, WD9 => 
        \Aapb_int_fft_0/data_out_reg[8]_net_1\, WD8 => 
        GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/data_out_reg[7]_net_1\, WD6 => 
        \Aapb_int_fft_0/data_out_reg[6]_net_1\, WD5 => 
        \Aapb_int_fft_0/data_out_reg[5]_net_1\, WD4 => 
        \Aapb_int_fft_0/data_out_reg[4]_net_1\, WD3 => 
        \Aapb_int_fft_0/data_out_reg[3]_net_1\, WD2 => 
        \Aapb_int_fft_0/data_out_reg[2]_net_1\, WD1 => 
        \Aapb_int_fft_0/data_out_reg[1]_net_1\, WD0 => 
        \Aapb_int_fft_0/data_out_reg[0]_net_1\, RW0 => 
        GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => GLMUXINT_GND, WW1
         => PLLEN_VCC, PIPE => GLMUXINT_GND, REN => 
        \Aapb_int_fft_0/fifo256x16_inst/MEMRENEG\, WEN => 
        \Aapb_int_fft_0/fifo256x16_inst/MEMWENEG\, RCLK => 
        FAB_CLK, WCLK => FAB_CLK, RESET => 
        MultichannelFFT_MSS_0_M2F_RESET_N, RD17 => OPEN, RD16 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[15]\\\\\, RD15
         => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[14]\\\\\, 
        RD14 => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[13]\\\\\, 
        RD13 => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[12]\\\\\, 
        RD12 => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[11]\\\\\, 
        RD11 => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[10]\\\\\, 
        RD10 => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[9]\\\\\, 
        RD9 => \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[8]\\\\\, 
        RD8 => OPEN, RD7 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[7]\\\\\, RD6 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[6]\\\\\, RD5 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[5]\\\\\, RD4 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[4]\\\\\, RD3 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[3]\\\\\, RD2 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[2]\\\\\, RD1 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[1]\\\\\, RD0 => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[0]\\\\\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_2\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[2]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rdCtl_reg\ : 
        DFN1
      port map(D => \Aapb_int_fft_0/fft_out_en_net_1\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rdCtl_reg_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/outBuf_0/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\, 
        RADDR5 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, 
        RADDR4 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\, 
        RADDR3 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\, 
        RADDR2 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\, 
        RADDR1 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\, 
        RADDR0 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, 
        WADDR8 => AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[6]_net_1\, 
        WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[5]_net_1\, 
        WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[4]_net_1\, 
        WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[3]_net_1\, 
        WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[2]_net_1\, 
        WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[1]_net_1\, 
        WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[0]_net_1\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[15]_net_1\, 
        WD15 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[14]_net_1\, 
        WD14 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[13]_net_1\, 
        WD13 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[12]_net_1\, 
        WD12 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[11]_net_1\, 
        WD11 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[10]_net_1\, 
        WD10 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[9]_net_1\, 
        WD9 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[8]_net_1\, 
        WD8 => GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[7]_net_1\, 
        WD6 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[6]_net_1\, 
        WD5 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[5]_net_1\, 
        WD4 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[4]_net_1\, 
        WD3 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[3]_net_1\, 
        WD2 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[2]_net_1\, 
        WD1 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[1]_net_1\, 
        WD0 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[0]_net_1\, 
        RW0 => GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => 
        GLMUXINT_GND, WW1 => PLLEN_VCC, PIPE => PLLEN_VCC, REN
         => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wEn_r_i\, RCLK => 
        FAB_CLK, WCLK => FAB_CLK, RESET => PLLEN_VCC, RD17 => 
        OPEN, RD16 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[15]\, RD15 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[14]\, RD14 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[13]\, RD13 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[12]\, RD12 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[11]\, RD11 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[10]\, RD10 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[9]\, RD9 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[8]\, RD8 => 
        OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[7]\, RD6 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[6]\, RD5 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[5]\, RD4 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[4]\, RD3 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[3]\, RD2 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[2]\, RD1 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[1]\, RD0 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[0]\);
    
    \Aapb_int_fft_0/PREADY1_RNIA7US\ : NOR3B
      port map(A => \Aapb_int_fft_0/PREADY0_net_1\, B => 
        \Aapb_int_fft_0/PREADY1_net_1\, C => 
        \Aapb_int_fft_0/EMPTY_OUT_REG_net_1\, Y => 
        \Aapb_int_fft_0/un5_pready\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_27\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_24\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_13\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_72\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[2]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_39_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_72_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_38\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_38_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_42\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => 
        MultichannelFFT_MSS_0_MSS_MASTER_APB_PSELx, PIN2 => 
        CoreAPB3_0_APBmslave0_PENABLE, PIN3 => 
        CoreAPB3_0_APBmslave0_PWRITE, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPENABLEINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPSELINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWRITEINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSELINT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPENABLEINT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWRITEINT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m101\ : AXO3
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_102\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[6]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[5]_net_1\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_2\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_1\ : BUFF
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I42_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_11\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_13\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_18_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_34_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[9]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[8]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[6]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_8\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[9]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_11\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe5[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe4[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe5[0]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[6]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[6]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_3\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_3_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_3\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_51_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[11]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_15_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_1_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/ldMonitor_RNO_2\ : 
        XOR2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[14]\, B => 
        \CoreAPB3_0_APBmslave0_PWDATA[15]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/un3_ldriskov_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_30\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_30_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m150\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_60\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_151\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_7\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_83_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_40\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_40_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_3_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[8]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m29\ : AO15
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_30\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[8]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/xhdl_5\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyValid_w\, B
         => \Aapb_int_fft_0/fftTop_inst/wLastStage_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/xhdl_5_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_24_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[13]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0[3]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_25_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_15\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_8_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_2\ : 
        AND2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_2_Y\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_8\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[8]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m108\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_109\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_13\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_13_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_13_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[12]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_80\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_80_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_17\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_71_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_17_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_2\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[5]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[7]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[7]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14/U1\ : 
        DFN1P0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14/Y\, CLK
         => FAB_CLK, PRE => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m167\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_167\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_168\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_63\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_63_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/t_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[13]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_27\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_27_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_2\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_32_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_2_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_72\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD1DINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABSDD0DINT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP3INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP4INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CMP5INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_38\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_38_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[6]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[6]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_12_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_18_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[0]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_49\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[0]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_19\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_40_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_19_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_3\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rA_TC_w\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m91\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_84\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_91\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_178\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_53_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[3]\\\\\);
    
    \Aapb_int_fft_0/data_out_reg[15]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[7]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[15]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[8]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_64_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_43_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[8]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[8]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_20\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_9_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[3]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_11\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_11_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[1]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_77_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_2\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_32_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_34\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_42_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_34_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_27\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14/U0\ : MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_41\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smPong_xhdl14/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_12\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[13]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_8\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[5]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_26\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I40_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[12]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[11]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_18\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_13_Y\, 
        S => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_19\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_19_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_33\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_33_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_65\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_65_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m106\ : AXOI5
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_107\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m53\ : AO1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_54\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I26_un1_Y\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N136\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I26_un1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_19\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_19_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[10]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m149\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_35\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_25\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_150\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[15]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[15]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_40\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_40_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_16\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_61\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_61_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[6]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[4]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_8\ : AND2B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[2]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[1]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_8_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_77\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[0]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/MEMORYRE\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_77_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_24\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_24_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_40\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_40_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_9\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[10]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[4]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_27\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_14\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_RNO[2]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_16\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_10\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs/U1\ : DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs/Y\, CLK
         => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smStartLoad_int_RNO\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_34\);
    
    \MultichannelFFT_MSS_0/MSS_ACE_0_ADC5\ : IOPAD_A_IN
      port map(PAD => ADC1_ch1, Y => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC5_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_87\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[20]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[19]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[21]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[19]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[20]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[21]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_33\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_33_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_RNO\ : INV
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_0_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_0_sqmuxa_i\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[3]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_1[4]\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_10\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_13\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_23_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNI3M8H[4]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_27\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_28\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_82\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[4]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_46_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_82_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_0\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/wEn_r\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_wEn_w\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wEn_r\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_80\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[4]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_3_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_80_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_19\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_9\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_19\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_13_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[12]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_UART_0_TXD\ : IOPAD_TRI
      port map(D => \MultichannelFFT_MSS_0/MSS_UART_0_TXD_D\, E
         => PLLEN_VCC, PAD => UART_0_TXD);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_11\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[12]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_22_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[6]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[6]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_14\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_5\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_14\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_29\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_66_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_17_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_29_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_1[2]\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_4\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_44_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_EBAR\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/EBAR\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m130\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_127\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_130\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_12\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_12_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[5]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[4]_net_1\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_13\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[0]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[0]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_28\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_28_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_0\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I28_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[0]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[0]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_39\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_39_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[7]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_9\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_9_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNII9KJ1[3]\ : 
        OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_19\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_20\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[7]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_20\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[7]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_14\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_77_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I26_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I23_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_16_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[10]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[9]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/twidLUT_0/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[6]_net_1\, 
        RADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[5]_net_1\, 
        RADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[4]_net_1\, 
        RADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[3]_net_1\, 
        RADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[2]_net_1\, 
        RADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[1]_net_1\, 
        RADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[0]_net_1\, 
        WADDR8 => AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, WD17 => 
        GLMUXINT_GND, WD16 => GLMUXINT_GND, WD15 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[14]\, WD14 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[13]\, WD13 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[12]\, WD12 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[11]\, WD11 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[10]\, WD10 => 
        \Aapb_int_fft_0/fftTop_inst/m144\, WD9 => 
        \Aapb_int_fft_0/fftTop_inst/m134\, WD8 => GLMUXINT_GND, 
        WD7 => \Aapb_int_fft_0/fftTop_inst/m133\, WD6 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[6]\, WD5 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[5]\, WD4 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[4]\, WD3 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[3]\, WD2 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[2]\, WD1 => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[1]\, WD0 => 
        \Aapb_int_fft_0/fftTop_inst/m34\, RW0 => GLMUXINT_GND, 
        RW1 => PLLEN_VCC, WW0 => GLMUXINT_GND, WW1 => PLLEN_VCC, 
        PIPE => PLLEN_VCC, REN => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/twid_wEn_w\, RCLK => FAB_CLK, 
        WCLK => FAB_CLK, RESET => PLLEN_VCC, RD17 => OPEN, RD16
         => \Aapb_int_fft_0/fftTop_inst/T_w[15]\, RD15 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[14]\, RD14 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[13]\, RD13 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[12]\, RD12 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[11]\, RD11 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[10]\, RD10 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[9]\, RD9 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[8]\, RD8 => OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[7]\, RD6 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[6]\, RD5 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[5]\, RD4 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[4]\, RD3 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[3]\, RD2 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[2]\, RD1 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[1]\, RD0 => 
        \Aapb_int_fft_0/fftTop_inst/T_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_39\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_39_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[9]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[9]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[9]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNIB2T6[1]\ : 
        OR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_24\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[5]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[5]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_37\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_10\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_54\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_54_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I20_un1_Y\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_8_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I20_un1_Y_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[6]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[8]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[8]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_2\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_60_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_12_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_23\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[1]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_8\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[6]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_13\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[14]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[14]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_6\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_55_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_31_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_80_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_42\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_42_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_39\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_39_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_32\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_32_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[12]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[12]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[12]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[3]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w[4]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[4]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[0]\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_35\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_35_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[0]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_21_i\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_23\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_23_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_1\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[6]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_RNO\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rdCtl_reg_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_1\ : 
        XNOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_29_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_39_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_27\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_27_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_17\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_71_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_17_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_2\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_60_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_12_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[10]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[10]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_29\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_29_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_9\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[10]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I26_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N120\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I23_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N121\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[7]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[7]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[7]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[7]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[3]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[3]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[1]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[10]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[10]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[10]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_6\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_6_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_7\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_7_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_26_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_9\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_25_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[12]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[12]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[12]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[12]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I26_Y_1\ : 
        AO1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_19\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_40_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_35\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_35_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn_RNO_0\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn_1_sqmuxa_1_i_a2_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[4]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_33\ : AND2
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_5_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_55_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_33_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wEn_xhdl12\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preInBuf_wEn\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_wEn_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_2\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_33\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_33_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_63\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_63_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_2\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[10]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[10]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_11\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_11_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[15]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[15]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_14\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_33_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_27_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_30_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_4\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_4_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[9]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\MX2_PP1[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_22_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_64\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_64_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO[1]\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_4\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[5]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_12\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_32\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_32_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I13_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_11\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_59\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => GLMUXINT_GND, PIN2INT => GLMUXINT_GND, PIN3INT
         => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AND2_S[0]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_53_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_59_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[14]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[15]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[15]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[11]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_0[5]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_5\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_5_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_66\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_66_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I14_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[6]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_13\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I3_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[3]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[3]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_16_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[6]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_25\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_25_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_24\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_23\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_33\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_33_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_7\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[15]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[15]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[15]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[15]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I8_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_16\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_16_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_13\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_13_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I2_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[2]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un7_bflya_w_int_ADD_7x7_fast_I0_S\ : 
        AX1D
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un5_addrp_w[6]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un7_bflya_w_int[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\MX2_PP0[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_18_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/EBAR\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO_5\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_1_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_20_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[6]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_14\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_33_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_27_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_30_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_14\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_14_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[5]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[14]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[14]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[14]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[13]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[3]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_5\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_4_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[8]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[2]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_40\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_32\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_2\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_20_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_9_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_1_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_23\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_23_Y\);
    
    \CoreAPB3_0/iPSELS_2[0]\ : NOR3A
      port map(A => MultichannelFFT_MSS_0_MSS_MASTER_APB_PSELx, B
         => \CoreAPB3_0_APBmslave0_PADDR[8]\, C => 
        \CoreAPB3_0_APBmslave0_PADDR[9]\, Y => 
        \CoreAPB3_0/iPSELS_2[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m161\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_7\, B => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_162\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_4\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_10_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_17_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_3_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full/U1\ : DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full/Y\, CLK
         => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m65\ : AX1A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_66\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m19\ : NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_20\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_2\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[3]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_43\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_43_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_47_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[2]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_24\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_10\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_9\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_17_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_3_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_10_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_9_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[5]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m153\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_153\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_69\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_11\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AOI1_E[0]\\\\\ : 
        NAND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_7\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_9\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_50\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[8]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[7]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[9]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[7]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[8]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[9]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[0]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_5\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_43_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_12_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out_RNI0NES\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un34_cnten\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[4]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[4]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_0\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_11_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_21\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_21_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO\ : 
        OA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un34_cnten\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_0_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_14\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[11]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[11]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[11]\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_6\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[6]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[13]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[12]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_25_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_35\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_35_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_31\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_31_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_7\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[10]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m168\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_166\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_168\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_169\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_4\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_10_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_17_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_3_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[13]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[13]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[13]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_14_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[2]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[2]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_20\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_33_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIHSK03_0[0]\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/N_24\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        Y => \Aapb_int_fft_0/fftTop_inst/wEn_even_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_1\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_1_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I39_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N119\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_30\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_54_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_30_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_2\ : AND3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[4]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[3]\\\\\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[5]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_7\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[0]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_7_2\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_12_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO[3]\ : 
        XA1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_19\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_8\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_24\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_12\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[13]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[0]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_43\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_43_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_11\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_11_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[9]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[9]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[9]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_7_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[1]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_8\ : BUFF
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[2]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_56\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_56_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_36\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_36_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_33\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_33_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_4\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[5]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[5]\);
    
    \Aapb_int_fft_0/data_out_reg[2]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[2]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_30\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_30_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_10\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_34\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\E[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_34_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_1\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AOI1_E[0]\\\\\ : 
        NAND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_76\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_76_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_w_int\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_w_int_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa_0_a2\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_25\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_25_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_14\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_5\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_14_2\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_46\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_14_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_46_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m166\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_167\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_2\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[0]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[1]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[1]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_44\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_44_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_31_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[6]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_67\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => GLMUXINT_GND, PIN2INT => GLMUXINT_GND, PIN3INT
         => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[5]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[5]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[5]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_1\ : OR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[6]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[7]\\\\\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[8]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_2\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[3]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I23_Y\ : 
        AO1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N120_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N153\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_0\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_0_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_25\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_25_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full_RNO\ : NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/load_done_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smBuf_full_2_sqmuxa\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XNOR2_WDIFF[1]\\\\\ : 
        XNOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[1]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_5_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/NOR2A_0_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[1]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_55\ : AND2
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/INV_0_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_9_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_55_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m80\ : NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_36\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_81\);
    
    \Aapb_int_fft_0/data_out_reg[5]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[5]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[2]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/tc_out/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/tc_out/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIMG7[1]\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_3\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, C
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_2_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_3\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_68_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_5_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_38_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_16\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_16_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_6\ : NOR3C
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[3]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[4]\\\\\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_8_net_1\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/m45_0_a3_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNIP37T[0]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowTimer_w[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowtimer_w_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_6\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_42_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_28_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_14\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_43_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_12_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/tc_out_RNO\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/y_0_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m22\ : AO12
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_23\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_53_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[2]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[2]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_72\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[2]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_39_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_72_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIORO1[7]\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_6_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m63\ : AXOI5
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_64\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_3\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_3_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[7]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[6]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_21_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[10]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\AOI1_E[2]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[5]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[10]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[2]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_10_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[7]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[7]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[7]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_5\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_8_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_37_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[5]\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[6]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[6]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m133\ : MX2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_128\, S => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_195\, Y => 
        \Aapb_int_fft_0/fftTop_inst/m133\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_26\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_26_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[12]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[12]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_6\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_6_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I21_un1_Y\ : 
        OA1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/I20_un1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0_0\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I21_un1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[1]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_8\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[1]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_21_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m119\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_119\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_120\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[4]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_12\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_12_0\);
    
    \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE1\ : 
        MSS_CCC_GL_IF
      port map(PIN2 => GLMUXINT_GND, PIN3 => GLMUXINT_GND, PIN4
         => GLMUXINT_GND, PIN1 => OPEN, PIN5 => FAB_CLK, PIN2INT
         => \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/EXTFB_INT\, 
        PIN3INT => OPEN, PIN4INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/LOCK_INT\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLA_INT\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_13\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_83_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_13_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_0\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[1]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_10\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[11]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_EBAR\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/EBAR\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_32\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_32_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[11]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[11]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[11]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[10]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_10\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_34_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[5]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_16\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[5]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m95\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_94\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_95\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_96\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/timerT1[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_22_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m39\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_37\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_39\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_40\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_1\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[4]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_61\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_61_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_42\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_42_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I30_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[13]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[5]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[13]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[0]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/MEMORYRE\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I34_un1_Y\ : 
        OA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_11\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_6\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_11_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[6]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_4\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m48\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_25\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_35\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_49\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_4_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AOI1_E[2]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/preRstAfterInit\ : 
        DFN1E1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowtimer_w\, 
        CLK => FAB_CLK, E => MultichannelFFT_MSS_0_M2F_RESET_N, Q
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/preRstAfterInit_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I35_un1_Y\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[12]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[12]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[5]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_11\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_11_Q\);
    
    \Aapb_int_fft_0/data_out_reg[3]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[3]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[7]_net_1\);
    
    AFLSDF_INV_0 : INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y
         => \AFLSDF_INV_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_32_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out_RNO_0\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_0\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_4\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_1[4]\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[11]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[11]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rA_TC_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_4\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_26\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I36_un1_Y\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_3\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_3\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_3\ : AO1
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[1]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/OR2A_3_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/NOR3A_5_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[13]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_22\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_22_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_36\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_36_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_12_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_28\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_69_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_6\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[4]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m78\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_74\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_78\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_79\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST_RNIC3SC/U_CLKSRC\ : 
        CLKSRC
      port map(A => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST_M2FRESETn\, Y => 
        MultichannelFFT_MSS_0_M2F_RESET_N);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_11\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_14\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[15]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_25\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_25_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[7]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[4]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_19\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/wA_int[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/outBuf_wA_w[5]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_54\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[20]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[19]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[21]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[19]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[20]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[21]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[15]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[15]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[15]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_89\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[26]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[25]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[27]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[25]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[26]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[27]INT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_DVLDI\ : DFN1C0
      port map(D => \Aapb_int_fft_0/fifo256x16_inst/AND2A_0_Y\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[10]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[10]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_36_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_0\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_62_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[14]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[14]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_44\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_44_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_8\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_7\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_25\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_38_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_25_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_56\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[26]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[25]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[27]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[25]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[26]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[27]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0_RNIRROF1[8]\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowtimer_w_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/slowtimer_w_3\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_12\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[13]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[8]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[8]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[8]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_28\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_46_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_50_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_55_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_28_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_2\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_72_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_37_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_4_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_28\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m24\ : AO1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_25\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I13_Y\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[9]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_41\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_41_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[5]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[5]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_69_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_8_Y\);
    
    \Aapb_int_fft_0/un3_fifo_rd_en_1\ : NOR2A
      port map(A => CoreAPB3_0_APBmslave0_PENABLE, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \Aapb_int_fft_0/un3_fifo_rd_en_1_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO_3\ : 
        NOR3B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_1_0\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_4\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_81_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_20\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_4_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_20_Y\);
    
    \Aapb_int_fft_0/data_out_reg[0]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[0]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[0]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_10\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[6]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_10_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_44\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_16_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_44_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_25\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_38_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_25_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_5\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_5_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0_RNI41Q8[5]\ : 
        INV
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_82\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[4]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_46_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_82_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_31\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_79_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_3\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_51_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_15\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I19_Y\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_8_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_28\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_46_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_50_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_55_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_44\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_44_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out_RNO\ : 
        NOR3C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_5\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_4\, 
        C => \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/N_12\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[12]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[12]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[12]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[5]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_31\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_15\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_15_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_MEMORYWE\ : AND2A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_FULL_net_1\, B => 
        \Aapb_int_fft_0/WEP\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/MEMORYWE\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_22\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_22_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[7]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_20\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[7]/Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_30\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/MEMORYWE\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_30_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[0]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[0]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[6]\ : 
        XA1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_30\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_18\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_15\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_15_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_31\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_31_Q\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_80\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[14]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[15]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[16]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO[0]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[1]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un7_bflya_w_int[0]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_28\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_41_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_43\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_43_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_25_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[4]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_20\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => 
        Aapb_int_fft_0_FFT_IP_RDY, PIN6 => GLMUXINT_GND, PIN1 => 
        OPEN, PIN2 => OPEN, PIN3 => OPEN, PIN4INT => OPEN, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[0]INT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[0]INT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m122\ : NOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_123\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[2]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I26_Y_0\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_0_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[2]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_5\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_10\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[11]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[11]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_44\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/EBAR\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_44_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m93\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_94\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[7]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[6]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_21_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I13_CO1\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N110_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_22\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[13]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[13]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[13]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[15]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[15]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[15]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[15]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_8_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_7\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_31_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_4_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_28\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_41_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_28_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[2]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_6\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[11]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[10]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[14]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[14]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_1\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_39_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_29_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_EMPTYINT\ : XA1A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[8]\\\\\, C
         => \Aapb_int_fft_0/fifo256x16_inst/AND3_9_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/EMPTYINT\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I0_S\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_6\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_RNO[2]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_10\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_21\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_21_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I1_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1P0_AEMPTY_RNO_4\ : OR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[3]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[4]\\\\\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[5]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/NAND3A_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[9]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[9]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[9]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[1]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_11\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_2\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_9\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_6\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_68\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_68_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_7\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_7_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_3\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[4]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_50\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[4]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[2]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I6_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[6]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[6]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_2\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_59\ : 
        BUFF
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_59_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_9\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_42_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_28_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_28\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_28_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_14\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_33_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_27_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_30_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_14_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_10\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/VRONINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/RXEVINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/CALIBININT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1RTSnINT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1DTRnINT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/TXEVINT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[6]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/NOR2A_0\ : NOR2A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[0]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[0]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/NOR2A_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_70\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_70_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_10\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_79\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_79_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_8\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_31_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_2\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_1\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_1_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_14\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I29_Y\ : 
        XOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[6]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N147\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_2\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_10\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[11]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m50\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_50\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_36_0\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_51\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[8]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_23\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_1\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_39_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_29_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[8]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_23_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_20\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_10\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_20\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[14]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[14]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_34\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_42_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_34_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP2[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[2]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_7\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_13_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_43_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I12_Y\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[1]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[1]_net_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_2\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N135\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_20\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_33_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[8]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[8]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_24_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[13]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_4\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_4_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_6\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[1]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[11]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[10]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[13]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[13]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out_RNO_0\ : 
        NOR3A
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/startLoad_w\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_2\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[10]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_22\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_35\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_35_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_15\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[3]\ : 
        XA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_41\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_33\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[7]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[7]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[7]\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_14\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[14]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe3[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe2[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe3[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_15\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_26_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_35\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_35_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_7\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_9_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_13\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[14]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[14]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I22_Y\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_3\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_37\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[7]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_12_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[5]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_8\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_8_Q\);
    
    \Aapb_int_fft_0/data_out_reg[7]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_re[7]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_19\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m12\ : AXOI4
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_13\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_9\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_39_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_73_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_19_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe22\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe22_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_14\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_14_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP3[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[0]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[0]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m86\ : XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_86\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_87\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/tc_out/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_29\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_29_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[14]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[14]\\\\\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E
         => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_30_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I25_un1_Y\ : 
        NOR3A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_3\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_3\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N_5\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIBO3_0[3]\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_55_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_14\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[15]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[3]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[11]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_0\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_0_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_0\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m142\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_140\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_142\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_143\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_27\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_27_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m100\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_55\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_76\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_101\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[8]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[8]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_17\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_17_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[14]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[14]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_9\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I25_Y\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I25_Y_0_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/I25_un1_Y_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_2\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_60_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_12_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[8]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[5]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_20\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/output_reg\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/N_8\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/outBufwEnFall_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_29\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_65_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_0\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_0_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AND2_S[0]\\\\\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_18_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_7_Y\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_int_0\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/swCross_w_int_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_53\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_53_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[12]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[11]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_27\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_27_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[15]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[15]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_3\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_3_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_17\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_17_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_55\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[4]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_3_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_55_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[6]\ : 
        DFN1E0C0
      port map(D => \AFLSDF_INV_0\, CLK => FAB_CLK, CLR => 
        MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_18\, 
        Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_7\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_8\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_73\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[2]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_73_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_69_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_29\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_65_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_6\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[4]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_11_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_6_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ACE_0_ADC3\ : IOPAD_A_IN
      port map(PAD => ADC0_ch1, Y => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I13_Y\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_0\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_Y_0_0\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[4]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[12]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[2]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[10]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[9]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_9\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_25_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_9_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP2[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_9_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_24\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_24_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_22\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_8\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_12\, S
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_22\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_2\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[13]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_69\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_69_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/in_t1\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/xhdl_5_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/in_t1_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNIOO5O[6]\ : 
        OR3B
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_28\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_44\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m27\ : AXO2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_28\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_1\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_1_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_24\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[4]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[0]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_28\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_28_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO_4\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un34_cnten\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_6\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[7]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[1]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[1]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RBINNXTSHIFT[3]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_8_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_24_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[3]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_55\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[5]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[5]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_55_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_5\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_77_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_36\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_36_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_80\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_80_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_15\ : 
        MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/inBuf_wEn_w\, B
         => \Aapb_int_fft_0/fftTop_inst/wEn_even_w\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl3\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AND2_S[1]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_25\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_25_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_34\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_34_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[0]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_51\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_51_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[10]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[10]\\\\\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E
         => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[10]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_5\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_5_Q\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[5]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_72_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_26_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[5]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_84\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[26]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[27]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[28]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_9\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[1]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I29_Y\ : 
        AX1D
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/I20_un1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0_0\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I29_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_0\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/smStartLoad_int\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_34\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/startLoad_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_24\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_56_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_71\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_71_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_36\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_36_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP1[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\MX2_PP0[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_18_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/EBAR\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe12\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe11_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe12_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_10\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_10_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_2\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[3]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_4\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_23\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[3]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[12]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[3]_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_86\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[17]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[16]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[18]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[16]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[17]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[18]INT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[0]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[0]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_1\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[2]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I20_Y\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_un1_Y_0\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_1\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/N147\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_41\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_41_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_4\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_6\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_6_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[4]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_12_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_13_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[12]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[9]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_12\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_0_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_2_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_13_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_26\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[4]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[4]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_10\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_34_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_10_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_37\ : MSS_IF
      port map(PIN4 => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[2]\, PIN5
         => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[1]\, 
        PIN6 => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[3]\, 
        PIN1 => \CoreAPB3_0_APBmslave0_PWDATA[1]\, PIN2 => 
        \CoreAPB3_0_APBmslave0_PWDATA[2]\, PIN3 => 
        \CoreAPB3_0_APBmslave0_PWDATA[3]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[2]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[1]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[3]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[1]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[2]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[3]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_37\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_37_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[1]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_11_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_8\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[1]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_7\);
    
    \Aapb_int_fft_0/fifo256x16_inst/MEMREBUBBLE\ : INV
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/MEMORYRE\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/MEMRENEG\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[8]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_23_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[14]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[14]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_40\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_40_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I2_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[2]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N120\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I18_Y\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\MX2_PP0[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_18_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/EBAR\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_0\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_49\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_49_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_26\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_26_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_18\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[4]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_19\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\E[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_19_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_24_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/tc_out_RNO\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un11_offsetpq_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/y_0_sqmuxa\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_60\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABINTINT_NET\, 
        PIN6INT => OPEN, PIN1INT => GLMUXINT_GND, PIN2INT => 
        GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_1\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[0]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_20\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[0]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe1\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe1_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_13\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[0]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[0]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_9\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[10]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[10]\);
    
    \Aapb_int_fft_0/data_out_reg[14]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[6]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[14]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[15]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[15]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[15]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_Mult[11]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[10]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out_w[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_3\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_22\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_2\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m32\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_29\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_32\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_33\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_3\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[1]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[15]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[15]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_16\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_4\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_10_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_17_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_3_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_4_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[11]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[11]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[11]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[0]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[1]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_5_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I25_Y_0\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I25_Y_0_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_1\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_1_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_12\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_40_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_EBAR\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/OR3_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/EBAR\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_16\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/DWACT_FINC_E[1]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_4\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I1_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/t_r[2]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/T_w[2]\, CLK => 
        FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_66\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_66_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_10_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIENH3[4]\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_0_a2_6_0\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa_6\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_83\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_83_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_20\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_4_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_20_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNIBDBB2[5]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_18\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_19\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/un5_int_outp_I_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/N_3\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/kitRndUp_0/I_20\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[12]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[12]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_3\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I23_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N135_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I23_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_12\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/N_3\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_20_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_32\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_32_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_12\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[13]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I20_Y_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[5]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[5]_net_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_7\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_7_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m21\ : MX2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_21\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_22\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I4_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[4]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[4]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_5\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_5_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[7]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[7]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[5]\);
    
    \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF1\ : IOPAD_A_IN
      port map(PAD => VAREF1, Y => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_1\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_53\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_15_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_25_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_53_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_25\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_25_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[2]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_17\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_4\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_17_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP0[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_22_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIK1F[1]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_2_0\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1_0\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/un3_sync_rawa\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIUG7[7]\ : 
        NOR3A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[6]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rTimer_w[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I13_un1_Y_0\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I13_un1_Y_0_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[4]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_14\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out[4]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_54\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_54_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I4_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[4]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[4]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N124\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_73\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[2]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_73_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_44\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_44_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_63\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_63_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/output_reg_RNO\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/in_t1_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/xhdl_5_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/temp_output\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_11\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_80_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_11_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_5\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[26]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[25]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[27]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[25]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[26]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[27]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_RNIT1EF1\ : 
        MX2
      port map(A => \Aapb_int_fft_0/un5_pready\, B => 
        Aapb_int_fft_0_FFT_IP_RDY, S => 
        CoreAPB3_0_APBmslave0_PWRITE, Y => 
        CoreAPB3_0_APBmslave0_PREADY);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m172\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_172\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_118\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I4_CO1\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_39\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[6]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_39_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_13\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_13\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_83_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_81\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_81_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_53_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_10\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_0\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_62_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_8\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_62_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_0\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_0_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_13\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_18_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_34_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m56\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_53\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_56\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_57\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[0]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_0\ : 
        AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyriskov\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/autoScale_0/stageEnd_w\, 
        Y => \Aapb_int_fft_0/fftTop_inst/autoScale_0/N_16\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[9]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[9]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[9]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_56\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_56_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_23\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_23_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I_2\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[3]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_12\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_40_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_12_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[1]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_18\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_22_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_37_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_83_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[9]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[1]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[9]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[4]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_5\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_14\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_76\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_76_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_0[5]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[2]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_17\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_9\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_17_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_3_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_10_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_4\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_4_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_3\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_3_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_8\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_8_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[0]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I44_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/I26_un1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I26_Y_1_0\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_1[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_47_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_45\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_45_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\MX2_PP2[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_12_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[4]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_15\ : 
        MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/wEn_odd_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_wEn_w\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl4\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/int_outp[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_5_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_8\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_62_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_8_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_Mult[14]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[13]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_7\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_2\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[1]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out[1]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I17_Y\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N127\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_0_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_13_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[7]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m60\ : NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_60\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_61\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I30_Y_1\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[7]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[7]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_1[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m139\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_70\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_140\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNI59L2[2]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_40\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_41\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I9_CO1\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[1]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N102\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m34\ : MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_19\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_34_0\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/m34\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[6]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[6]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[6]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/wA_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/temp_xhdl5[6]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_FULLINT\ : XA1
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[8]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[8]\\\\\, 
        C => \Aapb_int_fft_0/fifo256x16_inst/AND3_2_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/FULLINT\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I34_un1_Y\ : 
        OA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I34_un1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[12]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[4]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[3]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[3]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I27_Y\ : 
        XOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m103\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_101\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_103\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_104\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_10\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[11]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[11]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_21_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[14]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[13]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[13]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/rstAfterInit_int_RNI47KC\ : 
        OR2
      port map(A => \Aapb_int_fft_0/START_FFT_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/rstAfterInit\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_41\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_41_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_16\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_42_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_2_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_24_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_16_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ACE_0_ADC4\ : IOPAD_A_IN
      port map(PAD => ADC1_ch0, Y => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_ADC4_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[11]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[11]\\\\\, CLK
         => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E
         => \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[11]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m160\ : AX1E
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/lut_0/N_184\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_161\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_26\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_66_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_26_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w_un20_addrp_w_14\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_60\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_60_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_44\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/EBAR\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_44_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_19\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_19_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_37\ : AO1
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_33_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_20_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_6_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_20_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO_2\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_runs\, B => 
        \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/N_35\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_47\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_47_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[11]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_3\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND3_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[6]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[12]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[12]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[1]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[1]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[15]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[7]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_21\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_17\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_17_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNIPQF11[0]\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_44\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AND2_S[3]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_14\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[2]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[2]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[0]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_20\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[0]/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNO[1]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/xhdl_9[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_2\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_31\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn_RNO\ : AO1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/un3_sync_rawa\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_29\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_24\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[15]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[15]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_im[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m17\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_14\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_17\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_18\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I20_un1_Y\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N123\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I20_un1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I33_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N133\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[7]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out_RNO_1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[5]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/y_0_sqmuxa_0_a2_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[3]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[4]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[1]\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_8\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_2\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_29_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_60_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_12_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_2_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_46\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[6]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_12_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_46_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP0[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP0[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_15\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[2]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[2]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I22_Y\ : 
        OR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[0]_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_21\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_37_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2A_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[0]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[1]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_15\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_26_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_16_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_15\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[15]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/tA_reg[0]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_18\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/tA_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNI7O3[1]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un30_cnten_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_64\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL4ENINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL3ENINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL5ENINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL3INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL4INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL5INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_14\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outOdd_w[15]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[15]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[15]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[5]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[6]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn_RNO\ : 
        NOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_wEn_w\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rA_TC_w\, C
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/un1_rA_TC_w_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_19\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_27\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_77\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_77_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_83\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[6]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_83_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_4\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_44_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out_RNO[2]\ : 
        XA1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_18\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/N_31\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_6\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_3\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_11\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/int_outp[1]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/I_5_0\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe21_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_17\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_24_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_35_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_17_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_MEMORYRE\ : AND2A
      port map(A => Aapb_int_fft_0_EMPTY_OUT, B => 
        \Aapb_int_fft_0/REP\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/MEMORYRE\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_7\ : AND3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_15_Y\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_24_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/XNOR2_10_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I33_un1_Y\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N133_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N136\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[0]\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_54_i\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_4\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[5]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[5]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_66\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL7ENINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL6ENINT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL6INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/LVTTL7INT_NET\, 
        PIN3INT => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[10]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNIOMN9[6]/U_CLKSRC\ : 
        CLKSRC
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[6]_net_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_13\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_23\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_9\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_13\, S
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_23\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[10]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[9]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_18\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[4]_net_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[4]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[4]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_28\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_46_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_50_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_55_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_28_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_55\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[23]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[22]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[24]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[22]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[23]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[24]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_13\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_18_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_34_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_RNO_0\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/startLoad_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_1_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[5]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/tA_w[5]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/twidLUT_1/rA_r[5]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_9_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[2]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_9\ : AND3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_79_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND3_8_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_7_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_21_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[6]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[6]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m49\ : AO18
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_50\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_8\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_8_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_5\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNIJMJ12[5]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_17\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_18\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_17_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_7_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I36_un1_Y\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_30\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_37_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_24_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_30_Y\);
    
    \MultichannelFFT_MSS_0/MSS_CCC_0/I_RCOSC\ : RCOSC
      port map(CLKOUT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/N_CLKA_RCOSC\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_RNIQM3K\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/smFft_rdy_0_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[7]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[7]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO\ : AO1A
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/N_17\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/G_9_0_a3_1\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_FULL_net_1\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/OR2_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_42\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_42_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/output_reg_RNO\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/wEn_r\, B => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_wEn_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/fedge_0/N_8\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/un5_int_outp_I_16\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/DWACT_FINC_E[1]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[5]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/N_4\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP3[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_15_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[5]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_19_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2_RNO[1]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[1]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/readP_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_40\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_40_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_19_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_10_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_24\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_56_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m79\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_69\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_79\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I11_CO1\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTr_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_23\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_6_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[3]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m3\ : AOI1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_4\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_0[2]\ : 
        AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_69\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_50_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_69_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_3\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/Q_out[6]\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/N_14\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe2\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe1_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/pipe2_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_44\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_44_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_19\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[6]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_3\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[14]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[14]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_2\ : 
        OR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_11\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[12]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[12]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[12]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_33\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_33_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_2\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I24_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIF076[6]\ : 
        OR3B
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_43\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_45\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AND2_S[1]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_15_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\S[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[1]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[1]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[1]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I13_CO1\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[5]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[5]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N110\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out1[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m90\ : OA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_91\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[9]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_51\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[1]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[1]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_51_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP1[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP1[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_26\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[6]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_12_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m11\ : AX1A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_12\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO_1\ : 
        AOI1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_2\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/un30_cnten_5\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa_0\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I44_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I21_Y\ : 
        MAJ3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[6]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[6]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N147\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N149\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_71\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_5_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_71_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_22\ : 
        AND3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[2]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/N_2\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe11\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/preOutBuf_rEn\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe11_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_7_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[9]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[1]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/N_8\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[1]/Y\);
    
    \Aapb_int_fft_0/PENABLE_reg\ : DFN1P0
      port map(D => CoreAPB3_0_APBmslave0_PENABLE_i, CLK => 
        FAB_CLK, PRE => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/PENABLE_reg_i_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AND2_S[3]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/output_reg_RNO\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/in_t1_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/edge_0/temp_output\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_15\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[2]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_23\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_4\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP0[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_4_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_1\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_39_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_29_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[8]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[7]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_24_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_10\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, CLK => 
        FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[0]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_26\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_45_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNO_5\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[6]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/temp_xhdl7[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_8\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[9]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[9]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_13\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_13_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_8\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DCDnINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0RInINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART1CTSnINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI0SSO[3]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0RTSnINT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/UART0DTRnINT_NET\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_2\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[17]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[16]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[18]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[16]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[17]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[18]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_9\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_33\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_33_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I20_un1_Y_0\ : 
        XA1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N125\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m37\ : AXO7
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_38\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO\ : 
        OR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/autoScale_0/N_16\, 
        B => \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/bflyMonitor_RNO_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_1\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_7\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[7]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[7]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r_RNO[5]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[6]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl5[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_11_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[11]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi_w_0_0_SUB_8x8_medium_area_I41_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y_1\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_9\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_39\ : MSS_IF
      port map(PIN4 => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[8]\, PIN5
         => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[7]\, 
        PIN6 => \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[9]\, 
        PIN1 => \CoreAPB3_0_APBmslave0_PWDATA[7]\, PIN2 => 
        \CoreAPB3_0_APBmslave0_PWDATA[8]\, PIN3 => 
        \CoreAPB3_0_APBmslave0_PWDATA[9]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[8]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[7]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[9]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[7]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[8]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[9]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[0]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_35_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_6\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_80_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_6\ : 
        XA1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_11_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_20_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_4\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_4_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_4_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I20_Y_0\ : 
        MAJ3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[5]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N124_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I20_Y_0_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I26_Y\ : 
        XOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[3]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N153\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNO[2]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un30_cnten_1\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/N_10\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNID9B[4]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_3\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_0\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un1_rst_0_a2_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[2]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[3]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_13\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/output_reg\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/fedge_0/temp_output\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/stageEnd_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_43\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_43_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_58\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[31]INT_NET\, 
        PIN6INT => OPEN, PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[31]INT_NET\, 
        PIN2INT => GLMUXINT_GND, PIN3INT => GLMUXINT_GND);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[1]\ : 
        AOI1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[13]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outEven_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inP_r[13]_net_1\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_90\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[29]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[28]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[30]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[28]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[29]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[30]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_25\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_25_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[6]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_3\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_43_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_3_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_1\ : AOI1A
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[7]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/OR2A_2_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_5_net_1\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/G_9_0_a3_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WBINNXTSHIFT[7]\\\\\ : 
        AX1C
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XOR2_1_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_31_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[7]\\\\\, Y
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[4]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[4]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RDIFF[3]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[3]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_4_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_5_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumA[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_8_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumA[12]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO[4]\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un11_offsetpq_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[0]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[2]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_10\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_10_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outOdd_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_35\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[11]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[11]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_35_Y\);
    
    \Aapb_int_fft_0/PREADY1\ : DFN1P0
      port map(D => \Aapb_int_fft_0/PREADY0_net_1\, CLK => 
        FAB_CLK, PRE => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/PREADY1_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_9\ : INV
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/NOR2A_1_Y\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_0\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[1]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_14\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w_un20_addrp_w_22\ : 
        OAI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_12\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_11_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_40_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_12_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/OR2A_2\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[8]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/OR2A_2_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNO_1\ : 
        MX2
      port map(A => \CoreAPB3_0_APBmslave0_PWDATA[2]\, B => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[2]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/temp_xhdl6[2]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I0_CO1\ : 
        NOR2B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_4\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_31\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_31_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AND2_S[0]\\\\\ : 
        XA1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_18_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_7_Y\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\S[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe1[1]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/preSwCross_w\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/pipe1[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_0\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_14_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_26_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_47\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[0]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_47_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outQ_xhdl2[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl5[6]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_14\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_77_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r_RNO[5]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[5]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[0]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_5\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_43_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_12_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_20\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_20_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_2\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_2_Y\);
    
    \CoreAPB3_0/u_mux_p_to_b3/PRDATA_5\ : NOR2A
      port map(A => \CoreAPB3_0_APBmslave0_PRDATA[5]\, B => 
        CoreAPB3_0_APBmslave0_PSELx, Y => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_2_0_0_SUB_8x8_medium_area_I18_Y\ : 
        AO13
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[4]_net_1\, 
        C => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[4]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_31\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_79_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_31_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AOI1_E[2]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_1_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[2]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_19\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_19_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumB[3]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_12_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[3]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/un5_int_outp_I_12\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[3]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/DWACT_FINC_E[0]\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[4]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/kitRndUp_0/I_12_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_16\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_76_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m66\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_66\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_13\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_67\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[7]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[7]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[7]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[7]\);
    
    \Aapb_int_fft_0/START_FFT\ : DFN1C0
      port map(D => \Aapb_int_fft_0/flag_i_0\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/START_FFT_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_3\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_13_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[4]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RDIFF[4]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_17_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_39_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[4]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/DFN1C0_AFULL_RNO_4\ : NOR3B
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[6]\\\\\, B => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[7]\\\\\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[8]\\\\\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/m45_0_a4_1\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outQ_xhdl2_RNO[1]\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[1]_net_1\, 
        B => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/postSwCross_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl5[1]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_30\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[1]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[0]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[2]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[0]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[1]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[2]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/rdValid_int\ : 
        DFI1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/pipe22_net_1\, 
        CLK => FAB_CLK, QN => \Aapb_int_fft_0/ifoY_wire_i\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_13\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[7]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_13_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I22_un1_Y\ : 
        XA1
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[4]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I22_un1_Y_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out_RNO[1]\ : 
        XA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/un1_rst\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/N_8\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_5\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[6]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[6]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/tc_out/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/y_0_sqmuxa\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\, S
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/tc_out/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m163\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_159\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_163\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_164\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_WDIFF[7]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[7]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_13_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_2_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WDIFF[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/outBuf_wEn_xhdl13\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/preOutBuf_wEn\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuf_wEn_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_2\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_2_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_13\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_7_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_83_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_23_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_13_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_3\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_3_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\XOR2_PP3[1]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_31_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un11_offsetpq_w_un20_addrp_w_14\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/N_13_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I41_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I35_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_8_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I41_Y_0\);
    
    \Aapb_int_fft_0/fifo256x16_inst/OR3_1\ : OR3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_29_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AND2_20_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_55_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/OR3_1_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I39_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[2]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I36_un1_Y\ : 
        NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_2\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/I36_un1_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_6\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_21_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_22\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[3]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_22_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[10]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/a_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/temp_xhdl7[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m25\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_23\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_25\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_26\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP0[3]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_22_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP0[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_RNO_0\ : 
        OA1B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/N_35\, C
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[8]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[8]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_WADDR[5]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[5]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_81\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_81_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[15]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outOdd_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[15]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I43_Y_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_15\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_18_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_34_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int[3]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_w_int[4]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/rA_w[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[8]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[15]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[8]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\AOI1_E[3]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_45_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/OR3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[3]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_7\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_7_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_49\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_49_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[6]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_5\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_5_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[8]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[8]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[8]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\XOR2_RDIFF[6]\\\\\ : XOR3
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[6]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_10_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_7_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RDIFF[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_1\ : 
        OR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/OR3_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\AND2_S[2]\\\\\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_28_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\S[2]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_16\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[7]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_13_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_16_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftDone_int_RNO\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimerTC_w\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rLastStage_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/fftDone_w\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[4]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/ifoY_re[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0_RNO_15\ : 
        MX2C
      port map(A => \Aapb_int_fft_0/fftTop_inst/inBuf_wEn_w\, B
         => \Aapb_int_fft_0/fftTop_inst/wEn_odd_w\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl4\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_9\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_29_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_47\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[8]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_47_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF0\ : IOPAD_A_IN
      port map(PAD => VAREF0, Y => 
        \MultichannelFFT_MSS_0/MSS_ACE_0_VAREF0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/outP_xhdl1[13]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[13]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outEven_w[13]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/un5_int_outp_I_21\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[6]_net_1\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[7]_net_1\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/kitRndUp_0/DWACT_FINC_E[3]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_51\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[11]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[10]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[12]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[10]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[11]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[12]INT_NET\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO[0]\ : 
        NOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_54_i\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[14]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[14]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[14]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_22\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0_0[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_22_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_11\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_8_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_10_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_6_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_11_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/actram_R0C0_RNO_3\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outEven_w[4]\, B
         => \CoreAPB3_0_APBmslave0_PWDATA[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memP/wrapRam_0/temp_xhdl6[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[1]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/stage_timer/Q_out[1]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_1\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rStage_w[1]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\MX2_PP3[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_26_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_32_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/NOR2_2_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_14\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_33_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_29_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_33_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_14_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_Mult[7]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[6]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumB[6]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_21_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/out_w[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m31\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_30\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_31\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_32\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_28\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP2[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_28_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_4\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_4_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XNOR2_18\ : XNOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[1]\\\\\, B
         => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[1]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_64\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_49_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_64_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/actram_R0C0_RNISNUG_3\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[4]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memQ/wrapRam_0/po_outQ[4]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readQ_w[4]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_8_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[12]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_45\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[7]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_45_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[14]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[14]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[14]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[14]\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[4]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[4]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[6]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[14]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[13]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[5]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_10_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[5]\\\\\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_85\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[29]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[30]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[31]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_31\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[11]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[4]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/Q_out_RNIBO3[3]\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rA_timer/un3_sync_rawa_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w_ADD_8x8_medium_area_I30_Y\ : 
        XOR3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTr_w[7]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/QiTi_w[7]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/N149\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[7]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNIA8OF1[7]\ : 
        AO1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_44\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[7]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/N_12\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_26\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_18\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_8\, Y
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_18\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_41\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_41_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m88\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_83\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_88\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_89\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNISVRN1_0[4]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[1]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_16\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_17\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_43\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_26_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_43_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_28\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_28_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/y_0_sqmuxa\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/closeLoad_w\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/tc_out/Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[6]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[6]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst_0\, Q => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_53\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[17]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[16]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[18]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[16]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[17]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[18]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_5\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_5_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I42_Y\ : 
        AX1B
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N132\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/I33_un1_Y_0\, C
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N125_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I42_Y_0\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[3]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[3]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[3]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1E1C0_Q[3]\\\\\ : 
        DFN1E1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\QXI[3]\\\\\, CLK => 
        FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, E => 
        \Aapb_int_fft_0/fifo256x16_inst/DVLDI\, Q => 
        \CoreAPB3_0_APBmslave0_PRDATA[3]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[3]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[3]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[3]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_33\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[12]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[12]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_33_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[3]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT3_r[3]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP2[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_12_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[7]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_4_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_34\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_42_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_34_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_21\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_6_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_8\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\S[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_8_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_28\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_46_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_50_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_55_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AO1_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT4_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT5_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_15\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_72_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[8]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[6]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_17_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[6]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_32_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[0]\\\\\);
    
    \Aapb_int_fft_0/data_out_reg[11]\ : DFN1C0
      port map(D => \Aapb_int_fft_0/ifoY_im[3]\, CLK => FAB_CLK, 
        CLR => MultichannelFFT_MSS_0_M2F_RESET_N, Q => 
        \Aapb_int_fft_0/data_out_reg[11]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[6]/U0\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_36\, 
        B => \Aapb_int_fft_0/fftTop_inst/ldA_w[5]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_2_sqmuxa\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out[6]/Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_3\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_3_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out_w[14]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/out1[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/validOut_xhdl3\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/pipe1_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preSwValid_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_0\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_47_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_18_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_60_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[1]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/wA_w[1]\, B => 
        \Aapb_int_fft_0/fftTop_inst/ldA_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, Y => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[1]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT3_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[5]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[4]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_6_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[4]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_6\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_13_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_0_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_2_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MAJ3_6_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_15\ : XOR2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[5]\\\\\, B
         => \Aapb_int_fft_0/fifo256x16_inst/INV_16_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/XOR2_15_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m145\ : XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_34\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_146\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_27\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP2[4]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_27_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP0[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP0[5]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2A_0\ : AND2A
      port map(A => Aapb_int_fft_0_EMPTY_OUT, B => 
        \Aapb_int_fft_0/REP\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2A_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_11\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_9_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_1_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_20_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR3_11_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_5\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[1]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/INV_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_5\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[7]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_5_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_21\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_28_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_21_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_28\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_20_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_28_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_15\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_22_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_35_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_15_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumB[2]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_36_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNO_0[9]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_20\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_24\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[1]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[1]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[1]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out[9]\ : 
        DFN1E0C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/twid_wA_w_i[6]\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        E => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_24\, 
        Q => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_94\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBALERTNIINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0BCLKINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBUSNIINT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[4]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/SPI1SSO[5]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/I2C0SMBALERTNOINT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_44\ : NOR2B
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_9_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_43_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_44_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_59\ : 
        BUFF
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_14_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_59_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m96\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_93\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_96\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_97\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I2_S\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[2]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[2]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N119\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_7\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_16_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_28_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_83_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_24\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[10]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[10]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_24_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_6\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_13_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_0_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_2_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_8\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_5_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_38_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_68_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_8_Y\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[1]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[1]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[1]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\DFN1_SumA[14]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_19_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[14]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[11]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_11_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[11]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/actram_R0C0_RNI6G5I\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outP[0]\, B => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/poBuf/memP/wrapRam_0/po_outP[0]\, 
        S => \Aapb_int_fft_0/fftTop_inst/smPong_xhdl14_RNIUN74\, 
        Y => \Aapb_int_fft_0/fftTop_inst/readP_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\AOI1_E[1]\\\\\ : 
        AOI1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/OR3_0_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND3_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\E[1]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_21\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_82_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_6_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_28_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_21_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wA_timer/tc_out_RNIQS55\ : 
        NOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/wTimerTC_w\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, 
        Y => \Aapb_int_fft_0/fftTop_inst/smTop_0/N_29\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_79\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[1]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_79_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/int_outp[7]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/kitRndUp_0/I_20_2\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/QrTi_w[6]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[8]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutQ_w[8]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[8]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[8]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_17\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP3[1]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_17_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_35\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_35_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\XOR2_PP3[7]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_27_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP3[7]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[14]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[6]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[5]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_28_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_11_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[5]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[13]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[13]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[13]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m152\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_149\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_152\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_153\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1_ADD_8x8_medium_area_I27_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N145_0\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N_8_1\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outp_xhdl1[4]\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_6\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[29]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[28]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPI[30]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[28]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[29]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/GPO[30]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/outP_xhdl1[13]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[13]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyInP_w[13]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT4_r[6]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT5_r[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[15]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/readQ_w[15]\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[15]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_0\ : 
        AND3
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[3]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND3_0_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r_RNO[14]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[14]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/leftQ_r[14]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/postSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[14]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\DFN1_SumB[0]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_8_Q\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\SumB[0]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_9\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[1]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_9_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[7]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT1_r[7]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT2_r[7]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_10_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[4]\, S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/NOR2_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MX2_14_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[6]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[13]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out1[6]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m42\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_41\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_42\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_43\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_34\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[13]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[12]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[14]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[12]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[13]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[14]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_50\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_7\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_17_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_7_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_10\ : 
        BUFF
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_10_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/Q_out_RNIO4E4[4]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/ldA_w[3]\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_42\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ldCount/N_43\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP2[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_9_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_8_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP2[2]\\\\\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_63\ : BUFF
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[6]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_63_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r_RNO[9]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/readP_w[9]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/leftQ_r[9]_net_1\, 
        S => \Aapb_int_fft_0/fftTop_inst/preSwCross_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[9]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AO1_31\ : NOR2B
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/AND2_19_Y\, B
         => \Aapb_int_fft_0/fifo256x16_inst/AO1_26_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AO1_31_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[0]/U1\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wrFFTtimer_0/stage_timer/Q_out[0]/Y\, 
        CLK => FAB_CLK, CLR => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/nGrst\, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/wStage_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_Mult[9]\\\\\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[8]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[8]\\\\\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AO1_18_Y\, 
        Y => \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/out_w[9]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[0]\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/bfly_0/hr_w[0]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[0]_net_1\);
    
    \Aapb_int_fft_0/fifo256x16_inst/XOR2_72\ : BUFF
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_WADDR[4]\\\\\, Y
         => \Aapb_int_fft_0/fifo256x16_inst/XOR2_72_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int_RNO_0[2]\ : 
        AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un20_addrp_w[3]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/wTimer_w[2]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/un39_addrp_w[3]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/addrP_w[3]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I38_Y\ : 
        XNOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N121_2\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/SUB_8x8_medium_area_I38_Y_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_1\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_9_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2A_1_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => \Aapb_int_fft_0/fftTop_inst/rA_w[6]\, RADDR5
         => \Aapb_int_fft_0/fftTop_inst/rA_w[5]\, RADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[4]\, RADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[3]\, RADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[2]\, RADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[1]\, RADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/rA_w[0]\, WADDR8 => 
        AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[6]_net_1\, 
        WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[5]_net_1\, 
        WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[4]_net_1\, 
        WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[3]_net_1\, 
        WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[2]_net_1\, 
        WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[1]_net_1\, 
        WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/temp_xhdl5[0]_net_1\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[15]\, 
        WD15 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[14]\, 
        WD14 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[13]\, 
        WD13 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[12]\, 
        WD12 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[11]\, 
        WD11 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[10]\, 
        WD10 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[9]\, 
        WD9 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[8]\, 
        WD8 => GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[7]\, 
        WD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[6]\, 
        WD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[5]\, 
        WD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[4]\, 
        WD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[3]\, 
        WD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[2]\, 
        WD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[1]\, 
        WD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl7[0]\, 
        RW0 => GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => 
        GLMUXINT_GND, WW1 => PLLEN_VCC, PIPE => PLLEN_VCC, REN
         => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/piBuf/memQ/wrapRam_0/temp_xhdl4\, 
        RCLK => FAB_CLK, WCLK => FAB_CLK, RESET => PLLEN_VCC, 
        RD17 => OPEN, RD16 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[15]\, RD15
         => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[14]\, 
        RD14 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[13]\, 
        RD13 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[12]\, 
        RD12 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[11]\, 
        RD11 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[10]\, 
        RD10 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[9]\, 
        RD9 => \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[8]\, 
        RD8 => OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[7]\, RD6 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[6]\, RD5 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[5]\, RD4 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[4]\, RD3 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[3]\, RD2 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[2]\, RD1 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[1]\, RD0 => 
        \Aapb_int_fft_0/fftTop_inst/inBuf_0/pi_outQ[0]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_26\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_61_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_26_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_88\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[23]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[22]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[24]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[22]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[23]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[24]INT_NET\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND3_8\ : AND3
      port map(A => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_12_Y\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/XNOR2_6_Y\, C => 
        \Aapb_int_fft_0/fifo256x16_inst/XNOR2_14_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND3_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_65\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_65_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_36\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => 
        MultichannelFFT_MSS_0_MSS_MASTER_APB_PREADY, PIN6 => 
        \MultichannelFFT_MSS_0_MSS_MASTER_APB_PRDATA[0]\, PIN1
         => OPEN, PIN2 => OPEN, PIN3 => 
        \CoreAPB3_0_APBmslave0_PWDATA[0]\, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPSLVERRINT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPREADYINT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPRDATA[0]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[18]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPADDR[19]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSPWDATA[0]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_37\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_12_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT1[0]_net_1\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[0]_net_1\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/un15_ta_w_twid_rA_0_un15_ta_w_14\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_3\, B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_5\, S => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/stageT2[1]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_rA_0/N_12\);
    
    \Aapb_int_fft_0/fifo256x16_inst/\\\\DFN1C0_MEM_RADDR[6]\\\\\ : 
        DFN1C0
      port map(D => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[6]\\\\\, 
        CLK => FAB_CLK, CLR => MultichannelFFT_MSS_0_M2F_RESET_N, 
        Q => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\MEM_RADDR[6]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_8\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/XOR3_1_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_3_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_62_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MAJ3_8_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m124\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_118\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_124\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/twidData_w[5]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[9]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_15_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[9]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m72\ : MX2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_72\, B
         => \Aapb_int_fft_0/fftTop_inst/lut_0/N_42\, S => 
        \Aapb_int_fft_0/fftTop_inst/twid_wA_w[3]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_73\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_26\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/BUFF_5_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_45_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_50_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_14\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP3[8]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_14_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/outP_xhdl1[3]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I26_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bflyOutP_w[3]\);
    
    \Aapb_int_fft_0/fifo256x16_inst/AND2_50\ : AND2
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\WBINNXTSHIFT[1]\\\\\, 
        B => \Aapb_int_fft_0/fifo256x16_inst/INV_8_Y\, Y => 
        \Aapb_int_fft_0/fifo256x16_inst/AND2_50_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_17\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r[7]\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[5]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_17_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/outBuf_1/wrapRam_0/actram_R0C0\ : 
        RAM512X18
      port map(RADDR8 => AFLSDF_GND, RADDR7 => GLMUXINT_GND, 
        RADDR6 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\, 
        RADDR5 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, 
        RADDR4 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[4]\, 
        RADDR3 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\, 
        RADDR2 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\, 
        RADDR1 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[1]\, 
        RADDR0 => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[0]\, 
        WADDR8 => AFLSDF_GND, WADDR7 => GLMUXINT_GND, WADDR6 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[6]_net_1\, 
        WADDR5 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[5]_net_1\, 
        WADDR4 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[4]_net_1\, 
        WADDR3 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[3]_net_1\, 
        WADDR2 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[2]_net_1\, 
        WADDR1 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[1]_net_1\, 
        WADDR0 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wA_r[0]_net_1\, 
        WD17 => GLMUXINT_GND, WD16 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[15]_net_1\, 
        WD15 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[14]_net_1\, 
        WD14 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[13]_net_1\, 
        WD13 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[12]_net_1\, 
        WD12 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[11]_net_1\, 
        WD11 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[10]_net_1\, 
        WD10 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[9]_net_1\, 
        WD9 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[8]_net_1\, 
        WD8 => GLMUXINT_GND, WD7 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[7]_net_1\, 
        WD6 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[6]_net_1\, 
        WD5 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[5]_net_1\, 
        WD4 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[4]_net_1\, 
        WD3 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[3]_net_1\, 
        WD2 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[2]_net_1\, 
        WD1 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[1]_net_1\, 
        WD0 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/inQ_r[0]_net_1\, 
        RW0 => GLMUXINT_GND, RW1 => PLLEN_VCC, WW0 => 
        GLMUXINT_GND, WW1 => PLLEN_VCC, PIPE => PLLEN_VCC, REN
         => GLMUXINT_GND, WEN => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/wEn_r_i\, RCLK => 
        FAB_CLK, WCLK => FAB_CLK, RESET => PLLEN_VCC, RD17 => 
        OPEN, RD16 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[15]\, RD15 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[14]\, RD14 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[13]\, RD13 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[12]\, RD12 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[11]\, RD11 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[10]\, RD10 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[9]\, RD9 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[8]\, RD8 => 
        OPEN, RD7 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[7]\, RD6 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[6]\, RD5 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[5]\, RD4 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[4]\, RD3 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[3]\, RD2 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[2]\, RD1 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[1]\, RD0 => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[0]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumA[10]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_0_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[10]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_37\ : 
        AND2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[0]\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_37_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_int[6]\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_wA_0/bflyA_w_int[7]\, 
        CLK => FAB_CLK, Q => \Aapb_int_fft_0/fftTop_inst/wA_w[6]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/ifo_loadOn_int_RNO\ : 
        INV
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_ldA_0/loadOver_w_i\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_23\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_10_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_3_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_21_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_23_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/a_r_RNO[7]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[15]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInQ_w[14]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w_0\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/temp_xhdl8[7]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_26\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_61_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_27_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_14_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_26_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_68\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_36_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_44_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_68_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_47\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[31]INT_NET\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPADDR[30]INT_NET\, 
        PIN6INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPWDATA[0]INT_NET\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/FABPRDATA[0]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/MSSINT[7]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/WDINTINT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m109\ : NOR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/lut_0/N_109\, B
         => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_110\);
    
    \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1\ : 
        DFN1E0
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_4\, 
        CLK => FAB_CLK, E => 
        \Aapb_int_fft_0/fftTop_inst/autoScale_0/upScale_xhdl1_1_sqmuxa_net_1\, 
        Q => \Aapb_int_fft_0/fftTop_inst/upScale_w\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r_RNO[2]\ : MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[11]\, B
         => \Aapb_int_fft_0/fftTop_inst/bflyInP_w[10]\, S => 
        \Aapb_int_fft_0/fftTop_inst/upScale_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/temp_xhdl6[10]\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\XOR2_PP1[4]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MX2_25_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_4_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[4]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/Q_out_RNI443L2[7]\ : 
        OR2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w[4]\, B
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_19\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/twid_wA_0/slowTimer/N_20\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I0_CO1\ : 
        NOR2B
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PrT6_r[0]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hr[0]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_2\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/outQ_xhdl2_1_0_SUB_8x8_medium_area_I11_CO1\ : 
        NOR2A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT6_r[3]_net_1\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/Hi[3]_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N106_0\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/un4_outp_xhdl1_ADD_8x8_medium_area_I24_Y\ : 
        XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/N116_2\, B
         => \Aapb_int_fft_0/fftTop_inst/bfly_0/N117\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/ADD_8x8_medium_area_I24_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/\\\\XOR2_PP1[2]\\\\\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/MX2_24_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/BUFF_3_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP1[2]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/\\\\DFN1_SumB[12]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR3_13_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[12]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_37\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\PP1[5]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_37_Q\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/Q_out_RNO_0[6]\ : 
        OA1C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[5]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_28\, 
        C => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/N_63\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/\\\\MX2_PP1[8]\\\\\ : 
        MX2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/MX2_23_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AO1_22_Y\, 
        S => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/NOR2_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[8]\\\\\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/tc_out_RNO_0\ : 
        NOR3C
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[3]\, C => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_3\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/outBufA_0/outBuf_rA_0/y_0_sqmuxa_0_a2_5\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_21\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\E[0]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_21_Q\);
    
    \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/U_TILE3\ : 
        MSS_CCC_GL_IF
      port map(PIN2 => GLMUXINT_GND, PIN3 => GLMUXINT_GND, PIN4
         => GLMUXINT_GND, PIN1 => OPEN, PIN5 => OPEN, PIN2INT => 
        OPEN, PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/CLKC_INT\, 
        PIN4INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/SUPDATE_INT\, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/YC_INT\, 
        PIN5INT => 
        \MultichannelFFT_MSS_0/MSS_CCC_0/I_MSSCCC/GLC_INT\);
    
    
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/\\\\DFN1_SumA[8]\\\\\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_5_Y\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\SumA[8]\\\\\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_2\ : 
        MAJ3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_20_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_9_Q\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_1_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/MAJ3_2_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_56\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_19_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[2]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_56_Y\);
    
    
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/bflyA_int_RNO_0[4]\ : 
        AO1A
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un20_addrp_w[5]\, 
        B => \Aapb_int_fft_0/fftTop_inst/smTop_0/rTimer_w[4]\, C
         => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/un39_addrp_w[5]\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/inBuf_rA_0/addrP_w[5]\);
    
    \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[4]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/temp_xhdl4[4]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/postBflySw_0/rightP_r[4]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/outD_xhdl1_RNO[1]\ : 
        MX2
      port map(A => \Aapb_int_fft_0/fftTop_inst/outBuff_0/P_w[1]\, 
        B => \Aapb_int_fft_0/fftTop_inst/outBuff_0/Q_w[1]\, S => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r2_net_1\, Y
         => \Aapb_int_fft_0/fftTop_inst/outBuff_0/temp_xhdl10[1]\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_19\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumA[3]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\SumB[3]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_19_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/lut_0/t_int1_14_0__m15\ : XOR2
      port map(A => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[2]\, 
        B => \Aapb_int_fft_0/fftTop_inst/twid_wA_w_0[0]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/lut_0/N_36_0\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_27\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_27_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_6\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_6_Q\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/DFN1_21_Q\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_6_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_26\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/Z\\\\PP1[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/DFN1_26_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_18\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/Z\\\\PP3[7]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/DFN1_18_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_35\ : 
        AX1C
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_44_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[0]\, C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/BUFF_0_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/XOR2_35_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_20\ : 
        DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/Z\\\\PP2[2]\\\\\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/DFN1_20_Q\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18\ : 
        AO1
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AND2_14_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_15_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_5_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTr/actar_0/AO1_18_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_76\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/XOR2_31_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/a_r_0[4]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTi/actar_0/AND2_76_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[5]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT1_r[5]_net_1\, CLK
         => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/PiT2_r[5]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/smTop_0/rdFFTtimer_0/rst_comb\ : 
        OR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/trueRst_net_1\, B => 
        \Aapb_int_fft_0/fftTop_inst/startFFTrd_w\, Y => 
        \Aapb_int_fft_0/fftTop_inst/smTop_0/rst_comb\);
    
    \Aapb_int_fft_0/fifo256x16_inst/INV_16\ : INV
      port map(A => 
        \Aapb_int_fft_0/fifo256x16_inst/Z\\\\RBINNXTSHIFT[5]\\\\\, 
        Y => \Aapb_int_fft_0/fifo256x16_inst/INV_16_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_31\ : 
        XOR2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_2_Y\, 
        B => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_0[6]\, Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR2_31_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[2]\ : DFN1
      port map(D => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/temp_xhdl4[2]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/preBflySw_0/rightP_r[2]_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_12\ : 
        AND2
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumA[9]\\\\\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/Z\\\\SumB[9]\\\\\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QiTr/actar_0/AND2_12_Y\);
    
    \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r1\ : DFN1
      port map(D => \Aapb_int_fft_0/fftTop_inst/outBuf_rA_w[7]\, 
        CLK => FAB_CLK, Q => 
        \Aapb_int_fft_0/fftTop_inst/outBuff_0/rAmsb_r1_net_1\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_0\ : 
        AND2A
      port map(A => \Aapb_int_fft_0/fftTop_inst/bfly_0/t_r_1[0]\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/BUFF_7_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2A_0_Y\);
    
    \MultichannelFFT_MSS_0/MSS_ADLIB_INST/U_77\ : MSS_IF
      port map(PIN4 => GLMUXINT_GND, PIN5 => GLMUXINT_GND, PIN6
         => GLMUXINT_GND, PIN1 => OPEN, PIN2 => OPEN, PIN3 => 
        OPEN, PIN4INT => OPEN, PIN5INT => OPEN, PIN6INT => OPEN, 
        PIN1INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[5]INT_NET\, 
        PIN2INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[6]INT_NET\, 
        PIN3INT => 
        \MultichannelFFT_MSS_0/MSS_ADLIB_INST/ACEFLAGS[7]INT_NET\);
    
    \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_0\ : 
        XOR3
      port map(A => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/MAJ3_3_Y\, 
        B => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/AND2_62_Y\, 
        C => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_1_Y\, 
        Y => 
        \Aapb_int_fft_0/fftTop_inst/bfly_0/am3QrTi/actar_0/XOR3_0_Y\);
    
    GND_power_inst1 : GND
      port map( Y => GND_power_net1);

    VCC_power_inst1 : VCC
      port map( Y => VCC_power_net1);


end DEF_ARCH; 
