@N|Running in 32-bit mode
@N: CD720 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N:"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\work\MultichannelFFT\MultichannelFFT.vhd":19:7:19:21|Top entity is set to MultichannelFFT.
@N: CD231 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\vhd\std_logic_textio.vhd":79:15:79:16|Using onehot encoding for type mvl9plus ('U'="1000000000")
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\work\MultichannelFFT\MultichannelFFT.vhd":19:7:19:21|Synthesizing work.multichannelfft.rtl 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\work\MultichannelFFT_MSS\MultichannelFFT_MSS.vhd":8:7:8:25|Synthesizing work.multichannelfft_mss.def_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":65:7:65:15|Synthesizing work.bibuf_mss.def_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":24:7:24:16|Synthesizing work.outbuf_mss.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":1828:10:1828:16|Synthesizing smartfusion.inbuf_a.syn_black_box 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":4:7:4:15|Synthesizing work.inbuf_mss.def_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":168:7:168:12|Synthesizing work.mssint.def_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\work\MultichannelFFT_MSS\mss_tshell.vhd":4:7:4:13|Synthesizing work.mss_apb.def_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\work\MultichannelFFT_MSS\MSS_CCC_0\MultichannelFFT_MSS_tmp_MSS_CCC_0_MSS_CCC.vhd":8:7:8:47|Synthesizing work.multichannelfft_mss_tmp_mss_ccc_0_mss_ccc.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2812:10:2812:12|Synthesizing smartfusion.vcc.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":1796:10:1796:12|Synthesizing smartfusion.gnd.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":3773:10:3773:14|Synthesizing smartfusion.rcosc.syn_black_box 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.vhd":472:7:472:13|Synthesizing work.mss_ccc.def_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core\coreapb3.vhd":33:7:33:14|Synthesizing coreapb3_lib.coreapb3.coreapb3_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core\coreapb3_muxptob3.vhd":33:7:33:23|Synthesizing coreapb3_lib.coreapb3_muxptob3.coreapb3_muxptob3_arch 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\Aapb_int_fft.vhd":27:7:27:18|Synthesizing work.aapb_int_fft.behav 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\smartgen\fifo512x32\fifo512x32.vhd":8:7:8:16|Synthesizing work.fifo512x32.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2975:10:2975:15|Synthesizing smartfusion.ram4k9.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":163:10:163:13|Synthesizing smartfusion.ao1c.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":136:10:136:12|Synthesizing smartfusion.ao1.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":13:10:13:13|Synthesizing smartfusion.and2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2907:10:2907:13|Synthesizing smartfusion.xor2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2872:10:2872:14|Synthesizing smartfusion.xnor2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":1397:10:1397:15|Synthesizing smartfusion.dfn1c0.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":1481:10:1481:17|Synthesizing smartfusion.dfn1e1c0.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2130:10:2130:15|Synthesizing smartfusion.nand3a.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2096:10:2096:14|Synthesizing smartfusion.nand2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2270:10:2270:13|Synthesizing smartfusion.or2a.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":37:10:37:13|Synthesizing smartfusion.and3.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":172:10:172:13|Synthesizing smartfusion.ao1d.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":1998:10:1998:12|Synthesizing smartfusion.inv.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2165:10:2165:14|Synthesizing smartfusion.nor2a.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":1525:10:1525:15|Synthesizing smartfusion.dfn1p0.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":190:10:190:13|Synthesizing smartfusion.aoi1.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":21:10:21:14|Synthesizing smartfusion.and2a.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2190:10:2190:14|Synthesizing smartfusion.nor3a.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2286:10:2286:12|Synthesizing smartfusion.or3.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.vhd":2262:10:2262:12|Synthesizing smartfusion.or2.syn_black_box 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftTop.vhd":33:7:33:12|Synthesizing work.ffttop.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":592:7:592:15|Synthesizing work.autoscale.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\primitives.vhd":100:7:100:16|Synthesizing work.edgedetect.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":450:7:450:13|Synthesizing work.outbuff.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":561:7:561:13|Synthesizing work.wrapram.rtl 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\actram.vhd":8:7:8:12|Synthesizing work.actram.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2967:10:2967:18|Synthesizing proasic3.ram512x18.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":1782:10:1782:12|Synthesizing proasic3.gnd.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2722:10:2722:12|Synthesizing proasic3.vcc.syn_black_box 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":21:7:21:12|Synthesizing work.switch.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":517:7:517:13|Synthesizing work.twidlut.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\twiddle.vhd":22:7:22:13|Synthesizing work.twiddle.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":183:7:183:11|Synthesizing work.bfly2.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":118:7:118:10|Synthesizing work.agen.rtl 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":72:7:72:14|Synthesizing work.kitrndup.rtl 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\actar.vhd":8:7:8:11|Synthesizing work.actar.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":14:10:14:13|Synthesizing proasic3.and2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2825:10:2825:13|Synthesizing proasic3.xor3.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2093:10:2093:13|Synthesizing proasic3.nor2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":137:10:137:12|Synthesizing proasic3.ao1.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":1996:10:1996:12|Synthesizing proasic3.mx2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2817:10:2817:13|Synthesizing proasic3.xor2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":1374:10:1374:13|Synthesizing proasic3.dfn1.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":38:10:38:13|Synthesizing proasic3.and3.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":191:10:191:13|Synthesizing proasic3.aoi1.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":1942:10:1942:13|Synthesizing proasic3.maj3.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2852:10:2852:13|Synthesizing proasic3.buff.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2222:10:2222:12|Synthesizing proasic3.or3.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":2782:10:2782:14|Synthesizing proasic3.xnor2.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\proasic3.vhd":22:10:22:14|Synthesizing proasic3.and2a.syn_black_box 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":383:7:383:16|Synthesizing work.pipobuffer.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftDp.vhd":308:7:308:14|Synthesizing work.inbuffer.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":503:7:503:12|Synthesizing work.sm_top.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":410:7:410:13|Synthesizing work.outbufa.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\primitives.vhd":23:7:23:13|Synthesizing work.counter.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":282:7:282:16|Synthesizing work.inbuf_ffta.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":356:7:356:16|Synthesizing work.twid_wamod.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\primitives.vhd":69:7:69:14|Synthesizing work.bcounter.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":22:7:22:13|Synthesizing work.twid_ra.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":193:7:193:15|Synthesizing work.inbuf_lda.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":148:7:148:16|Synthesizing work.wrffttimer.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\primitives.vhd":23:7:23:13|Synthesizing work.counter.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\primitives.vhd":23:7:23:13|Synthesizing work.counter.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\fftSm.vhd":67:7:67:16|Synthesizing work.rdffttimer.translated 
@N: CD630 :"C:\A2F_AC381_DF\A2F_AC381_DF\A2F500\VHDL\MultichannelFFT\hdl\primitives.vhd":23:7:23:13|Synthesizing work.counter.translated 

