#Build: Synplify Pro E-2010.09A-1, Build 006R, Oct 6 2010 #install: F:\Microsemi\Libero_v9.1\Synopsys\synplify_E201009A-1 #OS: 6.1 #Hostname: W7-DONTHUS #Implementation: synthesis #Thu Dec 08 16:57:32 2011 $ Start of Compile #Thu Dec 08 16:57:32 2011 Synopsys Verilog Compiler, version comp520rcp1, Build 028R, built Sep 23 2010 @N: : | Running in 32-bit mode Copyright (C) 1994-2010, Synopsys Inc. All Rights Reserved @I::"F:\Microsemi\Libero_v9.1\Synopsys\synplify_E201009A-1\lib\proasic\smartfusion.v" @I::"F:\Microsemi\Libero_v9.1\Synopsys\synplify_E201009A-1\lib\vlog\hypermods.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\hdl\reg4x20.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\hdl\reg_apb_wrp.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vlog\core\coreapb3_muxptob3.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vlog\core\coreapb3.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\work\CoreAPB3_Master_Side\CoreAPB3_Master_Side.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\work\CoreAPB3_Slave_Side\CoreAPB3_Slave_Side.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\hdl\Synthetic_ADC_v2 .v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\work\ImprovedWire\MSS_CCC_0\ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\work\ImprovedWire\mss_tshell.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\work\ImprovedWire\ImprovedWire.v" @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\hdl\APB_MEM_CTRL.v" @N:CG347 : APB_MEM_CTRL.v(83) | Read parallel_case directive @I::"C:\A2F_AC375_DF\A2F500\verilog\ADC_DAC_ImprovedWire\component\work\Top_Level\Top_Level.v" Verilog syntax check successful! Compiler output is up to date. No re-compile necessary Selecting top level module Top_Level @N:CG364 : smartfusion.v(1906) | Synthesizing module CLKINT @N:CG364 : smartfusion.v(250) | Synthesizing module BUFD @N:CG364 : reg4x20.v(22) | Synthesizing module reg4x20 @A:CL106 : reg4x20.v(48) | Register mem[0] with async load is being synthesized in compatability mode. A Synthesis/Simulation mismatch is possible. @A:CL106 : reg4x20.v(48) | Register mem[1] with async load is being synthesized in compatability mode. A Synthesis/Simulation mismatch is possible. @A:CL106 : reg4x20.v(48) | Register mem[2] with async load is being synthesized in compatability mode. A Synthesis/Simulation mismatch is possible. @A:CL106 : reg4x20.v(48) | Register mem[3] with async load is being synthesized in compatability mode. A Synthesis/Simulation mismatch is possible. @N:CG364 : reg_apb_wrp.v(20) | Synthesizing module reg_apb_wrp @N:CG364 : smartfusion.v(1133) | Synthesizing module GND @N:CG364 : smartfusion.v(1814) | Synthesizing module VCC @W:CG775 : coreapb3.v(30) | Found Component CoreAPB3 in library COREAPB3_LIB @N:CG364 : coreapb3_muxptob3.v(30) | Synthesizing module COREAPB3_MUXPTOB3 @N:CG364 : coreapb3.v(30) | Synthesizing module CoreAPB3 APB_DWIDTH=6'b100000 RANGESIZE=21'b000010000000000000000 IADDR_ENABLE=1'b1 APBSLOT0ENABLE=1'b1 APBSLOT1ENABLE=1'b1 APBSLOT2ENABLE=1'b0 APBSLOT3ENABLE=1'b0 APBSLOT4ENABLE=1'b0 APBSLOT5ENABLE=1'b0 APBSLOT6ENABLE=1'b0 APBSLOT7ENABLE=1'b0 APBSLOT8ENABLE=1'b0 APBSLOT9ENABLE=1'b0 APBSLOT10ENABLE=1'b0 APBSLOT11ENABLE=1'b0 APBSLOT12ENABLE=1'b0 APBSLOT13ENABLE=1'b0 APBSLOT14ENABLE=1'b0 APBSLOT15ENABLE=1'b0 RANGEBITS=32'b00000000000000000000000000010000 RANGEBITS_LT16=32'b00000000000000000000000000001111 IADDR_31_24_8B_A=16'b0000000000001100 IADDR_23_16_8B_A=16'b0000000000001000 IADDR_15_8_8B_A=16'b0000000000000100 IADDR_7_0_8B_A=16'b0000000000000000 IADDR_31_16_16B_A=16'b0000000000000100 IADDR_15_0_16B_A=16'b0000000000000000 IADDR_31_0_32B_A=16'b0000000000000000 SL0=16'b0000000000000001 SL1=16'b0000000000000010 SL2=16'b0000000000000000 SL3=16'b0000000000000000 SL4=16'b0000000000000000 SL5=16'b0000000000000000 SL6=16'b0000000000000000 SL7=16'b0000000000000000 SL8=16'b0000000000000000 SL9=16'b0000000000000000 SL10=16'b0000000000000000 SL11=16'b0000000000000000 SL12=16'b0000000000000000 SL13=16'b0000000000000000 SL14=16'b0000000000000000 SL15=16'b0000000000000000 Generated name = CoreAPB3_Z1 @W:CL113 : coreapb3.v(276) | Feedback mux created for signal g_iaddr.genblk0.g_ia1.genblk2.genblk4.IADDR[15:0]. @W:CL251 : coreapb3.v(276) | All reachable assignments to g_iaddr.genblk0.g_ia1.genblk2.genblk4.IADDR[15:0] assign 0, register removed by optimization @N:CG364 : CoreAPB3_Master_Side.v(5) | Synthesizing module CoreAPB3_Master_Side @N:CG364 : smartfusion.v(255) | Synthesizing module INVD @W:CG775 : coreapb3.v(30) | Found Component CoreAPB3 in library COREAPB3_LIB @N:CG364 : coreapb3.v(30) | Synthesizing module CoreAPB3 APB_DWIDTH=6'b100000 RANGESIZE=21'b000000000000100000000 IADDR_ENABLE=1'b0 APBSLOT0ENABLE=1'b1 APBSLOT1ENABLE=1'b0 APBSLOT2ENABLE=1'b0 APBSLOT3ENABLE=1'b0 APBSLOT4ENABLE=1'b0 APBSLOT5ENABLE=1'b0 APBSLOT6ENABLE=1'b0 APBSLOT7ENABLE=1'b0 APBSLOT8ENABLE=1'b0 APBSLOT9ENABLE=1'b0 APBSLOT10ENABLE=1'b0 APBSLOT11ENABLE=1'b0 APBSLOT12ENABLE=1'b0 APBSLOT13ENABLE=1'b0 APBSLOT14ENABLE=1'b0 APBSLOT15ENABLE=1'b0 RANGEBITS=32'b00000000000000000000000000001000 RANGEBITS_LT16=32'b00000000000000000000000000001000 IADDR_31_24_8B_A=8'b00001100 IADDR_23_16_8B_A=8'b00001000 IADDR_15_8_8B_A=8'b00000100 IADDR_7_0_8B_A=8'b00000000 IADDR_31_16_16B_A=8'b00000100 IADDR_15_0_16B_A=8'b00000000 IADDR_31_0_32B_A=8'b00000000 SL0=16'b0000000000000001 SL1=16'b0000000000000000 SL2=16'b0000000000000000 SL3=16'b0000000000000000 SL4=16'b0000000000000000 SL5=16'b0000000000000000 SL6=16'b0000000000000000 SL7=16'b0000000000000000 SL8=16'b0000000000000000 SL9=16'b0000000000000000 SL10=16'b0000000000000000 SL11=16'b0000000000000000 SL12=16'b0000000000000000 SL13=16'b0000000000000000 SL14=16'b0000000000000000 SL15=16'b0000000000000000 Generated name = CoreAPB3_Z2 @N:CG364 : CoreAPB3_Slave_Side.v(5) | Synthesizing module CoreAPB3_Slave_Side @N:CG364 : smartfusion.v(1364) | Synthesizing module NOR2B @N:CG364 : smartfusion.v(1293) | Synthesizing module MX2 @N:CG364 : smartfusion.v(1358) | Synthesizing module NOR2A @N:CG364 : smartfusion.v(895) | Synthesizing module DFN1 @N:CG364 : Synthetic_ADC_v2 .v(17) | Synthesizing module singleDelayWithEnableGeneric_12s bitwidth=32'b00000000000000000000000000001100 Generated name = singleDelayWithEnableGeneric_12s_12s @W:CL168 : Synthetic_ADC_v2 .v(263) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(259) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(270) | Synthesizing module synDelayWithEnable_1s_12s_1s bitwidth=32'b00000000000000000000000000001100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_12s_1s_12s_1s @W:CL168 : Synthetic_ADC_v2 .v(308) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(304) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(315) | Synthesizing module synRegister_Register @W:CL168 : Synthetic_ADC_v2 .v(352) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(348) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(359) | Synthesizing module Register_syn @W:CL168 : Synthetic_ADC_v2 .v(402) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(398) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(167) | Synthesizing module AX1D @N:CG364 : smartfusion.v(1877) | Synthesizing module XOR2 @N:CG364 : smartfusion.v(1317) | Synthesizing module NAND2 @N:CG364 : smartfusion.v(1854) | Synthesizing module XNOR2 @N:CG364 : smartfusion.v(2) | Synthesizing module AND2 @N:CG364 : smartfusion.v(1415) | Synthesizing module OAI1 @N:CG364 : smartfusion.v(126) | Synthesizing module AOI1B @N:CG364 : smartfusion.v(1276) | Synthesizing module MIN3 @N:CG364 : smartfusion.v(1387) | Synthesizing module NOR3C @N:CG364 : smartfusion.v(1848) | Synthesizing module XAI1A @N:CG364 : smartfusion.v(1426) | Synthesizing module OR2A @N:CG364 : smartfusion.v(1882) | Synthesizing module XOR3 @N:CG364 : smartfusion.v(1258) | Synthesizing module MAJ3 @N:CG364 : smartfusion.v(1818) | Synthesizing module XA1 @N:CG364 : smartfusion.v(73) | Synthesizing module AO18 @N:CG364 : smartfusion.v(1392) | Synthesizing module OA1 @N:CG364 : smartfusion.v(1824) | Synthesizing module XA1A @N:CG364 : smartfusion.v(1836) | Synthesizing module XA1C @N:CG364 : smartfusion.v(1420) | Synthesizing module OR2 @N:CG364 : smartfusion.v(1859) | Synthesizing module XNOR3 @N:CG364 : smartfusion.v(1455) | Synthesizing module OR3C @N:CG364 : smartfusion.v(1842) | Synthesizing module XAI1 @N:CG364 : smartfusion.v(1432) | Synthesizing module OR2B @N:CG364 : smartfusion.v(1437) | Synthesizing module OR3 @N:CG364 : smartfusion.v(91) | Synthesizing module AO1B @N:CG364 : smartfusion.v(173) | Synthesizing module AX1E @N:CG364 : smartfusion.v(162) | Synthesizing module AX1C @N:CG364 : smartfusion.v(79) | Synthesizing module AO1 @N:CG364 : smartfusion.v(43) | Synthesizing module AO13 @N:CG364 : smartfusion.v(1352) | Synthesizing module NOR2 @N:CG364 : smartfusion.v(1449) | Synthesizing module OR3B @N:CG364 : smartfusion.v(1381) | Synthesizing module NOR3B @N:CG364 : smartfusion.v(85) | Synthesizing module AO1A @N:CG364 : smartfusion.v(1398) | Synthesizing module OA1A @N:CG364 : smartfusion.v(152) | Synthesizing module AX1A @N:CG364 : smartfusion.v(157) | Synthesizing module AX1B @N:CG364 : smartfusion.v(97) | Synthesizing module AO1C @N:CG364 : smartfusion.v(114) | Synthesizing module AOI1 @N:CG364 : Synthetic_ADC_v2 .v(409) | Synthesizing module singleDelayWithEnableGeneric_28s bitwidth=32'b00000000000000000000000000011100 Generated name = singleDelayWithEnableGeneric_28s_28s @W:CG360 : Synthetic_ADC_v2 .v(458) | No assignment to wire N_517 @W:CG360 : Synthetic_ADC_v2 .v(459) | No assignment to wire N_516 @W:CL168 : Synthetic_ADC_v2 .v(913) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(909) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(920) | Synthesizing module synDelayWithEnable_1s_28s_1s bitwidth=32'b00000000000000000000000000011100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_28s_1s_28s_1s @W:CL168 : Synthetic_ADC_v2 .v(966) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(962) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(973) | Synthesizing module synDecimate_by_ten_CIC_2nd_Order_Register1_Register @W:CL168 : Synthetic_ADC_v2 .v(1018) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(1014) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(1025) | Synthesizing module Decimate_by_ten_CIC_2nd_Order_Register1 @W:CL168 : Synthetic_ADC_v2 .v(1068) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(1064) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(1075) | Synthesizing module singleDelayWithEnableGeneric_28s_1 bitwidth=32'b00000000000000000000000000011100 Generated name = singleDelayWithEnableGeneric_28s_1_28s @W:CG360 : Synthetic_ADC_v2 .v(1121) | No assignment to wire N_515 @W:CG360 : Synthetic_ADC_v2 .v(1122) | No assignment to wire N_514 @W:CL168 : Synthetic_ADC_v2 .v(1576) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(1572) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(1583) | Synthesizing module synDelayWithEnable_1s_28s_1s_1 bitwidth=32'b00000000000000000000000000011100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_28s_1s_1_28s_1s @W:CL168 : Synthetic_ADC_v2 .v(1625) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(1621) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(1632) | Synthesizing module synDecimate_by_ten_CIC_2nd_Order_Register1_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(1673) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(1669) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(1680) | Synthesizing module Decimate_by_ten_CIC_2nd_Order_Register1_1 @W:CL168 : Synthetic_ADC_v2 .v(1719) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(1715) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(1726) | Synthesizing module singleDelayWithEnableGeneric_28s_2 bitwidth=32'b00000000000000000000000000011100 Generated name = singleDelayWithEnableGeneric_28s_2_28s @W:CG360 : Synthetic_ADC_v2 .v(1772) | No assignment to wire N_42 @W:CG360 : Synthetic_ADC_v2 .v(1773) | No assignment to wire N_41 @W:CL168 : Synthetic_ADC_v2 .v(2227) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2223) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2234) | Synthesizing module synDelayWithEnable_1s_28s_1s_2 bitwidth=32'b00000000000000000000000000011100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_28s_1s_2_28s_1s @W:CL168 : Synthetic_ADC_v2 .v(2276) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2272) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2283) | Synthesizing module synDecimate_by_ten_CIC_2nd_Order_Register1_Register_2 @W:CL168 : Synthetic_ADC_v2 .v(2324) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2320) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2331) | Synthesizing module Decimate_by_ten_CIC_2nd_Order_Register1_2 @W:CL168 : Synthetic_ADC_v2 .v(2370) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2366) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2377) | Synthesizing module singleDelayWithEnableGeneric_28s_3 bitwidth=32'b00000000000000000000000000011100 Generated name = singleDelayWithEnableGeneric_28s_3_28s @W:CG360 : Synthetic_ADC_v2 .v(2424) | No assignment to wire N_40_0 @W:CG360 : Synthetic_ADC_v2 .v(2425) | No assignment to wire N_39_0 @W:CL168 : Synthetic_ADC_v2 .v(2879) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2875) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2886) | Synthesizing module synDelayWithEnable_1s_28s_1s_3 bitwidth=32'b00000000000000000000000000011100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_28s_1s_3_28s_1s @W:CL168 : Synthetic_ADC_v2 .v(2930) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2926) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2937) | Synthesizing module synDecimate_by_ten_CIC_2nd_Order_Register1_Register_3 @W:CL168 : Synthetic_ADC_v2 .v(2980) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(2976) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(2987) | Synthesizing module Decimate_by_ten_CIC_2nd_Order_Register1_3 @W:CL168 : Synthetic_ADC_v2 .v(3028) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(3024) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(3035) | Synthesizing module singleDelayWithEnableGeneric_33s bitwidth=32'b00000000000000000000000000100001 Generated name = singleDelayWithEnableGeneric_33s_33s @W:CG360 : Synthetic_ADC_v2 .v(3181) | No assignment to wire N_1_11 @W:CG360 : Synthetic_ADC_v2 .v(3185) | No assignment to wire N_1_10 @W:CG360 : Synthetic_ADC_v2 .v(3186) | No assignment to wire N_1_9 @W:CG360 : Synthetic_ADC_v2 .v(3187) | No assignment to wire N_1_8 @W:CG360 : Synthetic_ADC_v2 .v(3190) | No assignment to wire N_1_7 @W:CG360 : Synthetic_ADC_v2 .v(3193) | No assignment to wire N_1_6 @W:CG360 : Synthetic_ADC_v2 .v(3196) | No assignment to wire N_1_5 @W:CG360 : Synthetic_ADC_v2 .v(3199) | No assignment to wire N_1_4 @W:CG360 : Synthetic_ADC_v2 .v(3201) | No assignment to wire N_1_3 @W:CG360 : Synthetic_ADC_v2 .v(3203) | No assignment to wire N_1_2 @W:CG360 : Synthetic_ADC_v2 .v(3204) | No assignment to wire N_1_1 @W:CG360 : Synthetic_ADC_v2 .v(3205) | No assignment to wire N_1_0 @W:CG360 : Synthetic_ADC_v2 .v(3230) | No assignment to wire N_38 @W:CG360 : Synthetic_ADC_v2 .v(3231) | No assignment to wire N_37 @W:CL168 : Synthetic_ADC_v2 .v(3846) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(3842) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(3853) | Synthesizing module synDelayWithEnable_1s_33s_1s bitwidth=32'b00000000000000000000000000100001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_33s_1s_33s_1s @W:CL168 : Synthetic_ADC_v2 .v(4060) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(4056) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(4067) | Synthesizing module synDecimate_by_ten_CIC_2nd_Order_Register_Register @W:CL168 : Synthetic_ADC_v2 .v(4273) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(4269) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(4280) | Synthesizing module Decimate_by_ten_CIC_2nd_Order_Register @W:CL168 : Synthetic_ADC_v2 .v(4484) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(4480) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(4491) | Synthesizing module Decimate_by_ten_CIC_2nd_Order @W:CL168 : Synthetic_ADC_v2 .v(7984) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(7980) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(1375) | Synthesizing module NOR3A @N:CG364 : smartfusion.v(103) | Synthesizing module AO1D @N:CG364 : smartfusion.v(1443) | Synthesizing module OR3A @N:CG364 : smartfusion.v(1830) | Synthesizing module XA1B @N:CG364 : smartfusion.v(1404) | Synthesizing module OA1B @N:CG364 : smartfusion.v(1894) | Synthesizing module ZOR3I @N:CG364 : smartfusion.v(215) | Synthesizing module AXOI1 @N:CG364 : smartfusion.v(1410) | Synthesizing module OA1C @N:CG364 : Synthetic_ADC_v2 .v(7991) | Synthesizing module singleDelayWithEnableGeneric_25s bitwidth=32'b00000000000000000000000000011001 Generated name = singleDelayWithEnableGeneric_25s_25s @W:CL168 : Synthetic_ADC_v2 .v(8548) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(8544) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(8555) | Synthesizing module synDelayWithEnable_1s_25s_1s bitwidth=32'b00000000000000000000000000011001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_25s_1s_25s_1s @W:CL168 : Synthetic_ADC_v2 .v(8659) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(8655) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(8666) | Synthesizing module synDecimate_by_ten_IIR_2nd_order_Register1_Register @W:CL168 : Synthetic_ADC_v2 .v(8769) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(8765) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(8776) | Synthesizing module Decimate_by_ten_IIR_2nd_order_Register1 @W:CL168 : Synthetic_ADC_v2 .v(8877) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(8873) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(8884) | Synthesizing module singleDelayWithEnableGeneric_27s bitwidth=32'b00000000000000000000000000011011 Generated name = singleDelayWithEnableGeneric_27s_27s @W:CL168 : Synthetic_ADC_v2 .v(10478) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(10474) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(10485) | Synthesizing module synDelayWithEnable_1s_27s_1s bitwidth=32'b00000000000000000000000000011011 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_27s_1s_27s_1s @W:CL168 : Synthetic_ADC_v2 .v(11169) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(11165) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(11176) | Synthesizing module synDecimate_by_ten_IIR_2nd_order_Register_Register @W:CL168 : Synthetic_ADC_v2 .v(11859) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(11855) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(11866) | Synthesizing module Decimate_by_ten_IIR_2nd_order_Register @W:CL168 : Synthetic_ADC_v2 .v(12547) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(12543) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(12554) | Synthesizing module Decimate_by_ten_IIR_2nd_order @W:CG360 : Synthetic_ADC_v2 .v(12684) | No assignment to wire N_5_0 @W:CL168 : Synthetic_ADC_v2 .v(15908) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(15904) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(15915) | Synthesizing module Decimate_by_ten @W:CL168 : Synthetic_ADC_v2 .v(16225) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16221) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(1369) | Synthesizing module NOR3 @N:CG364 : smartfusion.v(913) | Synthesizing module DFN1E0 @N:CG364 : Synthetic_ADC_v2 .v(16232) | Synthesizing module synCounter_1_1_0_1_2s_0s_7s_3s_0 en_exists=32'b00000000000000000000000000000001 rst_exists=32'b00000000000000000000000000000001 ld_exists=32'b00000000000000000000000000000000 rdy_exists=32'b00000000000000000000000000000001 ctype=32'b00000000000000000000000000000010 ival=32'b00000000000000000000000000000000 tval=32'b00000000000000000000000000000111 bitwidth=32'b00000000000000000000000000000011 isSigned=32'b00000000000000000000000000000000 Generated name = synCounter_1_1_0_1_2s_0s_7s_3s_0_1s_1s_0s_1s_2s_0s_7s_3s_0s @W:CL168 : Synthetic_ADC_v2 .v(16363) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16359) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16370) | Synthesizing module singleDelayWithEnableGeneric_1s bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(16423) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16419) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16430) | Synthesizing module synDelayWithEnable_1s_1s_1s bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(16468) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16464) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16475) | Synthesizing module synP2S_Bitclk_Edges_Register2_Register @W:CL168 : Synthetic_ADC_v2 .v(16512) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16508) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16519) | Synthesizing module P2S_Bitclk_Edges_Register2 @W:CL168 : Synthetic_ADC_v2 .v(16554) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16550) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16561) | Synthesizing module Sync_logic_Rising_Edge_Det @W:CL168 : Synthetic_ADC_v2 .v(16596) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16592) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16603) | Synthesizing module Sync_logic @W:CL168 : Synthetic_ADC_v2 .v(16673) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(16669) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(16680) | Synthesizing module singleDelayWithEnableGeneric_21s bitwidth=32'b00000000000000000000000000010101 Generated name = singleDelayWithEnableGeneric_21s_21s @W:CL168 : Synthetic_ADC_v2 .v(17009) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17005) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17016) | Synthesizing module synDelayWithEnable_1s_21s_1s bitwidth=32'b00000000000000000000000000010101 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_21s_1s_21s_1s @W:CL168 : Synthetic_ADC_v2 .v(17059) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17055) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17066) | Synthesizing module synComparator_4s_unsign_equ bitwidth=32'b00000000000000000000000000000100 datatype=48'b011101010110111001110011011010010110011101101110 opr=24'b011001010111000101110101 Generated name = synComparator_4s_unsign_equ_4s_unsign_equ @W:CL168 : Synthetic_ADC_v2 .v(17097) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17093) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(1305) | Synthesizing module MX2B @N:CG364 : Synthetic_ADC_v2 .v(17104) | Synthesizing module singleDelayWithEnableGeneric_4s bitwidth=32'b00000000000000000000000000000100 Generated name = singleDelayWithEnableGeneric_4s_4s @W:CL168 : Synthetic_ADC_v2 .v(17233) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17229) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17240) | Synthesizing module synDelayWithEnable_1s_4s_1s bitwidth=32'b00000000000000000000000000000100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_4s_1s_4s_1s @W:CL168 : Synthetic_ADC_v2 .v(17282) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17278) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17289) | Synthesizing module synSigma_Delta_Modulator_Clkdiv_and_RTZ_Modulator_counter_Register_Register @W:CL168 : Synthetic_ADC_v2 .v(17330) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17326) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17337) | Synthesizing module Sigma_Delta_Modulator_Clkdiv_and_RTZ_Modulator_counter_Register @W:CL168 : Synthetic_ADC_v2 .v(17376) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17372) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17383) | Synthesizing module Sigma_Delta_Modulator_Clkdiv_and_RTZ_Modulator_counter @W:CL168 : Synthetic_ADC_v2 .v(17470) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17466) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(227) | Synthesizing module AXOI3 @N:CG364 : Synthetic_ADC_v2 .v(17477) | Synthesizing module singleDelayWithEnableGeneric_1s_1 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_1_1s @W:CL168 : Synthetic_ADC_v2 .v(17544) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17540) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17551) | Synthesizing module synDelayWithEnable_1s_1s_1s_1 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_1_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(17598) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17594) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17605) | Synthesizing module synSigma_Delta_Modulator_Clkdiv_and_RTZ_Modulator_Toggle_FF_Register @W:CL168 : Synthetic_ADC_v2 .v(17651) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17647) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17658) | Synthesizing module Sigma_Delta_Modulator_Clkdiv_and_RTZ_Modulator_Toggle_FF @W:CL168 : Synthetic_ADC_v2 .v(17702) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17698) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17709) | Synthesizing module singleDelayWithEnableGeneric_1s_2 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_2_1s @W:CL168 : Synthetic_ADC_v2 .v(17754) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17750) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17761) | Synthesizing module synDelayWithEnable_1s_1s_1s_2 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_2_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(17797) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17793) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17804) | Synthesizing module synP2S_Bitclk_Edges_Register2_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(17839) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17835) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17846) | Synthesizing module P2S_Bitclk_Edges_Register2_1 @W:CL168 : Synthetic_ADC_v2 .v(17879) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17875) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17886) | Synthesizing module singleDelayWithEnableGeneric_1s_3 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_3_1s @W:CL168 : Synthetic_ADC_v2 .v(17931) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17927) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17938) | Synthesizing module synDelayWithEnable_1s_1s_1s_3 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_3_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(17974) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(17970) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(17981) | Synthesizing module synP2S_Bitclk_Edges_Register2_Register_2 @W:CL168 : Synthetic_ADC_v2 .v(18016) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18012) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18023) | Synthesizing module P2S_Bitclk_Edges_Register2_2 @W:CL168 : Synthetic_ADC_v2 .v(18056) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18052) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18063) | Synthesizing module singleDelayWithEnableGeneric_1s_4 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_4_1s @W:CL168 : Synthetic_ADC_v2 .v(18121) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18117) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18128) | Synthesizing module synDelayWithEnable_1s_1s_1s_4 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_4_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(18172) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18168) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18179) | Synthesizing module synP2S_Frameclk_Edges_Register1_Register @W:CL168 : Synthetic_ADC_v2 .v(18222) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18218) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18229) | Synthesizing module P2S_Frameclk_Edges_Register1 @W:CL168 : Synthetic_ADC_v2 .v(18278) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18274) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18285) | Synthesizing module Sigma_Delta_Modulator_Clkdiv_and_RTZ_Modulator @W:CL168 : Synthetic_ADC_v2 .v(18382) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18378) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(142) | Synthesizing module AOI5 @N:CG364 : Synthetic_ADC_v2 .v(18389) | Synthesizing module synBusSatRnd_Z12 inp_width=32'b00000000000000000000000000010111 out_width=32'b00000000000000000000000000010001 infrac=32'b00000000000000000000000000010011 outfrac=32'b00000000000000000000000000001111 round=32'b00000000000000000000000000000000 sat=32'b00000000000000000000000000000001 datatype=16'b0101001101010011 Generated name = synBusSatRnd_Z12_23s_17s_19s_15s_0s_1s_SS @W:CL168 : Synthetic_ADC_v2 .v(18418) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18414) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(1311) | Synthesizing module MX2C @N:CG364 : Synthetic_ADC_v2 .v(18425) | Synthesizing module singleDelayWithEnableGeneric_17s bitwidth=32'b00000000000000000000000000010001 Generated name = singleDelayWithEnableGeneric_17s_17s @W:CG360 : Synthetic_ADC_v2 .v(18489) | No assignment to wire N_36 @W:CL168 : Synthetic_ADC_v2 .v(18890) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18886) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18897) | Synthesizing module synDelayWithEnable_1s_17s_1s bitwidth=32'b00000000000000000000000000010001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_17s_1s_17s_1s @W:CL168 : Synthetic_ADC_v2 .v(18972) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(18968) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(18979) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_1st_order_D0_Register @W:CL168 : Synthetic_ADC_v2 .v(19053) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(19049) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(19060) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_1st_order_D0 @W:CL168 : Synthetic_ADC_v2 .v(19132) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(19128) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(19139) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_1st_order @W:CL168 : Synthetic_ADC_v2 .v(19745) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(19741) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(1865) | Synthesizing module XO1 @N:CG364 : Synthetic_ADC_v2 .v(19752) | Synthesizing module synBusSatRnd_Z13 inp_width=32'b00000000000000000000000000011101 out_width=32'b00000000000000000000000000011000 infrac=32'b00000000000000000000000000010011 outfrac=32'b00000000000000000000000000010000 round=32'b00000000000000000000000000000001 sat=32'b00000000000000000000000000000001 datatype=16'b0101001101010011 Generated name = synBusSatRnd_Z13_29s_24s_19s_16s_1s_1s_SS @W:CL168 : Synthetic_ADC_v2 .v(19957) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(19953) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(19964) | Synthesizing module singleDelayWithEnableGeneric_2s bitwidth=32'b00000000000000000000000000000010 Generated name = singleDelayWithEnableGeneric_2s_2s @W:CL168 : Synthetic_ADC_v2 .v(20417) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(20413) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(20424) | Synthesizing module synDelayWithEnable_1s_2s_1s bitwidth=32'b00000000000000000000000000000010 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_2s_1s_2s_1s @W:CL168 : Synthetic_ADC_v2 .v(20691) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(20687) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(20698) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D2_Register @W:CL168 : Synthetic_ADC_v2 .v(20964) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(20960) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(20971) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D2 @W:CL168 : Synthetic_ADC_v2 .v(21235) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(21231) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(21242) | Synthesizing module singleDelayWithEnableGeneric_24s bitwidth=32'b00000000000000000000000000011000 Generated name = singleDelayWithEnableGeneric_24s_24s @W:CL168 : Synthetic_ADC_v2 .v(22506) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(22502) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(22513) | Synthesizing module synDelayWithEnable_1s_24s_1s bitwidth=32'b00000000000000000000000000011000 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_24s_1s_24s_1s @W:CL168 : Synthetic_ADC_v2 .v(22864) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(22860) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(22871) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D0_Register @W:CL168 : Synthetic_ADC_v2 .v(23221) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(23217) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(23228) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D0_myD1 @W:CL168 : Synthetic_ADC_v2 .v(23576) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(23572) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(23583) | Synthesizing module singleDelayWithEnableGeneric_24s_1 bitwidth=32'b00000000000000000000000000011000 Generated name = singleDelayWithEnableGeneric_24s_1_24s @W:CL168 : Synthetic_ADC_v2 .v(25247) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(25243) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(25254) | Synthesizing module synDelayWithEnable_1s_24s_1s_1 bitwidth=32'b00000000000000000000000000011000 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_24s_1s_1_24s_1s @W:CL168 : Synthetic_ADC_v2 .v(25877) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(25873) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(25884) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D0_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(26506) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(26502) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(26513) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D0_myD1_1 @W:CL168 : Synthetic_ADC_v2 .v(27133) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(27129) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(27140) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order @W:CL168 : Synthetic_ADC_v2 .v(29353) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(29349) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(147) | Synthesizing module AX1 @N:CG364 : smartfusion.v(1871) | Synthesizing module XO1A @N:CG364 : Synthetic_ADC_v2 .v(29360) | Synthesizing module singleDelayWithEnableGeneric_2s_1 bitwidth=32'b00000000000000000000000000000010 Generated name = singleDelayWithEnableGeneric_2s_1_2s @W:CL168 : Synthetic_ADC_v2 .v(29476) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(29472) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(29483) | Synthesizing module synDelayWithEnable_1s_2s_1s_1 bitwidth=32'b00000000000000000000000000000010 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_2s_1s_1_2s_1s @W:CL168 : Synthetic_ADC_v2 .v(29552) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(29548) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(29559) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D2_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(29627) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(29623) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(29634) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_2nd_order_D2_1 @W:CL168 : Synthetic_ADC_v2 .v(29714) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(29710) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(29721) | Synthesizing module singleDelayWithEnableGeneric_20s bitwidth=32'b00000000000000000000000000010100 Generated name = singleDelayWithEnableGeneric_20s_20s @W:CL168 : Synthetic_ADC_v2 .v(31349) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(31345) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(31356) | Synthesizing module synDelayWithEnable_1s_20s_1s bitwidth=32'b00000000000000000000000000010100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_20s_1s_20s_1s @W:CL168 : Synthetic_ADC_v2 .v(31729) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(31725) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(31736) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D2_Register @W:CL168 : Synthetic_ADC_v2 .v(32108) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(32104) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(32115) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D2_myD3 @W:CL168 : Synthetic_ADC_v2 .v(32485) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(32481) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(32492) | Synthesizing module singleDelayWithEnableGeneric_20s_1 bitwidth=32'b00000000000000000000000000010100 Generated name = singleDelayWithEnableGeneric_20s_1_20s @W:CL168 : Synthetic_ADC_v2 .v(33751) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(33747) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(33758) | Synthesizing module synDelayWithEnable_1s_20s_1s_1 bitwidth=32'b00000000000000000000000000010100 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_20s_1s_1_20s_1s @W:CL168 : Synthetic_ADC_v2 .v(34116) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(34112) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(34123) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D2_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(34480) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(34476) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(34487) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D2_myD3_1 @W:CL168 : Synthetic_ADC_v2 .v(34842) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(34838) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(34849) | Synthesizing module singleDelayWithEnableGeneric_25s_1 bitwidth=32'b00000000000000000000000000011001 Generated name = singleDelayWithEnableGeneric_25s_1_25s @W:CL168 : Synthetic_ADC_v2 .v(35974) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(35970) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(35981) | Synthesizing module synDelayWithEnable_1s_25s_1s_1 bitwidth=32'b00000000000000000000000000011001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_25s_1s_1_25s_1s @W:CL168 : Synthetic_ADC_v2 .v(36272) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(36268) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(36279) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D0_Register @W:CL168 : Synthetic_ADC_v2 .v(36569) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(36565) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(36576) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D0_myD1 @W:CL168 : Synthetic_ADC_v2 .v(36864) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(36860) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(36871) | Synthesizing module singleDelayWithEnableGeneric_25s_2 bitwidth=32'b00000000000000000000000000011001 Generated name = singleDelayWithEnableGeneric_25s_2_25s @W:CL168 : Synthetic_ADC_v2 .v(38641) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(38637) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(38648) | Synthesizing module synDelayWithEnable_1s_25s_1s_2 bitwidth=32'b00000000000000000000000000011001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_25s_1s_2_25s_1s @W:CL168 : Synthetic_ADC_v2 .v(39344) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(39340) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(39351) | Synthesizing module synSigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D0_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(40046) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(40042) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(40053) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D0_myD1_1 @W:CL168 : Synthetic_ADC_v2 .v(40746) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(40742) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(40753) | Synthesizing module Sigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order @W:CL168 : Synthetic_ADC_v2 .v(44394) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(44390) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(44401) | Synthesizing module singleDelayWithEnableGeneric_1s_5 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_5_1s @W:CL168 : Synthetic_ADC_v2 .v(44446) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(44442) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(44453) | Synthesizing module synDelayWithEnable_1s_1s_1s_5 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_5_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(44489) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(44485) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(44496) | Synthesizing module singleDelayWithEnableGeneric_1s_6 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_6_1s @W:CL168 : Synthetic_ADC_v2 .v(44669) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(44665) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(44676) | Synthesizing module synDelayWithEnable_1s_1s_1s_6 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_6_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(44778) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(44774) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(44785) | Synthesizing module singleDelayWithEnableGeneric_1s_7 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_7_1s @W:CL168 : Synthetic_ADC_v2 .v(45152) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(45148) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(45159) | Synthesizing module synDelayWithEnable_1s_1s_1s_7 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_7_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(45329) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(45325) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(45336) | Synthesizing module synSigma_Delta_Modulator_ISI_Compensation_Shift_Register @W:CL168 : Synthetic_ADC_v2 .v(45516) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(45512) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(45523) | Synthesizing module Sigma_Delta_Modulator_ISI_Compensation @W:CL168 : Synthetic_ADC_v2 .v(45633) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(45629) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(45640) | Synthesizing module Sigma_Delta_Modulator @W:CL168 : Synthetic_ADC_v2 .v(46163) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46159) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46170) | Synthesizing module singleDelayWithEnableGeneric_1s_8 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_8_1s @W:CL168 : Synthetic_ADC_v2 .v(46215) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46211) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46222) | Synthesizing module synDelayWithEnable_1s_1s_1s_8 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_8_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(46258) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46254) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46265) | Synthesizing module synP2S_Bitclk_Edges_Register2_Register_3 @W:CL168 : Synthetic_ADC_v2 .v(46300) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46296) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46307) | Synthesizing module P2S_Bitclk_Edges_Register2_3 @W:CL168 : Synthetic_ADC_v2 .v(46340) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46336) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46347) | Synthesizing module singleDelayWithEnableGeneric_1s_9 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_9_1s @W:CL168 : Synthetic_ADC_v2 .v(46393) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46389) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46400) | Synthesizing module synDelayWithEnable_1s_1s_1s_9 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_9_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(46437) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46433) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46444) | Synthesizing module synP2S_Bitclk_Edges_Register2_Register_4 @W:CL168 : Synthetic_ADC_v2 .v(46480) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46476) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46487) | Synthesizing module P2S_Bitclk_Edges_Register2_4 @W:CL168 : Synthetic_ADC_v2 .v(46521) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46517) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46528) | Synthesizing module Rising_Edge_Det @W:CL168 : Synthetic_ADC_v2 .v(46577) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46573) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46584) | Synthesizing module singleDelayWithEnableGeneric_1s_10 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_10_1s @W:CL168 : Synthetic_ADC_v2 .v(46637) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46633) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46644) | Synthesizing module synDelayWithEnable_1s_1s_1s_10 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_10_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(46684) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46680) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46691) | Synthesizing module synP2S_Bitclk_Edges_Register2_Register_5 @W:CL168 : Synthetic_ADC_v2 .v(46730) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46726) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46737) | Synthesizing module P2S_Bitclk_Edges_Register2_5 @W:CL168 : Synthetic_ADC_v2 .v(46774) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46770) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46781) | Synthesizing module P2S_Bitclk_Edges @W:CL168 : Synthetic_ADC_v2 .v(46824) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46820) | Pruning instance VCC_i - not in use ... @N:CG364 : smartfusion.v(1253) | Synthesizing module INV @N:CG364 : Synthetic_ADC_v2 .v(46831) | Synthesizing module singleDelayWithEnableGeneric_1s_11 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_11_1s @W:CL168 : Synthetic_ADC_v2 .v(46883) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46879) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46890) | Synthesizing module synDelayWithEnable_1s_1s_1s_11 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_11_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(46927) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46923) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46934) | Synthesizing module synP2S_Frameclk_Edges_Register1_Register_1 @W:CL168 : Synthetic_ADC_v2 .v(46970) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(46966) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(46977) | Synthesizing module P2S_Frameclk_Edges_Register1_1 @W:CL168 : Synthetic_ADC_v2 .v(47011) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47007) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47018) | Synthesizing module singleDelayWithEnableGeneric_1s_12 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_12_1s @W:CL168 : Synthetic_ADC_v2 .v(47072) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47068) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47079) | Synthesizing module synDelayWithEnable_1s_1s_1s_12 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_12_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(47119) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47115) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47126) | Synthesizing module synP2S_Frameclk_Edges_Register1_Register_2 @W:CL168 : Synthetic_ADC_v2 .v(47165) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47161) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47172) | Synthesizing module P2S_Frameclk_Edges_Register1_2 @W:CL168 : Synthetic_ADC_v2 .v(47219) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47215) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47226) | Synthesizing module P2S_Frameclk_Edges @W:CL168 : Synthetic_ADC_v2 .v(47294) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47290) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47301) | Synthesizing module singleDelayWithEnableGeneric_24s_2 bitwidth=32'b00000000000000000000000000011000 Generated name = singleDelayWithEnableGeneric_24s_2_24s @W:CL168 : Synthetic_ADC_v2 .v(47768) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47764) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47775) | Synthesizing module synDelayWithEnable_1s_24s_1s_2 bitwidth=32'b00000000000000000000000000011000 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_24s_1s_2_24s_1s @W:CL168 : Synthetic_ADC_v2 .v(47818) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47814) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47825) | Synthesizing module synP2S_Shift_Register_Shift_Register_Register @W:CL168 : Synthetic_ADC_v2 .v(47867) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47863) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47874) | Synthesizing module P2S_Shift_Register_Shift_Register @W:CL168 : Synthetic_ADC_v2 .v(47922) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(47918) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(47929) | Synthesizing module P2S_Shift_Register @W:CL168 : Synthetic_ADC_v2 .v(48400) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(48396) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(48407) | Synthesizing module P2S @W:CL168 : Synthetic_ADC_v2 .v(48665) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(48661) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(48672) | Synthesizing module singleDelayWithEnableGeneric_1s_13 bitwidth=32'b00000000000000000000000000000001 Generated name = singleDelayWithEnableGeneric_1s_13_1s @W:CL168 : Synthetic_ADC_v2 .v(48717) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(48713) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(48724) | Synthesizing module synDelayWithEnable_1s_1s_1s_13 bitwidth=32'b00000000000000000000000000000001 delaylength=32'b00000000000000000000000000000001 Generated name = synDelayWithEnable_1s_1s_1s_13_1s_1s @W:CL168 : Synthetic_ADC_v2 .v(48760) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(48756) | Pruning instance VCC_i - not in use ... @N:CG364 : Synthetic_ADC_v2 .v(48767) | Synthesizing module Synthetic_ADC_v2 @W:CL168 : Synthetic_ADC_v2 .v(49093) | Pruning instance GND_i - not in use ... @W:CL168 : Synthetic_ADC_v2 .v(49089) | Pruning instance VCC_i - not in use ... @N:CG364 : mss_comps.v(23) | Synthesizing module INBUF_MSS @N:CG364 : smartfusion.v(2614) | Synthesizing module OUTBUF_A @N:CG364 : smartfusion.v(2609) | Synthesizing module INBUF_A @N:CG364 : mss_comps.v(37) | Synthesizing module OUTBUF_MSS @N:CG364 : mss_comps.v(151) | Synthesizing module MSS_CCC @N:CG364 : mss_comps.v(1) | Synthesizing module MSS_XTLOSC @N:CG364 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(5) | Synthesizing module ImprovedWire_tmp_MSS_CCC_0_MSS_CCC @N:CG364 : mss_tshell.v(1) | Synthesizing module MSS_APB @N:CG364 : ImprovedWire.v(5) | Synthesizing module ImprovedWire @N:CG364 : APB_MEM_CTRL.v(21) | Synthesizing module APB_MEM_CTRL @W:CL265 : APB_MEM_CTRL.v(61) | Pruning bit 15 of Adc0_Status_Reg[15:0] - not in use ... @W:CL265 : APB_MEM_CTRL.v(61) | Pruning bit 14 of Adc0_Status_Reg[15:0] - not in use ... @W:CL265 : APB_MEM_CTRL.v(61) | Pruning bit 13 of Adc0_Status_Reg[15:0] - not in use ... @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[0] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[1] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[2] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[3] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[4] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[5] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[6] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[7] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[8] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[9] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[10] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[11] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[13] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[14] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[15] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[17] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[18] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[19] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[20] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[21] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[22] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PADDR[23] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[0] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[1] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[2] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[3] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[4] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[5] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[6] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[7] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[8] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[9] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[10] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[11] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[12] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[13] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[14] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[15] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[16] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[18] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[19] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[20] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[21] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[22] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[23] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[24] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[25] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[26] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[27] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[28] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[29] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit PWDATA[31] to a constant 0 @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 23 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 22 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 21 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 20 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 19 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 18 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 17 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 15 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 14 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 13 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 11 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 10 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 9 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 8 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 7 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 6 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 5 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 4 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 3 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 2 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 1 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 0 of PADDR[23:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 31 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 29 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 28 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 27 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 26 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 25 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 24 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 23 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 22 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 21 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 20 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 19 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 18 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 16 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 15 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 14 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 13 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 12 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 11 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 10 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 9 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 8 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 7 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 6 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 5 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 4 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 3 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 2 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 1 of PWDATA[31:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 0 of PWDATA[31:0] @N:CG364 : Top_Level.v(5) | Synthesizing module Top_Level @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit datavalid_cnt[6] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit datavalid_cnt[7] to a constant 0 @W:CL190 : APB_MEM_CTRL.v(61) | Optimizing register bit data_enable_ctr[3] to a constant 0 @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 3 of data_enable_ctr[3:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 7 of datavalid_cnt[7:0] @W:CL260 : APB_MEM_CTRL.v(61) | Pruning Register bit 6 of datavalid_cnt[7:0] @N:CL201 : APB_MEM_CTRL.v(61) | Trying to extract state machine for register current_state Extracted state machine for register current_state State machine has 10 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 @W:CL246 : APB_MEM_CTRL.v(24) | Input port bits 31 to 13 of PRDATA[31:0] are unused @W:CL159 : APB_MEM_CTRL.v(23) | Input PSLVERR is unused @W:CL157 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(62) | *Output RCOSC_CLKOUT has undriven bits - a simulation mismatch is possible @W:CL157 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(63) | *Output MAINXIN_CLKOUT has undriven bits - a simulation mismatch is possible @W:CL157 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(64) | *Output LPXIN_CLKOUT has undriven bits - a simulation mismatch is possible @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(36) | Input CLKA is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(37) | Input CLKA_PAD is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(38) | Input CLKA_PADP is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(39) | Input CLKA_PADN is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(40) | Input CLKB is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(41) | Input CLKB_PAD is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(42) | Input CLKB_PADP is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(43) | Input CLKB_PADN is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(44) | Input CLKC is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(45) | Input CLKC_PAD is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(46) | Input CLKC_PADP is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(47) | Input CLKC_PADN is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(49) | Input LPXIN is unused @W:CL159 : ImprovedWire_tmp_MSS_CCC_0_MSS_CCC.v(50) | Input MAC_CLK is unused @W:CL246 : coreapb3.v(54) | Input port bits 23 to 12 of PADDR[23:0] are unused @W:CL159 : coreapb3.v(52) | Input PRESETN is unused @W:CL159 : coreapb3.v(53) | Input PCLK is unused @W:CL159 : coreapb3.v(84) | Input PRDATAS1 is unused @W:CL159 : coreapb3.v(85) | Input PRDATAS2 is unused @W:CL159 : coreapb3.v(86) | Input PRDATAS3 is unused @W:CL159 : coreapb3.v(87) | Input PRDATAS4 is unused @W:CL159 : coreapb3.v(88) | Input PRDATAS5 is unused @W:CL159 : coreapb3.v(89) | Input PRDATAS6 is unused @W:CL159 : coreapb3.v(90) | Input PRDATAS7 is unused @W:CL159 : coreapb3.v(91) | Input PRDATAS8 is unused @W:CL159 : coreapb3.v(92) | Input PRDATAS9 is unused @W:CL159 : coreapb3.v(93) | Input PRDATAS10 is unused @W:CL159 : coreapb3.v(94) | Input PRDATAS11 is unused @W:CL159 : coreapb3.v(95) | Input PRDATAS12 is unused @W:CL159 : coreapb3.v(96) | Input PRDATAS13 is unused @W:CL159 : coreapb3.v(97) | Input PRDATAS14 is unused @W:CL159 : coreapb3.v(98) | Input PRDATAS15 is unused @W:CL159 : coreapb3.v(100) | Input PREADYS1 is unused @W:CL159 : coreapb3.v(101) | Input PREADYS2 is unused @W:CL159 : coreapb3.v(102) | Input PREADYS3 is unused @W:CL159 : coreapb3.v(103) | Input PREADYS4 is unused @W:CL159 : coreapb3.v(104) | Input PREADYS5 is unused @W:CL159 : coreapb3.v(105) | Input PREADYS6 is unused @W:CL159 : coreapb3.v(106) | Input PREADYS7 is unused @W:CL159 : coreapb3.v(107) | Input PREADYS8 is unused @W:CL159 : coreapb3.v(108) | Input PREADYS9 is unused @W:CL159 : coreapb3.v(109) | Input PREADYS10 is unused @W:CL159 : coreapb3.v(110) | Input PREADYS11 is unused @W:CL159 : coreapb3.v(111) | Input PREADYS12 is unused @W:CL159 : coreapb3.v(112) | Input PREADYS13 is unused @W:CL159 : coreapb3.v(113) | Input PREADYS14 is unused @W:CL159 : coreapb3.v(114) | Input PREADYS15 is unused @W:CL159 : coreapb3.v(116) | Input PSLVERRS1 is unused @W:CL159 : coreapb3.v(117) | Input PSLVERRS2 is unused @W:CL159 : coreapb3.v(118) | Input PSLVERRS3 is unused @W:CL159 : coreapb3.v(119) | Input PSLVERRS4 is unused @W:CL159 : coreapb3.v(120) | Input PSLVERRS5 is unused @W:CL159 : coreapb3.v(121) | Input PSLVERRS6 is unused @W:CL159 : coreapb3.v(122) | Input PSLVERRS7 is unused @W:CL159 : coreapb3.v(123) | Input PSLVERRS8 is unused @W:CL159 : coreapb3.v(124) | Input PSLVERRS9 is unused @W:CL159 : coreapb3.v(125) | Input PSLVERRS10 is unused @W:CL159 : coreapb3.v(126) | Input PSLVERRS11 is unused @W:CL159 : coreapb3.v(127) | Input PSLVERRS12 is unused @W:CL159 : coreapb3.v(128) | Input PSLVERRS13 is unused @W:CL159 : coreapb3.v(129) | Input PSLVERRS14 is unused @W:CL159 : coreapb3.v(130) | Input PSLVERRS15 is unused @W:CL246 : coreapb3.v(54) | Input port bits 23 to 20 of PADDR[23:0] are unused @W:CL159 : coreapb3.v(84) | Input PRDATAS1 is unused @W:CL159 : coreapb3.v(85) | Input PRDATAS2 is unused @W:CL159 : coreapb3.v(86) | Input PRDATAS3 is unused @W:CL159 : coreapb3.v(87) | Input PRDATAS4 is unused @W:CL159 : coreapb3.v(88) | Input PRDATAS5 is unused @W:CL159 : coreapb3.v(89) | Input PRDATAS6 is unused @W:CL159 : coreapb3.v(90) | Input PRDATAS7 is unused @W:CL159 : coreapb3.v(91) | Input PRDATAS8 is unused @W:CL159 : coreapb3.v(92) | Input PRDATAS9 is unused @W:CL159 : coreapb3.v(93) | Input PRDATAS10 is unused @W:CL159 : coreapb3.v(94) | Input PRDATAS11 is unused @W:CL159 : coreapb3.v(95) | Input PRDATAS12 is unused @W:CL159 : coreapb3.v(96) | Input PRDATAS13 is unused @W:CL159 : coreapb3.v(97) | Input PRDATAS14 is unused @W:CL159 : coreapb3.v(98) | Input PRDATAS15 is unused @W:CL159 : coreapb3.v(100) | Input PREADYS1 is unused @W:CL159 : coreapb3.v(101) | Input PREADYS2 is unused @W:CL159 : coreapb3.v(102) | Input PREADYS3 is unused @W:CL159 : coreapb3.v(103) | Input PREADYS4 is unused @W:CL159 : coreapb3.v(104) | Input PREADYS5 is unused @W:CL159 : coreapb3.v(105) | Input PREADYS6 is unused @W:CL159 : coreapb3.v(106) | Input PREADYS7 is unused @W:CL159 : coreapb3.v(107) | Input PREADYS8 is unused @W:CL159 : coreapb3.v(108) | Input PREADYS9 is unused @W:CL159 : coreapb3.v(109) | Input PREADYS10 is unused @W:CL159 : coreapb3.v(110) | Input PREADYS11 is unused @W:CL159 : coreapb3.v(111) | Input PREADYS12 is unused @W:CL159 : coreapb3.v(112) | Input PREADYS13 is unused @W:CL159 : coreapb3.v(113) | Input PREADYS14 is unused @W:CL159 : coreapb3.v(114) | Input PREADYS15 is unused @W:CL159 : coreapb3.v(116) | Input PSLVERRS1 is unused @W:CL159 : coreapb3.v(117) | Input PSLVERRS2 is unused @W:CL159 : coreapb3.v(118) | Input PSLVERRS3 is unused @W:CL159 : coreapb3.v(119) | Input PSLVERRS4 is unused @W:CL159 : coreapb3.v(120) | Input PSLVERRS5 is unused @W:CL159 : coreapb3.v(121) | Input PSLVERRS6 is unused @W:CL159 : coreapb3.v(122) | Input PSLVERRS7 is unused @W:CL159 : coreapb3.v(123) | Input PSLVERRS8 is unused @W:CL159 : coreapb3.v(124) | Input PSLVERRS9 is unused @W:CL159 : coreapb3.v(125) | Input PSLVERRS10 is unused @W:CL159 : coreapb3.v(126) | Input PSLVERRS11 is unused @W:CL159 : coreapb3.v(127) | Input PSLVERRS12 is unused @W:CL159 : coreapb3.v(128) | Input PSLVERRS13 is unused @W:CL159 : coreapb3.v(129) | Input PSLVERRS14 is unused @W:CL159 : coreapb3.v(130) | Input PSLVERRS15 is unused @N:CL201 : reg_apb_wrp.v(58) | Trying to extract state machine for register fsm Extracted state machine for register fsm State machine has 4 reachable states with original encodings of: 00 01 10 11 @W:CL246 : reg_apb_wrp.v(42) | Input port bits 19 to 4 of PADDR[19:0] are unused @W:CL246 : reg_apb_wrp.v(42) | Input port bits 1 to 0 of PADDR[19:0] are unused @W:CL159 : reg_apb_wrp.v(41) | Input PENABLE is unused @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Thu Dec 08 16:57:32 2011 ###########################################################]