library verilog;
use verilog.vl_types.all;
entity synSigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D0_Register is
    port(
        N_6             : in     vl_logic_vector(1 downto 0);
        N_10            : in     vl_logic_vector(20 downto 5);
        N_9             : in     vl_logic_vector(24 downto 0);
        N_2_24          : out    vl_logic;
        N_2_22          : out    vl_logic;
        N_2_0           : out    vl_logic;
        N_2_1           : out    vl_logic;
        clk             : in     vl_logic;
        N_145_1         : out    vl_logic;
        N_158_0_0_1     : in     vl_logic;
        N_150           : out    vl_logic;
        N_46            : out    vl_logic;
        N_50            : out    vl_logic;
        N_54            : out    vl_logic;
        N_58            : out    vl_logic;
        tmpOutPre_1_22  : out    vl_logic;
        tmpOutPre_1_16  : out    vl_logic;
        tmpOutPre_1_10  : out    vl_logic;
        tmpOutPre_1_4   : out    vl_logic;
        rst_1           : in     vl_logic;
        GlobalReset     : in     vl_logic;
        un1_rst_1       : in     vl_logic;
        N_138           : in     vl_logic;
        N_141           : out    vl_logic;
        N_127           : out    vl_logic;
        N_117           : out    vl_logic;
        N_111           : out    vl_logic;
        N_107           : out    vl_logic;
        N_103           : out    vl_logic;
        N_99            : out    vl_logic;
        N_95            : out    vl_logic;
        N_91            : out    vl_logic;
        N_87            : out    vl_logic;
        N_83            : out    vl_logic;
        N_75            : out    vl_logic;
        N_71            : out    vl_logic;
        N_67            : out    vl_logic;
        N_63            : out    vl_logic;
        N_49            : out    vl_logic;
        N_135           : out    vl_logic;
        N_79            : out    vl_logic;
        N_149           : out    vl_logic;
        N_123           : out    vl_logic;
        N_45            : in     vl_logic;
        N_48            : out    vl_logic;
        N_119           : in     vl_logic;
        N_124           : in     vl_logic;
        N_126           : out    vl_logic;
        N_62            : out    vl_logic;
        N_66            : out    vl_logic;
        N_70            : out    vl_logic;
        N_74            : out    vl_logic;
        N_110_i         : out    vl_logic;
        N_82            : out    vl_logic;
        N_86            : out    vl_logic;
        N_94            : out    vl_logic;
        N_98            : out    vl_logic;
        N_102           : out    vl_logic;
        N_106           : out    vl_logic;
        N_116_i         : out    vl_logic;
        N_125           : in     vl_logic;
        N_132           : in     vl_logic;
        N_134           : out    vl_logic;
        N_78            : out    vl_logic;
        N_139           : in     vl_logic;
        N_148           : out    vl_logic;
        tmpOutPre_1_116_0_0: out    vl_logic;
        tmpOutPre_1_241_0_0: out    vl_logic
    );
end synSigma_Delta_Modulator_Sigma_Delta_Modulator_4th_order_D0_Register;
