`timescale 1 ns/100 ps
// Version: 10.0 10.0.9.37


module Top_Level(
       busy,
       dac_out_enable,
       UART_0_TXD,
       UART_0_RXD,
       MSS_RESET_N,
       SDD_0,
       VAREF0,
       ADCDirectInput_0,
       MAINXIN,
       FAB_CLK_80MHz,
       cur_state
    );
output busy;
output dac_out_enable;
output UART_0_TXD;
input  UART_0_RXD;
input  MSS_RESET_N;
output SDD_0;
input  VAREF0;
input  ADCDirectInput_0;
input  MAINXIN;
output FAB_CLK_80MHz;
output [3:0] cur_state;

    wire \APB_MEM_CTRL_0_APB_bif_PADDR_[0] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[23] , 
        APB_MEM_CTRL_0_APB_bif_PENABLE, 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[0] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[24] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[25] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[26] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[27] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[28] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[29] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[30] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[31] , 
        APB_MEM_CTRL_0_APB_bif_PREADY, APB_MEM_CTRL_0_APB_bif_PSELx, 
        APB_MEM_CTRL_0_APB_bif_PSLVERR, 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[0] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[24] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[25] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[26] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[27] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[28] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[29] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[30] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[31] , 
        APB_MEM_CTRL_0_APB_bif_PWRITE, 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[0] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[31] , 
        CoreAPB3_Master_Side_0_APBmslave0_PENABLE, 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[0] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[31] , 
        CoreAPB3_Master_Side_0_APBmslave0_PREADY, 
        CoreAPB3_Master_Side_0_APBmslave0_PSELx, 
        CoreAPB3_Master_Side_0_APBmslave0_PSLVERR, 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[0] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[31] , 
        CoreAPB3_Master_Side_0_APBmslave0_PWRITE, 
        SimpleWire_0_M2F_RESET_N, GND_net, VCC_net;
    
    VCC VCC (.Y(VCC_net));
    GND GND (.Y(GND_net));
    CoreAPB3_Master_Side CoreAPB3_Master_Side_0 (.PSEL(
        APB_MEM_CTRL_0_APB_bif_PSELx), .PENABLE(
        APB_MEM_CTRL_0_APB_bif_PENABLE), .PWRITE(
        APB_MEM_CTRL_0_APB_bif_PWRITE), .PREADY(
        APB_MEM_CTRL_0_APB_bif_PREADY), .PSLVERR(
        APB_MEM_CTRL_0_APB_bif_PSLVERR), .PRESETN(
        SimpleWire_0_M2F_RESET_N), .PCLK(FAB_CLK_80MHz), .PSELS0(
        CoreAPB3_Master_Side_0_APBmslave0_PSELx), .PENABLES(
        CoreAPB3_Master_Side_0_APBmslave0_PENABLE), .PWRITES(
        CoreAPB3_Master_Side_0_APBmslave0_PWRITE), .PREADYS0(
        CoreAPB3_Master_Side_0_APBmslave0_PREADY), .PSLVERRS0(
        CoreAPB3_Master_Side_0_APBmslave0_PSLVERR), .PADDR({
        \APB_MEM_CTRL_0_APB_bif_PADDR_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[0] }), .PRDATA({
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[31] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[30] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[29] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[28] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[27] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[26] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[25] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[24] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[0] }), .PWDATA({
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[31] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[30] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[29] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[28] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[27] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[26] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[25] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[24] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[0] }), .PADDRS0({
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[31] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[0] }), .PRDATAS0({
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[31] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[0] }), .PWDATAS({
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[31] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[0] }));
    SimpleWire SimpleWire_0 (.UART_0_TXD(UART_0_TXD), .UART_0_RXD(
        UART_0_RXD), .MSS_RESET_N(MSS_RESET_N), .M2F_RESET_N(
        SimpleWire_0_M2F_RESET_N), .FABPSEL(
        CoreAPB3_Master_Side_0_APBmslave0_PSELx), .FABPENABLE(
        CoreAPB3_Master_Side_0_APBmslave0_PENABLE), .FABPWRITE(
        CoreAPB3_Master_Side_0_APBmslave0_PWRITE), .FABPREADY(
        CoreAPB3_Master_Side_0_APBmslave0_PREADY), .FABPSLVERR(
        CoreAPB3_Master_Side_0_APBmslave0_PSLVERR), .FAB_CLK_80MHz(
        FAB_CLK_80MHz), .SDD_0(SDD_0), .VAREF0(VAREF0), 
        .ADCDirectInput_0(ADCDirectInput_0), .MAINXIN(MAINXIN), 
        .FABPADDR({\CoreAPB3_Master_Side_0_APBmslave0_PADDR_[31] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PADDR_[0] }), .FABPRDATA({
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[31] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PRDATA_[0] }), .FABPWDATA({
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[31] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[30] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[29] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[28] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[27] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[26] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[25] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[24] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[23] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[22] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[21] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[20] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[19] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[18] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[17] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[16] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[15] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[14] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[13] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[12] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[11] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[10] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[9] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[8] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[7] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[6] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[5] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[4] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[3] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[2] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[1] , 
        \CoreAPB3_Master_Side_0_APBmslave0_PWDATA_[0] }));
    APB_MEM_CTRL APB_MEM_CTRL_0 (.PRESETn(SimpleWire_0_M2F_RESET_N), 
        .PCLK(FAB_CLK_80MHz), .PREADY(APB_MEM_CTRL_0_APB_bif_PREADY), 
        .PSLVERR(APB_MEM_CTRL_0_APB_bif_PSLVERR), .PENABLE(
        APB_MEM_CTRL_0_APB_bif_PENABLE), .PSEL(
        APB_MEM_CTRL_0_APB_bif_PSELx), .PWRITE(
        APB_MEM_CTRL_0_APB_bif_PWRITE), .busy(busy), .dac_out_enable(
        dac_out_enable), .PRDATA({\APB_MEM_CTRL_0_APB_bif_PRDATA_[31] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[30] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[29] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[28] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[27] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[26] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[25] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[24] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PRDATA_[0] }), .PADDR({
        \APB_MEM_CTRL_0_APB_bif_PADDR_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PADDR_[0] }), .PWDATA({
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[31] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[30] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[29] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[28] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[27] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[26] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[25] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[24] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[23] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[22] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[21] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[20] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[19] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[18] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[17] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[16] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[15] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[14] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[13] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[12] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[11] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[10] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[9] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[8] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[7] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[6] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[5] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[4] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[3] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[2] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[1] , 
        \APB_MEM_CTRL_0_APB_bif_PWDATA_[0] }), .cur_state({
        cur_state[3], cur_state[2], cur_state[1], cur_state[0]}));
    
endmodule
