/*******************************************************************************
 * (c) Copyright 2010 Microsemi Corporation.  All rights reserved.
 *
 * File:enable_disable_peripherals.h
 * File history:
 *      Revision: 1.0 Date: January 7th, 2010
 *
 * Description:
 * Constants used in the application
 *
 * Author: Corporate Applications Engineering
 *
 */


#ifndef ENABLE_DISABLE_H_
#define ENABLE_DISABLE_H_

	const uint32_t ADC_PWRDN 		= 	0x00000020;
	const uint32_t ADC_PWRUP 		= 	0xFFFFFFDF;

	const uint32_t ALL_ADC_PWRDN 	= 	0x00000004;
	const uint32_t ALL_ADC_PWRUP 	= 	0xFFFFFFFB;

	const uint32_t ALL_ACB_RESET 	= 	0x00000010;
	const uint32_t ALL_ACB_ACTIVE	= 	0xFFFFFFEF;

	const uint32_t ANALOG_PWRUP 	= 	0x00000008;
	const uint32_t ANALOG_PWRDN 	= 	0x00000000;

	const uint32_t EXT_RST_ENABLE 	= 	0x00080000;
	const uint32_t FAB_RST_DISABLE 	= 	0xFFFBFFFF;
	const uint32_t MSS_RST_RELEASE 	= 	0xFFFEFFFF;

	const uint32_t VRPSM_LOW 		= 	0x00080000;
	const uint32_t VRPSM_HIG 		= 	0xFFFBFFFF;

	const uint32_t IAP_SR_DISABLE 		= 	0x00008000;
	const uint32_t IAP_SR_ENABLE 		= 	0xFFFF7FFF;
	const uint32_t GPIO_SR_DISABLE		= 	0x00004000;
	const uint32_t GPIO_SR_ENABLE 		= 	0xFFFFBFFF;
	const uint32_t ACE_SR_DISABLE 		= 	0x00002000;
	const uint32_t ACE_SR_ENABLE 		= 	0xFFFFDFFF;
	const uint32_t I2C_1_SR_DISABLE 	= 	0x00001000;
	const uint32_t I2C_1_SR_ENABLE 		= 	0xFFFFEFFF;
	const uint32_t I2C_0_SR_DISABLE 	= 	0x00000800;
	const uint32_t I2C_0_SR_ENABLE 		= 	0xFFFFF7FF;
	const uint32_t SPI_1_SR_DISABLE 	= 	0x00000400;
	const uint32_t SPI_1_SR_ENABLE 		= 	0xFFFFFBFF;
	const uint32_t SPI_0_SR_DISABLE 	= 	0x00000200;
	const uint32_t SPI_0_SR_ENABLE 		= 	0xFFFFFDFF;
	const uint32_t UART_1_SR_DISABLE 	= 	0x00000100;
	const uint32_t UART_1_SR_ENABLE 	= 	0xFFFFFEFF;
	const uint32_t UART_0_SR_DISABLE 	= 	0x00000080;
	const uint32_t UART_0_SR_ENABLE 	= 	0xFFFFFF7F;
	const uint32_t TIMER_SR_DISABLE 	= 	0x00000040;
	const uint32_t TIMER_SR_ENABLE 		= 	0xFFFFFFBF;
	const uint32_t PDMA_SR_DISABLE 		= 	0x00000020;
	const uint32_t PDMA_SR_ENABLE 		= 	0xFFFFFFDF;
	const uint32_t MAC_SR_DISABLE 		= 	0x00000010;
	const uint32_t MAC_SR_ENABLE 		= 	0xFFFFFFEF;
	const uint32_t EMC_SR_DISABLE 		= 	0x00000008;
	const uint32_t EMC_SR_ENABLE 	    = 	0xFFFFFFF7;
	const uint32_t ESRAM_1_SR_DISABLE 	= 	0x00000004;
	const uint32_t ESRAM_1_SR_ENABLE 	= 	0xFFFFFFFB;
	const uint32_t ESRAM_0_SR_DISABLE 	= 	0x00000002;
	const uint32_t ESRAM_0_SR_ENABLE 	= 	0xFFFFFFFD;
	const uint32_t ENVM_SR_DISABLE 		= 	0x00000001;
	const uint32_t ENVM_SR_ENABLE 		= 	0xFFFFFFFE;

#endif /* ENABLE_DISABLE_H_ */
