
****************************************************************
                LIBERO SoC VERSIONS
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This design is tested with following Libero version.

Libero SoC   --  Version: 10.3

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     DESIGN FILE DIRECTORY STRUCTURE
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A2F_AC363_DF
    |
    |
    |--A2F200
    |   |---Bypass_Mode
    |   |      
    |   |---Pipelined_Mode
    |
    |--A2F500
        |---Bypass_Mode
        |      
        |---Pipelined_Mode
    

A2F200
======


Bypass_Mode
============
This folder consists of Libero VHDL projects for A2F200 based SmartFusion Evaluation board. 
In this design the FIC is configured with Interface type as AHB-Lite slave and checked the ‘Use Bypass Mode’ option (Bypass_Mode).


Pipelined_Mode
===============
This folder consists of Libero VHDL projects for A2F200 based SmartFusion Evaluation board.
In this design the FIC is configured with Interface type as AHB-Lite slave and unchecked the ‘Use Bypass Mode’ option (Pipelined_Mode).

A2F500
======


Bypass_Mode
============
This folder consists of Libero VHDL projects for A2F500 based SmartFusion Development board. 
In this design the FIC is configured with Interface type as AHB-Lite slave and checked the ‘Use Bypass Mode’ option (Bypass_Mode).


Pipelined_Mode
===============
This folder consists of Libero VHDL projects for A2F500 based SmartFusion Development board.
In this design the FIC is configured with Interface type as AHB-Lite slave and unchecked the ‘Use Bypass Mode’ option (Pipelined_Mode).



