@W: MO111 :"d:\an362\a2f_ac362_df\a2f_ac362_df\a2f_200\programming_fpgafabric\smartfusion_iap\component\work\mss_iap\mss_ccc_0\mss_iap_tmp_mss_ccc_0_mss_ccc.v":64:7:64:18|Tristate driver LPXIN_CLKOUT on net LPXIN_CLKOUT has its enable tied to GND (module MSS_IAP_tmp_MSS_CCC_0_MSS_CCC) 
@W: MO111 :"d:\an362\a2f_ac362_df\a2f_ac362_df\a2f_200\programming_fpgafabric\smartfusion_iap\component\work\mss_iap\mss_ccc_0\mss_iap_tmp_mss_ccc_0_mss_ccc.v":63:7:63:20|Tristate driver MAINXIN_CLKOUT on net MAINXIN_CLKOUT has its enable tied to GND (module MSS_IAP_tmp_MSS_CCC_0_MSS_CCC) 
@W: MO111 :"d:\an362\a2f_ac362_df\a2f_ac362_df\a2f_200\programming_fpgafabric\smartfusion_iap\component\work\mss_iap\mss_ccc_0\mss_iap_tmp_mss_ccc_0_mss_ccc.v":62:7:62:18|Tristate driver RCOSC_CLKOUT on net RCOSC_CLKOUT has its enable tied to GND (module MSS_IAP_tmp_MSS_CCC_0_MSS_CCC) 
@W: MT462 :"d:\an362\a2f_ac362_df\a2f_ac362_df\a2f_200\programming_fpgafabric\smartfusion_iap\component\work\mss_iap\mss_ccc_0\mss_iap_tmp_mss_ccc_0_mss_ccc.v":77:41:77:48|Net MSS_IAP_0.MSS_ADLIB_INST_MACCLKCCC appears to be an unidentified clock source. Assuming default frequency. 
@W: MT246 :"d:\an362\a2f_ac362_df\a2f_ac362_df\a2f_200\programming_fpgafabric\smartfusion_iap\component\work\mss_iap\mss_iap.v":388:54:388:65|Blackbox TRIBUFF_MSS is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT246 :"d:\an362\a2f_ac362_df\a2f_ac362_df\a2f_200\programming_fpgafabric\smartfusion_iap\component\work\mss_iap\mss_ccc_0\mss_iap_tmp_mss_ccc_0_mss_ccc.v":95:15:95:22|Blackbox MSS_XTLOSC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock MSS_IAP|MSS_EMI_0_CLK_D_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:MSS_IAP_0.MSS_EMI_0_CLK_D"
