@W: MO111 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\mss_ccc_0\fat_fs_tmp_mss_ccc_0_mss_ccc.v":64:7:64:18|Tristate driver LPXIN_CLKOUT on net LPXIN_CLKOUT has its enable tied to GND (module fat_fs_tmp_MSS_CCC_0_MSS_CCC) 
@W: MO111 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\mss_ccc_0\fat_fs_tmp_mss_ccc_0_mss_ccc.v":63:7:63:20|Tristate driver MAINXIN_CLKOUT on net MAINXIN_CLKOUT has its enable tied to GND (module fat_fs_tmp_MSS_CCC_0_MSS_CCC) 
@W: MO111 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\mss_ccc_0\fat_fs_tmp_mss_ccc_0_mss_ccc.v":62:7:62:18|Tristate driver RCOSC_CLKOUT on net RCOSC_CLKOUT has its enable tied to GND (module fat_fs_tmp_MSS_CCC_0_MSS_CCC) 
@W: MT462 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\mss_ccc_0\fat_fs_tmp_mss_ccc_0_mss_ccc.v":78:41:78:48|Net mss_fat_fs_0.MSS_ADLIB_INST_MACCLKCCC appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\mss_ccc_0\fat_fs_tmp_mss_ccc_0_mss_ccc.v":78:41:78:48|Net mss_fat_fs_0.MSS_ADLIB_INST_FCLK appears to be an unidentified clock source. Assuming default frequency. 
@W: MT246 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\fat_fs.v":94:54:94:65|Blackbox TRIBUFF_MSS is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT246 :"c:\a2f_ac360_df\a2f_200\component\work\fat_fs\mss_ccc_0\fat_fs_tmp_mss_ccc_0_mss_ccc.v":96:15:96:22|Blackbox MSS_XTLOSC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock fat_fs|MSS_ADLIB_INST_EMCCLK_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:mss_fat_fs_0.MSS_ADLIB_INST_EMCCLK"
