@W: MO129 :"c:\a2f_ac356_df\a2f500\usbee\usbee_hw\hdl\usb_slave.vhd":163:4:163:5|Sequential instance usb_slave_0.HTRANS_1[0] reduced to a combinational gate by constant propagation
@W: BN132 :"c:\a2f_ac356_df\a2f500\usbee\usbee_hw\hdl\usb_slave.vhd":163:4:163:5|Removing sequential instance usb_slave_0.HWRITE_1,  because it is equivalent to instance usb_slave_0.HTRANS_1[1]
@W: MT246 :"c:\a2f_ac356_df\a2f500\usbee\usbee_hw\component\work\usb_mss\mss_ccc_0\usb_mss_tmp_mss_ccc_0_mss_ccc.vhd":156:4:156:11|Blackbox MSS_XTLOSC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock usbee_top_level|USB_CLK with period 1000.00ns. Please declare a user-defined clock on object "p:USB_CLK"
@W: MT420 |Found inferred clock usb_mss|MSS_EMI_0_CLK_D_inferred_clock with period 1000.00ns. Please declare a user-defined clock on object "n:usb_mss_0.MSS_EMI_0_CLK_D"
