# Created by Libero Project Manager 9.0.1.10
# Fri Jul 16 10:16:14 2010

# (NEW DESIGN)

# create a new design
new_design -name "usb_slave" -family "SmartFusion"

# set default back-annotation base-name
set_defvar "BA_NAME" "usb_slave_ba"
set_defvar "IDE_DESIGNERVIEW_NAME" {Impl1}
set_defvar "IDE_DESIGNERVIEW_COUNT" "1"
set_defvar "IDE_DESIGNERVIEW_REV0" {Impl1}
set_defvar "IDE_DESIGNERVIEW_REVNUM0" "1"
set_defvar "IDE_DESIGNERVIEW_ROOTDIR" {Y:\Pavan M\USB\USBeee\Using_Fabric_Master\HW_USBee\designer}
set_defvar "IDE_DESIGNERVIEW_LASTREV" "1"

# set working directory
set_defvar "DESDIR" "Y:/Pavan M/USB/USBeee/Using_Fabric_Master/HW_USBee/designer/impl1"

# set back-annotation output directory
set_defvar "BA_DIR" "Y:/Pavan M/USB/USBeee/Using_Fabric_Master/HW_USBee/designer/impl1"

# enable the export back-annotation netlist
set_defvar "BA_NETLIST_ALSO" "1"

# set EDIF options
set_defvar "EDNINFLAVOR" "GENERIC"

# set HDL options
set_defvar "NETLIST_NAMING_STYLE" "VHDL93"

# setup status report options
set_defvar "EXPORT_STATUS_REPORT" "1"
set_defvar "EXPORT_STATUS_REPORT_FILENAME" "usb_slave.rpt"

# legacy audit-mode flags (left here for historical reasons)
set_defvar "AUDIT_NETLIST_FILE" "1"
set_defvar "AUDIT_DCF_FILE" "1"
set_defvar "AUDIT_PIN_FILE" "1"
set_defvar "AUDIT_ADL_FILE" "1"

# import of input files
import_source  \
-format "edif" -edif_flavor "GENERIC" -netlist_naming "VHDL" {../../synthesis/usb_slave.edn}

# export translation of original netlist
export -format "vhdl" {../../synthesis/usb_slave.vhd}
