`

    #Build: Synplify Pro D-2009.12A, Build 040R, Jan 20 2010
    #install: C:\Actel\Libero_v9.0\Synopsys\synplify_D200912A
    #OS: Windows XP 5.1
    #Hostname: WXPL-AKKOOLH

    #Implementation: synthesis

    #Mon Aug 23 16:13:48 2010

    $ Start of Compile
    #Mon Aug 23 16:13:48 2010

    Synopsys Verilog Compiler, version comp475rc, Build 060R, built Jan 15 2010
    Copyright (C) 1994-2010, Synopsys Inc.  All Rights Reserved

    @I::"C:\Actel\Libero_v9.0\Synopsys\synplify_D200912A\lib\proasic\smartfusion.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\component\Actel\SmartFusionMSS\MSS\2.2.101\mss_comps.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\component\work\DSP_Coprocessor_MSS\MSS_CCC_0\DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\component\work\DSP_Coprocessor_MSS\DSP_Coprocessor_MSS.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\fftSm.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\actram.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\fftDp.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\actar.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\twiddle.v"
    @N:CG347 : twiddle.v(20) | Read parallel_case directive
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\fftTop.v"
    @I:"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\fftTop.v":"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\fftHeader.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\smartgen\fifo64x16\fifo64x16.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\hdl\Aapb_int_fft.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vlog\core_obfuscated\coreapb3_muxptob3.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vlog\core_obfuscated\coreapb3.v"
    @I::"H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\component\work\DSP_Coprocessor\DSP_Coprocessor.v"
    Verilog syntax check successful!
    Selecting top level module DSP_Coprocessor
    @W:CG775 : coreapb3.v(13) | Found Component CoreAPB3 in library COREAPB3_LIB
    @N:CG364 : coreapb3_muxptob3.v(13) | Synthesizing module CAPB3O

    @N:CG364 : coreapb3.v(13) | Synthesizing module CoreAPB3

    	APB_DWIDTH=6'b100000
    	RANGESIZE=21'b000000000000100000000
    	IADDR_ENABLE=1'b0
    	APBSLOT0ENABLE=1'b1
    	APBSLOT1ENABLE=1'b0
    	APBSLOT2ENABLE=1'b0
    	APBSLOT3ENABLE=1'b0
    	APBSLOT4ENABLE=1'b0
    	APBSLOT5ENABLE=1'b0
    	APBSLOT6ENABLE=1'b0
    	APBSLOT7ENABLE=1'b0
    	APBSLOT8ENABLE=1'b0
    	APBSLOT9ENABLE=1'b0
    	APBSLOT10ENABLE=1'b0
    	APBSLOT11ENABLE=1'b0
    	APBSLOT12ENABLE=1'b0
    	APBSLOT13ENABLE=1'b0
    	APBSLOT14ENABLE=1'b0
    	APBSLOT15ENABLE=1'b0
    	CAPB3O1I=32'b00000000000000000000000000001000
    	CAPB3I1I=32'b00000000000000000000000000001000
    	CAPB3l1I=8'b00001100
    	CAPB3OOl=8'b00001000
    	CAPB3IOl=8'b00000100
    	CAPB3lOl=8'b00000000
    	CAPB3OIl=8'b00000100
    	CAPB3IIl=8'b00000000
    	CAPB3lIl=8'b00000000
    	CAPB3Oll=16'b0000000000000001
    	CAPB3Ill=16'b0000000000000000
    	CAPB3lll=16'b0000000000000000
    	CAPB3O0l=16'b0000000000000000
    	CAPB3I0l=16'b0000000000000000
    	CAPB3l0l=16'b0000000000000000
    	CAPB3O1l=16'b0000000000000000
    	CAPB3I1l=16'b0000000000000000
    	CAPB3l1l=16'b0000000000000000
    	CAPB3OO0=16'b0000000000000000
    	CAPB3IO0=16'b0000000000000000
    	CAPB3lO0=16'b0000000000000000
    	CAPB3OI0=16'b0000000000000000
    	CAPB3II0=16'b0000000000000000
    	CAPB3lI0=16'b0000000000000000
    	CAPB3Ol0=16'b0000000000000000
       Generated name = CoreAPB3_Z1

    @N:CG364 : smartfusion.v(1814) | Synthesizing module VCC

    @N:CG364 : smartfusion.v(1133) | Synthesizing module GND

    @N:CG364 : mss_comps.v(145) | Synthesizing module MSSINT

    @N:CG364 : mss_comps.v(680) | Synthesizing module MSS_APB

    @N:CG364 : mss_comps.v(37) | Synthesizing module OUTBUF_MSS

    @N:CG364 : mss_comps.v(23) | Synthesizing module INBUF_MSS

    @N:CG364 : mss_comps.v(151) | Synthesizing module MSS_CCC

    @N:CG364 : smartfusion.v(2566) | Synthesizing module RCOSC

    @N:CG364 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(5) | Synthesizing module DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC

    @N:CG364 : DSP_Coprocessor_MSS.v(5) | Synthesizing module DSP_Coprocessor_MSS

    @N:CG364 : fftHeader.v(51) | Synthesizing module counter

    	WIDTH=32'b00000000000000000000000000001000
    	TC=32'b00000000000000000000000010001011
       Generated name = counter_8s_139s

    @N:CG364 : fftHeader.v(51) | Synthesizing module counter

    	WIDTH=32'b00000000000000000000000000000011
    	TC=32'b00000000000000000000000000000111
       Generated name = counter_3s_7s

    @N:CG364 : fftSm.v(178) | Synthesizing module rdFFTtimer

    	HALFPTS=32'b00000000000000000000000010000000
    	LOGPTS=32'b00000000000000000000000000001000
    	LOGLOGPTS=32'b00000000000000000000000000000011
    	inBuf_RWDLY=32'b00000000000000000000000000001100
       Generated name = rdFFTtimer_128s_8s_3s_12s

    @N:CG364 : fftHeader.v(51) | Synthesizing module counter

    	WIDTH=32'b00000000000000000000000000000111
    	TC=32'b00000000000000000000000001111111
       Generated name = counter_7s_127s

    @N:CG364 : fftSm.v(220) | Synthesizing module wrFFTtimer

    	LOGPTS=32'b00000000000000000000000000001000
    	LOGLOGPTS=32'b00000000000000000000000000000011
    	HALFPTS=32'b00000000000000000000000010000000
       Generated name = wrFFTtimer_8s_3s_128s

    @N:CG364 : fftHeader.v(51) | Synthesizing module counter

    	WIDTH=32'b00000000000000000000000000001000
    	TC=32'b00000000000000000000000011111111
       Generated name = counter_8s_255s

    @N:CG364 : fftHeader.v(30) | Synthesizing module edgeDetect

    	INPIPE=32'b00000000000000000000000000000000
    	FEDGE=32'b00000000000000000000000000000000
       Generated name = edgeDetect_0s_0s

    @W:CL169 : fftHeader.v(43) | Pruning Register in_pipe

    @N:CG364 : fftSm.v(13) | Synthesizing module inBuf_ldA

    	PTS=32'b00000000000000000000000100000000
    	LOGPTS=32'b00000000000000000000000000001000
       Generated name = inBuf_ldA_256s_8s

    @N:CG364 : fftSm.v(124) | Synthesizing module inBuf_fftA

    	LOGPTS=32'b00000000000000000000000000001000
    	LOGLOGPTS=32'b00000000000000000000000000000011
       Generated name = inBuf_fftA_8s_3s

    @N:CG364 : fftSm.v(242) | Synthesizing module twid_rA

    	LOGPTS=32'b00000000000000000000000000001000
    	LOGLOGPTS=32'b00000000000000000000000000000011
       Generated name = twid_rA_8s_3s

    @N:CG364 : fftHeader.v(81) | Synthesizing module bcounter

    	WIDTH=32'b00000000000000000000000000001010
       Generated name = bcounter_10s

    @N:CG364 : fftSm.v(281) | Synthesizing module twid_wA

    	LOGPTS=32'b00000000000000000000000000001000
    	LOGLOGPTS=32'b00000000000000000000000000000011
       Generated name = twid_wA_8s_3s

    @A: : fftSm.v(302) | Feedback mux created for signal rstAfterInit. Did you forget the set/reset assignment for this signal? Specifying a reset value will improve timing and area
    @A: : fftSm.v(302) | Feedback mux created for signal preRstAfterInit. Did you forget the set/reset assignment for this signal? Specifying a reset value will improve timing and area
    @N:CG364 : fftHeader.v(30) | Synthesizing module edgeDetect

    	INPIPE=32'b00000000000000000000000000000000
    	FEDGE=32'b00000000000000000000000000000001
       Generated name = edgeDetect_0s_1s

    @W:CL169 : fftHeader.v(43) | Pruning Register in_pipe

    @N:CG364 : fftSm.v(58) | Synthesizing module outBufA

    	PTS=32'b00000000000000000000000100000000
    	LOGPTS=32'b00000000000000000000000000001000
       Generated name = outBufA_256s_8s

    @W:CL169 : fftSm.v(96) | Pruning Register reverseBitTimer[6:0]

    @N:CG364 : fftSm.v(314) | Synthesizing module sm_top

    	PTS=32'b00000000000000000000000100000000
    	HALFPTS=32'b00000000000000000000000010000000
    	LOGPTS=32'b00000000000000000000000000001000
    	LOGLOGPTS=32'b00000000000000000000000000000011
    	inBuf_RWDLY=32'b00000000000000000000000000001100
       Generated name = sm_top_256s_128s_8s_3s_12s

    @N:CG364 : smartfusion.v(2207) | Synthesizing module RAM512X18

    @N:CG364 : actram.v(5) | Synthesizing module actram

    @N:CG364 : fftDp.v(52) | Synthesizing module wrapRam

    	LOGPTS=32'b00000000000000000000000000001000
    	DWIDTH=32'b00000000000000000000000000010000
       Generated name = wrapRam_8s_16s

    @N:CG364 : fftDp.v(66) | Synthesizing module inBuffer

    	LOGPTS=32'b00000000000000000000000000001000
    	DWIDTH=32'b00000000000000000000000000010000
       Generated name = inBuffer_8s_16s

    @N:CG364 : fftDp.v(110) | Synthesizing module pipoBuffer

    	LOGPTS=32'b00000000000000000000000000001000
    	DWIDTH=32'b00000000000000000000000000010000
       Generated name = pipoBuffer_8s_16s

    @N:CG364 : fftDp.v(14) | Synthesizing module switch

    	DWIDTH=32'b00000000000000000000000000010000
       Generated name = switch_16s

    @N:CG364 : smartfusion.v(895) | Synthesizing module DFN1

    @N:CG364 : smartfusion.v(1258) | Synthesizing module MAJ3

    @N:CG364 : smartfusion.v(2) | Synthesizing module AND2

    @N:CG364 : smartfusion.v(1352) | Synthesizing module NOR2

    @N:CG364 : smartfusion.v(79) | Synthesizing module AO1

    @N:CG364 : smartfusion.v(1877) | Synthesizing module XOR2

    @N:CG364 : smartfusion.v(1900) | Synthesizing module BUFF

    @N:CG364 : smartfusion.v(1293) | Synthesizing module MX2

    @N:CG364 : smartfusion.v(114) | Synthesizing module AOI1

    @N:CG364 : smartfusion.v(1437) | Synthesizing module OR3

    @N:CG364 : smartfusion.v(7) | Synthesizing module AND2A

    @N:CG364 : smartfusion.v(17) | Synthesizing module AND3

    @N:CG364 : smartfusion.v(1854) | Synthesizing module XNOR2

    @N:CG364 : smartfusion.v(1882) | Synthesizing module XOR3

    @N:CG364 : actar.v(5) | Synthesizing module actar

    @W:CL168 : actar.v(668) | Pruning instance XOR2_0 - not in use ...

    @W:CL168 : actar.v(614) | Pruning instance AND2_67 - not in use ...

    @W:CL168 : actar.v(606) | Pruning instance AND2_42 - not in use ...

    @W:CL168 : actar.v(591) | Pruning instance AO1_19 - not in use ...

    @W:CL168 : actar.v(589) | Pruning instance AND2_48 - not in use ...

    @W:CL168 : actar.v(563) | Pruning instance AND2_17 - not in use ...

    @W:CL168 : actar.v(558) | Pruning instance AND2_0 - not in use ...

    @W:CL168 : actar.v(553) | Pruning instance AO1_30 - not in use ...

    @W:CL168 : actar.v(518) | Pruning instance AND2_36 - not in use ...

    @W:CL168 : actar.v(449) | Pruning instance XOR2_32 - not in use ...

    @W:CL168 : actar.v(418) | Pruning instance AND2_52 - not in use ...

    @W:CL168 : actar.v(387) | Pruning instance AND2_58 - not in use ...

    @W:CL168 : actar.v(378) | Pruning instance AND2_16 - not in use ...

    @W:CL168 : actar.v(305) | Pruning instance AND2_74 - not in use ...

    @W:CL168 : actar.v(289) | Pruning instance AND2_29 - not in use ...

    @W:CL168 : actar.v(219) | Pruning instance AND2_43 - not in use ...

    @W:CL168 : actar.v(204) | Pruning instance AND2_46 - not in use ...

    @W:CL168 : actar.v(198) | Pruning instance AND2_57 - not in use ...

    @W:CL168 : actar.v(166) | Pruning instance AND2_1 - not in use ...

    @W:CL168 : actar.v(160) | Pruning instance AND2_75 - not in use ...

    @W:CL168 : actar.v(159) | Pruning instance AND2_78 - not in use ...

    @W:CL168 : actar.v(155) | Pruning instance AND2_84 - not in use ...

    @W:CL168 : actar.v(121) | Pruning instance AO1_31 - not in use ...

    @W:CL168 : actar.v(107) | Pruning instance AND2_11 - not in use ...

    @N:CG364 : fftDp.v(217) | Synthesizing module kitRndUp

    	OUTBITWIDTH=32'b00000000000000000000000000001000
    	RND_MODE=32'b00000000000000000000000000000001
       Generated name = kitRndUp_8s_1s

    @W:CL170 : fftDp.v(230) | Pruning bit <0> of outp_int[8:0] - not in use ...

    @N:CG364 : fftDp.v(252) | Synthesizing module agen

    	WIDTH=32'b00000000000000000000000000001000
    	TWIDTH=32'b00000000000000000000000000001000
    	RND_MODE=32'b00000000000000000000000000000001
       Generated name = agen_8s_8s_1s

    @W:CG133 : fftDp.v(265) | No assignment to out2
    @N:CG364 : fftDp.v(281) | Synthesizing module bfly2

    	WIDTH=32'b00000000000000000000000000001000
    	TWIDTH=32'b00000000000000000000000000001000
    	DWIDTH=32'b00000000000000000000000000010000
    	TDWIDTH=32'b00000000000000000000000000010000
    	RND_MODE=32'b00000000000000000000000000000001
       Generated name = bfly2_8s_8s_16s_16s_1s

    @N:CG364 : twiddle.v(12) | Synthesizing module twiddle

    	TDWIDTH=32'b00000000000000000000000000010000
    	LOGPTS=32'b00000000000000000000000000001000
       Generated name = twiddle_16s_8s

    @N:CG364 : fftDp.v(189) | Synthesizing module twidLUT

    	LOGPTS=32'b00000000000000000000000000001000
    	TDWIDTH=32'b00000000000000000000000000010000
       Generated name = twidLUT_8s_16s

    @N:CG364 : fftDp.v(153) | Synthesizing module outBuff

    	LOGPTS=32'b00000000000000000000000000001000
    	DWIDTH=32'b00000000000000000000000000010000
       Generated name = outBuff_8s_16s

    @N:CG364 : fftDp.v(360) | Synthesizing module autoScale

    	SCALE_MODE=32'b00000000000000000000000000000001
       Generated name = autoScale_1s

    @N:CG364 : fftTop.v(14) | Synthesizing module fftTop

    @N:CG364 : smartfusion.v(1253) | Synthesizing module INV

    @N:CG364 : smartfusion.v(973) | Synthesizing module DFN1P0

    @N:CG364 : smartfusion.v(901) | Synthesizing module DFN1C0

    @N:CG364 : smartfusion.v(97) | Synthesizing module AO1C

    @N:CG364 : smartfusion.v(1426) | Synthesizing module OR2A

    @N:CG364 : smartfusion.v(949) | Synthesizing module DFN1E1C0

    @N:CG364 : smartfusion.v(1420) | Synthesizing module OR2

    @N:CG364 : smartfusion.v(1337) | Synthesizing module NAND3A

    @N:CG364 : smartfusion.v(1358) | Synthesizing module NOR2A

    @N:CG364 : smartfusion.v(1375) | Synthesizing module NOR3A

    @N:CG364 : smartfusion.v(1317) | Synthesizing module NAND2

    @N:CG364 : smartfusion.v(103) | Synthesizing module AO1D

    @N:CG364 : fifo64x16.v(5) | Synthesizing module fifo64x16

    @W:CL168 : fifo64x16.v(627) | Pruning instance AND2_25 - not in use ...

    @W:CL168 : fifo64x16.v(618) | Pruning instance XOR2_42 - not in use ...

    @W:CL168 : fifo64x16.v(609) | Pruning instance DFN1C0_WGRY_4_inst - not in use ...

    @W:CL168 : fifo64x16.v(603) | Pruning instance DFN1C0_RGRY_0_inst - not in use ...

    @W:CL168 : fifo64x16.v(580) | Pruning instance XOR2_28 - not in use ...

    @W:CL168 : fifo64x16.v(577) | Pruning instance AND2_53 - not in use ...

    @W:CL168 : fifo64x16.v(568) | Pruning instance XOR2_51 - not in use ...

    @W:CL168 : fifo64x16.v(566) | Pruning instance AO1_27 - not in use ...

    @W:CL168 : fifo64x16.v(565) | Pruning instance XOR2_54 - not in use ...

    @W:CL168 : fifo64x16.v(560) | Pruning instance DFN1C0_RGRY_3_inst - not in use ...

    @W:CL168 : fifo64x16.v(545) | Pruning instance AND2_40 - not in use ...

    @W:CL168 : fifo64x16.v(535) | Pruning instance AND2_45 - not in use ...

    @W:CL168 : fifo64x16.v(534) | Pruning instance AND2_48 - not in use ...

    @W:CL168 : fifo64x16.v(523) | Pruning instance XOR2_53 - not in use ...

    @W:CL168 : fifo64x16.v(514) | Pruning instance AND2_54 - not in use ...

    @W:CL168 : fifo64x16.v(507) | Pruning instance AND2_17 - not in use ...

    @W:CL168 : fifo64x16.v(504) | Pruning instance AND2_0 - not in use ...

    @W:CL168 : fifo64x16.v(503) | Pruning instance AND2_41 - not in use ...

    @W:CL168 : fifo64x16.v(495) | Pruning instance DFN1C0_WGRY_1_inst - not in use ...

    @W:CL168 : fifo64x16.v(491) | Pruning instance XOR2_41 - not in use ...

    @W:CL168 : fifo64x16.v(487) | Pruning instance XOR2_44 - not in use ...

    @W:CL168 : fifo64x16.v(482) | Pruning instance AO1_23 - not in use ...

    @W:CL168 : fifo64x16.v(474) | Pruning instance XOR2_37 - not in use ...

    @W:CL168 : fifo64x16.v(473) | Pruning instance AND2_36 - not in use ...

    @W:CL168 : fifo64x16.v(469) | Pruning instance DFN1C0_RGRY_5_inst - not in use ...

    @W:CL168 : fifo64x16.v(465) | Pruning instance XOR2_29 - not in use ...

    @W:CL168 : fifo64x16.v(461) | Pruning instance DFN1C0_WGRY_2_inst - not in use ...

    @W:CL168 : fifo64x16.v(458) | Pruning instance AO1_20 - not in use ...

    @W:CL168 : fifo64x16.v(446) | Pruning instance DFN1C0_RGRY_6_inst - not in use ...

    @W:CL168 : fifo64x16.v(441) | Pruning instance DFN1C0_DVLDX - not in use ...

    @W:CL168 : fifo64x16.v(425) | Pruning instance AND2_9 - not in use ...

    @W:CL168 : fifo64x16.v(419) | Pruning instance XOR2_32 - not in use ...

    @W:CL168 : fifo64x16.v(406) | Pruning instance AND2_34 - not in use ...

    @W:CL168 : fifo64x16.v(402) | Pruning instance AO1_22 - not in use ...

    @W:CL168 : fifo64x16.v(391) | Pruning instance AND2_50 - not in use ...

    @W:CL168 : fifo64x16.v(388) | Pruning instance AND2_5 - not in use ...

    @W:CL168 : fifo64x16.v(378) | Pruning instance DFN1C0_RGRY_4_inst - not in use ...

    @W:CL168 : fifo64x16.v(371) | Pruning instance XOR2_10 - not in use ...

    @W:CL168 : fifo64x16.v(370) | Pruning instance AND2_13 - not in use ...

    @W:CL168 : fifo64x16.v(364) | Pruning instance AND2_16 - not in use ...

    @W:CL168 : fifo64x16.v(356) | Pruning instance AND2_47 - not in use ...

    @W:CL168 : fifo64x16.v(352) | Pruning instance AND2_51 - not in use ...

    @W:CL168 : fifo64x16.v(347) | Pruning instance XOR2_13 - not in use ...

    @W:CL168 : fifo64x16.v(343) | Pruning instance XOR2_22 - not in use ...

    @W:CL168 : fifo64x16.v(335) | Pruning instance XOR2_5 - not in use ...

    @W:CL168 : fifo64x16.v(330) | Pruning instance AND2_23 - not in use ...

    @W:CL168 : fifo64x16.v(328) | Pruning instance XOR2_59 - not in use ...

    @W:CL168 : fifo64x16.v(319) | Pruning instance DFN1C0_WGRY_0_inst - not in use ...

    @W:CL168 : fifo64x16.v(317) | Pruning instance AO1_2 - not in use ...

    @W:CL168 : fifo64x16.v(260) | Pruning instance AND2_38 - not in use ...

    @W:CL168 : fifo64x16.v(244) | Pruning instance DFN1C0_WGRY_3_inst - not in use ...

    @W:CL168 : fifo64x16.v(242) | Pruning instance DFN1C0_RGRY_1_inst - not in use ...

    @W:CL168 : fifo64x16.v(236) | Pruning instance XOR2_18 - not in use ...

    @W:CL168 : fifo64x16.v(228) | Pruning instance AND2_24 - not in use ...

    @W:CL168 : fifo64x16.v(227) | Pruning instance XOR2_55 - not in use ...

    @W:CL168 : fifo64x16.v(220) | Pruning instance AO1_14 - not in use ...

    @W:CL168 : fifo64x16.v(215) | Pruning instance XOR2_33 - not in use ...

    @W:CL168 : fifo64x16.v(213) | Pruning instance DFN1C0_RGRY_2_inst - not in use ...

    @W:CL168 : fifo64x16.v(201) | Pruning instance AND2_6 - not in use ...

    @W:CL168 : fifo64x16.v(189) | Pruning instance AND2_46 - not in use ...

    @W:CL168 : fifo64x16.v(175) | Pruning instance AND2_61 - not in use ...

    @W:CL168 : fifo64x16.v(169) | Pruning instance DFN1C0_WGRY_5_inst - not in use ...

    @W:CL168 : fifo64x16.v(160) | Pruning instance XOR2_63 - not in use ...

    @W:CL168 : fifo64x16.v(149) | Pruning instance AND2_49 - not in use ...

    @W:CL168 : fifo64x16.v(146) | Pruning instance AND2_1 - not in use ...

    @W:CL168 : fifo64x16.v(144) | Pruning instance XOR2_45 - not in use ...

    @W:CL168 : fifo64x16.v(136) | Pruning instance AND2_15 - not in use ...

    @W:CL168 : fifo64x16.v(135) | Pruning instance AND2_18 - not in use ...

    @W:CL168 : fifo64x16.v(133) | Pruning instance DFN1C0_WGRY_6_inst - not in use ...

    @W:CL168 : fifo64x16.v(124) | Pruning instance XOR2_47 - not in use ...

    @W:CL168 : fifo64x16.v(114) | Pruning instance XOR2_1 - not in use ...

    @N:CG364 : Aapb_int_fft.v(22) | Synthesizing module Aapb_int_fft

    @W:CG360 : Aapb_int_fft.v(36) | No assignment to wire PSLVERR

    @N:CG364 : DSP_Coprocessor.v(5) | Synthesizing module DSP_Coprocessor

    @W:CL246 : Aapb_int_fft.v(32) | Input port bits 31 to 16 of PWDATA[31:0] are unused

    @W:CL157 : Aapb_int_fft.v(36) | *Output PSLVERR has undriven bits - a simulation mismatch is possible
    @W:CL157 : Aapb_int_fft.v(38) | *Output PRDATA has undriven bits - a simulation mismatch is possible
    @W:CL159 : Aapb_int_fft.v(29) | Input PADDR is unused
    @W:CL159 : fftDp.v(365) | Input ifo_loadOn is unused
    @W:CL159 : fftDp.v(157) | Input clkEn is unused
    @W:CL260 : fftDp.v(333) | Pruning Register bit 8 of outQ[15:0]

    @W:CL260 : fftDp.v(333) | Pruning Register bit 0 of outQ[15:0]

    @W:CL159 : fftSm.v(63) | Input clkEn is unused
    @W:CL159 : fftHeader.v(36) | Input clkEn is unused
    @W:CL159 : fftHeader.v(36) | Input clkEn is unused
    @W:CL157 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(62) | *Output RCOSC_CLKOUT has undriven bits - a simulation mismatch is possible
    @W:CL157 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(63) | *Output MAINXIN_CLKOUT has undriven bits - a simulation mismatch is possible
    @W:CL157 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(64) | *Output LPXIN_CLKOUT has undriven bits - a simulation mismatch is possible
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(36) | Input CLKA is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(37) | Input CLKA_PAD is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(38) | Input CLKA_PADP is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(39) | Input CLKA_PADN is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(40) | Input CLKB is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(41) | Input CLKB_PAD is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(42) | Input CLKB_PADP is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(43) | Input CLKB_PADN is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(44) | Input CLKC is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(45) | Input CLKC_PAD is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(46) | Input CLKC_PADP is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(47) | Input CLKC_PADN is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(48) | Input MAINXIN is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(49) | Input LPXIN is unused
    @W:CL159 : DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC.v(50) | Input MAC_CLK is unused
    @W:CL246 : coreapb3.v(217) | Input port bits 23 to 12 of PADDR[23:0] are unused

    @W:CL159 : coreapb3.v(208) | Input PRESETN is unused
    @W:CL159 : coreapb3.v(210) | Input PCLK is unused
    @W:CL159 : coreapb3.v(356) | Input PRDATAS1 is unused
    @W:CL159 : coreapb3.v(363) | Input PRDATAS2 is unused
    @W:CL159 : coreapb3.v(370) | Input PRDATAS3 is unused
    @W:CL159 : coreapb3.v(377) | Input PRDATAS4 is unused
    @W:CL159 : coreapb3.v(384) | Input PRDATAS5 is unused
    @W:CL159 : coreapb3.v(391) | Input PRDATAS6 is unused
    @W:CL159 : coreapb3.v(398) | Input PRDATAS7 is unused
    @W:CL159 : coreapb3.v(405) | Input PRDATAS8 is unused
    @W:CL159 : coreapb3.v(412) | Input PRDATAS9 is unused
    @W:CL159 : coreapb3.v(419) | Input PRDATAS10 is unused
    @W:CL159 : coreapb3.v(426) | Input PRDATAS11 is unused
    @W:CL159 : coreapb3.v(433) | Input PRDATAS12 is unused
    @W:CL159 : coreapb3.v(440) | Input PRDATAS13 is unused
    @W:CL159 : coreapb3.v(447) | Input PRDATAS14 is unused
    @W:CL159 : coreapb3.v(454) | Input PRDATAS15 is unused
    @W:CL159 : coreapb3.v(458) | Input PREADYS1 is unused
    @W:CL159 : coreapb3.v(460) | Input PREADYS2 is unused
    @W:CL159 : coreapb3.v(462) | Input PREADYS3 is unused
    @W:CL159 : coreapb3.v(464) | Input PREADYS4 is unused
    @W:CL159 : coreapb3.v(466) | Input PREADYS5 is unused
    @W:CL159 : coreapb3.v(468) | Input PREADYS6 is unused
    @W:CL159 : coreapb3.v(470) | Input PREADYS7 is unused
    @W:CL159 : coreapb3.v(472) | Input PREADYS8 is unused
    @W:CL159 : coreapb3.v(474) | Input PREADYS9 is unused
    @W:CL159 : coreapb3.v(476) | Input PREADYS10 is unused
    @W:CL159 : coreapb3.v(478) | Input PREADYS11 is unused
    @W:CL159 : coreapb3.v(480) | Input PREADYS12 is unused
    @W:CL159 : coreapb3.v(482) | Input PREADYS13 is unused
    @W:CL159 : coreapb3.v(484) | Input PREADYS14 is unused
    @W:CL159 : coreapb3.v(486) | Input PREADYS15 is unused
    @W:CL159 : coreapb3.v(490) | Input PSLVERRS1 is unused
    @W:CL159 : coreapb3.v(492) | Input PSLVERRS2 is unused
    @W:CL159 : coreapb3.v(494) | Input PSLVERRS3 is unused
    @W:CL159 : coreapb3.v(496) | Input PSLVERRS4 is unused
    @W:CL159 : coreapb3.v(498) | Input PSLVERRS5 is unused
    @W:CL159 : coreapb3.v(500) | Input PSLVERRS6 is unused
    @W:CL159 : coreapb3.v(502) | Input PSLVERRS7 is unused
    @W:CL159 : coreapb3.v(504) | Input PSLVERRS8 is unused
    @W:CL159 : coreapb3.v(506) | Input PSLVERRS9 is unused
    @W:CL159 : coreapb3.v(508) | Input PSLVERRS10 is unused
    @W:CL159 : coreapb3.v(510) | Input PSLVERRS11 is unused
    @W:CL159 : coreapb3.v(512) | Input PSLVERRS12 is unused
    @W:CL159 : coreapb3.v(514) | Input PSLVERRS13 is unused
    @W:CL159 : coreapb3.v(516) | Input PSLVERRS14 is unused
    @W:CL159 : coreapb3.v(518) | Input PSLVERRS15 is unused
    @END
    Process took 0h:00m:54s realtime, 0h:00m:01s cputime
    # Mon Aug 23 16:14:45 2010

    ###########################################################]
    Synopsys Actel Technology Mapper, Version map500act, Build 058R, Built Jan 18 2010 09:16:23
    Copyright (C) 1994-2010, Synopsys Inc.  All Rights Reserved
    Product Version D-2009.12A
    @N:MF249 :  | Running in 32-bit mode.
    @N:MF258 :  | Gated clock conversion disabled

    @W:MO111 : dsp_coprocessor_mss_tmp_mss_ccc_0_mss_ccc.v(62) | tristate driver RCOSC_CLKOUT on net RCOSC_CLKOUT has its enable tied to GND (module DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC)
    @W:MO111 : dsp_coprocessor_mss_tmp_mss_ccc_0_mss_ccc.v(63) | tristate driver MAINXIN_CLKOUT on net MAINXIN_CLKOUT has its enable tied to GND (module DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC)
    @W:MO111 : dsp_coprocessor_mss_tmp_mss_ccc_0_mss_ccc.v(64) | tristate driver LPXIN_CLKOUT on net LPXIN_CLKOUT has its enable tied to GND (module DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC)
    Automatic dissolve during optimization of view:work.wrapRam_8s_16s(verilog) of wrapRam_0(actram)
    Automatic dissolve during optimization of view:work.fftTop(verilog) of lut_0(twiddle_16s_8s)
    @W:MO111 : aapb_int_fft.v(36) | tristate driver PSLVERR on net PSLVERR has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_16 on net PRDATA_16 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_15 on net PRDATA_15 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_14 on net PRDATA_14 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_13 on net PRDATA_13 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_12 on net PRDATA_12 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_11 on net PRDATA_11 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_10 on net PRDATA_10 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_9 on net PRDATA_9 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_8 on net PRDATA_8 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_7 on net PRDATA_7 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_6 on net PRDATA_6 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_5 on net PRDATA_5 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_4 on net PRDATA_4 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_3 on net PRDATA_3 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_2 on net PRDATA_2 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 : aapb_int_fft.v(67) | tristate driver PRDATA_1 on net PRDATA_1 has its enable tied to GND (module Aapb_int_fft)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[31] on net un1_Aapb_int_fft_0[31] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[30] on net un1_Aapb_int_fft_0[30] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[29] on net un1_Aapb_int_fft_0[29] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[28] on net un1_Aapb_int_fft_0[28] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[27] on net un1_Aapb_int_fft_0[27] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[26] on net un1_Aapb_int_fft_0[26] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[25] on net un1_Aapb_int_fft_0[25] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[24] on net un1_Aapb_int_fft_0[24] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[23] on net un1_Aapb_int_fft_0[23] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[22] on net un1_Aapb_int_fft_0[22] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[21] on net un1_Aapb_int_fft_0[21] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[20] on net un1_Aapb_int_fft_0[20] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[19] on net un1_Aapb_int_fft_0[19] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[18] on net un1_Aapb_int_fft_0[18] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[17] on net un1_Aapb_int_fft_0[17] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver un1_Aapb_int_fft_0_t[16] on net un1_Aapb_int_fft_0[16] has its enable tied to GND (module DSP_Coprocessor)
    @W:MO111 :  | tristate driver CoreAPB3_0_APBmslave0_PSLVERR_t on net CoreAPB3_0_APBmslave0_PSLVERR has its enable tied to GND (module DSP_Coprocessor)
    Automatic dissolve at startup in view:COREAPB3_LIB.CoreAPB3_Z1(verilog) of CAPB3llOI(CAPB3O)
    Automatic dissolve at startup in view:work.DSP_Coprocessor_MSS(verilog) of MSS_CCC_0(DSP_Coprocessor_MSS_tmp_MSS_CCC_0_MSS_CCC)
    Automatic dissolve at startup in view:work.inBuf_ldA_256s_8s(verilog) of edge_0(edgeDetect_0s_0s)
    Automatic dissolve at startup in view:work.outBufA_256s_8s(verilog) of fedge_0(edgeDetect_0s_1s_fedge_0)
    Automatic dissolve at startup in view:work.sm_top_256s_128s_8s_3s_12s(verilog) of twid_rA_0(twid_rA_8s_3s)
    Automatic dissolve at startup in view:work.inBuffer_8s_16s_piBuf(verilog) of memQ(wrapRam_8s_16s)
    Automatic dissolve at startup in view:work.inBuffer_8s_16s_piBuf(verilog) of memP(wrapRam_8s_16s)
    Automatic dissolve at startup in view:work.agen_8s_8s_1s(verilog) of actar_0(actar)
    @N:BN116 : actar.v(210) | Removing sequential instance actar_0.DFN1_30 of view:smartfusion.DFN1(prim) because there are no references to its outputs
    @N:BN116 : actar.v(161) | Removing sequential instance actar_0.DFN1_Mult_0_inst of view:smartfusion.DFN1(prim) because there are no references to its outputs
    Automatic dissolve at startup in view:work.twidLUT_8s_16s(verilog) of twidLUT_0(wrapRam_8s_16s_twidLUT_0)
    Automatic dissolve at startup in view:work.outBuff_8s_16s(verilog) of outBuf_1(wrapRam_8s_16s)
    Automatic dissolve at startup in view:work.outBuff_8s_16s(verilog) of outBuf_0(wrapRam_8s_16s)
    Automatic dissolve at startup in view:work.autoScale_1s(verilog) of fedge_0(edgeDetect_0s_1s_fedge_0)
    Automatic dissolve at startup in view:work.fftTop(verilog) of outBuff_0(outBuff_8s_16s)
    Automatic dissolve at startup in view:work.fftTop(verilog) of twidLUT_1(twidLUT_8s_16s)
    Automatic dissolve at startup in view:work.Aapb_int_fft(verilog) of fifo64X16_inst(fifo64x16)
    Automatic dissolve at startup in view:work.DSP_Coprocessor(verilog) of DSP_Coprocessor_MSS_0(DSP_Coprocessor_MSS)
    Automatic dissolve at startup in view:work.DSP_Coprocessor(verilog) of CoreAPB3_0(CoreAPB3_Z1)

    Available hyper_sources - for debug and ip models
    	None Found

    Finished RTL optimizations (Time elapsed 0h:00m:03s; Memory used current: 59MB peak: 60MB)

    @N:MO106 : twiddle.v(20) | Found ROM, 'lut_0.T_1[15:1]', 128 words by 15 bits
    @N: : fftheader.v(60) | Found counter in view:work.counter_8s_139s(verilog) inst Q[7:0]
    @N: : fftheader.v(60) | Found counter in view:work.counter_3s_7s(verilog) inst Q[2:0]
    @N: : fftheader.v(60) | Found counter in view:work.counter_7s_127s(verilog) inst Q[6:0]
    @N: : fftheader.v(60) | Found counter in view:work.counter_8s_255s_ldCount(verilog) inst Q[7:0]
    @N:MF176 :  | Default generator successful
    @N: : fftheader.v(88) | Found counter in view:work.bcounter_10s(verilog) inst Q[9:0]
    @N:MF176 :  | Default generator successful
    @N: : fftheader.v(60) | Found counter in view:work.counter_8s_255s_outBuf_rA_0(verilog) inst Q[7:0]
    @N:MF184 : fftdp.v(331) | Found 8 by 8 bit subtractor, 'Hi_w_0_0[7:0]'
    @N:MF176 :  | Default generator successful
    @N:MF184 : fftdp.v(335) | Found 8 by 8 bit subtractor, 'outQ_2_0_0[7:0]'
    @N:MF184 : fftdp.v(336) | Found 8 by 8 bit subtractor, 'un4_outQ_0_0[7:0]'
    @N:MF176 :  | Default generator successful
    @N:MF176 :  | Default generator successful
    @N:MF176 :  | Default generator successful
    @N:MF238 : fftdp.v(244) | Found 9 bit incrementor, 'un3_outp_int[8:0]'
    Automatic dissolve during optimization of view:work.inBuf_fftA_8s_3s_inBuf_rA_0_inBuf_rA_0(verilog) of un1_offsetPQ_w(PM_DSP_Coprocessor_RSH__32_32_3_A2F500M3G_Std)
    Automatic dissolve during optimization of view:work.inBuf_fftA_8s_3s_inBuf_rA_0_inBuf_rA_0(verilog) of un13_addrP_w(PM_DSP_Coprocessor_RSH__9_9_3_A2F500M3G_Std)
    Automatic dissolve during optimization of view:work.inBuf_fftA_8s_3s_inBuf_rA_0_inBuf_rA_0(verilog) of un9_addrP_w(PM_DSP_Coprocessor_RSH__9_9_3_A2F500M3G_Std)
    Automatic dissolve during optimization of view:work.inBuf_fftA_8s_3s_inBuf_rA_0_inBuf_wA_0(verilog) of un1_offsetPQ_w(PM_DSP_Coprocessor_RSH__32_32_3_A2F500M3G_Std)
    Automatic dissolve during optimization of view:work.inBuf_fftA_8s_3s_inBuf_rA_0_inBuf_wA_0(verilog) of un13_addrP_w(PM_DSP_Coprocessor_RSH__9_9_3_A2F500M3G_Std)
    Automatic dissolve during optimization of view:work.inBuf_fftA_8s_3s_inBuf_rA_0_inBuf_wA_0(verilog) of un9_addrP_w(PM_DSP_Coprocessor_RSH__9_9_3_A2F500M3G_Std)
    Automatic dissolve during optimization of view:work.sm_top_256s_128s_8s_3s_12s(verilog) of outBufA_0(outBufA_256s_8s)
    Automatic dissolve during optimization of view:work.sm_top_256s_128s_8s_3s_12s(verilog) of wrFFTtimer_0(wrFFTtimer_8s_3s_128s)
    Automatic dissolve during optimization of view:work.DSP_Coprocessor(verilog) of Aapb_int_fft_0(Aapb_int_fft)
    Finished factoring (Time elapsed 0h:00m:06s; Memory used current: 60MB peak: 61MB)

    @N:BN116 : fftdp.v(32) | Removing sequential instance Aapb_int_fft_0.fftTop_inst.postBflySw_0.validOut of view:PrimLib.dff(prim) because there are no references to its outputs
    @N:BN116 : fftdp.v(32) | Removing sequential instance Aapb_int_fft_0.fftTop_inst.postBflySw_0.pipe1 of view:PrimLib.dff(prim) because there are no references to its outputs
    @N:BN116 : fftsm.v(164) | Removing sequential instance Aapb_int_fft_0.fftTop_inst.smTop_0.inBuf_wA_0.fftDone of view:PrimLib.dff(prim) because there are no references to its outputs
    @N:BN116 : fftsm.v(164) | Removing sequential instance Aapb_int_fft_0.fftTop_inst.smTop_0.inBuf_wA_0.swCross of view:PrimLib.dff(prim) because there are no references to its outputs
    @W:BN132 : fftheader.v(43) | Removing sequential instance Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.fedge_0.in_t1,  because it is equivalent to instance Aapb_int_fft_0.fftTop_inst.outBuff_0.wEn_r
    Finished gated-clock and generated-clock conversion (Time elapsed 0h:00m:06s; Memory used current: 62MB peak: 62MB)

    Finished generic timing optimizations - Pass 1 (Time elapsed 0h:00m:06s; Memory used current: 62MB peak: 63MB)

    Starting Early Timing Optimization (Time elapsed 0h:00m:07s; Memory used current: 62MB peak: 63MB)

    Finished Early Timing Optimization (Time elapsed 0h:00m:07s; Memory used current: 62MB peak: 63MB)

    Finished generic timing optimizations - Pass 2 (Time elapsed 0h:00m:08s; Memory used current: 62MB peak: 63MB)

    Finished preparing to map (Time elapsed 0h:00m:09s; Memory used current: 65MB peak: 66MB)

    High Fanout Net Report
    **********************

    Driver Instance / Pin Name                                          Fanout, notes
    --------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST / M2FRESETn                    75 : 36 asynchronous set/reset
    Aapb_int_fft_0.fftTop_inst.smTop_0.smPong / Q                       115
    Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[3] / Q     47
    Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[4] / Q     45
    Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[5] / Q     47
    Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[6] / Q     60
    Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[7] / Q     41
    Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[8] / Q     25
    Aapb_int_fft_0.fftTop_inst.smTop_0.inBuf_rA_0.swCross / Q           33
    Aapb_int_fft_0.fftTop_inst.autoScale_0.upScale / Q                  30
    Aapb_int_fft_0.fftTop_inst.bfly_0.swCrossOut / Q                    32
    Aapb_int_fft_0.fftTop_inst.smTop_0.nGrst / Y                        66 : 66 asynchronous set/reset
    ==================================================================================================

    @N:FP130 :  | Promoting Net Aapb_int_fft_0.un1_fftTop_inst on CLKINT  I_114
    @N:FP130 :  | Promoting Net Aapb_int_fft_0.fftTop_inst.smTop_0.nGrst on CLKINT  I_115
    @N:FP130 :  | Promoting Net Aapb_int_fft_0.fftTop_inst.twid_wA_w[3] on CLKINT  I_116
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.bfly_0.swCrossOut, fanout 32 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.autoScale_0.upScale, fanout 30 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.smTop_0.inBuf_rA_0.swCross, fanout 33 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[8], fanout 25 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[7], fanout 41 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[5], fanout 47 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[4], fanout 45 segments 2
    Replicating Sequential Instance Aapb_int_fft_0.fftTop_inst.smTop_0.twid_wA_0.slowTimer.Q[3], fanout 47 segments 2
    Buffering DSP_Coprocessor_MSS_0_FAB_CLK, fanout 994 segments 42
    Buffering DSP_Coprocessor_MSS_0_FAB_CLK, fanout 51 segments 3
    Finished technology mapping (Time elapsed 0h:00m:09s; Memory used current: 65MB peak: 66MB)

    Finished technology timing optimizations and critical path resynthesis (Time elapsed 0h:00m:10s; Memory used current: 67MB peak: 68MB)

    Added 43 Buffers
    Added 8 Cells via replication
    	Added 8 Sequential Cells via replication
    	Added 0 Combinational Cells via replication
    Finished restoring hierarchy (Time elapsed 0h:00m:10s; Memory used current: 67MB peak: 68MB)

    Writing Analyst data base H:\Projects\Libero_SP2_A2F500\DSP_Coprocessor\Hardware\A2F500\Verilog\DSP_Coprocessor\synthesis\DSP_Coprocessor.srm
    Finished Writing Netlist Databases (Time elapsed 0h:00m:12s; Memory used current: 67MB peak: 68MB)

    Writing EDIF Netlist and constraint files
    D-2009.12A
    Finished Writing EDIF Netlist and constraint files (Time elapsed 0h:00m:14s; Memory used current: 68MB peak: 69MB)

    @W:MT420 :  | Found inferred clock DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock with period 10.00ns. A user-defined clock should be declared on object "n:DSP_Coprocessor_MSS_0_FAB_CLK"

    @W:MT246 : dsp_coprocessor_mss.v(191) | Blackbox MSSINT is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)
    @W:MT246 : dsp_coprocessor_mss.v(52) | Blackbox MSS_APB is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)

    ##### START OF TIMING REPORT #####[
    # Timing Report written on Mon Aug 23 16:15:35 2010
    #

    Top view:               DSP_Coprocessor
    Library name:           smartfusion
    Operating conditions:   COMWCSTD ( T = 70.0, V = 1.42, P = 1.74, tree_type = balanced_tree )
    Requested Frequency:    100.0 MHz
    Wire load mode:         top
    Wire load model:        smartfusion
    Paths requested:        5
    Constraint File(s):
    @N:MT320 :  | This timing report estimates place and route data. Please look at the place and route timing report for final timing..

    @N:MT322 :  | Clock constraints cover only FF-to-FF paths associated with the clock..

    Performance Summary
    *******************

    Worst slack in design: -12.327

                                                                                                     Requested     Estimated     Requested     Estimated                Clock        Clock
    Starting Clock                                                                                   Frequency     Frequency     Period        Period        Slack      Type         Group
    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     100.0 MHz     54.8 MHz      10.000        18.248        -8.248     inferred     Inferred_clkgroup_0
    System                                                                                           100.0 MHz     171.5 MHz     10.000        5.831         4.169      system       default_clkgroup
    ====================================================================================================================================================================================================

    Clock Relationships
    *******************

    Clocks                                                                                                                                                                                      |    rise  to  rise    |    fall  to  fall   |    rise  to  fall   |    fall  to  rise
    -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Starting                                                                                      Ending                                                                                        |  constraint  slack   |  constraint  slack  |  constraint  slack  |  constraint  slack
    -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock  DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock  |  10.000      -8.248  |  No paths    -      |  No paths    -      |  No paths    -
    ===================================================================================================================================================================================================================================================================================
     Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
           'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.

    Interface Information
    *********************

    		No IO constraint found

    ====================================
    Detailed Report for Clock: DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock
    ====================================

    Starting Points with Worst Slack
    ********************************

                                                              Starting                                                                                                                                         Arrival
    Instance                                                  Reference                                                                                        Type       Pin     Net                          Time        Slack
                                                              Clock
    -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY                DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1P0     Q       Aapb_int_fft_0_EMPTY_OUT     0.737       -8.248
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       MEM_RADDR_1_net              0.737       -8.142
    Aapb_int_fft_0.PENABLE_reg                                DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       PENABLE_reg                  0.737       -7.926
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_FULL                 DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       DFN1C0_FULL                  0.737       -7.488
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       MEM_RADDR_0_net              0.737       -7.325
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       MEM_WADDR_1_net              0.737       -6.924
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_2_inst     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       MEM_RADDR_2_net              0.737       -6.826
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_3_inst     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       MEM_RADDR_3_net              0.737       -6.797
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0     Q       MEM_WADDR_0_net              0.737       -6.602
    Aapb_int_fft_0.ifoY_valid                                 DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFI1P0     QN      WEP                          0.737       -6.505
    =============================================================================================================================================================================================================================

    Ending Points with Worst Slack
    ******************************

                                                                      Starting                                                                                                                           Required
    Instance                                                          Reference                                                                                        Type         Pin     Net          Time         Slack
                                                                      Clock
    ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                       DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1P0       D       AOI1_0_Y     9.461        -8.248
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_AFULL                        DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFI1C0       D       OR2_0_Y      9.427        -7.488
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY                        DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1P0       D       EMPTYINT     9.427        -2.254
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_FULL                         DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1C0       D       FULLINT      9.461        -1.760
    Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.outBuf_rA_0.Q[2]     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1E0C0     D       N_32         9.461        -1.126
    Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.outBuf_rA_0.Q[1]     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1E0C0     D       N_8          9.461        -1.107
    Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.outBuf_rA_0.Q[3]     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1E0C0     D       N_33         9.461        -1.107
    Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.outBuf_rA_0.Q[4]     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1E0C0     D       N_34         9.461        -1.107
    Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.outBuf_rA_0.Q[5]     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1E0C0     D       N_35         9.461        -1.107
    Aapb_int_fft_0.fftTop_inst.smTop_0.outBufA_0.outBuf_rA_0.Q[6]     DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock     DFN1E0C0     D       N_36_i_0     9.461        -1.107
    ========================================================================================================================================================================================================================

    Worst Path Information
    View Worst Path in Analyst
    ***********************

    Path information for path number 1:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      17.709
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -8.248

        Number of logic level(s):                13
        Starting point:                          Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY / Q
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                  Pin      Pin               Arrival     No. of
    Name                                                                 Type       Name     Dir     Delay     Time        Fan Out(s)
    ---------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY                           DFN1P0     Q        Out     0.737     0.737       -
    Aapb_int_fft_0_EMPTY_OUT                                             Net        -        -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1                                NAND2      A        In      -         1.921       -
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1                                NAND2      Y        Out     0.514     2.435       -
    NAND2_1_Y                                                            Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A      A        In      -         3.241       -
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A      Y        Out     0.516     3.757       -
    MEMORYRE                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2       B        In      -         4.143       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2       Y        Out     0.937     5.080       -
    RBINNXTSHIFT_0_net                                                   Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A       A        In      -         5.886       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A       Y        Out     0.537     6.423       -
    N_1_4                                                                Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13       A        In      -         6.809       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13       Y        Out     1.062     7.871       -
    OR3_1_Y_0                                                            Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13       B        In      -         8.257       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13       Y        Out     0.933     9.190       -
    AO1_3_Y_0                                                            Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A      A        In      -         9.996       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A      Y        Out     0.641     10.638      -
    N_1_13                                                               Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B       A        In      -         11.024      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B       Y        Out     0.652     11.675      -
    N_1_8                                                                Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D       B        In      -         11.997      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D       Y        Out     0.992     12.989      -
    RDIFF_6_net                                                          Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A       B        In      -         13.796      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A       Y        Out     0.646     14.442      -
    OR2A_1_Y                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                                NOR3A      A        In      -         14.828      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                                NOR3A      Y        Out     0.641     15.469      -
    NOR3A_0_Y                                                            Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A     A        In      -         15.791      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A     Y        Out     0.751     16.541      -
    NAND3A_3_Y_0                                                         Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1       C        In      -         16.863      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1       Y        Out     0.525     17.388      -
    AOI1_0_Y                                                             Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                          DFN1P0     D        In      -         17.709      -
    =================================================================================================================================
    Total path delay (propagation time + setup) of 18.248 is 10.624(58.2%) logic and 7.624(41.8%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 2:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      17.603
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -8.142

        Number of logic level(s):                13
        Starting point:                          Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst / Q
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                Pin      Pin               Arrival     No. of
    Name                                                               Type       Name     Dir     Delay     Time        Fan Out(s)
    -------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst              DFN1C0     Q        Out     0.737     0.737       -
    MEM_RADDR_1_net                                                    Net        -        -       1.526     -           7
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3                               XOR2       A        In      -         2.263       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3                               XOR2       Y        Out     0.488     2.751       -
    XOR2_3_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B      B        In      -         3.073       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B      Y        Out     0.624     3.697       -
    G_9_1                                                              Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1        A        In      -         4.018       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1        Y        Out     0.520     4.538       -
    AO1_15_Y_0                                                         Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1        B        In      -         5.344       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1        Y        Out     0.567     5.911       -
    AO1_16_Y_0                                                         Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2       B        In      -         6.232       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2       Y        Out     0.937     7.169       -
    RBINNXTSHIFT_3_net                                                 Net        -        -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2       A        In      -         8.352       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2       Y        Out     0.408     8.761       -
    N_1_7                                                              Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A      C        In      -         9.567       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A      Y        Out     0.716     10.283      -
    N_1_13                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B       A        In      -         10.669      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B       Y        Out     0.900     11.569      -
    N_1_8                                                              Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D       B        In      -         11.891      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D       Y        Out     0.992     12.883      -
    RDIFF_6_net                                                        Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A       B        In      -         13.689      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A       Y        Out     0.646     14.336      -
    OR2A_1_Y                                                           Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A      A        In      -         14.722      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A      Y        Out     0.641     15.363      -
    NOR3A_0_Y                                                          Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A     A        In      -         15.685      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A     Y        Out     0.751     16.435      -
    NAND3A_3_Y_0                                                       Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1       C        In      -         16.757      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1       Y        Out     0.525     17.282      -
    AOI1_0_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                        DFN1P0     D        In      -         17.603      -
    ===============================================================================================================================
    Total path delay (propagation time + setup) of 18.142 is 9.991(55.1%) logic and 8.151(44.9%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 3:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      17.547
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -8.086

        Number of logic level(s):                13
        Starting point:                          Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY / Q
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                  Pin      Pin               Arrival     No. of
    Name                                                                 Type       Name     Dir     Delay     Time        Fan Out(s)
    ---------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY                           DFN1P0     Q        Out     0.737     0.737       -
    Aapb_int_fft_0_EMPTY_OUT                                             Net        -        -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1                                NAND2      A        In      -         1.921       -
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1                                NAND2      Y        Out     0.514     2.435       -
    NAND2_1_Y                                                            Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A      A        In      -         3.241       -
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A      Y        Out     0.516     3.757       -
    MEMORYRE                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2       B        In      -         4.143       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2       Y        Out     0.937     5.080       -
    RBINNXTSHIFT_0_net                                                   Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A       A        In      -         5.886       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A       Y        Out     0.537     6.423       -
    N_1_4                                                                Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13       A        In      -         6.809       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13       Y        Out     1.062     7.871       -
    OR3_1_Y_0                                                            Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13       B        In      -         8.257       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13       Y        Out     0.933     9.190       -
    AO1_3_Y_0                                                            Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A      A        In      -         9.996       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A      Y        Out     0.641     10.638      -
    N_1_13                                                               Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B       A        In      -         11.024      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B       Y        Out     0.652     11.675      -
    N_1_8                                                                Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D       B        In      -         11.997      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D       Y        Out     0.992     12.989      -
    RDIFF_6_net                                                          Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A       B        In      -         13.796      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A       Y        Out     0.646     14.442      -
    OR2A_1_Y                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NAND3A_1                               NAND3A     C        In      -         14.828      -
    Aapb_int_fft_0.fifo64X16_inst.NAND3A_1                               NAND3A     Y        Out     0.607     15.434      -
    NAND3A_1_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A     C        In      -         15.756      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A     Y        Out     0.624     16.380      -
    NAND3A_3_Y_0                                                         Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1       C        In      -         16.701      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1       Y        Out     0.525     17.226      -
    AOI1_0_Y                                                             Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                          DFN1P0     D        In      -         17.547      -
    =================================================================================================================================
    Total path delay (propagation time + setup) of 18.086 is 10.462(57.8%) logic and 7.624(42.2%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 4:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      17.483
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -8.022

        Number of logic level(s):                13
        Starting point:                          Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst / Q
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                Pin      Pin               Arrival     No. of
    Name                                                               Type       Name     Dir     Delay     Time        Fan Out(s)
    -------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst              DFN1C0     Q        Out     0.737     0.737       -
    MEM_RADDR_1_net                                                    Net        -        -       1.526     -           7
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3                               XOR2       A        In      -         2.263       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3                               XOR2       Y        Out     0.488     2.751       -
    XOR2_3_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B      B        In      -         3.073       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B      Y        Out     0.624     3.697       -
    G_9_1                                                              Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1        A        In      -         4.018       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1        Y        Out     0.520     4.538       -
    AO1_15_Y_0                                                         Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.AND2_42_RNIHQC92                     AO1        B        In      -         5.344       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_42_RNIHQC92                     AO1        Y        Out     0.567     5.911       -
    AO1_29_Y_0                                                         Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.XOR2_39_RNIFJKG2                     XOR2       B        In      -         6.717       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_39_RNIFJKG2                     XOR2       Y        Out     0.937     7.654       -
    RBINNXTSHIFT_4_net                                                 Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIO3TJ2     XOR2       A        In      -         8.460       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIO3TJ2     XOR2       Y        Out     0.408     8.868       -
    N_1_18                                                             Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A      B        In      -         9.675       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A      Y        Out     0.488     10.163      -
    N_1_13                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B       A        In      -         10.549      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B       Y        Out     0.900     11.449      -
    N_1_8                                                              Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D       B        In      -         11.771      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D       Y        Out     0.992     12.763      -
    RDIFF_6_net                                                        Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A       B        In      -         13.569      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A       Y        Out     0.646     14.216      -
    OR2A_1_Y                                                           Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A      A        In      -         14.602      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A      Y        Out     0.641     15.243      -
    NOR3A_0_Y                                                          Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A     A        In      -         15.565      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A     Y        Out     0.751     16.315      -
    NAND3A_3_Y_0                                                       Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1       C        In      -         16.637      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1       Y        Out     0.525     17.162      -
    AOI1_0_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                        DFN1P0     D        In      -         17.483      -
    ===============================================================================================================================
    Total path delay (propagation time + setup) of 18.022 is 9.763(54.2%) logic and 8.259(45.8%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 5:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      17.441
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -7.980

        Number of logic level(s):                13
        Starting point:                          Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst / Q
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                Pin      Pin               Arrival     No. of
    Name                                                               Type       Name     Dir     Delay     Time        Fan Out(s)
    -------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst              DFN1C0     Q        Out     0.737     0.737       -
    MEM_RADDR_1_net                                                    Net        -        -       1.526     -           7
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3                               XOR2       A        In      -         2.263       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3                               XOR2       Y        Out     0.488     2.751       -
    XOR2_3_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B      B        In      -         3.073       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B      Y        Out     0.624     3.697       -
    G_9_1                                                              Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1        A        In      -         4.018       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1        Y        Out     0.520     4.538       -
    AO1_15_Y_0                                                         Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1        B        In      -         5.344       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1        Y        Out     0.567     5.911       -
    AO1_16_Y_0                                                         Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2       B        In      -         6.232       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2       Y        Out     0.937     7.169       -
    RBINNXTSHIFT_3_net                                                 Net        -        -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2       A        In      -         8.352       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2       Y        Out     0.408     8.761       -
    N_1_7                                                              Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A      C        In      -         9.567       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A      Y        Out     0.716     10.283      -
    N_1_13                                                             Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B       A        In      -         10.669      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B       Y        Out     0.900     11.569      -
    N_1_8                                                              Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D       B        In      -         11.891      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D       Y        Out     0.992     12.883      -
    RDIFF_6_net                                                        Net        -        -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A       B        In      -         13.689      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A       Y        Out     0.646     14.336      -
    OR2A_1_Y                                                           Net        -        -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NAND3A_1                             NAND3A     C        In      -         14.722      -
    Aapb_int_fft_0.fifo64X16_inst.NAND3A_1                             NAND3A     Y        Out     0.607     15.328      -
    NAND3A_1_Y                                                         Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A     C        In      -         15.650      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A     Y        Out     0.624     16.274      -
    NAND3A_3_Y_0                                                       Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1       C        In      -         16.595      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1       Y        Out     0.525     17.120      -
    AOI1_0_Y                                                           Net        -        -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                        DFN1P0     D        In      -         17.441      -
    ===============================================================================================================================
    Total path delay (propagation time + setup) of 17.980 is 9.829(54.7%) logic and 8.151(45.3%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    ====================================
    Detailed Report for Clock: System
    ====================================

    Starting Points with Worst Slack
    ********************************

                                                Starting                                                                                   Arrival
    Instance                                    Reference     Type        Pin               Net                                            Time        Slack
                                                Clock
    ----------------------------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPADDR[8]       CoreAPB3_0_APBmslave0_PADDR_\[8\]              0.000       -12.327
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPADDR[11]      CoreAPB3_0_APBmslave0_PADDR_\[11\]             0.000       -12.285
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPSEL           DSP_Coprocessor_MSS_0_MSS_MASTER_APB_PSELx     0.000       -12.275
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPADDR[10]      CoreAPB3_0_APBmslave0_PADDR_\[10\]             0.000       -12.146
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPADDR[9]       CoreAPB3_0_APBmslave0_PADDR_\[9\]              0.000       -12.099
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPENABLE        CoreAPB3_0_APBmslave0_PENABLE                  0.000       -8.540
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPWRITE         CoreAPB3_0_APBmslave0_PWRITE                   0.000       -7.789
    DSP_Coprocessor_MSS_0.MSS_CCC_0.I_RCOSC     System        RCOSC       CLKOUT            N_CLKA_RCOSC                                   0.000       4.169
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPWDATA[14]     MSSPWDATA[14]                                  0.000       5.148
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST        System        MSS_APB     MSSPWDATA[6]      MSSPWDATA[6]                                   0.000       5.195
    ==========================================================================================================================================================

    Ending Points with Worst Slack
    ******************************

                                                              Starting                                                Required
    Instance                                                  Reference     Type       Pin     Net                    Time         Slack
                                                              Clock
    --------------------------------------------------------------------------------------------------------------------------------------
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY               System        DFN1P0     D       AOI1_0_Y               9.461        -12.327
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_EMPTY                System        DFN1P0     D       EMPTYINT               9.427        -6.439
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_5_inst     System        DFN1C0     D       RBINNXTSHIFT_5_net     9.461        -4.072
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_6_inst     System        DFN1C0     D       RBINNXTSHIFT_6_net     9.461        -4.072
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_4_inst     System        DFN1C0     D       RBINNXTSHIFT_4_net     9.461        -3.184
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_3_inst     System        DFN1C0     D       RBINNXTSHIFT_3_net     9.461        -3.076
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_2_inst     System        DFN1C0     D       RBINNXTSHIFT_2_net     9.461        -2.188
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_1_inst     System        DFN1C0     D       RBINNXTSHIFT_1_net     9.461        -0.813
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst     System        DFN1C0     D       RBINNXTSHIFT_0_net     9.461        -0.467
    Aapb_int_fft_0.fftTop_inst.autoScale_0.ldMonitor          System        DFN1       D       ldMonitor_RNO          9.427        0.028
    ======================================================================================================================================

    Worst Path Information
    View Worst Path in Analyst
    ***********************

    Path information for path number 1:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      21.788
        - Clock delay at starting point:         0.000 (ideal)
        - Estimated clock delay at start point:  -0.000
        = Slack (critical) :                     -12.327

        Number of logic level(s):                16
        Starting point:                          DSP_Coprocessor_MSS_0.MSS_ADLIB_INST / MSSPADDR[8]
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            System [rising]
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                 Pin             Pin               Arrival     No. of
    Name                                                               Type        Name            Dir     Delay     Time        Fan Out(s)
    ---------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST                               MSS_APB     MSSPADDR[8]     Out     0.000     0.000       -
    CoreAPB3_0_APBmslave0_PADDR_\[8\]                                  Net         -               -       0.322     -           1
    CoreAPB3_0.CAPB3O11_2[0]                                           NOR3A       C               In      -         0.322       -
    CoreAPB3_0.CAPB3O11_2[0]                                           NOR3A       Y               Out     0.716     1.038       -
    CAPB3O11_2[0]                                                      Net         -               -       0.322     -           1
    CoreAPB3_0.CAPB3O11[0]                                             NOR2B       A               In      -         1.359       -
    CoreAPB3_0.CAPB3O11[0]                                             NOR2B       Y               Out     0.488     1.847       -
    CoreAPB3_0_APBmslave0_PSELx                                        Net         -               -       2.353     -           20
    Aapb_int_fft_0.un1_fifo_rd_en_1                                    OR2B        A               In      -         4.201       -
    Aapb_int_fft_0.un1_fifo_rd_en_1                                    OR2B        Y               Out     0.488     4.689       -
    un1_fifo_rd_en_1                                                   Net         -               -       0.806     -           3
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                 OR3         B               In      -         5.495       -
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                 OR3         Y               Out     0.714     6.210       -
    N_2                                                                Net         -               -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B       C               In      -         7.393       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B       Y               Out     0.488     7.882       -
    G_9_1                                                              Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1         A               In      -         8.203       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1         Y               Out     0.520     8.723       -
    AO1_15_Y_0                                                         Net         -               -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1         B               In      -         9.529       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1         Y               Out     0.567     10.095      -
    AO1_16_Y_0                                                         Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2        B               In      -         10.417      -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2        Y               Out     0.937     11.354      -
    RBINNXTSHIFT_3_net                                                 Net         -               -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2        A               In      -         12.537      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2        Y               Out     0.408     12.946      -
    N_1_7                                                              Net         -               -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A       C               In      -         13.752      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A       Y               Out     0.716     14.468      -
    N_1_13                                                             Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B        A               In      -         14.854      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B        Y               Out     0.900     15.754      -
    N_1_8                                                              Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D        B               In      -         16.076      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D        Y               Out     0.992     17.068      -
    RDIFF_6_net                                                        Net         -               -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A        B               In      -         17.874      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A        Y               Out     0.646     18.521      -
    OR2A_1_Y                                                           Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A       A               In      -         18.907      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A       Y               Out     0.641     19.548      -
    NOR3A_0_Y                                                          Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A      A               In      -         19.869      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A      Y               Out     0.751     20.620      -
    NAND3A_3_Y_0                                                       Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1        C               In      -         20.942      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1        Y               Out     0.525     21.467      -
    AOI1_0_Y                                                           Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                        DFN1P0      D               In      -         21.788      -
    =======================================================================================================================================
    Total path delay (propagation time + setup) of 22.327 is 11.037(49.4%) logic and 11.290(50.6%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 2:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      21.752
        - Clock delay at starting point:         0.000 (ideal)
        - Estimated clock delay at start point:  -0.000
        = Slack (non-critical) :                 -12.290

        Number of logic level(s):                16
        Starting point:                          DSP_Coprocessor_MSS_0.MSS_ADLIB_INST / MSSPADDR[8]
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            System [rising]
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                   Pin             Pin               Arrival     No. of
    Name                                                                 Type        Name            Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST                                 MSS_APB     MSSPADDR[8]     Out     0.000     0.000       -
    CoreAPB3_0_APBmslave0_PADDR_\[8\]                                    Net         -               -       0.322     -           1
    CoreAPB3_0.CAPB3O11_2[0]                                             NOR3A       C               In      -         0.322       -
    CoreAPB3_0.CAPB3O11_2[0]                                             NOR3A       Y               Out     0.716     1.038       -
    CAPB3O11_2[0]                                                        Net         -               -       0.322     -           1
    CoreAPB3_0.CAPB3O11[0]                                               NOR2B       A               In      -         1.359       -
    CoreAPB3_0.CAPB3O11[0]                                               NOR2B       Y               Out     0.488     1.847       -
    CoreAPB3_0_APBmslave0_PSELx                                          Net         -               -       2.353     -           20
    Aapb_int_fft_0.un1_fifo_rd_en_1                                      OR2B        A               In      -         4.201       -
    Aapb_int_fft_0.un1_fifo_rd_en_1                                      OR2B        Y               Out     0.488     4.689       -
    un1_fifo_rd_en_1                                                     Net         -               -       0.806     -           3
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                   OR3         B               In      -         5.495       -
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                   OR3         Y               Out     0.714     6.210       -
    N_2                                                                  Net         -               -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A       B               In      -         7.393       -
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A       Y               Out     0.407     7.800       -
    MEMORYRE                                                             Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2        B               In      -         8.186       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2        Y               Out     0.937     9.122       -
    RBINNXTSHIFT_0_net                                                   Net         -               -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A        A               In      -         9.929       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A        Y               Out     0.537     10.466      -
    N_1_4                                                                Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13        A               In      -         10.852      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13        Y               Out     1.062     11.913      -
    OR3_1_Y_0                                                            Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13        B               In      -         12.299      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13        Y               Out     0.933     13.233      -
    AO1_3_Y_0                                                            Net         -               -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A       A               In      -         14.039      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A       Y               Out     0.641     14.680      -
    N_1_13                                                               Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B        A               In      -         15.066      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B        Y               Out     0.652     15.718      -
    N_1_8                                                                Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D        B               In      -         16.039      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D        Y               Out     0.992     17.032      -
    RDIFF_6_net                                                          Net         -               -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A        B               In      -         17.838      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A        Y               Out     0.646     18.484      -
    OR2A_1_Y                                                             Net         -               -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                                NOR3A       A               In      -         18.870      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                                NOR3A       Y               Out     0.641     19.512      -
    NOR3A_0_Y                                                            Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A      A               In      -         19.833      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A      Y               Out     0.751     20.584      -
    NAND3A_3_Y_0                                                         Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1        C               In      -         20.905      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1        Y               Out     0.525     21.430      -
    AOI1_0_Y                                                             Net         -               -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                          DFN1P0      D               In      -         21.752      -
    =========================================================================================================================================
    Total path delay (propagation time + setup) of 22.290 is 11.670(52.4%) logic and 10.621(47.6%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 3:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      21.746
        - Clock delay at starting point:         0.000 (ideal)
        - Estimated clock delay at start point:  -0.000
        = Slack (non-critical) :                 -12.285

        Number of logic level(s):                16
        Starting point:                          DSP_Coprocessor_MSS_0.MSS_ADLIB_INST / MSSPADDR[11]
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            System [rising]
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                 Pin              Pin               Arrival     No. of
    Name                                                               Type        Name             Dir     Delay     Time        Fan Out(s)
    ----------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST                               MSS_APB     MSSPADDR[11]     Out     0.000     0.000       -
    CoreAPB3_0_APBmslave0_PADDR_\[11\]                                 Net         -                -       0.322     -           1
    CoreAPB3_0.CAPB3O11_1[0]                                           NOR2        B                In      -         0.322       -
    CoreAPB3_0.CAPB3O11_1[0]                                           NOR2        Y                Out     0.646     0.968       -
    CAPB3O11_1[0]                                                      Net         -                -       0.322     -           1
    CoreAPB3_0.CAPB3O11[0]                                             NOR2B       B                In      -         1.290       -
    CoreAPB3_0.CAPB3O11[0]                                             NOR2B       Y                Out     0.516     1.806       -
    CoreAPB3_0_APBmslave0_PSELx                                        Net         -                -       2.353     -           20
    Aapb_int_fft_0.un1_fifo_rd_en_1                                    OR2B        A                In      -         4.159       -
    Aapb_int_fft_0.un1_fifo_rd_en_1                                    OR2B        Y                Out     0.488     4.647       -
    un1_fifo_rd_en_1                                                   Net         -                -       0.806     -           3
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                 OR3         B                In      -         5.454       -
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                 OR3         Y                Out     0.714     6.168       -
    N_2                                                                Net         -                -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B       C                In      -         7.351       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B       Y                Out     0.488     7.840       -
    G_9_1                                                              Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1         A                In      -         8.161       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1         Y                Out     0.520     8.681       -
    AO1_15_Y_0                                                         Net         -                -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1         B                In      -         9.487       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1         Y                Out     0.567     10.054      -
    AO1_16_Y_0                                                         Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2        B                In      -         10.375      -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2        Y                Out     0.937     11.312      -
    RBINNXTSHIFT_3_net                                                 Net         -                -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2        A                In      -         12.496      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2        Y                Out     0.408     12.904      -
    N_1_7                                                              Net         -                -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A       C                In      -         13.710      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A       Y                Out     0.716     14.426      -
    N_1_13                                                             Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B        A                In      -         14.812      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B        Y                Out     0.900     15.712      -
    N_1_8                                                              Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D        B                In      -         16.034      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D        Y                Out     0.992     17.026      -
    RDIFF_6_net                                                        Net         -                -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A        B                In      -         17.833      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A        Y                Out     0.646     18.479      -
    OR2A_1_Y                                                           Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A       A                In      -         18.865      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A       Y                Out     0.641     19.506      -
    NOR3A_0_Y                                                          Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A      A                In      -         19.828      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A      Y                Out     0.751     20.578      -
    NAND3A_3_Y_0                                                       Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1        C                In      -         20.900      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1        Y                Out     0.525     21.425      -
    AOI1_0_Y                                                           Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                        DFN1P0      D                In      -         21.746      -
    ========================================================================================================================================
    Total path delay (propagation time + setup) of 22.285 is 10.995(49.3%) logic and 11.290(50.7%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 4:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      21.736
        - Clock delay at starting point:         0.000 (ideal)
        - Estimated clock delay at start point:  -0.000
        = Slack (non-critical) :                 -12.275

        Number of logic level(s):                16
        Starting point:                          DSP_Coprocessor_MSS_0.MSS_ADLIB_INST / MSSPSEL
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            System [rising]
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                 Pin         Pin               Arrival     No. of
    Name                                                               Type        Name        Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST                               MSS_APB     MSSPSEL     Out     0.000     0.000       -
    DSP_Coprocessor_MSS_0_MSS_MASTER_APB_PSELx                         Net         -           -       0.322     -           1
    CoreAPB3_0.CAPB3O11_2[0]                                           NOR3A       A           In      -         0.322       -
    CoreAPB3_0.CAPB3O11_2[0]                                           NOR3A       Y           Out     0.664     0.985       -
    CAPB3O11_2[0]                                                      Net         -           -       0.322     -           1
    CoreAPB3_0.CAPB3O11[0]                                             NOR2B       A           In      -         1.307       -
    CoreAPB3_0.CAPB3O11[0]                                             NOR2B       Y           Out     0.488     1.795       -
    CoreAPB3_0_APBmslave0_PSELx                                        Net         -           -       2.353     -           20
    Aapb_int_fft_0.un1_fifo_rd_en_1                                    OR2B        A           In      -         4.149       -
    Aapb_int_fft_0.un1_fifo_rd_en_1                                    OR2B        Y           Out     0.488     4.637       -
    un1_fifo_rd_en_1                                                   Net         -           -       0.806     -           3
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                 OR3         B           In      -         5.443       -
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                 OR3         Y           Out     0.714     6.157       -
    N_2                                                                Net         -           -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B       C           In      -         7.341       -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_3_RNIBRVS                       NOR3B       Y           Out     0.488     7.829       -
    G_9_1                                                              Net         -           -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1         A           In      -         8.151       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_26_RNI61A91                     AO1         Y           Out     0.520     8.671       -
    AO1_15_Y_0                                                         Net         -           -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1         B           In      -         9.477       -
    Aapb_int_fft_0.fifo64X16_inst.AND2_11_RNIPGUL1                     AO1         Y           Out     0.567     10.043      -
    AO1_16_Y_0                                                         Net         -           -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2        B           In      -         10.365      -
    Aapb_int_fft_0.fifo64X16_inst.XOR2_64_RNIL96T1                     XOR2        Y           Out     0.937     11.302      -
    RBINNXTSHIFT_3_net                                                 Net         -           -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2        A           In      -         12.485      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_3_inst_RNITPE02     XOR2        Y           Out     0.408     12.894      -
    N_1_7                                                              Net         -           -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A       C           In      -         13.700      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8     NOR3A       Y           Out     0.716     14.416      -
    N_1_13                                                             Net         -           -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B        A           In      -         14.802      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G     OA1B        Y           Out     0.900     15.702      -
    N_1_8                                                              Net         -           -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D        B           In      -         16.023      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM     AX1D        Y           Out     0.992     17.016      -
    RDIFF_6_net                                                        Net         -           -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A        B           In      -         17.822      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                               OR2A        Y           Out     0.646     18.469      -
    OR2A_1_Y                                                           Net         -           -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A       A           In      -         18.855      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                              NOR3A       Y           Out     0.641     19.496      -
    NOR3A_0_Y                                                          Net         -           -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A      A           In      -         19.817      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                  NAND3A      Y           Out     0.751     20.568      -
    NAND3A_3_Y_0                                                       Net         -           -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1        C           In      -         20.890      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                    AOI1        Y           Out     0.525     21.414      -
    AOI1_0_Y                                                           Net         -           -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                        DFN1P0      D           In      -         21.736      -
    ===================================================================================================================================
    Total path delay (propagation time + setup) of 22.275 is 10.985(49.3%) logic and 11.290(50.7%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 5:
          Requested Period:                      10.000
        - Setup time:                            0.539
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         9.461

        - Propagation time:                      21.710
        - Clock delay at starting point:         0.000 (ideal)
        - Estimated clock delay at start point:  -0.000
        = Slack (non-critical) :                 -12.249

        Number of logic level(s):                16
        Starting point:                          DSP_Coprocessor_MSS_0.MSS_ADLIB_INST / MSSPADDR[11]
        Ending point:                            Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY / D
        The start point is clocked by            System [rising]
        The end   point is clocked by            DSP_Coprocessor|DSP_Coprocessor_MSS_0.MSS_CCC_0.DSP_Coprocessor_MSS_0_FAB_CLK_inferred_clock [rising] on pin CLK

    Instance / Net                                                                   Pin              Pin               Arrival     No. of
    Name                                                                 Type        Name             Dir     Delay     Time        Fan Out(s)
    ------------------------------------------------------------------------------------------------------------------------------------------
    DSP_Coprocessor_MSS_0.MSS_ADLIB_INST                                 MSS_APB     MSSPADDR[11]     Out     0.000     0.000       -
    CoreAPB3_0_APBmslave0_PADDR_\[11\]                                   Net         -                -       0.322     -           1
    CoreAPB3_0.CAPB3O11_1[0]                                             NOR2        B                In      -         0.322       -
    CoreAPB3_0.CAPB3O11_1[0]                                             NOR2        Y                Out     0.646     0.968       -
    CAPB3O11_1[0]                                                        Net         -                -       0.322     -           1
    CoreAPB3_0.CAPB3O11[0]                                               NOR2B       B                In      -         1.290       -
    CoreAPB3_0.CAPB3O11[0]                                               NOR2B       Y                Out     0.516     1.806       -
    CoreAPB3_0_APBmslave0_PSELx                                          Net         -                -       2.353     -           20
    Aapb_int_fft_0.un1_fifo_rd_en_1                                      OR2B        A                In      -         4.159       -
    Aapb_int_fft_0.un1_fifo_rd_en_1                                      OR2B        Y                Out     0.488     4.647       -
    un1_fifo_rd_en_1                                                     Net         -                -       0.806     -           3
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                   OR3         B                In      -         5.454       -
    Aapb_int_fft_0.PENABLE_reg_RNI4HTI                                   OR3         Y                Out     0.714     6.168       -
    N_2                                                                  Net         -                -       1.184     -           4
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A       B                In      -         7.351       -
    Aapb_int_fft_0.fifo64X16_inst.NAND2_1_RNIH1DP                        NOR2A       Y                Out     0.407     7.758       -
    MEMORYRE                                                             Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2        B                In      -         8.144       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_RADDR_0_inst_RNIHHLS        XOR2        Y                Out     0.937     9.081       -
    RBINNXTSHIFT_0_net                                                   Net         -                -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A        A                In      -         9.887       -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_0_inst_RNIM1UV_0      OR2A        Y                Out     0.537     10.424      -
    N_1_4                                                                Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13        A                In      -         10.810      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_1_inst_RNI6S372_0     AO13        Y                Out     1.062     11.872      -
    OR3_1_Y_0                                                            Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13        B                In      -         12.258      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNII6UQ3_0     AO13        Y                Out     0.933     13.191      -
    AO1_3_Y_0                                                            Net         -                -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A       A                In      -         13.997      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_2_inst_RNI74AF8       NOR3A       Y                Out     0.641     14.639      -
    N_1_13                                                               Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B        A                In      -         15.024      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_4_inst_RNIB6Q3G       OA1B        Y                Out     0.652     15.676      -
    N_1_8                                                                Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D        B                In      -         15.998      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1C0_MEM_WADDR_5_inst_RNITLCOM       AX1D        Y                Out     0.992     16.990      -
    RDIFF_6_net                                                          Net         -                -       0.806     -           3
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A        B                In      -         17.796      -
    Aapb_int_fft_0.fifo64X16_inst.OR2A_1                                 OR2A        Y                Out     0.646     18.443      -
    OR2A_1_Y                                                             Net         -                -       0.386     -           2
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                                NOR3A       A                In      -         18.828      -
    Aapb_int_fft_0.fifo64X16_inst.NOR3A_0                                NOR3A       Y                Out     0.641     19.470      -
    NOR3A_0_Y                                                            Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A      A                In      -         19.791      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO_1                    NAND3A      Y                Out     0.751     20.542      -
    NAND3A_3_Y_0                                                         Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1        C                In      -         20.864      -
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY_RNO                      AOI1        Y                Out     0.525     21.388      -
    AOI1_0_Y                                                             Net         -                -       0.322     -           1
    Aapb_int_fft_0.fifo64X16_inst.DFN1P0_AEMPTY                          DFN1P0      D                In      -         21.710      -
    ==========================================================================================================================================
    Total path delay (propagation time + setup) of 22.249 is 11.628(52.3%) logic and 10.621(47.7%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    ##### END OF TIMING REPORT #####]

    --------------------------------------------------------------------------------
    Target Part: A2F500M3G_Std
    Report for cell DSP_Coprocessor.verilog
      Core Cell usage:
                  cell count     area count*area
                  AND2   298      1.0      298.0
                 AND2A    13      1.0       13.0
                  AND3    45      1.0       45.0
                   AO1   138      1.0      138.0
                  AO12     1      1.0        1.0
                  AO13    12      1.0       12.0
                  AO14     1      1.0        1.0
                  AO15     1      1.0        1.0
                  AO18     7      1.0        7.0
                  AO1A     2      1.0        2.0
                  AO1B    16      1.0       16.0
                  AO1C    20      1.0       20.0
                  AO1D     3      1.0        3.0
                  AOI1    24      1.0       24.0
                 AOI1B     4      1.0        4.0
                  AOI5     2      1.0        2.0
                   AX1     3      1.0        3.0
                  AX1A     3      1.0        3.0
                  AX1B     6      1.0        6.0
                  AX1C    17      1.0       17.0
                  AX1D    16      1.0       16.0
                  AX1E     4      1.0        4.0
                  AXO2     1      1.0        1.0
                  AXO3     1      1.0        1.0
                  AXO5     1      1.0        1.0
                  AXO7     1      1.0        1.0
                 AXOI1     1      1.0        1.0
                 AXOI2     1      1.0        1.0
                 AXOI4     3      1.0        3.0
                 AXOI5     3      1.0        3.0
                  BUFF   103      1.0      103.0
                CLKINT     3      0.0        0.0
                   GND    63      0.0        0.0
                   INV     8      1.0        8.0
                  MAJ3    72      1.0       72.0
                  MIN3     7      1.0        7.0
                MSSINT     4      0.0        0.0
               MSS_APB     1      0.0        0.0
               MSS_CCC     1      0.0        0.0
                   MX2   388      1.0      388.0
                  MX2A    12      1.0       12.0
                  MX2B     9      1.0        9.0
                  MX2C    77      1.0       77.0
                 NAND2     2      1.0        2.0
                NAND3A     3      1.0        3.0
                  NOR2    63      1.0       63.0
                 NOR2A    45      1.0       45.0
                 NOR2B    89      1.0       89.0
                  NOR3     7      1.0        7.0
                 NOR3A    19      1.0       19.0
                 NOR3B    11      1.0       11.0
                 NOR3C    13      1.0       13.0
                   OA1     4      1.0        4.0
                  OA1A     2      1.0        2.0
                  OA1B     5      1.0        5.0
                  OA1C     4      1.0        4.0
                  OAI1     5      1.0        5.0
                   OR2     9      1.0        9.0
                  OR2A    29      1.0       29.0
                  OR2B    19      1.0       19.0
                   OR3    19      1.0       19.0
                  OR3A     5      1.0        5.0
                  OR3B     7      1.0        7.0
                  OR3C     9      1.0        9.0
                 RCOSC     1      0.0        0.0
                   VCC    63      0.0        0.0
                   XA1     8      1.0        8.0
                  XA1A     8      1.0        8.0
                  XA1B    16      1.0       16.0
                  XA1C     3      1.0        3.0
                 XNOR2    84      1.0       84.0
                 XNOR3     6      1.0        6.0
                  XO1A     1      1.0        1.0
                  XOR2   442      1.0      442.0
                  XOR3    72      1.0       72.0

                DFI1C0     2      1.0        2.0
                DFI1P0     1      1.0        1.0
                  DFN1   831      1.0      831.0
                DFN1C0    71      1.0       71.0
              DFN1E0C0    31      1.0       31.0
                DFN1E1     4      1.0        4.0
              DFN1E1C0    28      1.0       28.0
              DFN1E1P0     1      1.0        1.0
                DFN1P0     8      1.0        8.0
             RAM512X18     8      0.0        0.0
                       -----          ----------
                 TOTAL  3454              3310.0

      IO Cell usage:
                  cell count
             INBUF_MSS     2
            OUTBUF_MSS     1
                       -----
                 TOTAL     3

    Core Cells         : 3310 of 11520 (29%)
    IO Cells           : 3 of 128 (2%)

      RAM/ROM Usage Summary
    Block Rams : 8 of 24 (33%)

    Mapper successful!
    Process took 0h:00m:32s realtime, 0h:00m:14s cputime
    # Mon Aug 23 16:15:36 2010

    ###########################################################]

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