# (OPEN DESIGN)

open_design "C:/A2F_AC355_DF/A2F200/Verilog/DSP_Coprocessor/designer/impl1/DSP_Coprocessor.adb"
export -format "FDB" {C:/A2F_AC355_DF/A2F200/Verilog/DSP_Coprocessor/designer/impl1/DSP_Coprocessor.fdb}

save_design "C:/A2F_AC355_DF/A2F200/Verilog/DSP_Coprocessor/designer/impl1/DSP_Coprocessor.adb"

