-- Version: 10.0 10.0.9.37

library ieee;
use ieee.std_logic_1164.all;
library smartfusion;
use smartfusion.all;

entity MSS_Waveform is

    port( FAB_CLK     : out   std_logic;
          MAINXIN     : in    std_logic;
          FABPSEL     : in    std_logic;
          FABPENABLE  : in    std_logic;
          FABPWRITE   : in    std_logic;
          FABPREADY   : out   std_logic;
          FABPSLVERR  : out   std_logic;
          M2F_RESET_N : out   std_logic;
          FABPADDR    : in    std_logic_vector(31 downto 0);
          FABPRDATA   : out   std_logic_vector(31 downto 0);
          FABPWDATA   : in    std_logic_vector(31 downto 0);
          SDD_0       : out   std_logic;
          VAREF0      : in    std_logic;
          MSS_RESET_N : in    std_logic
        );

end MSS_Waveform;

architecture DEF_ARCH of MSS_Waveform is 

  component INBUF_MSS
    generic (ACT_CONFIG:integer := 0; ACT_PIN:string := "");

    port( PAD : in    std_logic := 'U';
          Y   : out   std_logic
        );
  end component;

  component OUTBUF_A
    port( D   : in    std_logic := 'U';
          PAD : out   std_logic
        );
  end component;

  component VCC
    port( Y : out   std_logic
        );
  end component;

  component MSS_Waveform_tmp_MSS_CCC_0_MSS_CCC
    port( CLKA           : in    std_logic := 'U';
          CLKA_PAD       : in    std_logic := 'U';
          CLKA_PADP      : in    std_logic := 'U';
          CLKA_PADN      : in    std_logic := 'U';
          CLKB           : in    std_logic := 'U';
          CLKB_PAD       : in    std_logic := 'U';
          CLKB_PADP      : in    std_logic := 'U';
          CLKB_PADN      : in    std_logic := 'U';
          CLKC           : in    std_logic := 'U';
          CLKC_PAD       : in    std_logic := 'U';
          CLKC_PADP      : in    std_logic := 'U';
          CLKC_PADN      : in    std_logic := 'U';
          GLA            : out   std_logic;
          GLB            : out   std_logic;
          GLC            : out   std_logic;
          FAB_CLK        : out   std_logic;
          YB             : out   std_logic;
          YC             : out   std_logic;
          MAINXIN        : in    std_logic := 'U';
          LPXIN          : in    std_logic := 'U';
          FAB_LOCK       : out   std_logic;
          MAC_CLK        : in    std_logic := 'U';
          RCOSC_CLKOUT   : out   std_logic;
          MAINXIN_CLKOUT : out   std_logic;
          LPXIN_CLKOUT   : out   std_logic;
          GLA0           : out   std_logic;
          MSS_LOCK       : out   std_logic;
          MAC_CLK_CCC    : out   std_logic;
          MAC_CLK_IO     : out   std_logic
        );
  end component;

  component MSS_APB
    generic (ACT_CONFIG:integer := 0; ACT_DIE:string := ""; 
        ACT_FCLK:integer := 0; ACT_PKG:string := "");

    port( MSSPADDR       : out   std_logic_vector(19 downto 0);
          MSSPWDATA      : out   std_logic_vector(31 downto 0);
          MSSPWRITE      : out   std_logic;
          MSSPSEL        : out   std_logic;
          MSSPENABLE     : out   std_logic;
          MSSPRDATA      : in    std_logic_vector(31 downto 0) := (others => 'U');
          MSSPREADY      : in    std_logic := 'U';
          MSSPSLVERR     : in    std_logic := 'U';
          FABPADDR       : in    std_logic_vector(31 downto 0) := (others => 'U');
          FABPWDATA      : in    std_logic_vector(31 downto 0) := (others => 'U');
          FABPWRITE      : in    std_logic := 'U';
          FABPSEL        : in    std_logic := 'U';
          FABPENABLE     : in    std_logic := 'U';
          FABPRDATA      : out   std_logic_vector(31 downto 0);
          FABPREADY      : out   std_logic;
          FABPSLVERR     : out   std_logic;
          SYNCCLKFDBK    : in    std_logic := 'U';
          CALIBOUT       : out   std_logic;
          CALIBIN        : in    std_logic := 'U';
          FABINT         : in    std_logic := 'U';
          MSSINT         : out   std_logic_vector(7 downto 0);
          WDINT          : out   std_logic;
          F2MRESETn      : in    std_logic := 'U';
          DMAREADY       : in    std_logic_vector(1 downto 0) := (others => 'U');
          RXEV           : in    std_logic := 'U';
          VRON           : in    std_logic := 'U';
          M2FRESETn      : out   std_logic;
          DEEPSLEEP      : out   std_logic;
          SLEEP          : out   std_logic;
          TXEV           : out   std_logic;
          GPI            : in    std_logic_vector(31 downto 0) := (others => 'U');
          GPO            : out   std_logic_vector(31 downto 0);
          UART0CTSn      : in    std_logic := 'U';
          UART0DSRn      : in    std_logic := 'U';
          UART0RIn       : in    std_logic := 'U';
          UART0DCDn      : in    std_logic := 'U';
          UART0RTSn      : out   std_logic;
          UART0DTRn      : out   std_logic;
          UART1CTSn      : in    std_logic := 'U';
          UART1DSRn      : in    std_logic := 'U';
          UART1RIn       : in    std_logic := 'U';
          UART1DCDn      : in    std_logic := 'U';
          UART1RTSn      : out   std_logic;
          UART1DTRn      : out   std_logic;
          I2C0SMBUSNI    : in    std_logic := 'U';
          I2C0SMBALERTNI : in    std_logic := 'U';
          I2C0BCLK       : in    std_logic := 'U';
          I2C0SMBUSNO    : out   std_logic;
          I2C0SMBALERTNO : out   std_logic;
          I2C1SMBUSNI    : in    std_logic := 'U';
          I2C1SMBALERTNI : in    std_logic := 'U';
          I2C1BCLK       : in    std_logic := 'U';
          I2C1SMBUSNO    : out   std_logic;
          I2C1SMBALERTNO : out   std_logic;
          MACM2FTXD      : out   std_logic_vector(1 downto 0);
          MACF2MRXD      : in    std_logic_vector(1 downto 0) := (others => 'U');
          MACM2FTXEN     : out   std_logic;
          MACF2MCRSDV    : in    std_logic := 'U';
          MACF2MRXER     : in    std_logic := 'U';
          MACF2MMDI      : in    std_logic := 'U';
          MACM2FMDO      : out   std_logic;
          MACM2FMDEN     : out   std_logic;
          MACM2FMDC      : out   std_logic;
          FABSDD0D       : in    std_logic := 'U';
          FABSDD1D       : in    std_logic := 'U';
          FABSDD2D       : in    std_logic := 'U';
          FABSDD0CLK     : in    std_logic := 'U';
          FABSDD1CLK     : in    std_logic := 'U';
          FABSDD2CLK     : in    std_logic := 'U';
          FABACETRIG     : in    std_logic := 'U';
          ACEFLAGS       : out   std_logic_vector(31 downto 0);
          CMP0           : out   std_logic;
          CMP1           : out   std_logic;
          CMP2           : out   std_logic;
          CMP3           : out   std_logic;
          CMP4           : out   std_logic;
          CMP5           : out   std_logic;
          CMP6           : out   std_logic;
          CMP7           : out   std_logic;
          CMP8           : out   std_logic;
          CMP9           : out   std_logic;
          CMP10          : out   std_logic;
          CMP11          : out   std_logic;
          LVTTL0EN       : in    std_logic := 'U';
          LVTTL1EN       : in    std_logic := 'U';
          LVTTL2EN       : in    std_logic := 'U';
          LVTTL3EN       : in    std_logic := 'U';
          LVTTL4EN       : in    std_logic := 'U';
          LVTTL5EN       : in    std_logic := 'U';
          LVTTL6EN       : in    std_logic := 'U';
          LVTTL7EN       : in    std_logic := 'U';
          LVTTL8EN       : in    std_logic := 'U';
          LVTTL9EN       : in    std_logic := 'U';
          LVTTL10EN      : in    std_logic := 'U';
          LVTTL11EN      : in    std_logic := 'U';
          LVTTL0         : out   std_logic;
          LVTTL1         : out   std_logic;
          LVTTL2         : out   std_logic;
          LVTTL3         : out   std_logic;
          LVTTL4         : out   std_logic;
          LVTTL5         : out   std_logic;
          LVTTL6         : out   std_logic;
          LVTTL7         : out   std_logic;
          LVTTL8         : out   std_logic;
          LVTTL9         : out   std_logic;
          LVTTL10        : out   std_logic;
          LVTTL11        : out   std_logic;
          PUFABn         : out   std_logic;
          VCC15GOOD      : out   std_logic;
          VCC33GOOD      : out   std_logic;
          FCLK           : in    std_logic := 'U';
          MACCLKCCC      : in    std_logic := 'U';
          RCOSC          : in    std_logic := 'U';
          MACCLK         : in    std_logic := 'U';
          PLLLOCK        : in    std_logic := 'U';
          MSSRESETn      : in    std_logic := 'U';
          GPOE           : out   std_logic_vector(31 downto 0);
          SPI0DO         : out   std_logic;
          SPI0DOE        : out   std_logic;
          SPI0DI         : in    std_logic := 'U';
          SPI0CLKI       : in    std_logic := 'U';
          SPI0CLKO       : out   std_logic;
          SPI0MODE       : out   std_logic;
          SPI0SSI        : in    std_logic := 'U';
          SPI0SSO        : out   std_logic_vector(7 downto 0);
          UART0TXD       : out   std_logic;
          UART0RXD       : in    std_logic := 'U';
          I2C0SDAI       : in    std_logic := 'U';
          I2C0SDAO       : out   std_logic;
          I2C0SCLI       : in    std_logic := 'U';
          I2C0SCLO       : out   std_logic;
          SPI1DO         : out   std_logic;
          SPI1DOE        : out   std_logic;
          SPI1DI         : in    std_logic := 'U';
          SPI1CLKI       : in    std_logic := 'U';
          SPI1CLKO       : out   std_logic;
          SPI1MODE       : out   std_logic;
          SPI1SSI        : in    std_logic := 'U';
          SPI1SSO        : out   std_logic_vector(7 downto 0);
          UART1TXD       : out   std_logic;
          UART1RXD       : in    std_logic := 'U';
          I2C1SDAI       : in    std_logic := 'U';
          I2C1SDAO       : out   std_logic;
          I2C1SCLI       : in    std_logic := 'U';
          I2C1SCLO       : out   std_logic;
          MACTXD         : out   std_logic_vector(1 downto 0);
          MACRXD         : in    std_logic_vector(1 downto 0) := (others => 'U');
          MACTXEN        : out   std_logic;
          MACCRSDV       : in    std_logic := 'U';
          MACRXER        : in    std_logic := 'U';
          MACMDI         : in    std_logic := 'U';
          MACMDO         : out   std_logic;
          MACMDEN        : out   std_logic;
          MACMDC         : out   std_logic;
          EMCCLK         : out   std_logic;
          EMCCLKRTN      : in    std_logic := 'U';
          EMCRDB         : in    std_logic_vector(15 downto 0) := (others => 'U');
          EMCAB          : out   std_logic_vector(25 downto 0);
          EMCWDB         : out   std_logic_vector(15 downto 0);
          EMCRWn         : out   std_logic;
          EMCCS0n        : out   std_logic;
          EMCCS1n        : out   std_logic;
          EMCOEN0n       : out   std_logic;
          EMCOEN1n       : out   std_logic;
          EMCBYTEN       : out   std_logic_vector(1 downto 0);
          EMCDBOE        : out   std_logic;
          ADC0           : in    std_logic := 'U';
          ADC1           : in    std_logic := 'U';
          ADC2           : in    std_logic := 'U';
          ADC3           : in    std_logic := 'U';
          ADC4           : in    std_logic := 'U';
          ADC5           : in    std_logic := 'U';
          ADC6           : in    std_logic := 'U';
          ADC7           : in    std_logic := 'U';
          ADC8           : in    std_logic := 'U';
          ADC9           : in    std_logic := 'U';
          ADC10          : in    std_logic := 'U';
          ADC11          : in    std_logic := 'U';
          SDD0           : out   std_logic;
          SDD1           : out   std_logic;
          SDD2           : out   std_logic;
          ABPS0          : in    std_logic := 'U';
          ABPS1          : in    std_logic := 'U';
          ABPS2          : in    std_logic := 'U';
          ABPS3          : in    std_logic := 'U';
          ABPS4          : in    std_logic := 'U';
          ABPS5          : in    std_logic := 'U';
          ABPS6          : in    std_logic := 'U';
          ABPS7          : in    std_logic := 'U';
          ABPS8          : in    std_logic := 'U';
          ABPS9          : in    std_logic := 'U';
          ABPS10         : in    std_logic := 'U';
          ABPS11         : in    std_logic := 'U';
          TM0            : in    std_logic := 'U';
          TM1            : in    std_logic := 'U';
          TM2            : in    std_logic := 'U';
          TM3            : in    std_logic := 'U';
          TM4            : in    std_logic := 'U';
          TM5            : in    std_logic := 'U';
          CM0            : in    std_logic := 'U';
          CM1            : in    std_logic := 'U';
          CM2            : in    std_logic := 'U';
          CM3            : in    std_logic := 'U';
          CM4            : in    std_logic := 'U';
          CM5            : in    std_logic := 'U';
          GNDTM0         : in    std_logic := 'U';
          GNDTM1         : in    std_logic := 'U';
          GNDTM2         : in    std_logic := 'U';
          VAREF0         : in    std_logic := 'U';
          VAREF1         : in    std_logic := 'U';
          VAREF2         : in    std_logic := 'U';
          VAREFOUT       : out   std_logic;
          GNDVAREF       : in    std_logic := 'U';
          PUn            : in    std_logic := 'U'
        );
  end component;

  component GND
    port( Y : out   std_logic
        );
  end component;

  component INBUF_A
    port( PAD : in    std_logic := 'U';
          Y   : out   std_logic
        );
  end component;

    signal MSS_ACE_0_SDD0_D, MSS_ACE_0_VAREF0_Y, 
        MSS_ADLIB_INST_EMCCLK, MSS_ADLIB_INST_FCLK, 
        MSS_ADLIB_INST_MACCLK, MSS_ADLIB_INST_MACCLKCCC, 
        MSS_ADLIB_INST_PLLLOCK, MSS_ADLIB_INST_SYNCCLKFDBK, 
        MSS_RESET_0_MSS_RESET_N_Y, GND_net, VCC_net : std_logic;
    signal nc203, nc216, nc194, nc151, nc23, nc175, nc58, nc116, 
        nc74, nc133, nc167, nc84, nc39, nc72, nc212, nc205, nc82, 
        nc145, nc181, nc160, nc57, nc156, nc125, nc211, nc73, 
        nc107, nc66, nc83, nc9, nc171, nc54, nc135, nc41, nc100, 
        nc52, nc186, nc29, nc118, nc60, nc141, nc193, nc214, nc45, 
        nc53, nc121, nc176, nc220, nc158, nc209, nc162, nc11, 
        nc131, nc96, nc79, nc146, nc89, nc119, nc48, nc213, nc126, 
        nc195, nc188, nc15, nc102, nc3, nc207, nc47, nc90, nc159, 
        nc136, nc178, nc215, nc59, nc18, nc44, nc117, nc189, 
        nc164, nc148, nc42, nc191, nc17, nc2, nc110, nc128, nc43, 
        nc179, nc157, nc36, nc61, nc104, nc138, nc14, nc150, 
        nc196, nc149, nc12, nc219, nc30, nc187, nc65, nc7, nc129, 
        nc8, nc13, nc180, nc26, nc177, nc139, nc163, nc112, nc68, 
        nc49, nc217, nc170, nc91, nc5, nc20, nc198, nc147, nc67, 
        nc152, nc127, nc103, nc76, nc208, nc140, nc86, nc95, 
        nc120, nc165, nc137, nc64, nc19, nc70, nc182, nc62, nc199, 
        nc80, nc130, nc98, nc114, nc56, nc105, nc63, nc172, nc97, 
        nc161, nc31, nc154, nc50, nc142, nc94, nc197, nc122, nc35, 
        nc4, nc92, nc101, nc184, nc200, nc190, nc166, nc132, nc21, 
        nc93, nc69, nc206, nc174, nc38, nc113, nc218, nc106, nc25, 
        nc1, nc37, nc202, nc144, nc153, nc46, nc71, nc124, nc81, 
        nc201, nc168, nc34, nc28, nc115, nc192, nc134, nc32, nc40, 
        nc99, nc75, nc183, nc85, nc27, nc108, nc16, nc155, nc51, 
        nc33, nc204, nc173, nc169, nc78, nc24, nc88, nc111, nc55, 
        nc10, nc22, nc210, nc185, nc143, nc77, nc6, nc109, nc87, 
        nc123 : std_logic;

begin 

    FAB_CLK <= MSS_ADLIB_INST_SYNCCLKFDBK;

    MSS_RESET_0_MSS_RESET_N : INBUF_MSS
      generic map(ACT_CONFIG => 0, ACT_PIN => "R1")

      port map(PAD => MSS_RESET_N, Y => MSS_RESET_0_MSS_RESET_N_Y);
    
    MSS_ACE_0_SDD0 : OUTBUF_A
      port map(D => MSS_ACE_0_SDD0_D, PAD => SDD_0);
    
    \VCC\ : VCC
      port map(Y => VCC_net);
    
    MSS_CCC_0 : MSS_Waveform_tmp_MSS_CCC_0_MSS_CCC
      port map(CLKA => GND_net, CLKA_PAD => GND_net, CLKA_PADP
         => GND_net, CLKA_PADN => GND_net, CLKB => GND_net, 
        CLKB_PAD => GND_net, CLKB_PADP => GND_net, CLKB_PADN => 
        GND_net, CLKC => GND_net, CLKC_PAD => GND_net, CLKC_PADP
         => GND_net, CLKC_PADN => GND_net, GLA => OPEN, GLB => 
        OPEN, GLC => OPEN, FAB_CLK => MSS_ADLIB_INST_SYNCCLKFDBK, 
        YB => OPEN, YC => OPEN, MAINXIN => MAINXIN, LPXIN => 
        GND_net, FAB_LOCK => OPEN, MAC_CLK => GND_net, 
        RCOSC_CLKOUT => OPEN, MAINXIN_CLKOUT => OPEN, 
        LPXIN_CLKOUT => OPEN, GLA0 => MSS_ADLIB_INST_FCLK, 
        MSS_LOCK => MSS_ADLIB_INST_PLLLOCK, MAC_CLK_CCC => 
        MSS_ADLIB_INST_MACCLKCCC, MAC_CLK_IO => 
        MSS_ADLIB_INST_MACCLK);
    
    MSS_ADLIB_INST : MSS_APB
      generic map(ACT_CONFIG => 256, ACT_DIE => "IP4X3M1",
         ACT_FCLK => 80000000, ACT_PKG => "fg484")

      port map(MSSPADDR(19) => nc203, MSSPADDR(18) => nc216, 
        MSSPADDR(17) => nc194, MSSPADDR(16) => nc151, 
        MSSPADDR(15) => nc23, MSSPADDR(14) => nc175, MSSPADDR(13)
         => nc58, MSSPADDR(12) => nc116, MSSPADDR(11) => nc74, 
        MSSPADDR(10) => nc133, MSSPADDR(9) => nc167, MSSPADDR(8)
         => nc84, MSSPADDR(7) => nc39, MSSPADDR(6) => nc72, 
        MSSPADDR(5) => nc212, MSSPADDR(4) => nc205, MSSPADDR(3)
         => nc82, MSSPADDR(2) => nc145, MSSPADDR(1) => nc181, 
        MSSPADDR(0) => nc160, MSSPWDATA(31) => nc57, 
        MSSPWDATA(30) => nc156, MSSPWDATA(29) => nc125, 
        MSSPWDATA(28) => nc211, MSSPWDATA(27) => nc73, 
        MSSPWDATA(26) => nc107, MSSPWDATA(25) => nc66, 
        MSSPWDATA(24) => nc83, MSSPWDATA(23) => nc9, 
        MSSPWDATA(22) => nc171, MSSPWDATA(21) => nc54, 
        MSSPWDATA(20) => nc135, MSSPWDATA(19) => nc41, 
        MSSPWDATA(18) => nc100, MSSPWDATA(17) => nc52, 
        MSSPWDATA(16) => nc186, MSSPWDATA(15) => nc29, 
        MSSPWDATA(14) => nc118, MSSPWDATA(13) => nc60, 
        MSSPWDATA(12) => nc141, MSSPWDATA(11) => nc193, 
        MSSPWDATA(10) => nc214, MSSPWDATA(9) => nc45, 
        MSSPWDATA(8) => nc53, MSSPWDATA(7) => nc121, MSSPWDATA(6)
         => nc176, MSSPWDATA(5) => nc220, MSSPWDATA(4) => nc158, 
        MSSPWDATA(3) => nc209, MSSPWDATA(2) => nc162, 
        MSSPWDATA(1) => nc11, MSSPWDATA(0) => nc131, MSSPWRITE
         => OPEN, MSSPSEL => OPEN, MSSPENABLE => OPEN, 
        MSSPRDATA(31) => GND_net, MSSPRDATA(30) => GND_net, 
        MSSPRDATA(29) => GND_net, MSSPRDATA(28) => GND_net, 
        MSSPRDATA(27) => GND_net, MSSPRDATA(26) => GND_net, 
        MSSPRDATA(25) => GND_net, MSSPRDATA(24) => GND_net, 
        MSSPRDATA(23) => GND_net, MSSPRDATA(22) => GND_net, 
        MSSPRDATA(21) => GND_net, MSSPRDATA(20) => GND_net, 
        MSSPRDATA(19) => GND_net, MSSPRDATA(18) => GND_net, 
        MSSPRDATA(17) => GND_net, MSSPRDATA(16) => GND_net, 
        MSSPRDATA(15) => GND_net, MSSPRDATA(14) => GND_net, 
        MSSPRDATA(13) => GND_net, MSSPRDATA(12) => GND_net, 
        MSSPRDATA(11) => GND_net, MSSPRDATA(10) => GND_net, 
        MSSPRDATA(9) => GND_net, MSSPRDATA(8) => GND_net, 
        MSSPRDATA(7) => GND_net, MSSPRDATA(6) => GND_net, 
        MSSPRDATA(5) => GND_net, MSSPRDATA(4) => GND_net, 
        MSSPRDATA(3) => GND_net, MSSPRDATA(2) => GND_net, 
        MSSPRDATA(1) => GND_net, MSSPRDATA(0) => GND_net, 
        MSSPREADY => VCC_net, MSSPSLVERR => GND_net, FABPADDR(31)
         => FABPADDR(31), FABPADDR(30) => FABPADDR(30), 
        FABPADDR(29) => FABPADDR(29), FABPADDR(28) => 
        FABPADDR(28), FABPADDR(27) => FABPADDR(27), FABPADDR(26)
         => FABPADDR(26), FABPADDR(25) => FABPADDR(25), 
        FABPADDR(24) => FABPADDR(24), FABPADDR(23) => 
        FABPADDR(23), FABPADDR(22) => FABPADDR(22), FABPADDR(21)
         => FABPADDR(21), FABPADDR(20) => FABPADDR(20), 
        FABPADDR(19) => FABPADDR(19), FABPADDR(18) => 
        FABPADDR(18), FABPADDR(17) => FABPADDR(17), FABPADDR(16)
         => FABPADDR(16), FABPADDR(15) => FABPADDR(15), 
        FABPADDR(14) => FABPADDR(14), FABPADDR(13) => 
        FABPADDR(13), FABPADDR(12) => FABPADDR(12), FABPADDR(11)
         => FABPADDR(11), FABPADDR(10) => FABPADDR(10), 
        FABPADDR(9) => FABPADDR(9), FABPADDR(8) => FABPADDR(8), 
        FABPADDR(7) => FABPADDR(7), FABPADDR(6) => FABPADDR(6), 
        FABPADDR(5) => FABPADDR(5), FABPADDR(4) => FABPADDR(4), 
        FABPADDR(3) => FABPADDR(3), FABPADDR(2) => FABPADDR(2), 
        FABPADDR(1) => FABPADDR(1), FABPADDR(0) => FABPADDR(0), 
        FABPWDATA(31) => FABPWDATA(31), FABPWDATA(30) => 
        FABPWDATA(30), FABPWDATA(29) => FABPWDATA(29), 
        FABPWDATA(28) => FABPWDATA(28), FABPWDATA(27) => 
        FABPWDATA(27), FABPWDATA(26) => FABPWDATA(26), 
        FABPWDATA(25) => FABPWDATA(25), FABPWDATA(24) => 
        FABPWDATA(24), FABPWDATA(23) => FABPWDATA(23), 
        FABPWDATA(22) => FABPWDATA(22), FABPWDATA(21) => 
        FABPWDATA(21), FABPWDATA(20) => FABPWDATA(20), 
        FABPWDATA(19) => FABPWDATA(19), FABPWDATA(18) => 
        FABPWDATA(18), FABPWDATA(17) => FABPWDATA(17), 
        FABPWDATA(16) => FABPWDATA(16), FABPWDATA(15) => 
        FABPWDATA(15), FABPWDATA(14) => FABPWDATA(14), 
        FABPWDATA(13) => FABPWDATA(13), FABPWDATA(12) => 
        FABPWDATA(12), FABPWDATA(11) => FABPWDATA(11), 
        FABPWDATA(10) => FABPWDATA(10), FABPWDATA(9) => 
        FABPWDATA(9), FABPWDATA(8) => FABPWDATA(8), FABPWDATA(7)
         => FABPWDATA(7), FABPWDATA(6) => FABPWDATA(6), 
        FABPWDATA(5) => FABPWDATA(5), FABPWDATA(4) => 
        FABPWDATA(4), FABPWDATA(3) => FABPWDATA(3), FABPWDATA(2)
         => FABPWDATA(2), FABPWDATA(1) => FABPWDATA(1), 
        FABPWDATA(0) => FABPWDATA(0), FABPWRITE => FABPWRITE, 
        FABPSEL => FABPSEL, FABPENABLE => FABPENABLE, 
        FABPRDATA(31) => FABPRDATA(31), FABPRDATA(30) => 
        FABPRDATA(30), FABPRDATA(29) => FABPRDATA(29), 
        FABPRDATA(28) => FABPRDATA(28), FABPRDATA(27) => 
        FABPRDATA(27), FABPRDATA(26) => FABPRDATA(26), 
        FABPRDATA(25) => FABPRDATA(25), FABPRDATA(24) => 
        FABPRDATA(24), FABPRDATA(23) => FABPRDATA(23), 
        FABPRDATA(22) => FABPRDATA(22), FABPRDATA(21) => 
        FABPRDATA(21), FABPRDATA(20) => FABPRDATA(20), 
        FABPRDATA(19) => FABPRDATA(19), FABPRDATA(18) => 
        FABPRDATA(18), FABPRDATA(17) => FABPRDATA(17), 
        FABPRDATA(16) => FABPRDATA(16), FABPRDATA(15) => 
        FABPRDATA(15), FABPRDATA(14) => FABPRDATA(14), 
        FABPRDATA(13) => FABPRDATA(13), FABPRDATA(12) => 
        FABPRDATA(12), FABPRDATA(11) => FABPRDATA(11), 
        FABPRDATA(10) => FABPRDATA(10), FABPRDATA(9) => 
        FABPRDATA(9), FABPRDATA(8) => FABPRDATA(8), FABPRDATA(7)
         => FABPRDATA(7), FABPRDATA(6) => FABPRDATA(6), 
        FABPRDATA(5) => FABPRDATA(5), FABPRDATA(4) => 
        FABPRDATA(4), FABPRDATA(3) => FABPRDATA(3), FABPRDATA(2)
         => FABPRDATA(2), FABPRDATA(1) => FABPRDATA(1), 
        FABPRDATA(0) => FABPRDATA(0), FABPREADY => FABPREADY, 
        FABPSLVERR => FABPSLVERR, SYNCCLKFDBK => 
        MSS_ADLIB_INST_SYNCCLKFDBK, CALIBOUT => OPEN, CALIBIN => 
        GND_net, FABINT => GND_net, MSSINT(7) => nc96, MSSINT(6)
         => nc79, MSSINT(5) => nc146, MSSINT(4) => nc89, 
        MSSINT(3) => nc119, MSSINT(2) => nc48, MSSINT(1) => nc213, 
        MSSINT(0) => nc126, WDINT => OPEN, F2MRESETn => VCC_net, 
        DMAREADY(1) => GND_net, DMAREADY(0) => GND_net, RXEV => 
        GND_net, VRON => GND_net, M2FRESETn => M2F_RESET_N, 
        DEEPSLEEP => OPEN, SLEEP => OPEN, TXEV => OPEN, GPI(31)
         => GND_net, GPI(30) => GND_net, GPI(29) => GND_net, 
        GPI(28) => GND_net, GPI(27) => GND_net, GPI(26) => 
        GND_net, GPI(25) => GND_net, GPI(24) => GND_net, GPI(23)
         => GND_net, GPI(22) => GND_net, GPI(21) => GND_net, 
        GPI(20) => GND_net, GPI(19) => GND_net, GPI(18) => 
        GND_net, GPI(17) => GND_net, GPI(16) => GND_net, GPI(15)
         => GND_net, GPI(14) => GND_net, GPI(13) => GND_net, 
        GPI(12) => GND_net, GPI(11) => GND_net, GPI(10) => 
        GND_net, GPI(9) => GND_net, GPI(8) => GND_net, GPI(7) => 
        GND_net, GPI(6) => GND_net, GPI(5) => GND_net, GPI(4) => 
        GND_net, GPI(3) => GND_net, GPI(2) => GND_net, GPI(1) => 
        GND_net, GPI(0) => GND_net, GPO(31) => nc195, GPO(30) => 
        nc188, GPO(29) => nc15, GPO(28) => nc102, GPO(27) => nc3, 
        GPO(26) => nc207, GPO(25) => nc47, GPO(24) => nc90, 
        GPO(23) => nc159, GPO(22) => nc136, GPO(21) => nc178, 
        GPO(20) => nc215, GPO(19) => nc59, GPO(18) => nc18, 
        GPO(17) => nc44, GPO(16) => nc117, GPO(15) => nc189, 
        GPO(14) => nc164, GPO(13) => nc148, GPO(12) => nc42, 
        GPO(11) => nc191, GPO(10) => nc17, GPO(9) => nc2, GPO(8)
         => nc110, GPO(7) => nc128, GPO(6) => nc43, GPO(5) => 
        nc179, GPO(4) => nc157, GPO(3) => nc36, GPO(2) => nc61, 
        GPO(1) => nc104, GPO(0) => nc138, UART0CTSn => GND_net, 
        UART0DSRn => GND_net, UART0RIn => GND_net, UART0DCDn => 
        GND_net, UART0RTSn => OPEN, UART0DTRn => OPEN, UART1CTSn
         => GND_net, UART1DSRn => GND_net, UART1RIn => GND_net, 
        UART1DCDn => GND_net, UART1RTSn => OPEN, UART1DTRn => 
        OPEN, I2C0SMBUSNI => GND_net, I2C0SMBALERTNI => GND_net, 
        I2C0BCLK => GND_net, I2C0SMBUSNO => OPEN, I2C0SMBALERTNO
         => OPEN, I2C1SMBUSNI => GND_net, I2C1SMBALERTNI => 
        GND_net, I2C1BCLK => GND_net, I2C1SMBUSNO => OPEN, 
        I2C1SMBALERTNO => OPEN, MACM2FTXD(1) => nc14, 
        MACM2FTXD(0) => nc150, MACF2MRXD(1) => GND_net, 
        MACF2MRXD(0) => GND_net, MACM2FTXEN => OPEN, MACF2MCRSDV
         => GND_net, MACF2MRXER => GND_net, MACF2MMDI => GND_net, 
        MACM2FMDO => OPEN, MACM2FMDEN => OPEN, MACM2FMDC => OPEN, 
        FABSDD0D => GND_net, FABSDD1D => GND_net, FABSDD2D => 
        GND_net, FABSDD0CLK => GND_net, FABSDD1CLK => GND_net, 
        FABSDD2CLK => GND_net, FABACETRIG => GND_net, 
        ACEFLAGS(31) => nc196, ACEFLAGS(30) => nc149, 
        ACEFLAGS(29) => nc12, ACEFLAGS(28) => nc219, ACEFLAGS(27)
         => nc30, ACEFLAGS(26) => nc187, ACEFLAGS(25) => nc65, 
        ACEFLAGS(24) => nc7, ACEFLAGS(23) => nc129, ACEFLAGS(22)
         => nc8, ACEFLAGS(21) => nc13, ACEFLAGS(20) => nc180, 
        ACEFLAGS(19) => nc26, ACEFLAGS(18) => nc177, ACEFLAGS(17)
         => nc139, ACEFLAGS(16) => nc163, ACEFLAGS(15) => nc112, 
        ACEFLAGS(14) => nc68, ACEFLAGS(13) => nc49, ACEFLAGS(12)
         => nc217, ACEFLAGS(11) => nc170, ACEFLAGS(10) => nc91, 
        ACEFLAGS(9) => nc5, ACEFLAGS(8) => nc20, ACEFLAGS(7) => 
        nc198, ACEFLAGS(6) => nc147, ACEFLAGS(5) => nc67, 
        ACEFLAGS(4) => nc152, ACEFLAGS(3) => nc127, ACEFLAGS(2)
         => nc103, ACEFLAGS(1) => nc76, ACEFLAGS(0) => nc208, 
        CMP0 => OPEN, CMP1 => OPEN, CMP2 => OPEN, CMP3 => OPEN, 
        CMP4 => OPEN, CMP5 => OPEN, CMP6 => OPEN, CMP7 => OPEN, 
        CMP8 => OPEN, CMP9 => OPEN, CMP10 => OPEN, CMP11 => OPEN, 
        LVTTL0EN => GND_net, LVTTL1EN => GND_net, LVTTL2EN => 
        GND_net, LVTTL3EN => GND_net, LVTTL4EN => GND_net, 
        LVTTL5EN => GND_net, LVTTL6EN => GND_net, LVTTL7EN => 
        GND_net, LVTTL8EN => GND_net, LVTTL9EN => GND_net, 
        LVTTL10EN => GND_net, LVTTL11EN => GND_net, LVTTL0 => 
        OPEN, LVTTL1 => OPEN, LVTTL2 => OPEN, LVTTL3 => OPEN, 
        LVTTL4 => OPEN, LVTTL5 => OPEN, LVTTL6 => OPEN, LVTTL7
         => OPEN, LVTTL8 => OPEN, LVTTL9 => OPEN, LVTTL10 => OPEN, 
        LVTTL11 => OPEN, PUFABn => OPEN, VCC15GOOD => OPEN, 
        VCC33GOOD => OPEN, FCLK => MSS_ADLIB_INST_FCLK, MACCLKCCC
         => MSS_ADLIB_INST_MACCLKCCC, RCOSC => GND_net, MACCLK
         => MSS_ADLIB_INST_MACCLK, PLLLOCK => 
        MSS_ADLIB_INST_PLLLOCK, MSSRESETn => 
        MSS_RESET_0_MSS_RESET_N_Y, GPOE(31) => nc140, GPOE(30)
         => nc86, GPOE(29) => nc95, GPOE(28) => nc120, GPOE(27)
         => nc165, GPOE(26) => nc137, GPOE(25) => nc64, GPOE(24)
         => nc19, GPOE(23) => nc70, GPOE(22) => nc182, GPOE(21)
         => nc62, GPOE(20) => nc199, GPOE(19) => nc80, GPOE(18)
         => nc130, GPOE(17) => nc98, GPOE(16) => nc114, GPOE(15)
         => nc56, GPOE(14) => nc105, GPOE(13) => nc63, GPOE(12)
         => nc172, GPOE(11) => nc97, GPOE(10) => nc161, GPOE(9)
         => nc31, GPOE(8) => nc154, GPOE(7) => nc50, GPOE(6) => 
        nc142, GPOE(5) => nc94, GPOE(4) => nc197, GPOE(3) => 
        nc122, GPOE(2) => nc35, GPOE(1) => nc4, GPOE(0) => nc92, 
        SPI0DO => OPEN, SPI0DOE => OPEN, SPI0DI => GND_net, 
        SPI0CLKI => GND_net, SPI0CLKO => OPEN, SPI0MODE => OPEN, 
        SPI0SSI => GND_net, SPI0SSO(7) => nc101, SPI0SSO(6) => 
        nc184, SPI0SSO(5) => nc200, SPI0SSO(4) => nc190, 
        SPI0SSO(3) => nc166, SPI0SSO(2) => nc132, SPI0SSO(1) => 
        nc21, SPI0SSO(0) => nc93, UART0TXD => OPEN, UART0RXD => 
        GND_net, I2C0SDAI => GND_net, I2C0SDAO => OPEN, I2C0SCLI
         => GND_net, I2C0SCLO => OPEN, SPI1DO => OPEN, SPI1DOE
         => OPEN, SPI1DI => GND_net, SPI1CLKI => GND_net, 
        SPI1CLKO => OPEN, SPI1MODE => OPEN, SPI1SSI => GND_net, 
        SPI1SSO(7) => nc69, SPI1SSO(6) => nc206, SPI1SSO(5) => 
        nc174, SPI1SSO(4) => nc38, SPI1SSO(3) => nc113, 
        SPI1SSO(2) => nc218, SPI1SSO(1) => nc106, SPI1SSO(0) => 
        nc25, UART1TXD => OPEN, UART1RXD => GND_net, I2C1SDAI => 
        GND_net, I2C1SDAO => OPEN, I2C1SCLI => GND_net, I2C1SCLO
         => OPEN, MACTXD(1) => nc1, MACTXD(0) => nc37, MACRXD(1)
         => GND_net, MACRXD(0) => GND_net, MACTXEN => OPEN, 
        MACCRSDV => GND_net, MACRXER => GND_net, MACMDI => 
        GND_net, MACMDO => OPEN, MACMDEN => OPEN, MACMDC => OPEN, 
        EMCCLK => MSS_ADLIB_INST_EMCCLK, EMCCLKRTN => 
        MSS_ADLIB_INST_EMCCLK, EMCRDB(15) => GND_net, EMCRDB(14)
         => GND_net, EMCRDB(13) => GND_net, EMCRDB(12) => GND_net, 
        EMCRDB(11) => GND_net, EMCRDB(10) => GND_net, EMCRDB(9)
         => GND_net, EMCRDB(8) => GND_net, EMCRDB(7) => GND_net, 
        EMCRDB(6) => GND_net, EMCRDB(5) => GND_net, EMCRDB(4) => 
        GND_net, EMCRDB(3) => GND_net, EMCRDB(2) => GND_net, 
        EMCRDB(1) => GND_net, EMCRDB(0) => GND_net, EMCAB(25) => 
        nc202, EMCAB(24) => nc144, EMCAB(23) => nc153, EMCAB(22)
         => nc46, EMCAB(21) => nc71, EMCAB(20) => nc124, 
        EMCAB(19) => nc81, EMCAB(18) => nc201, EMCAB(17) => nc168, 
        EMCAB(16) => nc34, EMCAB(15) => nc28, EMCAB(14) => nc115, 
        EMCAB(13) => nc192, EMCAB(12) => nc134, EMCAB(11) => nc32, 
        EMCAB(10) => nc40, EMCAB(9) => nc99, EMCAB(8) => nc75, 
        EMCAB(7) => nc183, EMCAB(6) => nc85, EMCAB(5) => nc27, 
        EMCAB(4) => nc108, EMCAB(3) => nc16, EMCAB(2) => nc155, 
        EMCAB(1) => nc51, EMCAB(0) => nc33, EMCWDB(15) => nc204, 
        EMCWDB(14) => nc173, EMCWDB(13) => nc169, EMCWDB(12) => 
        nc78, EMCWDB(11) => nc24, EMCWDB(10) => nc88, EMCWDB(9)
         => nc111, EMCWDB(8) => nc55, EMCWDB(7) => nc10, 
        EMCWDB(6) => nc22, EMCWDB(5) => nc210, EMCWDB(4) => nc185, 
        EMCWDB(3) => nc143, EMCWDB(2) => nc77, EMCWDB(1) => nc6, 
        EMCWDB(0) => nc109, EMCRWn => OPEN, EMCCS0n => OPEN, 
        EMCCS1n => OPEN, EMCOEN0n => OPEN, EMCOEN1n => OPEN, 
        EMCBYTEN(1) => nc87, EMCBYTEN(0) => nc123, EMCDBOE => 
        OPEN, ADC0 => GND_net, ADC1 => GND_net, ADC2 => GND_net, 
        ADC3 => GND_net, ADC4 => GND_net, ADC5 => GND_net, ADC6
         => GND_net, ADC7 => GND_net, ADC8 => GND_net, ADC9 => 
        GND_net, ADC10 => GND_net, ADC11 => GND_net, SDD0 => 
        MSS_ACE_0_SDD0_D, SDD1 => OPEN, SDD2 => OPEN, ABPS0 => 
        GND_net, ABPS1 => GND_net, ABPS2 => GND_net, ABPS3 => 
        GND_net, ABPS4 => GND_net, ABPS5 => GND_net, ABPS6 => 
        GND_net, ABPS7 => GND_net, ABPS8 => GND_net, ABPS9 => 
        GND_net, ABPS10 => GND_net, ABPS11 => GND_net, TM0 => 
        GND_net, TM1 => GND_net, TM2 => GND_net, TM3 => GND_net, 
        TM4 => GND_net, TM5 => GND_net, CM0 => GND_net, CM1 => 
        GND_net, CM2 => GND_net, CM3 => GND_net, CM4 => GND_net, 
        CM5 => GND_net, GNDTM0 => GND_net, GNDTM1 => GND_net, 
        GNDTM2 => GND_net, VAREF0 => MSS_ACE_0_VAREF0_Y, VAREF1
         => GND_net, VAREF2 => GND_net, VAREFOUT => OPEN, 
        GNDVAREF => GND_net, PUn => GND_net);
    
    \GND\ : GND
      port map(Y => GND_net);
    
    MSS_ACE_0_VAREF0 : INBUF_A
      port map(PAD => VAREF0, Y => MSS_ACE_0_VAREF0_Y);
    

end DEF_ARCH; 
