`timescale 1ns/100ps
// Copyright 2006 Actel Corporation.  All rights reserved.
// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
// ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
// IN ADVANCE IN WRITING.
// Rev: 2.0  31Oct06 IPB  : Production Release
module
Top_Waveform_COREABC_0_RAM256X8
(
RWCLK
,
RESET
,
WEN
,
REN
,
WADDR
,
RADDR
,
WD
,
RD
)
;
input
RWCLK
;
input
RESET
;
input
WEN
;
input
REN
;
input
[
7
:
0
]
WADDR
;
input
[
7
:
0
]
RADDR
;
input
[
7
:
0
]
WD
;
output
[
7
:
0
]
RD
;
reg
[
7
:
0
]
RD
;
always
@
(
posedge
RWCLK
)
begin
:
ABCI11
integer
ABClI10
;
reg
[
7
:
0
]
RAM
[
0
:
255
]
;
if
(
WEN
==
1
'b
1
)
begin
ABClI10
=
WADDR
;
RAM
[
ABClI10
]
=
WD
;
end
ABClI10
=
RADDR
;
if
(
REN
==
1
'b
1
)
begin
RD
<=
RAM
[
ABClI10
]
;
end
end
endmodule
