Timing Report Min Delay Analysis

SmartTime Version v10.0
Actel Corporation - Actel Designer Software Release v10.0 (Version 10.0.9.37)
Copyright (c) 1989-2011
Date: Mon Dec 26 13:34:46 2011


Design: Loading_Booting_EMC
Family: SmartFusion
Die: A2F500M3G
Package: 484 FBGA
Temperature: COM
Voltage: COM
Speed Grade: -1
Design State: Post-Layout
Data source: Silicon verified
Min Operating Condition: BEST
Max Operating Condition: WORST
Using Enhanced Min Delay Analysis
Scenario for Timing Analysis: Primary


-----------------------------------------------------
SUMMARY

Clock Domain:               mss_aclk
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       N/A
Required Frequency (MHz):   N/A
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               mss_fabric_interface_clock
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       N/A
Required Frequency (MHz):   N/A
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               mss_pclk1
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       N/A
Required Frequency (MHz):   N/A
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      6.108
Max Clock-To-Out (ns):      11.186

Clock Domain:               mss_ccc_gla0
Period (ns):                10.000
Frequency (MHz):            100.000
Required Period (ns):       N/A
Required Frequency (MHz):   N/A
External Setup (ns):        -1.383
External Hold (ns):         1.283
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

Clock Domain:               emcFlashImage/MSS_CCC_0/I_XTLOSC:CLKOUT
Period (ns):                N/A
Frequency (MHz):            N/A
Required Period (ns):       N/A
Required Frequency (MHz):   N/A
External Setup (ns):        N/A
External Hold (ns):         N/A
Min Clock-To-Out (ns):      N/A
Max Clock-To-Out (ns):      N/A

                            Input to Output
Min Delay (ns):             N/A
Max Delay (ns):             N/A

END SUMMARY
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Clock Domain mss_aclk

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Hold

No Path

END SET External Hold

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Removal

No Path

END SET External Removal

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain mss_fabric_interface_clock

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Hold

No Path

END SET External Hold

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Removal

No Path

END SET External Removal

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain mss_pclk1

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Hold

No Path

END SET External Hold

----------------------------------------------------

SET Clock to Output

Path 1
  From:                        emcFlashImage/MSS_ADLIB_INST/U_CORE:PCLK1
  To:                          M2F_GPO_0
  Delay (ns):                  6.108
  Slack (ns):
  Arrival (ns):                6.108
  Required (ns):
  Clock to Out (ns):           6.108

Path 2
  From:                        emcFlashImage/MSS_ADLIB_INST/U_CORE:PCLK1
  To:                          M2F_GPO_2
  Delay (ns):                  6.148
  Slack (ns):
  Arrival (ns):                6.148
  Required (ns):
  Clock to Out (ns):           6.148

Path 3
  From:                        emcFlashImage/MSS_ADLIB_INST/U_CORE:PCLK1
  To:                          M2F_GPO_1
  Delay (ns):                  6.168
  Slack (ns):
  Arrival (ns):                6.168
  Required (ns):
  Clock to Out (ns):           6.168


Expanded Path 1
  From: emcFlashImage/MSS_ADLIB_INST/U_CORE:PCLK1
  To: M2F_GPO_0
  data arrival time                              6.108
  data required time                         -   N/C
  slack                                          N/C
  ________________________________________________________
  Data arrival time calculation
  0.000                        mss_pclk1
               +     0.000          Clock source
  0.000                        emcFlashImage/MSS_ADLIB_INST/U_CORE:PCLK1 (r)
               +     2.085          cell: ADLIB:MSS_APB_IP
  2.085                        emcFlashImage/MSS_ADLIB_INST/U_CORE:GPO[0] (r)
               +     0.000          net: emcFlashImage/MSS_ADLIB_INST/GPO[0]INT_NET
  2.085                        emcFlashImage/MSS_ADLIB_INST/U_20:PIN1INT (r)
               +     0.041          cell: ADLIB:MSS_IF
  2.126                        emcFlashImage/MSS_ADLIB_INST/U_20:PIN1 (r)
               +     2.587          net: emcFlashImage/MSSINT_GPO_0_A
  4.713                        M2F_GPO_0_pad/U0/U1:D (r)
               +     0.279          cell: ADLIB:IOTRI_OB_EB
  4.992                        M2F_GPO_0_pad/U0/U1:DOUT (r)
               +     0.000          net: M2F_GPO_0_pad/U0/NET1
  4.992                        M2F_GPO_0_pad/U0/U0:D (r)
               +     1.116          cell: ADLIB:IOPAD_TRI
  6.108                        M2F_GPO_0_pad/U0/U0:PAD (r)
               +     0.000          net: M2F_GPO_0
  6.108                        M2F_GPO_0 (r)
                                    
  6.108                        data arrival time
  ________________________________________________________
  Data required time calculation
  N/C                          emcFlashImage/MSS_ADLIB_INST/U_CORE:PCLK1 (r)
                                    
  N/C                          M2F_GPO_0 (r)
                                    
  N/C                          data required time


END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Removal

No Path

END SET External Removal

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain mss_ccc_gla0

Info: The maximum frequency of this clock domain is limited by the period of pin emcFlashImage/MSS_ADLIB_INST/U_CORE:FCLK

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Hold

Path 1
  From:                        MSS_RESET_N
  To:                          emcFlashImage/MSS_ADLIB_INST/U_CORE:MSSRESETn
  Delay (ns):                  0.276
  Slack (ns):
  Arrival (ns):                0.276
  Required (ns):
  Hold (ns):                   1.289
  External Hold (ns):          1.283


Expanded Path 1
  From: MSS_RESET_N
  To: emcFlashImage/MSS_ADLIB_INST/U_CORE:MSSRESETn
  data arrival time                              0.276
  data required time                         -   N/C
  slack                                          N/C
  ________________________________________________________
  Data arrival time calculation
  0.000                        MSS_RESET_N (f)
               +     0.000          net: MSS_RESET_N
  0.000                        emcFlashImage/MSS_RESET_0_MSS_RESET_N:PAD (f)
               +     0.276          cell: ADLIB:IOPAD_IN
  0.276                        emcFlashImage/MSS_RESET_0_MSS_RESET_N:Y (f)
               +     0.000          net: emcFlashImage/MSS_RESET_0_MSS_RESET_N_Y
  0.276                        emcFlashImage/MSS_ADLIB_INST/U_CORE:MSSRESETn (f)
                                    
  0.276                        data arrival time
  ________________________________________________________
  Data required time calculation
  N/C                          mss_ccc_gla0
               +     0.000          Clock source
  N/C                          emcFlashImage/MSS_CCC_0/I_MSSCCC/U_MSSCCC:GLAMSS (r)
               +     0.270          net: emcFlashImage/MSS_ADLIB_INST_FCLK
  N/C                          emcFlashImage/MSS_ADLIB_INST/U_CORE:FCLK (r)
               +     1.289          Library hold time: ADLIB:MSS_APB_IP
  N/C                          emcFlashImage/MSS_ADLIB_INST/U_CORE:MSSRESETn


END SET External Hold

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Removal

No Path

END SET External Removal

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain emcFlashImage/MSS_CCC_0/I_XTLOSC:CLKOUT

SET Register to Register

No Path

END SET Register to Register

----------------------------------------------------

SET External Hold

No Path

END SET External Hold

----------------------------------------------------

SET Clock to Output

No Path

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path

END SET Register to Asynchronous

----------------------------------------------------

SET External Removal

No Path

END SET External Removal

----------------------------------------------------

SET Asynchronous to Register

No Path

END SET Asynchronous to Register

----------------------------------------------------

Path set Pin to Pin

SET Input to Output

No Path

END SET Input to Output

----------------------------------------------------

Path set User Sets

