
externalRAMImage:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .reset        00000464  70000000  70000000  00008000  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00008090  70000468  70000468  00008468  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .ARM.exidx    00000008  700084f8  700084f8  000104f8  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .data         00000558  70008500  70008500  00010500  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .bss          000000a8  70008a58  70008a58  00010a58  2**2
                  ALLOC
  5 .comment      000000d7  00000000  00000000  00010a58  2**0
                  CONTENTS, READONLY
  6 .debug_aranges 000000a0  00000000  00000000  00010b2f  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_pubnames 0000049c  00000000  00000000  00010bcf  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_info   000041c5  00000000  00000000  0001106b  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_abbrev 00000807  00000000  00000000  00015230  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_line   00001423  00000000  00000000  00015a37  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_frame  00001304  00000000  00000000  00016e5c  2**2
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_str    00001d03  00000000  00000000  00018160  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_loc    00000c22  00000000  00000000  00019e63  2**0
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_macinfo 00023975  00000000  00000000  0001aa85  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .ARM.attributes 00000025  00000000  00000000  0003e3fa  2**0
                  CONTENTS, READONLY

Disassembly of section .text:

70000468 <__do_global_dtors_aux>:
70000468:	f648 2358 	movw	r3, #35416	; 0x8a58
7000046c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000470:	781a      	ldrb	r2, [r3, #0]
70000472:	b90a      	cbnz	r2, 70000478 <__do_global_dtors_aux+0x10>
70000474:	2001      	movs	r0, #1
70000476:	7018      	strb	r0, [r3, #0]
70000478:	4770      	bx	lr
7000047a:	bf00      	nop

7000047c <frame_dummy>:
7000047c:	f248 5000 	movw	r0, #34048	; 0x8500
70000480:	f2c7 0000 	movt	r0, #28672	; 0x7000
70000484:	b508      	push	{r3, lr}
70000486:	6803      	ldr	r3, [r0, #0]
70000488:	b12b      	cbz	r3, 70000496 <frame_dummy+0x1a>
7000048a:	f240 0300 	movw	r3, #0
7000048e:	f2c0 0300 	movt	r3, #0
70000492:	b103      	cbz	r3, 70000496 <frame_dummy+0x1a>
70000494:	4798      	blx	r3
70000496:	bd08      	pop	{r3, pc}

70000498 <MSS_GPIO_set_outputs>:
static __INLINE void
MSS_GPIO_set_outputs
(
   uint32_t value
)
{
70000498:	b480      	push	{r7}
7000049a:	b083      	sub	sp, #12
7000049c:	af00      	add	r7, sp, #0
7000049e:	6078      	str	r0, [r7, #4]
    GPIO->GPIO_OUT = value;
700004a0:	f243 0300 	movw	r3, #12288	; 0x3000
700004a4:	f2c4 0301 	movt	r3, #16385	; 0x4001
700004a8:	687a      	ldr	r2, [r7, #4]
700004aa:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
}
700004ae:	f107 070c 	add.w	r7, r7, #12
700004b2:	46bd      	mov	sp, r7
700004b4:	bc80      	pop	{r7}
700004b6:	4770      	bx	lr

700004b8 <MSS_GPIO_get_outputs>:
        gpio_outputs = MSS_GPIO_get_outputs();
    @endcode
 */
static __INLINE uint32_t
MSS_GPIO_get_outputs( void )
{
700004b8:	b480      	push	{r7}
700004ba:	af00      	add	r7, sp, #0
    return GPIO->GPIO_OUT;
700004bc:	f243 0300 	movw	r3, #12288	; 0x3000
700004c0:	f2c4 0301 	movt	r3, #16385	; 0x4001
700004c4:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
}
700004c8:	4618      	mov	r0, r3
700004ca:	46bd      	mov	sp, r7
700004cc:	bc80      	pop	{r7}
700004ce:	4770      	bx	lr

700004d0 <MSS_WD_disable>:
 
  @return
    This function does not return a value.
 */
static __INLINE void MSS_WD_disable( void )
{
700004d0:	b480      	push	{r7}
700004d2:	af00      	add	r7, sp, #0
    WATCHDOG->WDOGENABLE = MSS_WDOG_DISABLE_KEY;
700004d4:	f246 0300 	movw	r3, #24576	; 0x6000
700004d8:	f2c4 0300 	movt	r3, #16384	; 0x4000
700004dc:	f245 52fa 	movw	r2, #22010	; 0x55fa
700004e0:	f6c4 426e 	movt	r2, #19566	; 0x4c6e
700004e4:	611a      	str	r2, [r3, #16]
}
700004e6:	46bd      	mov	sp, r7
700004e8:	bc80      	pop	{r7}
700004ea:	4770      	bx	lr

700004ec <main>:
char testString[] = "SmartFusion Says Hello\r\n";
/*-------------------------------------------------------------------------*//**
 * main() function.
 */
int main()
{
700004ec:	b580      	push	{r7, lr}
700004ee:	b082      	sub	sp, #8
700004f0:	af00      	add	r7, sp, #0


	volatile int32_t delay_count = 0;
700004f2:	f04f 0300 	mov.w	r3, #0
700004f6:	603b      	str	r3, [r7, #0]

   /*--------------------------------------------------------------------------
    * Disable watchdog.
    */
	MSS_WD_disable();
700004f8:	f7ff ffea 	bl	700004d0 <MSS_WD_disable>

    /*
     * Initialize MSS GPIOs.
     */
    MSS_GPIO_init();
700004fc:	f001 f950 	bl	700017a0 <MSS_GPIO_init>

    /*
     * Configure MSS GPIOs.
     */
    MSS_GPIO_config( MSS_GPIO_0 , MSS_GPIO_OUTPUT_MODE );
70000500:	f04f 0000 	mov.w	r0, #0
70000504:	f04f 0105 	mov.w	r1, #5
70000508:	f001 f980 	bl	7000180c <MSS_GPIO_config>
    MSS_GPIO_config( MSS_GPIO_1 , MSS_GPIO_OUTPUT_MODE );
7000050c:	f04f 0001 	mov.w	r0, #1
70000510:	f04f 0105 	mov.w	r1, #5
70000514:	f001 f97a 	bl	7000180c <MSS_GPIO_config>
    MSS_GPIO_config( MSS_GPIO_2 , MSS_GPIO_OUTPUT_MODE );
70000518:	f04f 0002 	mov.w	r0, #2
7000051c:	f04f 0105 	mov.w	r1, #5
70000520:	f001 f974 	bl	7000180c <MSS_GPIO_config>

    /*
     * Set initial delay used to blink the LED.
     */
    delay_count = DELAY_LOAD_VALUE;
70000524:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
70000528:	603b      	str	r3, [r7, #0]

    while (x != 0x55)
7000052a:	f248 5308 	movw	r3, #34056	; 0x8508
7000052e:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000532:	781b      	ldrb	r3, [r3, #0]
70000534:	2b55      	cmp	r3, #85	; 0x55
70000536:	d1f8      	bne.n	7000052a <main+0x3e>
70000538:	e000      	b.n	7000053c <main+0x50>
            gpio_pattern ^= 0xFFFFFFFF;
            MSS_GPIO_set_outputs( gpio_pattern );

            printf("%s This string is stored at %p\r\n",testString, &testString);
        }
    }
7000053a:	bf00      	nop
    {
        uint32_t gpio_pattern;
        /*
         * Decrement delay counter.
         */
        --delay_count;
7000053c:	683b      	ldr	r3, [r7, #0]
7000053e:	f103 33ff 	add.w	r3, r3, #4294967295
70000542:	603b      	str	r3, [r7, #0]

        /*
         * Check if delay expired.
         */
        if ( delay_count <= 0 )
70000544:	683b      	ldr	r3, [r7, #0]
70000546:	2b00      	cmp	r3, #0
70000548:	dcf7      	bgt.n	7000053a <main+0x4e>
        {
            /*
             * Reload delay counter.
             */
            delay_count = DELAY_LOAD_VALUE;
7000054a:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
7000054e:	603b      	str	r3, [r7, #0]

            /*
             * Toggle GPIO output pattern by doing an exclusive OR of all
             * pattern bits with ones.
             */
            gpio_pattern = MSS_GPIO_get_outputs();
70000550:	f7ff ffb2 	bl	700004b8 <MSS_GPIO_get_outputs>
70000554:	4603      	mov	r3, r0
70000556:	607b      	str	r3, [r7, #4]
            gpio_pattern ^= 0xFFFFFFFF;
70000558:	687b      	ldr	r3, [r7, #4]
7000055a:	ea6f 0303 	mvn.w	r3, r3
7000055e:	607b      	str	r3, [r7, #4]
            MSS_GPIO_set_outputs( gpio_pattern );
70000560:	6878      	ldr	r0, [r7, #4]
70000562:	f7ff ff99 	bl	70000498 <MSS_GPIO_set_outputs>

            printf("%s This string is stored at %p\r\n",testString, &testString);
70000566:	f248 1080 	movw	r0, #33152	; 0x8180
7000056a:	f2c7 0000 	movt	r0, #28672	; 0x7000
7000056e:	f248 510c 	movw	r1, #34060	; 0x850c
70000572:	f2c7 0100 	movt	r1, #28672	; 0x7000
70000576:	f248 520c 	movw	r2, #34060	; 0x850c
7000057a:	f2c7 0200 	movt	r2, #28672	; 0x7000
7000057e:	f001 fbe9 	bl	70001d54 <printf>
        }
    }
70000582:	e7db      	b.n	7000053c <main+0x50>

70000584 <_close>:

/*==============================================================================
 * Close a file.
 */
int _close(int file)
{
70000584:	b480      	push	{r7}
70000586:	b083      	sub	sp, #12
70000588:	af00      	add	r7, sp, #0
7000058a:	6078      	str	r0, [r7, #4]
    return -1;
7000058c:	f04f 33ff 	mov.w	r3, #4294967295
}
70000590:	4618      	mov	r0, r3
70000592:	f107 070c 	add.w	r7, r7, #12
70000596:	46bd      	mov	sp, r7
70000598:	bc80      	pop	{r7}
7000059a:	4770      	bx	lr

7000059c <_execve>:

/*==============================================================================
 * Transfer control to a new process.
 */
int _execve(char *name, char **argv, char **env)
{
7000059c:	b580      	push	{r7, lr}
7000059e:	b084      	sub	sp, #16
700005a0:	af00      	add	r7, sp, #0
700005a2:	60f8      	str	r0, [r7, #12]
700005a4:	60b9      	str	r1, [r7, #8]
700005a6:	607a      	str	r2, [r7, #4]
    errno = ENOMEM;
700005a8:	f001 fba6 	bl	70001cf8 <__errno>
700005ac:	4603      	mov	r3, r0
700005ae:	f04f 020c 	mov.w	r2, #12
700005b2:	601a      	str	r2, [r3, #0]
    return -1;
700005b4:	f04f 33ff 	mov.w	r3, #4294967295
}
700005b8:	4618      	mov	r0, r3
700005ba:	f107 0710 	add.w	r7, r7, #16
700005be:	46bd      	mov	sp, r7
700005c0:	bd80      	pop	{r7, pc}
700005c2:	bf00      	nop

700005c4 <_exit>:
{
	/* Should we force a system reset? */
	while( 1 )
	{
		;
	}
700005c4:	b480      	push	{r7}
700005c6:	b083      	sub	sp, #12
700005c8:	af00      	add	r7, sp, #0
700005ca:	6078      	str	r0, [r7, #4]
700005cc:	e7fe      	b.n	700005cc <_exit+0x8>
700005ce:	bf00      	nop

700005d0 <_fork>:

/*==============================================================================
 * Create a new process.
 */
int _fork(void)
{
700005d0:	b580      	push	{r7, lr}
700005d2:	af00      	add	r7, sp, #0
    errno = EAGAIN;
700005d4:	f001 fb90 	bl	70001cf8 <__errno>
700005d8:	4603      	mov	r3, r0
700005da:	f04f 020b 	mov.w	r2, #11
700005de:	601a      	str	r2, [r3, #0]
    return -1;
700005e0:	f04f 33ff 	mov.w	r3, #4294967295
}
700005e4:	4618      	mov	r0, r3
700005e6:	bd80      	pop	{r7, pc}

700005e8 <_fstat>:

/*==============================================================================
 * Status of an open file.
 */
int _fstat(int file, struct stat *st)
{
700005e8:	b480      	push	{r7}
700005ea:	b083      	sub	sp, #12
700005ec:	af00      	add	r7, sp, #0
700005ee:	6078      	str	r0, [r7, #4]
700005f0:	6039      	str	r1, [r7, #0]
    st->st_mode = S_IFCHR;
700005f2:	683b      	ldr	r3, [r7, #0]
700005f4:	f44f 5200 	mov.w	r2, #8192	; 0x2000
700005f8:	605a      	str	r2, [r3, #4]
    return 0;
700005fa:	f04f 0300 	mov.w	r3, #0
}
700005fe:	4618      	mov	r0, r3
70000600:	f107 070c 	add.w	r7, r7, #12
70000604:	46bd      	mov	sp, r7
70000606:	bc80      	pop	{r7}
70000608:	4770      	bx	lr
7000060a:	bf00      	nop

7000060c <_getpid>:

/*==============================================================================
 * Process-ID
 */
int _getpid(void)
{
7000060c:	b480      	push	{r7}
7000060e:	af00      	add	r7, sp, #0
    return 1;
70000610:	f04f 0301 	mov.w	r3, #1
}
70000614:	4618      	mov	r0, r3
70000616:	46bd      	mov	sp, r7
70000618:	bc80      	pop	{r7}
7000061a:	4770      	bx	lr

7000061c <_isatty>:

/*==============================================================================
 * Query whether output stream is a terminal.
 */
int _isatty(int file)
{
7000061c:	b480      	push	{r7}
7000061e:	b083      	sub	sp, #12
70000620:	af00      	add	r7, sp, #0
70000622:	6078      	str	r0, [r7, #4]
    return 1;
70000624:	f04f 0301 	mov.w	r3, #1
}
70000628:	4618      	mov	r0, r3
7000062a:	f107 070c 	add.w	r7, r7, #12
7000062e:	46bd      	mov	sp, r7
70000630:	bc80      	pop	{r7}
70000632:	4770      	bx	lr

70000634 <_kill>:

/*==============================================================================
 * Send a signal.
 */
int _kill(int pid, int sig)
{
70000634:	b580      	push	{r7, lr}
70000636:	b082      	sub	sp, #8
70000638:	af00      	add	r7, sp, #0
7000063a:	6078      	str	r0, [r7, #4]
7000063c:	6039      	str	r1, [r7, #0]
    errno = EINVAL;
7000063e:	f001 fb5b 	bl	70001cf8 <__errno>
70000642:	4603      	mov	r3, r0
70000644:	f04f 0216 	mov.w	r2, #22
70000648:	601a      	str	r2, [r3, #0]
    return -1;
7000064a:	f04f 33ff 	mov.w	r3, #4294967295
}
7000064e:	4618      	mov	r0, r3
70000650:	f107 0708 	add.w	r7, r7, #8
70000654:	46bd      	mov	sp, r7
70000656:	bd80      	pop	{r7, pc}

70000658 <_link>:

/*==============================================================================
 * Establish a new name for an existing file.
 */
int _link(char *old, char *new)
{
70000658:	b580      	push	{r7, lr}
7000065a:	b082      	sub	sp, #8
7000065c:	af00      	add	r7, sp, #0
7000065e:	6078      	str	r0, [r7, #4]
70000660:	6039      	str	r1, [r7, #0]
    errno = EMLINK;
70000662:	f001 fb49 	bl	70001cf8 <__errno>
70000666:	4603      	mov	r3, r0
70000668:	f04f 021f 	mov.w	r2, #31
7000066c:	601a      	str	r2, [r3, #0]
    return -1;
7000066e:	f04f 33ff 	mov.w	r3, #4294967295
}
70000672:	4618      	mov	r0, r3
70000674:	f107 0708 	add.w	r7, r7, #8
70000678:	46bd      	mov	sp, r7
7000067a:	bd80      	pop	{r7, pc}

7000067c <_lseek>:

/*==============================================================================
 * Set position in a file.
 */
int _lseek(int file, int ptr, int dir)
{
7000067c:	b480      	push	{r7}
7000067e:	b085      	sub	sp, #20
70000680:	af00      	add	r7, sp, #0
70000682:	60f8      	str	r0, [r7, #12]
70000684:	60b9      	str	r1, [r7, #8]
70000686:	607a      	str	r2, [r7, #4]
    return 0;
70000688:	f04f 0300 	mov.w	r3, #0
}
7000068c:	4618      	mov	r0, r3
7000068e:	f107 0714 	add.w	r7, r7, #20
70000692:	46bd      	mov	sp, r7
70000694:	bc80      	pop	{r7}
70000696:	4770      	bx	lr

70000698 <_open>:

/*==============================================================================
 * Open a file.
 */
int _open(const char *name, int flags, int mode)
{
70000698:	b480      	push	{r7}
7000069a:	b085      	sub	sp, #20
7000069c:	af00      	add	r7, sp, #0
7000069e:	60f8      	str	r0, [r7, #12]
700006a0:	60b9      	str	r1, [r7, #8]
700006a2:	607a      	str	r2, [r7, #4]
    return -1;
700006a4:	f04f 33ff 	mov.w	r3, #4294967295
}
700006a8:	4618      	mov	r0, r3
700006aa:	f107 0714 	add.w	r7, r7, #20
700006ae:	46bd      	mov	sp, r7
700006b0:	bc80      	pop	{r7}
700006b2:	4770      	bx	lr

700006b4 <_read>:

/*==============================================================================
 * Read from a file.
 */
int _read(int file, char *ptr, int len)
{
700006b4:	b480      	push	{r7}
700006b6:	b085      	sub	sp, #20
700006b8:	af00      	add	r7, sp, #0
700006ba:	60f8      	str	r0, [r7, #12]
700006bc:	60b9      	str	r1, [r7, #8]
700006be:	607a      	str	r2, [r7, #4]
    return 0;
700006c0:	f04f 0300 	mov.w	r3, #0
}
700006c4:	4618      	mov	r0, r3
700006c6:	f107 0714 	add.w	r7, r7, #20
700006ca:	46bd      	mov	sp, r7
700006cc:	bc80      	pop	{r7}
700006ce:	4770      	bx	lr

700006d0 <_write_r>:
 * all files, including stdoutso if you need to generate any output, for
 * example to a serial port for debugging, you should make your minimal write
 * capable of doing this.
 */
int _write_r( void * reent, int file, char * ptr, int len )
{
700006d0:	b580      	push	{r7, lr}
700006d2:	b084      	sub	sp, #16
700006d4:	af00      	add	r7, sp, #0
700006d6:	60f8      	str	r0, [r7, #12]
700006d8:	60b9      	str	r1, [r7, #8]
700006da:	607a      	str	r2, [r7, #4]
700006dc:	603b      	str	r3, [r7, #0]
#ifdef ACTEL_STDIO_THRU_UART
    /*--------------------------------------------------------------------------
     * Initialize the UART driver if it is the first time this function is
     * called.
     */
    if ( !g_stdio_uart_init_done )
700006de:	f648 235c 	movw	r3, #35420	; 0x8a5c
700006e2:	f2c7 0300 	movt	r3, #28672	; 0x7000
700006e6:	681b      	ldr	r3, [r3, #0]
700006e8:	2b00      	cmp	r3, #0
700006ea:	d110      	bne.n	7000070e <_write_r+0x3e>
    {
        MSS_UART_init( &g_mss_uart0, ACTEL_STDIO_BAUD_RATE, (MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY));
700006ec:	f648 20d0 	movw	r0, #35536	; 0x8ad0
700006f0:	f2c7 0000 	movt	r0, #28672	; 0x7000
700006f4:	f44f 4161 	mov.w	r1, #57600	; 0xe100
700006f8:	f04f 0203 	mov.w	r2, #3
700006fc:	f000 f8fa 	bl	700008f4 <MSS_UART_init>
        g_stdio_uart_init_done = 1;
70000700:	f648 235c 	movw	r3, #35420	; 0x8a5c
70000704:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000708:	f04f 0201 	mov.w	r2, #1
7000070c:	601a      	str	r2, [r3, #0]
    }
    
    /*--------------------------------------------------------------------------
     * Output text to the UART.
     */
    MSS_UART_polled_tx( &g_mss_uart0, (uint8_t *)ptr, len );
7000070e:	683b      	ldr	r3, [r7, #0]
70000710:	f648 20d0 	movw	r0, #35536	; 0x8ad0
70000714:	f2c7 0000 	movt	r0, #28672	; 0x7000
70000718:	6879      	ldr	r1, [r7, #4]
7000071a:	461a      	mov	r2, r3
7000071c:	f000 f9e6 	bl	70000aec <MSS_UART_polled_tx>
    
    return len;
70000720:	683b      	ldr	r3, [r7, #0]
#else   /* ACTEL_STDIO_THRU_UART */
    return 0;
#endif  /* ACTEL_STDIO_THRU_UART */
}
70000722:	4618      	mov	r0, r3
70000724:	f107 0710 	add.w	r7, r7, #16
70000728:	46bd      	mov	sp, r7
7000072a:	bd80      	pop	{r7, pc}

7000072c <_sbrk>:
 * it is useful to have a working implementation. The following suffices for a
 * standalone system; it exploits the symbol _end automatically defined by the
 * GNU linker. 
 */
caddr_t _sbrk(int incr)
{
7000072c:	b580      	push	{r7, lr}
7000072e:	b084      	sub	sp, #16
70000730:	af00      	add	r7, sp, #0
70000732:	6078      	str	r0, [r7, #4]
    extern char _end;		/* Defined by the linker */
    static char *heap_end;
    char *prev_heap_end;
    char * stack_ptr;
    
    if (heap_end == 0)
70000734:	f648 2364 	movw	r3, #35428	; 0x8a64
70000738:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000073c:	681b      	ldr	r3, [r3, #0]
7000073e:	2b00      	cmp	r3, #0
70000740:	d108      	bne.n	70000754 <_sbrk+0x28>
    {
      heap_end = &_end;
70000742:	f648 2364 	movw	r3, #35428	; 0x8a64
70000746:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000074a:	f648 3200 	movw	r2, #35584	; 0x8b00
7000074e:	f2c7 0200 	movt	r2, #28672	; 0x7000
70000752:	601a      	str	r2, [r3, #0]
    }
    
    prev_heap_end = heap_end;
70000754:	f648 2364 	movw	r3, #35428	; 0x8a64
70000758:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000075c:	681b      	ldr	r3, [r3, #0]
7000075e:	60bb      	str	r3, [r7, #8]
    asm volatile ("MRS %0, msp" : "=r" (stack_ptr) );
70000760:	f3ef 8308 	mrs	r3, MSP
70000764:	60fb      	str	r3, [r7, #12]
    if (heap_end + incr > stack_ptr)
70000766:	f648 2364 	movw	r3, #35428	; 0x8a64
7000076a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000076e:	681a      	ldr	r2, [r3, #0]
70000770:	687b      	ldr	r3, [r7, #4]
70000772:	441a      	add	r2, r3
70000774:	68fb      	ldr	r3, [r7, #12]
70000776:	429a      	cmp	r2, r3
70000778:	d90f      	bls.n	7000079a <_sbrk+0x6e>
    {
      _write_r ((void *)0, 1, "Heap and stack collision\n", 25);
7000077a:	f04f 0000 	mov.w	r0, #0
7000077e:	f04f 0101 	mov.w	r1, #1
70000782:	f248 12a4 	movw	r2, #33188	; 0x81a4
70000786:	f2c7 0200 	movt	r2, #28672	; 0x7000
7000078a:	f04f 0319 	mov.w	r3, #25
7000078e:	f7ff ff9f 	bl	700006d0 <_write_r>
      _exit (1);
70000792:	f04f 0001 	mov.w	r0, #1
70000796:	f7ff ff15 	bl	700005c4 <_exit>
    }
  
    heap_end += incr;
7000079a:	f648 2364 	movw	r3, #35428	; 0x8a64
7000079e:	f2c7 0300 	movt	r3, #28672	; 0x7000
700007a2:	681a      	ldr	r2, [r3, #0]
700007a4:	687b      	ldr	r3, [r7, #4]
700007a6:	441a      	add	r2, r3
700007a8:	f648 2364 	movw	r3, #35428	; 0x8a64
700007ac:	f2c7 0300 	movt	r3, #28672	; 0x7000
700007b0:	601a      	str	r2, [r3, #0]
    return (caddr_t) prev_heap_end;
700007b2:	68bb      	ldr	r3, [r7, #8]
}
700007b4:	4618      	mov	r0, r3
700007b6:	f107 0710 	add.w	r7, r7, #16
700007ba:	46bd      	mov	sp, r7
700007bc:	bd80      	pop	{r7, pc}
700007be:	bf00      	nop

700007c0 <_stat>:

/*==============================================================================
 * Status of a file (by name).
 */
int _stat(char *file, struct stat *st)
{
700007c0:	b480      	push	{r7}
700007c2:	b083      	sub	sp, #12
700007c4:	af00      	add	r7, sp, #0
700007c6:	6078      	str	r0, [r7, #4]
700007c8:	6039      	str	r1, [r7, #0]
    st->st_mode = S_IFCHR;
700007ca:	683b      	ldr	r3, [r7, #0]
700007cc:	f44f 5200 	mov.w	r2, #8192	; 0x2000
700007d0:	605a      	str	r2, [r3, #4]
    return 0;
700007d2:	f04f 0300 	mov.w	r3, #0
}
700007d6:	4618      	mov	r0, r3
700007d8:	f107 070c 	add.w	r7, r7, #12
700007dc:	46bd      	mov	sp, r7
700007de:	bc80      	pop	{r7}
700007e0:	4770      	bx	lr
700007e2:	bf00      	nop

700007e4 <_times>:

/*==============================================================================
 * Timing information for current process.
 */
int _times(struct tms *buf)
{
700007e4:	b480      	push	{r7}
700007e6:	b083      	sub	sp, #12
700007e8:	af00      	add	r7, sp, #0
700007ea:	6078      	str	r0, [r7, #4]
    return -1;
700007ec:	f04f 33ff 	mov.w	r3, #4294967295
}
700007f0:	4618      	mov	r0, r3
700007f2:	f107 070c 	add.w	r7, r7, #12
700007f6:	46bd      	mov	sp, r7
700007f8:	bc80      	pop	{r7}
700007fa:	4770      	bx	lr

700007fc <_unlink>:

/*==============================================================================
 * Remove a file's directory entry.
 */
int _unlink(char *name)
{
700007fc:	b580      	push	{r7, lr}
700007fe:	b082      	sub	sp, #8
70000800:	af00      	add	r7, sp, #0
70000802:	6078      	str	r0, [r7, #4]
    errno = ENOENT;
70000804:	f001 fa78 	bl	70001cf8 <__errno>
70000808:	4603      	mov	r3, r0
7000080a:	f04f 0202 	mov.w	r2, #2
7000080e:	601a      	str	r2, [r3, #0]
    return -1;
70000810:	f04f 33ff 	mov.w	r3, #4294967295
}
70000814:	4618      	mov	r0, r3
70000816:	f107 0708 	add.w	r7, r7, #8
7000081a:	46bd      	mov	sp, r7
7000081c:	bd80      	pop	{r7, pc}
7000081e:	bf00      	nop

70000820 <_wait>:

/*==============================================================================
 * Wait for a child process.
 */
int _wait(int *status)
{
70000820:	b580      	push	{r7, lr}
70000822:	b082      	sub	sp, #8
70000824:	af00      	add	r7, sp, #0
70000826:	6078      	str	r0, [r7, #4]
    errno = ECHILD;
70000828:	f001 fa66 	bl	70001cf8 <__errno>
7000082c:	4603      	mov	r3, r0
7000082e:	f04f 020a 	mov.w	r2, #10
70000832:	601a      	str	r2, [r3, #0]
    return -1;
70000834:	f04f 33ff 	mov.w	r3, #4294967295
}
70000838:	4618      	mov	r0, r3
7000083a:	f107 0708 	add.w	r7, r7, #8
7000083e:	46bd      	mov	sp, r7
70000840:	bd80      	pop	{r7, pc}
70000842:	bf00      	nop

70000844 <NVIC_EnableIRQ>:
 *
 * Enable a device specific interupt in the NVIC interrupt controller.
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
70000844:	b480      	push	{r7}
70000846:	b083      	sub	sp, #12
70000848:	af00      	add	r7, sp, #0
7000084a:	4603      	mov	r3, r0
7000084c:	80fb      	strh	r3, [r7, #6]
  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
7000084e:	f24e 1300 	movw	r3, #57600	; 0xe100
70000852:	f2ce 0300 	movt	r3, #57344	; 0xe000
70000856:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
7000085a:	ea4f 1252 	mov.w	r2, r2, lsr #5
7000085e:	88f9      	ldrh	r1, [r7, #6]
70000860:	f001 011f 	and.w	r1, r1, #31
70000864:	f04f 0001 	mov.w	r0, #1
70000868:	fa00 f101 	lsl.w	r1, r0, r1
7000086c:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
70000870:	f107 070c 	add.w	r7, r7, #12
70000874:	46bd      	mov	sp, r7
70000876:	bc80      	pop	{r7}
70000878:	4770      	bx	lr
7000087a:	bf00      	nop

7000087c <NVIC_DisableIRQ>:
 * 
 * Disable a device specific interupt in the NVIC interrupt controller.
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
7000087c:	b480      	push	{r7}
7000087e:	b083      	sub	sp, #12
70000880:	af00      	add	r7, sp, #0
70000882:	4603      	mov	r3, r0
70000884:	80fb      	strh	r3, [r7, #6]
  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
70000886:	f24e 1300 	movw	r3, #57600	; 0xe100
7000088a:	f2ce 0300 	movt	r3, #57344	; 0xe000
7000088e:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
70000892:	ea4f 1252 	mov.w	r2, r2, lsr #5
70000896:	88f9      	ldrh	r1, [r7, #6]
70000898:	f001 011f 	and.w	r1, r1, #31
7000089c:	f04f 0001 	mov.w	r0, #1
700008a0:	fa00 f101 	lsl.w	r1, r0, r1
700008a4:	f102 0220 	add.w	r2, r2, #32
700008a8:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
700008ac:	f107 070c 	add.w	r7, r7, #12
700008b0:	46bd      	mov	sp, r7
700008b2:	bc80      	pop	{r7}
700008b4:	4770      	bx	lr
700008b6:	bf00      	nop

700008b8 <NVIC_ClearPendingIRQ>:
 *
 * Clear the pending bit for the specified interrupt. 
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
700008b8:	b480      	push	{r7}
700008ba:	b083      	sub	sp, #12
700008bc:	af00      	add	r7, sp, #0
700008be:	4603      	mov	r3, r0
700008c0:	80fb      	strh	r3, [r7, #6]
  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
700008c2:	f24e 1300 	movw	r3, #57600	; 0xe100
700008c6:	f2ce 0300 	movt	r3, #57344	; 0xe000
700008ca:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
700008ce:	ea4f 1252 	mov.w	r2, r2, lsr #5
700008d2:	88f9      	ldrh	r1, [r7, #6]
700008d4:	f001 011f 	and.w	r1, r1, #31
700008d8:	f04f 0001 	mov.w	r0, #1
700008dc:	fa00 f101 	lsl.w	r1, r0, r1
700008e0:	f102 0260 	add.w	r2, r2, #96	; 0x60
700008e4:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
700008e8:	f107 070c 	add.w	r7, r7, #12
700008ec:	46bd      	mov	sp, r7
700008ee:	bc80      	pop	{r7}
700008f0:	4770      	bx	lr
700008f2:	bf00      	nop

700008f4 <MSS_UART_init>:
(
    mss_uart_instance_t* this_uart,
    uint32_t baud_rate,
    uint8_t line_config
)
{
700008f4:	b580      	push	{r7, lr}
700008f6:	b086      	sub	sp, #24
700008f8:	af00      	add	r7, sp, #0
700008fa:	60f8      	str	r0, [r7, #12]
700008fc:	60b9      	str	r1, [r7, #8]
700008fe:	4613      	mov	r3, r2
70000900:	71fb      	strb	r3, [r7, #7]
    uint16_t baud_value;
    uint32_t pclk_freq;

    /* The driver expects g_mss_uart0 and g_mss_uart1 to be the only
     * mss_uart_instance_t instances used to identify UART0 and UART1. */
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000902:	68fa      	ldr	r2, [r7, #12]
70000904:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000908:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000090c:	429a      	cmp	r2, r3
7000090e:	d007      	beq.n	70000920 <MSS_UART_init+0x2c>
70000910:	68fa      	ldr	r2, [r7, #12]
70000912:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000916:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000091a:	429a      	cmp	r2, r3
7000091c:	d000      	beq.n	70000920 <MSS_UART_init+0x2c>
7000091e:	be00      	bkpt	0x0000

    /* Force the value of the CMSIS global variables holding the various system
     * clock frequencies to be updated. */
    SystemCoreClockUpdate();
70000920:	f001 f8ce 	bl	70001ac0 <SystemCoreClockUpdate>

    if ( this_uart == &g_mss_uart0 )
70000924:	68fa      	ldr	r2, [r7, #12]
70000926:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000092a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000092e:	429a      	cmp	r2, r3
70000930:	d12e      	bne.n	70000990 <MSS_UART_init+0x9c>
    {
        this_uart->hw_reg = UART0;
70000932:	68fb      	ldr	r3, [r7, #12]
70000934:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
70000938:	601a      	str	r2, [r3, #0]
        this_uart->hw_reg_bit = UART0_BITBAND;
7000093a:	68fb      	ldr	r3, [r7, #12]
7000093c:	f04f 4284 	mov.w	r2, #1107296256	; 0x42000000
70000940:	605a      	str	r2, [r3, #4]
        this_uart->irqn = UART0_IRQn;
70000942:	68fb      	ldr	r3, [r7, #12]
70000944:	f04f 020a 	mov.w	r2, #10
70000948:	811a      	strh	r2, [r3, #8]

        pclk_freq = g_FrequencyPCLK0;
7000094a:	f248 5334 	movw	r3, #34100	; 0x8534
7000094e:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000952:	681b      	ldr	r3, [r3, #0]
70000954:	617b      	str	r3, [r7, #20]

        /* reset UART0 */
        SYSREG->SOFT_RST_CR |= SYSREG_UART0_SOFTRESET_MASK;
70000956:	f242 0300 	movw	r3, #8192	; 0x2000
7000095a:	f2ce 0304 	movt	r3, #57348	; 0xe004
7000095e:	f242 0200 	movw	r2, #8192	; 0x2000
70000962:	f2ce 0204 	movt	r2, #57348	; 0xe004
70000966:	6b12      	ldr	r2, [r2, #48]	; 0x30
70000968:	f042 0280 	orr.w	r2, r2, #128	; 0x80
7000096c:	631a      	str	r2, [r3, #48]	; 0x30
        /* Clear any previously pended UART0 interrupt */
        NVIC_ClearPendingIRQ( UART0_IRQn );
7000096e:	f04f 000a 	mov.w	r0, #10
70000972:	f7ff ffa1 	bl	700008b8 <NVIC_ClearPendingIRQ>
        /* Take UART0 out of reset. */
        SYSREG->SOFT_RST_CR &= ~SYSREG_UART0_SOFTRESET_MASK;
70000976:	f242 0300 	movw	r3, #8192	; 0x2000
7000097a:	f2ce 0304 	movt	r3, #57348	; 0xe004
7000097e:	f242 0200 	movw	r2, #8192	; 0x2000
70000982:	f2ce 0204 	movt	r2, #57348	; 0xe004
70000986:	6b12      	ldr	r2, [r2, #48]	; 0x30
70000988:	f022 0280 	bic.w	r2, r2, #128	; 0x80
7000098c:	631a      	str	r2, [r3, #48]	; 0x30
7000098e:	e031      	b.n	700009f4 <MSS_UART_init+0x100>
    }
    else
    {
        this_uart->hw_reg = UART1;
70000990:	68fa      	ldr	r2, [r7, #12]
70000992:	f240 0300 	movw	r3, #0
70000996:	f2c4 0301 	movt	r3, #16385	; 0x4001
7000099a:	6013      	str	r3, [r2, #0]
        this_uart->hw_reg_bit = UART1_BITBAND;
7000099c:	68fa      	ldr	r2, [r7, #12]
7000099e:	f240 0300 	movw	r3, #0
700009a2:	f2c4 2320 	movt	r3, #16928	; 0x4220
700009a6:	6053      	str	r3, [r2, #4]
        this_uart->irqn = UART1_IRQn;
700009a8:	68fb      	ldr	r3, [r7, #12]
700009aa:	f04f 020b 	mov.w	r2, #11
700009ae:	811a      	strh	r2, [r3, #8]

        pclk_freq = g_FrequencyPCLK1;
700009b0:	f248 5338 	movw	r3, #34104	; 0x8538
700009b4:	f2c7 0300 	movt	r3, #28672	; 0x7000
700009b8:	681b      	ldr	r3, [r3, #0]
700009ba:	617b      	str	r3, [r7, #20]

        /* Reset UART1 */
        SYSREG->SOFT_RST_CR |= SYSREG_UART1_SOFTRESET_MASK;
700009bc:	f242 0300 	movw	r3, #8192	; 0x2000
700009c0:	f2ce 0304 	movt	r3, #57348	; 0xe004
700009c4:	f242 0200 	movw	r2, #8192	; 0x2000
700009c8:	f2ce 0204 	movt	r2, #57348	; 0xe004
700009cc:	6b12      	ldr	r2, [r2, #48]	; 0x30
700009ce:	f442 7280 	orr.w	r2, r2, #256	; 0x100
700009d2:	631a      	str	r2, [r3, #48]	; 0x30
        /* Clear any previously pended UART1 interrupt */
        NVIC_ClearPendingIRQ( UART1_IRQn );
700009d4:	f04f 000b 	mov.w	r0, #11
700009d8:	f7ff ff6e 	bl	700008b8 <NVIC_ClearPendingIRQ>
        /* Take UART1 out of reset. */
        SYSREG->SOFT_RST_CR &= ~SYSREG_UART1_SOFTRESET_MASK;
700009dc:	f242 0300 	movw	r3, #8192	; 0x2000
700009e0:	f2ce 0304 	movt	r3, #57348	; 0xe004
700009e4:	f242 0200 	movw	r2, #8192	; 0x2000
700009e8:	f2ce 0204 	movt	r2, #57348	; 0xe004
700009ec:	6b12      	ldr	r2, [r2, #48]	; 0x30
700009ee:	f422 7280 	bic.w	r2, r2, #256	; 0x100
700009f2:	631a      	str	r2, [r3, #48]	; 0x30
    }

    /* disable interrupts */
    this_uart->hw_reg->IER = 0U;
700009f4:	68fb      	ldr	r3, [r7, #12]
700009f6:	681b      	ldr	r3, [r3, #0]
700009f8:	f04f 0200 	mov.w	r2, #0
700009fc:	711a      	strb	r2, [r3, #4]
     * The baud value is computed using the following equation:
     *      baud_value = PCLK_Frequency / (baud_rate * 16)
     * The baud value is rounded up or down depending on what would be the remainder
     * of the divide by 16 operation.
     */
    baud_value = (uint16_t)(pclk_freq / baud_rate);
700009fe:	697a      	ldr	r2, [r7, #20]
70000a00:	68bb      	ldr	r3, [r7, #8]
70000a02:	fbb2 f3f3 	udiv	r3, r2, r3
70000a06:	827b      	strh	r3, [r7, #18]
    if ( baud_value & 0x00000008U )
70000a08:	8a7b      	ldrh	r3, [r7, #18]
70000a0a:	f003 0308 	and.w	r3, r3, #8
70000a0e:	2b00      	cmp	r3, #0
70000a10:	d007      	beq.n	70000a22 <MSS_UART_init+0x12e>
    {
        /* remainder above 0.5 */
        baud_value = (baud_value >> 4U) + 1U;
70000a12:	8a7b      	ldrh	r3, [r7, #18]
70000a14:	ea4f 1313 	mov.w	r3, r3, lsr #4
70000a18:	b29b      	uxth	r3, r3
70000a1a:	f103 0301 	add.w	r3, r3, #1
70000a1e:	827b      	strh	r3, [r7, #18]
70000a20:	e003      	b.n	70000a2a <MSS_UART_init+0x136>
    }
    else
    {
        /* remainder below 0.5 */
        baud_value = (baud_value >> 4U);
70000a22:	8a7b      	ldrh	r3, [r7, #18]
70000a24:	ea4f 1313 	mov.w	r3, r3, lsr #4
70000a28:	827b      	strh	r3, [r7, #18]
    }

    /* set divisor latch */
    this_uart->hw_reg_bit->LCR_DLAB = (uint32_t)1;
70000a2a:	68fb      	ldr	r3, [r7, #12]
70000a2c:	685b      	ldr	r3, [r3, #4]
70000a2e:	f04f 0201 	mov.w	r2, #1
70000a32:	f8c3 219c 	str.w	r2, [r3, #412]	; 0x19c

    /* msb of baud value */
    this_uart->hw_reg->DMR = (uint8_t)(baud_value >> 8);
70000a36:	68fb      	ldr	r3, [r7, #12]
70000a38:	681b      	ldr	r3, [r3, #0]
70000a3a:	8a7a      	ldrh	r2, [r7, #18]
70000a3c:	ea4f 2212 	mov.w	r2, r2, lsr #8
70000a40:	b292      	uxth	r2, r2
70000a42:	b2d2      	uxtb	r2, r2
70000a44:	711a      	strb	r2, [r3, #4]
    /* lsb of baud value */
    this_uart->hw_reg->DLR = (uint8_t)baud_value;
70000a46:	68fb      	ldr	r3, [r7, #12]
70000a48:	681b      	ldr	r3, [r3, #0]
70000a4a:	8a7a      	ldrh	r2, [r7, #18]
70000a4c:	b2d2      	uxtb	r2, r2
70000a4e:	701a      	strb	r2, [r3, #0]

    /* reset divisor latch */
    this_uart->hw_reg_bit->LCR_DLAB = (uint32_t)0;
70000a50:	68fb      	ldr	r3, [r7, #12]
70000a52:	685b      	ldr	r3, [r3, #4]
70000a54:	f04f 0200 	mov.w	r2, #0
70000a58:	f8c3 219c 	str.w	r2, [r3, #412]	; 0x19c

    /* set the line control register (bit length, stop bits, parity) */
    this_uart->hw_reg->LCR = line_config;
70000a5c:	68fb      	ldr	r3, [r7, #12]
70000a5e:	681b      	ldr	r3, [r3, #0]
70000a60:	79fa      	ldrb	r2, [r7, #7]
70000a62:	731a      	strb	r2, [r3, #12]

    /* FIFO configuration */
    this_uart->hw_reg->FCR = (uint8_t)MSS_UART_FIFO_SINGLE_BYTE;
70000a64:	68fb      	ldr	r3, [r7, #12]
70000a66:	681b      	ldr	r3, [r3, #0]
70000a68:	f04f 0200 	mov.w	r2, #0
70000a6c:	721a      	strb	r2, [r3, #8]
    /* clear receiver FIFO */
    this_uart->hw_reg_bit->FCR_CLEAR_RX_FIFO = (uint32_t)1;
70000a6e:	68fb      	ldr	r3, [r7, #12]
70000a70:	685b      	ldr	r3, [r3, #4]
70000a72:	f04f 0201 	mov.w	r2, #1
70000a76:	f8c3 2104 	str.w	r2, [r3, #260]	; 0x104
    /* clear transmitter FIFO */
    this_uart->hw_reg_bit->FCR_CLEAR_TX_FIFO = (uint32_t)1;
70000a7a:	68fb      	ldr	r3, [r7, #12]
70000a7c:	685b      	ldr	r3, [r3, #4]
70000a7e:	f04f 0201 	mov.w	r2, #1
70000a82:	f8c3 2108 	str.w	r2, [r3, #264]	; 0x108
    /* enable RXRDYN and TXRDYN pins. The earlier FCR write to set the TX FIFO
     * trigger level inadvertently disabled the FCR_RXRDY_TXRDYN_EN bit. */
    this_uart->hw_reg_bit->FCR_RXRDY_TXRDYN_EN = (uint32_t)1;
70000a86:	68fb      	ldr	r3, [r7, #12]
70000a88:	685b      	ldr	r3, [r3, #4]
70000a8a:	f04f 0201 	mov.w	r2, #1
70000a8e:	f8c3 210c 	str.w	r2, [r3, #268]	; 0x10c

    /* disable loopback */
    this_uart->hw_reg_bit->MCR_LOOP = (uint32_t)0;
70000a92:	68fb      	ldr	r3, [r7, #12]
70000a94:	685b      	ldr	r3, [r3, #4]
70000a96:	f04f 0200 	mov.w	r2, #0
70000a9a:	f8c3 2210 	str.w	r2, [r3, #528]	; 0x210

    /* Instance setup */
    this_uart->tx_buff_size = TX_COMPLETE;
70000a9e:	68fb      	ldr	r3, [r7, #12]
70000aa0:	f04f 0200 	mov.w	r2, #0
70000aa4:	611a      	str	r2, [r3, #16]
    this_uart->tx_buffer = (const uint8_t *)0;
70000aa6:	68fb      	ldr	r3, [r7, #12]
70000aa8:	f04f 0200 	mov.w	r2, #0
70000aac:	60da      	str	r2, [r3, #12]
    this_uart->tx_idx = 0U;
70000aae:	68fb      	ldr	r3, [r7, #12]
70000ab0:	f04f 0200 	mov.w	r2, #0
70000ab4:	615a      	str	r2, [r3, #20]

    /* Default handlers for MSS UART interrupts */
    this_uart->rx_handler       = NULL_HANDLER;
70000ab6:	68fb      	ldr	r3, [r7, #12]
70000ab8:	f04f 0200 	mov.w	r2, #0
70000abc:	61da      	str	r2, [r3, #28]
    this_uart->tx_handler       = default_tx_handler;
70000abe:	68fa      	ldr	r2, [r7, #12]
70000ac0:	f241 03dd 	movw	r3, #4317	; 0x10dd
70000ac4:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000ac8:	6213      	str	r3, [r2, #32]
    this_uart->linests_handler  = NULL_HANDLER;
70000aca:	68fb      	ldr	r3, [r7, #12]
70000acc:	f04f 0200 	mov.w	r2, #0
70000ad0:	619a      	str	r2, [r3, #24]
    this_uart->modemsts_handler = NULL_HANDLER;
70000ad2:	68fb      	ldr	r3, [r7, #12]
70000ad4:	f04f 0200 	mov.w	r2, #0
70000ad8:	625a      	str	r2, [r3, #36]	; 0x24

    /* Initialize the sticky status */
    this_uart->status = 0U;
70000ada:	68fb      	ldr	r3, [r7, #12]
70000adc:	f04f 0200 	mov.w	r2, #0
70000ae0:	729a      	strb	r2, [r3, #10]
}
70000ae2:	f107 0718 	add.w	r7, r7, #24
70000ae6:	46bd      	mov	sp, r7
70000ae8:	bd80      	pop	{r7, pc}
70000aea:	bf00      	nop

70000aec <MSS_UART_polled_tx>:
(
    mss_uart_instance_t * this_uart,
    const uint8_t * pbuff,
    uint32_t tx_size
)
{
70000aec:	b480      	push	{r7}
70000aee:	b089      	sub	sp, #36	; 0x24
70000af0:	af00      	add	r7, sp, #0
70000af2:	60f8      	str	r0, [r7, #12]
70000af4:	60b9      	str	r1, [r7, #8]
70000af6:	607a      	str	r2, [r7, #4]
    uint32_t char_idx = 0U;
70000af8:	f04f 0300 	mov.w	r3, #0
70000afc:	613b      	str	r3, [r7, #16]
    uint32_t size_sent;
    uint8_t status;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000afe:	68fa      	ldr	r2, [r7, #12]
70000b00:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000b04:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000b08:	429a      	cmp	r2, r3
70000b0a:	d007      	beq.n	70000b1c <MSS_UART_polled_tx+0x30>
70000b0c:	68fa      	ldr	r2, [r7, #12]
70000b0e:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000b12:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000b16:	429a      	cmp	r2, r3
70000b18:	d000      	beq.n	70000b1c <MSS_UART_polled_tx+0x30>
70000b1a:	be00      	bkpt	0x0000
    ASSERT( pbuff != ( (uint8_t *)0 ) );
70000b1c:	68bb      	ldr	r3, [r7, #8]
70000b1e:	2b00      	cmp	r3, #0
70000b20:	d100      	bne.n	70000b24 <MSS_UART_polled_tx+0x38>
70000b22:	be00      	bkpt	0x0000
    ASSERT( tx_size > 0U );
70000b24:	687b      	ldr	r3, [r7, #4]
70000b26:	2b00      	cmp	r3, #0
70000b28:	d100      	bne.n	70000b2c <MSS_UART_polled_tx+0x40>
70000b2a:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70000b2c:	68fa      	ldr	r2, [r7, #12]
70000b2e:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000b32:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000b36:	429a      	cmp	r2, r3
70000b38:	d006      	beq.n	70000b48 <MSS_UART_polled_tx+0x5c>
70000b3a:	68fa      	ldr	r2, [r7, #12]
70000b3c:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000b40:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000b44:	429a      	cmp	r2, r3
70000b46:	d13d      	bne.n	70000bc4 <MSS_UART_polled_tx+0xd8>
70000b48:	68bb      	ldr	r3, [r7, #8]
70000b4a:	2b00      	cmp	r3, #0
70000b4c:	d03a      	beq.n	70000bc4 <MSS_UART_polled_tx+0xd8>
70000b4e:	687b      	ldr	r3, [r7, #4]
70000b50:	2b00      	cmp	r3, #0
70000b52:	d037      	beq.n	70000bc4 <MSS_UART_polled_tx+0xd8>
         /* Remain in this loop until the entire input buffer
          * has been transferred to the UART.
          */
        do {
            /* Read the Line Status Register and update the sticky record */
            status = this_uart->hw_reg->LSR;
70000b54:	68fb      	ldr	r3, [r7, #12]
70000b56:	681b      	ldr	r3, [r3, #0]
70000b58:	7d1b      	ldrb	r3, [r3, #20]
70000b5a:	76fb      	strb	r3, [r7, #27]
            this_uart->status |= status;
70000b5c:	68fb      	ldr	r3, [r7, #12]
70000b5e:	7a9a      	ldrb	r2, [r3, #10]
70000b60:	7efb      	ldrb	r3, [r7, #27]
70000b62:	ea42 0303 	orr.w	r3, r2, r3
70000b66:	b2da      	uxtb	r2, r3
70000b68:	68fb      	ldr	r3, [r7, #12]
70000b6a:	729a      	strb	r2, [r3, #10]

            /* Check if TX FIFO is empty. */
            if( status & MSS_UART_THRE )
70000b6c:	7efb      	ldrb	r3, [r7, #27]
70000b6e:	f003 0320 	and.w	r3, r3, #32
70000b72:	2b00      	cmp	r3, #0
70000b74:	d023      	beq.n	70000bbe <MSS_UART_polled_tx+0xd2>
            {
                uint32_t fill_size = TX_FIFO_SIZE;
70000b76:	f04f 0310 	mov.w	r3, #16
70000b7a:	61fb      	str	r3, [r7, #28]

                /* Calculate the number of bytes to transmit. */
                if ( tx_size < TX_FIFO_SIZE )
70000b7c:	687b      	ldr	r3, [r7, #4]
70000b7e:	2b0f      	cmp	r3, #15
70000b80:	d801      	bhi.n	70000b86 <MSS_UART_polled_tx+0x9a>
                {
                    fill_size = tx_size;
70000b82:	687b      	ldr	r3, [r7, #4]
70000b84:	61fb      	str	r3, [r7, #28]
                }

                /* Fill the TX FIFO with the calculated the number of bytes. */
                for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
70000b86:	f04f 0300 	mov.w	r3, #0
70000b8a:	617b      	str	r3, [r7, #20]
70000b8c:	e00e      	b.n	70000bac <MSS_UART_polled_tx+0xc0>
                {
                    /* Send next character in the buffer. */
                    this_uart->hw_reg->THR = pbuff[char_idx++];
70000b8e:	68fb      	ldr	r3, [r7, #12]
70000b90:	681b      	ldr	r3, [r3, #0]
70000b92:	68b9      	ldr	r1, [r7, #8]
70000b94:	693a      	ldr	r2, [r7, #16]
70000b96:	440a      	add	r2, r1
70000b98:	7812      	ldrb	r2, [r2, #0]
70000b9a:	701a      	strb	r2, [r3, #0]
70000b9c:	693b      	ldr	r3, [r7, #16]
70000b9e:	f103 0301 	add.w	r3, r3, #1
70000ba2:	613b      	str	r3, [r7, #16]
                {
                    fill_size = tx_size;
                }

                /* Fill the TX FIFO with the calculated the number of bytes. */
                for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
70000ba4:	697b      	ldr	r3, [r7, #20]
70000ba6:	f103 0301 	add.w	r3, r3, #1
70000baa:	617b      	str	r3, [r7, #20]
70000bac:	697a      	ldr	r2, [r7, #20]
70000bae:	69fb      	ldr	r3, [r7, #28]
70000bb0:	429a      	cmp	r2, r3
70000bb2:	d3ec      	bcc.n	70000b8e <MSS_UART_polled_tx+0xa2>
                    /* Send next character in the buffer. */
                    this_uart->hw_reg->THR = pbuff[char_idx++];
                }

                /* Calculate the number of untransmitted bytes remaining. */
                tx_size -= size_sent;
70000bb4:	687a      	ldr	r2, [r7, #4]
70000bb6:	697b      	ldr	r3, [r7, #20]
70000bb8:	ebc3 0302 	rsb	r3, r3, r2
70000bbc:	607b      	str	r3, [r7, #4]
            }
        }while( tx_size );
70000bbe:	687b      	ldr	r3, [r7, #4]
70000bc0:	2b00      	cmp	r3, #0
70000bc2:	d1c7      	bne.n	70000b54 <MSS_UART_polled_tx+0x68>
    }
}
70000bc4:	f107 0724 	add.w	r7, r7, #36	; 0x24
70000bc8:	46bd      	mov	sp, r7
70000bca:	bc80      	pop	{r7}
70000bcc:	4770      	bx	lr
70000bce:	bf00      	nop

70000bd0 <MSS_UART_polled_tx_string>:
MSS_UART_polled_tx_string
(
    mss_uart_instance_t * this_uart,
    const uint8_t * p_sz_string
)
{
70000bd0:	b480      	push	{r7}
70000bd2:	b087      	sub	sp, #28
70000bd4:	af00      	add	r7, sp, #0
70000bd6:	6078      	str	r0, [r7, #4]
70000bd8:	6039      	str	r1, [r7, #0]
    uint32_t char_idx = 0U;
70000bda:	f04f 0300 	mov.w	r3, #0
70000bde:	60bb      	str	r3, [r7, #8]
    uint32_t fill_size;
    uint_fast8_t data_byte;
    uint8_t status;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000be0:	687a      	ldr	r2, [r7, #4]
70000be2:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000be6:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000bea:	429a      	cmp	r2, r3
70000bec:	d007      	beq.n	70000bfe <MSS_UART_polled_tx_string+0x2e>
70000bee:	687a      	ldr	r2, [r7, #4]
70000bf0:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000bf4:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000bf8:	429a      	cmp	r2, r3
70000bfa:	d000      	beq.n	70000bfe <MSS_UART_polled_tx_string+0x2e>
70000bfc:	be00      	bkpt	0x0000
    ASSERT( p_sz_string != ( (uint8_t *)0 ) );
70000bfe:	683b      	ldr	r3, [r7, #0]
70000c00:	2b00      	cmp	r3, #0
70000c02:	d100      	bne.n	70000c06 <MSS_UART_polled_tx_string+0x36>
70000c04:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70000c06:	687a      	ldr	r2, [r7, #4]
70000c08:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000c0c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000c10:	429a      	cmp	r2, r3
70000c12:	d006      	beq.n	70000c22 <MSS_UART_polled_tx_string+0x52>
70000c14:	687a      	ldr	r2, [r7, #4]
70000c16:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000c1a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000c1e:	429a      	cmp	r2, r3
70000c20:	d138      	bne.n	70000c94 <MSS_UART_polled_tx_string+0xc4>
70000c22:	683b      	ldr	r3, [r7, #0]
70000c24:	2b00      	cmp	r3, #0
70000c26:	d035      	beq.n	70000c94 <MSS_UART_polled_tx_string+0xc4>
          ( p_sz_string != ( (uint8_t *)0 ) ) )
    {
        /* Get the first data byte from the input buffer */
        data_byte = (uint_fast8_t)p_sz_string[char_idx];
70000c28:	683a      	ldr	r2, [r7, #0]
70000c2a:	68bb      	ldr	r3, [r7, #8]
70000c2c:	4413      	add	r3, r2
70000c2e:	781b      	ldrb	r3, [r3, #0]
70000c30:	613b      	str	r3, [r7, #16]

        /* First check for the NULL terminator byte.
         * Then remain in this loop until the entire string in the input buffer
         * has been transferred to the UART.
         */
        while ( 0U != data_byte )
70000c32:	e02c      	b.n	70000c8e <MSS_UART_polled_tx_string+0xbe>
        {
            /* Wait until TX FIFO is empty. */
            do {
                status = this_uart->hw_reg->LSR;
70000c34:	687b      	ldr	r3, [r7, #4]
70000c36:	681b      	ldr	r3, [r3, #0]
70000c38:	7d1b      	ldrb	r3, [r3, #20]
70000c3a:	75fb      	strb	r3, [r7, #23]
                this_uart->status |= status;
70000c3c:	687b      	ldr	r3, [r7, #4]
70000c3e:	7a9a      	ldrb	r2, [r3, #10]
70000c40:	7dfb      	ldrb	r3, [r7, #23]
70000c42:	ea42 0303 	orr.w	r3, r2, r3
70000c46:	b2da      	uxtb	r2, r3
70000c48:	687b      	ldr	r3, [r7, #4]
70000c4a:	729a      	strb	r2, [r3, #10]
            } while ( !( status & MSS_UART_THRE ) );
70000c4c:	7dfb      	ldrb	r3, [r7, #23]
70000c4e:	f003 0320 	and.w	r3, r3, #32
70000c52:	2b00      	cmp	r3, #0
70000c54:	d0ee      	beq.n	70000c34 <MSS_UART_polled_tx_string+0x64>

            /* Send bytes from the input buffer until the TX FIFO is full
             * or we reach the NULL terminator byte.
             */
            fill_size = 0U;
70000c56:	f04f 0300 	mov.w	r3, #0
70000c5a:	60fb      	str	r3, [r7, #12]
            while ( (0U != data_byte) && (fill_size < TX_FIFO_SIZE) )
70000c5c:	e011      	b.n	70000c82 <MSS_UART_polled_tx_string+0xb2>
            {
                /* Send the data byte */
                this_uart->hw_reg->THR = data_byte;
70000c5e:	687b      	ldr	r3, [r7, #4]
70000c60:	681b      	ldr	r3, [r3, #0]
70000c62:	693a      	ldr	r2, [r7, #16]
70000c64:	b2d2      	uxtb	r2, r2
70000c66:	701a      	strb	r2, [r3, #0]
                ++fill_size;
70000c68:	68fb      	ldr	r3, [r7, #12]
70000c6a:	f103 0301 	add.w	r3, r3, #1
70000c6e:	60fb      	str	r3, [r7, #12]
                char_idx++;
70000c70:	68bb      	ldr	r3, [r7, #8]
70000c72:	f103 0301 	add.w	r3, r3, #1
70000c76:	60bb      	str	r3, [r7, #8]
                /* Get the next data byte from the input buffer */
                data_byte = (uint_fast8_t)p_sz_string[char_idx];
70000c78:	683a      	ldr	r2, [r7, #0]
70000c7a:	68bb      	ldr	r3, [r7, #8]
70000c7c:	4413      	add	r3, r2
70000c7e:	781b      	ldrb	r3, [r3, #0]
70000c80:	613b      	str	r3, [r7, #16]

            /* Send bytes from the input buffer until the TX FIFO is full
             * or we reach the NULL terminator byte.
             */
            fill_size = 0U;
            while ( (0U != data_byte) && (fill_size < TX_FIFO_SIZE) )
70000c82:	693b      	ldr	r3, [r7, #16]
70000c84:	2b00      	cmp	r3, #0
70000c86:	d002      	beq.n	70000c8e <MSS_UART_polled_tx_string+0xbe>
70000c88:	68fb      	ldr	r3, [r7, #12]
70000c8a:	2b0f      	cmp	r3, #15
70000c8c:	d9e7      	bls.n	70000c5e <MSS_UART_polled_tx_string+0x8e>

        /* First check for the NULL terminator byte.
         * Then remain in this loop until the entire string in the input buffer
         * has been transferred to the UART.
         */
        while ( 0U != data_byte )
70000c8e:	693b      	ldr	r3, [r7, #16]
70000c90:	2b00      	cmp	r3, #0
70000c92:	d1cf      	bne.n	70000c34 <MSS_UART_polled_tx_string+0x64>
                /* Get the next data byte from the input buffer */
                data_byte = (uint_fast8_t)p_sz_string[char_idx];
            }
        }
    }
}
70000c94:	f107 071c 	add.w	r7, r7, #28
70000c98:	46bd      	mov	sp, r7
70000c9a:	bc80      	pop	{r7}
70000c9c:	4770      	bx	lr
70000c9e:	bf00      	nop

70000ca0 <MSS_UART_irq_tx>:
(
    mss_uart_instance_t * this_uart,
    const uint8_t * pbuff,
    uint32_t tx_size
)
{
70000ca0:	b580      	push	{r7, lr}
70000ca2:	b084      	sub	sp, #16
70000ca4:	af00      	add	r7, sp, #0
70000ca6:	60f8      	str	r0, [r7, #12]
70000ca8:	60b9      	str	r1, [r7, #8]
70000caa:	607a      	str	r2, [r7, #4]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000cac:	68fa      	ldr	r2, [r7, #12]
70000cae:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000cb2:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000cb6:	429a      	cmp	r2, r3
70000cb8:	d007      	beq.n	70000cca <MSS_UART_irq_tx+0x2a>
70000cba:	68fa      	ldr	r2, [r7, #12]
70000cbc:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000cc0:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000cc4:	429a      	cmp	r2, r3
70000cc6:	d000      	beq.n	70000cca <MSS_UART_irq_tx+0x2a>
70000cc8:	be00      	bkpt	0x0000
    ASSERT( pbuff != ((uint8_t *)0) );
70000cca:	68bb      	ldr	r3, [r7, #8]
70000ccc:	2b00      	cmp	r3, #0
70000cce:	d100      	bne.n	70000cd2 <MSS_UART_irq_tx+0x32>
70000cd0:	be00      	bkpt	0x0000
    ASSERT( tx_size > 0U );
70000cd2:	687b      	ldr	r3, [r7, #4]
70000cd4:	2b00      	cmp	r3, #0
70000cd6:	d100      	bne.n	70000cda <MSS_UART_irq_tx+0x3a>
70000cd8:	be00      	bkpt	0x0000

    if ( ( tx_size > 0U ) && ( pbuff != ((uint8_t *)0) ) &&
70000cda:	687b      	ldr	r3, [r7, #4]
70000cdc:	2b00      	cmp	r3, #0
70000cde:	d032      	beq.n	70000d46 <MSS_UART_irq_tx+0xa6>
70000ce0:	68bb      	ldr	r3, [r7, #8]
70000ce2:	2b00      	cmp	r3, #0
70000ce4:	d02f      	beq.n	70000d46 <MSS_UART_irq_tx+0xa6>
       ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) )
70000ce6:	68fa      	ldr	r2, [r7, #12]
70000ce8:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000cec:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000cf0:	429a      	cmp	r2, r3
70000cf2:	d006      	beq.n	70000d02 <MSS_UART_irq_tx+0x62>
70000cf4:	68fa      	ldr	r2, [r7, #12]
70000cf6:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000cfa:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000cfe:	429a      	cmp	r2, r3
70000d00:	d121      	bne.n	70000d46 <MSS_UART_irq_tx+0xa6>
    {
        /*Initialise the transmit info for the UART instance with the arguments.*/
        this_uart->tx_buffer = pbuff;
70000d02:	68fb      	ldr	r3, [r7, #12]
70000d04:	68ba      	ldr	r2, [r7, #8]
70000d06:	60da      	str	r2, [r3, #12]
        this_uart->tx_buff_size = tx_size;
70000d08:	68fb      	ldr	r3, [r7, #12]
70000d0a:	687a      	ldr	r2, [r7, #4]
70000d0c:	611a      	str	r2, [r3, #16]
        this_uart->tx_idx = (uint16_t)0;
70000d0e:	68fb      	ldr	r3, [r7, #12]
70000d10:	f04f 0200 	mov.w	r2, #0
70000d14:	615a      	str	r2, [r3, #20]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
70000d16:	68fb      	ldr	r3, [r7, #12]
70000d18:	891b      	ldrh	r3, [r3, #8]
70000d1a:	b21b      	sxth	r3, r3
70000d1c:	4618      	mov	r0, r3
70000d1e:	f7ff fdcb 	bl	700008b8 <NVIC_ClearPendingIRQ>

        /* assign default handler for data transfer */
        this_uart->tx_handler = default_tx_handler;
70000d22:	68fa      	ldr	r2, [r7, #12]
70000d24:	f241 03dd 	movw	r3, #4317	; 0x10dd
70000d28:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000d2c:	6213      	str	r3, [r2, #32]

        /* enables TX interrupt */
        this_uart->hw_reg_bit->IER_ETBEI = (uint32_t)1;
70000d2e:	68fb      	ldr	r3, [r7, #12]
70000d30:	685b      	ldr	r3, [r3, #4]
70000d32:	f04f 0201 	mov.w	r2, #1
70000d36:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
70000d3a:	68fb      	ldr	r3, [r7, #12]
70000d3c:	891b      	ldrh	r3, [r3, #8]
70000d3e:	b21b      	sxth	r3, r3
70000d40:	4618      	mov	r0, r3
70000d42:	f7ff fd7f 	bl	70000844 <NVIC_EnableIRQ>
    }
}
70000d46:	f107 0710 	add.w	r7, r7, #16
70000d4a:	46bd      	mov	sp, r7
70000d4c:	bd80      	pop	{r7, pc}
70000d4e:	bf00      	nop

70000d50 <MSS_UART_tx_complete>:
int8_t
MSS_UART_tx_complete
(
    mss_uart_instance_t * this_uart
)
{
70000d50:	b480      	push	{r7}
70000d52:	b085      	sub	sp, #20
70000d54:	af00      	add	r7, sp, #0
70000d56:	6078      	str	r0, [r7, #4]
    int8_t ret_value = 0;
70000d58:	f04f 0300 	mov.w	r3, #0
70000d5c:	73bb      	strb	r3, [r7, #14]
    uint8_t status = 0U;
70000d5e:	f04f 0300 	mov.w	r3, #0
70000d62:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000d64:	687a      	ldr	r2, [r7, #4]
70000d66:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000d6a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000d6e:	429a      	cmp	r2, r3
70000d70:	d007      	beq.n	70000d82 <MSS_UART_tx_complete+0x32>
70000d72:	687a      	ldr	r2, [r7, #4]
70000d74:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000d78:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000d7c:	429a      	cmp	r2, r3
70000d7e:	d000      	beq.n	70000d82 <MSS_UART_tx_complete+0x32>
70000d80:	be00      	bkpt	0x0000

    if ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
70000d82:	687a      	ldr	r2, [r7, #4]
70000d84:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000d88:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000d8c:	429a      	cmp	r2, r3
70000d8e:	d006      	beq.n	70000d9e <MSS_UART_tx_complete+0x4e>
70000d90:	687a      	ldr	r2, [r7, #4]
70000d92:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000d96:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000d9a:	429a      	cmp	r2, r3
70000d9c:	d117      	bne.n	70000dce <MSS_UART_tx_complete+0x7e>
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
70000d9e:	687b      	ldr	r3, [r7, #4]
70000da0:	681b      	ldr	r3, [r3, #0]
70000da2:	7d1b      	ldrb	r3, [r3, #20]
70000da4:	73fb      	strb	r3, [r7, #15]
        this_uart->status |= status;
70000da6:	687b      	ldr	r3, [r7, #4]
70000da8:	7a9a      	ldrb	r2, [r3, #10]
70000daa:	7bfb      	ldrb	r3, [r7, #15]
70000dac:	ea42 0303 	orr.w	r3, r2, r3
70000db0:	b2da      	uxtb	r2, r3
70000db2:	687b      	ldr	r3, [r7, #4]
70000db4:	729a      	strb	r2, [r3, #10]

        if ( ( TX_COMPLETE == this_uart->tx_buff_size ) &&
70000db6:	687b      	ldr	r3, [r7, #4]
70000db8:	691b      	ldr	r3, [r3, #16]
70000dba:	2b00      	cmp	r3, #0
70000dbc:	d107      	bne.n	70000dce <MSS_UART_tx_complete+0x7e>
             ( status & MSS_UART_TEMT ) )
70000dbe:	7bfb      	ldrb	r3, [r7, #15]
70000dc0:	f003 0340 	and.w	r3, r3, #64	; 0x40
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
        this_uart->status |= status;

        if ( ( TX_COMPLETE == this_uart->tx_buff_size ) &&
70000dc4:	2b00      	cmp	r3, #0
70000dc6:	d002      	beq.n	70000dce <MSS_UART_tx_complete+0x7e>
             ( status & MSS_UART_TEMT ) )
        {
            ret_value = (int8_t)1;
70000dc8:	f04f 0301 	mov.w	r3, #1
70000dcc:	73bb      	strb	r3, [r7, #14]
        }
    }
    return ret_value;
70000dce:	7bbb      	ldrb	r3, [r7, #14]
70000dd0:	b25b      	sxtb	r3, r3
}
70000dd2:	4618      	mov	r0, r3
70000dd4:	f107 0714 	add.w	r7, r7, #20
70000dd8:	46bd      	mov	sp, r7
70000dda:	bc80      	pop	{r7}
70000ddc:	4770      	bx	lr
70000dde:	bf00      	nop

70000de0 <MSS_UART_get_rx>:
(
    mss_uart_instance_t * this_uart,
    uint8_t * rx_buff,
    size_t buff_size
)
{
70000de0:	b480      	push	{r7}
70000de2:	b087      	sub	sp, #28
70000de4:	af00      	add	r7, sp, #0
70000de6:	60f8      	str	r0, [r7, #12]
70000de8:	60b9      	str	r1, [r7, #8]
70000dea:	607a      	str	r2, [r7, #4]
    size_t rx_size = 0U;
70000dec:	f04f 0300 	mov.w	r3, #0
70000df0:	613b      	str	r3, [r7, #16]
    uint8_t status = 0U;
70000df2:	f04f 0300 	mov.w	r3, #0
70000df6:	75fb      	strb	r3, [r7, #23]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000df8:	68fa      	ldr	r2, [r7, #12]
70000dfa:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000dfe:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000e02:	429a      	cmp	r2, r3
70000e04:	d007      	beq.n	70000e16 <MSS_UART_get_rx+0x36>
70000e06:	68fa      	ldr	r2, [r7, #12]
70000e08:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000e0c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000e10:	429a      	cmp	r2, r3
70000e12:	d000      	beq.n	70000e16 <MSS_UART_get_rx+0x36>
70000e14:	be00      	bkpt	0x0000
    ASSERT( rx_buff != ((uint8_t *)0) );
70000e16:	68bb      	ldr	r3, [r7, #8]
70000e18:	2b00      	cmp	r3, #0
70000e1a:	d100      	bne.n	70000e1e <MSS_UART_get_rx+0x3e>
70000e1c:	be00      	bkpt	0x0000
    ASSERT( buff_size > 0U );
70000e1e:	687b      	ldr	r3, [r7, #4]
70000e20:	2b00      	cmp	r3, #0
70000e22:	d100      	bne.n	70000e26 <MSS_UART_get_rx+0x46>
70000e24:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70000e26:	68fa      	ldr	r2, [r7, #12]
70000e28:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000e2c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000e30:	429a      	cmp	r2, r3
70000e32:	d006      	beq.n	70000e42 <MSS_UART_get_rx+0x62>
70000e34:	68fa      	ldr	r2, [r7, #12]
70000e36:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000e3a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000e3e:	429a      	cmp	r2, r3
70000e40:	d134      	bne.n	70000eac <MSS_UART_get_rx+0xcc>
70000e42:	68bb      	ldr	r3, [r7, #8]
70000e44:	2b00      	cmp	r3, #0
70000e46:	d031      	beq.n	70000eac <MSS_UART_get_rx+0xcc>
70000e48:	687b      	ldr	r3, [r7, #4]
70000e4a:	2b00      	cmp	r3, #0
70000e4c:	d02e      	beq.n	70000eac <MSS_UART_get_rx+0xcc>
          ( rx_buff != ((uint8_t *)0) ) && ( buff_size > 0U ) )
    {
        status = this_uart->hw_reg->LSR;
70000e4e:	68fb      	ldr	r3, [r7, #12]
70000e50:	681b      	ldr	r3, [r3, #0]
70000e52:	7d1b      	ldrb	r3, [r3, #20]
70000e54:	75fb      	strb	r3, [r7, #23]
        this_uart->status |= status;
70000e56:	68fb      	ldr	r3, [r7, #12]
70000e58:	7a9a      	ldrb	r2, [r3, #10]
70000e5a:	7dfb      	ldrb	r3, [r7, #23]
70000e5c:	ea42 0303 	orr.w	r3, r2, r3
70000e60:	b2da      	uxtb	r2, r3
70000e62:	68fb      	ldr	r3, [r7, #12]
70000e64:	729a      	strb	r2, [r3, #10]

        while (( (status & MSS_UART_DATA_READY) != 0U) &&
70000e66:	e017      	b.n	70000e98 <MSS_UART_get_rx+0xb8>
               ( rx_size < buff_size ) )
        {
            rx_buff[rx_size] = this_uart->hw_reg->RBR;
70000e68:	68ba      	ldr	r2, [r7, #8]
70000e6a:	693b      	ldr	r3, [r7, #16]
70000e6c:	4413      	add	r3, r2
70000e6e:	68fa      	ldr	r2, [r7, #12]
70000e70:	6812      	ldr	r2, [r2, #0]
70000e72:	7812      	ldrb	r2, [r2, #0]
70000e74:	b2d2      	uxtb	r2, r2
70000e76:	701a      	strb	r2, [r3, #0]
            ++rx_size;
70000e78:	693b      	ldr	r3, [r7, #16]
70000e7a:	f103 0301 	add.w	r3, r3, #1
70000e7e:	613b      	str	r3, [r7, #16]
            status = this_uart->hw_reg->LSR;
70000e80:	68fb      	ldr	r3, [r7, #12]
70000e82:	681b      	ldr	r3, [r3, #0]
70000e84:	7d1b      	ldrb	r3, [r3, #20]
70000e86:	75fb      	strb	r3, [r7, #23]
            this_uart->status |= status;
70000e88:	68fb      	ldr	r3, [r7, #12]
70000e8a:	7a9a      	ldrb	r2, [r3, #10]
70000e8c:	7dfb      	ldrb	r3, [r7, #23]
70000e8e:	ea42 0303 	orr.w	r3, r2, r3
70000e92:	b2da      	uxtb	r2, r3
70000e94:	68fb      	ldr	r3, [r7, #12]
70000e96:	729a      	strb	r2, [r3, #10]
          ( rx_buff != ((uint8_t *)0) ) && ( buff_size > 0U ) )
    {
        status = this_uart->hw_reg->LSR;
        this_uart->status |= status;

        while (( (status & MSS_UART_DATA_READY) != 0U) &&
70000e98:	7dfb      	ldrb	r3, [r7, #23]
70000e9a:	f003 0301 	and.w	r3, r3, #1
70000e9e:	b2db      	uxtb	r3, r3
70000ea0:	2b00      	cmp	r3, #0
70000ea2:	d003      	beq.n	70000eac <MSS_UART_get_rx+0xcc>
70000ea4:	693a      	ldr	r2, [r7, #16]
70000ea6:	687b      	ldr	r3, [r7, #4]
70000ea8:	429a      	cmp	r2, r3
70000eaa:	d3dd      	bcc.n	70000e68 <MSS_UART_get_rx+0x88>
            ++rx_size;
            status = this_uart->hw_reg->LSR;
            this_uart->status |= status;
        }
    }
    return rx_size;
70000eac:	693b      	ldr	r3, [r7, #16]
}
70000eae:	4618      	mov	r0, r3
70000eb0:	f107 071c 	add.w	r7, r7, #28
70000eb4:	46bd      	mov	sp, r7
70000eb6:	bc80      	pop	{r7}
70000eb8:	4770      	bx	lr
70000eba:	bf00      	nop

70000ebc <MSS_UART_enable_irq>:
MSS_UART_enable_irq
(
    mss_uart_instance_t * this_uart,
    uint8_t irq_mask
)
{
70000ebc:	b580      	push	{r7, lr}
70000ebe:	b082      	sub	sp, #8
70000ec0:	af00      	add	r7, sp, #0
70000ec2:	6078      	str	r0, [r7, #4]
70000ec4:	460b      	mov	r3, r1
70000ec6:	70fb      	strb	r3, [r7, #3]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000ec8:	687a      	ldr	r2, [r7, #4]
70000eca:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000ece:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000ed2:	429a      	cmp	r2, r3
70000ed4:	d007      	beq.n	70000ee6 <MSS_UART_enable_irq+0x2a>
70000ed6:	687a      	ldr	r2, [r7, #4]
70000ed8:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000edc:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000ee0:	429a      	cmp	r2, r3
70000ee2:	d000      	beq.n	70000ee6 <MSS_UART_enable_irq+0x2a>
70000ee4:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
70000ee6:	687a      	ldr	r2, [r7, #4]
70000ee8:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000eec:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000ef0:	429a      	cmp	r2, r3
70000ef2:	d006      	beq.n	70000f02 <MSS_UART_enable_irq+0x46>
70000ef4:	687a      	ldr	r2, [r7, #4]
70000ef6:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000efa:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000efe:	429a      	cmp	r2, r3
70000f00:	d116      	bne.n	70000f30 <MSS_UART_enable_irq+0x74>
    {
        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
70000f02:	687b      	ldr	r3, [r7, #4]
70000f04:	891b      	ldrh	r3, [r3, #8]
70000f06:	b21b      	sxth	r3, r3
70000f08:	4618      	mov	r0, r3
70000f0a:	f7ff fcd5 	bl	700008b8 <NVIC_ClearPendingIRQ>
         * bit 0 - Receive Data Available Interrupt
         * bit 1 - Transmitter Holding  Register Empty Interrupt
         * bit 2 - Receiver Line Status Interrupt
         * bit 3 - Modem Status Interrupt
         */
        this_uart->hw_reg->IER |= irq_mask;
70000f0e:	687b      	ldr	r3, [r7, #4]
70000f10:	681b      	ldr	r3, [r3, #0]
70000f12:	687a      	ldr	r2, [r7, #4]
70000f14:	6812      	ldr	r2, [r2, #0]
70000f16:	7912      	ldrb	r2, [r2, #4]
70000f18:	b2d1      	uxtb	r1, r2
70000f1a:	78fa      	ldrb	r2, [r7, #3]
70000f1c:	ea41 0202 	orr.w	r2, r1, r2
70000f20:	b2d2      	uxtb	r2, r2
70000f22:	711a      	strb	r2, [r3, #4]

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
70000f24:	687b      	ldr	r3, [r7, #4]
70000f26:	891b      	ldrh	r3, [r3, #8]
70000f28:	b21b      	sxth	r3, r3
70000f2a:	4618      	mov	r0, r3
70000f2c:	f7ff fc8a 	bl	70000844 <NVIC_EnableIRQ>
    }
}
70000f30:	f107 0708 	add.w	r7, r7, #8
70000f34:	46bd      	mov	sp, r7
70000f36:	bd80      	pop	{r7, pc}

70000f38 <MSS_UART_disable_irq>:
MSS_UART_disable_irq
(
    mss_uart_instance_t * this_uart,
    uint8_t irq_mask
)
{
70000f38:	b580      	push	{r7, lr}
70000f3a:	b082      	sub	sp, #8
70000f3c:	af00      	add	r7, sp, #0
70000f3e:	6078      	str	r0, [r7, #4]
70000f40:	460b      	mov	r3, r1
70000f42:	70fb      	strb	r3, [r7, #3]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000f44:	687a      	ldr	r2, [r7, #4]
70000f46:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000f4a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000f4e:	429a      	cmp	r2, r3
70000f50:	d007      	beq.n	70000f62 <MSS_UART_disable_irq+0x2a>
70000f52:	687a      	ldr	r2, [r7, #4]
70000f54:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000f58:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000f5c:	429a      	cmp	r2, r3
70000f5e:	d000      	beq.n	70000f62 <MSS_UART_disable_irq+0x2a>
70000f60:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
70000f62:	687a      	ldr	r2, [r7, #4]
70000f64:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000f68:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000f6c:	429a      	cmp	r2, r3
70000f6e:	d006      	beq.n	70000f7e <MSS_UART_disable_irq+0x46>
70000f70:	687a      	ldr	r2, [r7, #4]
70000f72:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000f76:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000f7a:	429a      	cmp	r2, r3
70000f7c:	d11c      	bne.n	70000fb8 <MSS_UART_disable_irq+0x80>
         * bit 0 - Receive Data Available Interrupt
         * bit 1 - Transmitter Holding  Register Empty Interrupt
         * bit 2 - Receiver Line Status Interrupt
         * bit 3 - Modem Status Interrupt
         */
        this_uart->hw_reg->IER &= ( (uint8_t)~irq_mask );
70000f7e:	687b      	ldr	r3, [r7, #4]
70000f80:	681b      	ldr	r3, [r3, #0]
70000f82:	687a      	ldr	r2, [r7, #4]
70000f84:	6812      	ldr	r2, [r2, #0]
70000f86:	7912      	ldrb	r2, [r2, #4]
70000f88:	b2d1      	uxtb	r1, r2
70000f8a:	78fa      	ldrb	r2, [r7, #3]
70000f8c:	ea6f 0202 	mvn.w	r2, r2
70000f90:	b2d2      	uxtb	r2, r2
70000f92:	ea01 0202 	and.w	r2, r1, r2
70000f96:	b2d2      	uxtb	r2, r2
70000f98:	711a      	strb	r2, [r3, #4]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
70000f9a:	687b      	ldr	r3, [r7, #4]
70000f9c:	891b      	ldrh	r3, [r3, #8]
70000f9e:	b21b      	sxth	r3, r3
70000fa0:	4618      	mov	r0, r3
70000fa2:	f7ff fc89 	bl	700008b8 <NVIC_ClearPendingIRQ>

        if( irq_mask == IIRF_MASK )
70000fa6:	78fb      	ldrb	r3, [r7, #3]
70000fa8:	2b0f      	cmp	r3, #15
70000faa:	d105      	bne.n	70000fb8 <MSS_UART_disable_irq+0x80>
        {
            /* Disable UART instance interrupt in Cortex-M3 NVIC. */
            NVIC_DisableIRQ( this_uart->irqn );
70000fac:	687b      	ldr	r3, [r7, #4]
70000fae:	891b      	ldrh	r3, [r3, #8]
70000fb0:	b21b      	sxth	r3, r3
70000fb2:	4618      	mov	r0, r3
70000fb4:	f7ff fc62 	bl	7000087c <NVIC_DisableIRQ>

        }
    }
}
70000fb8:	f107 0708 	add.w	r7, r7, #8
70000fbc:	46bd      	mov	sp, r7
70000fbe:	bd80      	pop	{r7, pc}

70000fc0 <MSS_UART_isr>:
static void
MSS_UART_isr
(
    mss_uart_instance_t * this_uart
)
{
70000fc0:	b580      	push	{r7, lr}
70000fc2:	b084      	sub	sp, #16
70000fc4:	af00      	add	r7, sp, #0
70000fc6:	6078      	str	r0, [r7, #4]
    uint8_t iirf;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70000fc8:	687a      	ldr	r2, [r7, #4]
70000fca:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000fce:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000fd2:	429a      	cmp	r2, r3
70000fd4:	d007      	beq.n	70000fe6 <MSS_UART_isr+0x26>
70000fd6:	687a      	ldr	r2, [r7, #4]
70000fd8:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000fdc:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000fe0:	429a      	cmp	r2, r3
70000fe2:	d000      	beq.n	70000fe6 <MSS_UART_isr+0x26>
70000fe4:	be00      	bkpt	0x0000

    if ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
70000fe6:	687a      	ldr	r2, [r7, #4]
70000fe8:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70000fec:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000ff0:	429a      	cmp	r2, r3
70000ff2:	d006      	beq.n	70001002 <MSS_UART_isr+0x42>
70000ff4:	687a      	ldr	r2, [r7, #4]
70000ff6:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70000ffa:	f2c7 0300 	movt	r3, #28672	; 0x7000
70000ffe:	429a      	cmp	r2, r3
70001000:	d167      	bne.n	700010d2 <MSS_UART_isr+0x112>
    {
        iirf = this_uart->hw_reg->IIR & IIRF_MASK;
70001002:	687b      	ldr	r3, [r7, #4]
70001004:	681b      	ldr	r3, [r3, #0]
70001006:	7a1b      	ldrb	r3, [r3, #8]
70001008:	b2db      	uxtb	r3, r3
7000100a:	f003 030f 	and.w	r3, r3, #15
7000100e:	73fb      	strb	r3, [r7, #15]

        switch ( iirf )
70001010:	7bfb      	ldrb	r3, [r7, #15]
70001012:	2b0c      	cmp	r3, #12
70001014:	d854      	bhi.n	700010c0 <MSS_UART_isr+0x100>
70001016:	a201      	add	r2, pc, #4	; (adr r2, 7000101c <MSS_UART_isr+0x5c>)
70001018:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
7000101c:	70001051 	.word	0x70001051
70001020:	700010c1 	.word	0x700010c1
70001024:	7000106d 	.word	0x7000106d
70001028:	700010c1 	.word	0x700010c1
7000102c:	70001089 	.word	0x70001089
70001030:	700010c1 	.word	0x700010c1
70001034:	700010a5 	.word	0x700010a5
70001038:	700010c1 	.word	0x700010c1
7000103c:	700010c1 	.word	0x700010c1
70001040:	700010c1 	.word	0x700010c1
70001044:	700010c1 	.word	0x700010c1
70001048:	700010c1 	.word	0x700010c1
7000104c:	70001089 	.word	0x70001089
        {
            case IIRF_MODEM_STATUS:  /* Modem status interrupt */
            {
                ASSERT( NULL_HANDLER != this_uart->modemsts_handler );
70001050:	687b      	ldr	r3, [r7, #4]
70001052:	6a5b      	ldr	r3, [r3, #36]	; 0x24
70001054:	2b00      	cmp	r3, #0
70001056:	d100      	bne.n	7000105a <MSS_UART_isr+0x9a>
70001058:	be00      	bkpt	0x0000
                if( NULL_HANDLER != this_uart->modemsts_handler )
7000105a:	687b      	ldr	r3, [r7, #4]
7000105c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
7000105e:	2b00      	cmp	r3, #0
70001060:	d030      	beq.n	700010c4 <MSS_UART_isr+0x104>
                {
                   (*(this_uart->modemsts_handler))( this_uart );
70001062:	687b      	ldr	r3, [r7, #4]
70001064:	6a5b      	ldr	r3, [r3, #36]	; 0x24
70001066:	6878      	ldr	r0, [r7, #4]
70001068:	4798      	blx	r3
                }
            }
            break;
7000106a:	e032      	b.n	700010d2 <MSS_UART_isr+0x112>

            case IIRF_THRE: /* Transmitter Holding Register Empty */
            {
                ASSERT( NULL_HANDLER != this_uart->tx_handler );
7000106c:	687b      	ldr	r3, [r7, #4]
7000106e:	6a1b      	ldr	r3, [r3, #32]
70001070:	2b00      	cmp	r3, #0
70001072:	d100      	bne.n	70001076 <MSS_UART_isr+0xb6>
70001074:	be00      	bkpt	0x0000
                if ( NULL_HANDLER != this_uart->tx_handler )
70001076:	687b      	ldr	r3, [r7, #4]
70001078:	6a1b      	ldr	r3, [r3, #32]
7000107a:	2b00      	cmp	r3, #0
7000107c:	d024      	beq.n	700010c8 <MSS_UART_isr+0x108>
                {
                    (*(this_uart->tx_handler))( this_uart );
7000107e:	687b      	ldr	r3, [r7, #4]
70001080:	6a1b      	ldr	r3, [r3, #32]
70001082:	6878      	ldr	r0, [r7, #4]
70001084:	4798      	blx	r3
                }
            }
            break;
70001086:	e024      	b.n	700010d2 <MSS_UART_isr+0x112>

            case IIRF_RX_DATA:      /* Received Data Available */
            case IIRF_DATA_TIMEOUT: /* Received Data Timed-out */
            {
                ASSERT( NULL_HANDLER != this_uart->rx_handler );
70001088:	687b      	ldr	r3, [r7, #4]
7000108a:	69db      	ldr	r3, [r3, #28]
7000108c:	2b00      	cmp	r3, #0
7000108e:	d100      	bne.n	70001092 <MSS_UART_isr+0xd2>
70001090:	be00      	bkpt	0x0000
                if ( NULL_HANDLER != this_uart->rx_handler )
70001092:	687b      	ldr	r3, [r7, #4]
70001094:	69db      	ldr	r3, [r3, #28]
70001096:	2b00      	cmp	r3, #0
70001098:	d018      	beq.n	700010cc <MSS_UART_isr+0x10c>
                {
                    (*(this_uart->rx_handler))( this_uart );
7000109a:	687b      	ldr	r3, [r7, #4]
7000109c:	69db      	ldr	r3, [r3, #28]
7000109e:	6878      	ldr	r0, [r7, #4]
700010a0:	4798      	blx	r3
                }
            }
            break;
700010a2:	e016      	b.n	700010d2 <MSS_UART_isr+0x112>

            case IIRF_RX_LINE_STATUS:  /* Line Status Interrupt */
            {
                ASSERT( NULL_HANDLER != this_uart->linests_handler );
700010a4:	687b      	ldr	r3, [r7, #4]
700010a6:	699b      	ldr	r3, [r3, #24]
700010a8:	2b00      	cmp	r3, #0
700010aa:	d100      	bne.n	700010ae <MSS_UART_isr+0xee>
700010ac:	be00      	bkpt	0x0000
                if ( NULL_HANDLER != this_uart->linests_handler )
700010ae:	687b      	ldr	r3, [r7, #4]
700010b0:	699b      	ldr	r3, [r3, #24]
700010b2:	2b00      	cmp	r3, #0
700010b4:	d00c      	beq.n	700010d0 <MSS_UART_isr+0x110>
                {
                   (*(this_uart->linests_handler))( this_uart );
700010b6:	687b      	ldr	r3, [r7, #4]
700010b8:	699b      	ldr	r3, [r3, #24]
700010ba:	6878      	ldr	r0, [r7, #4]
700010bc:	4798      	blx	r3
                }
            }
            break;
700010be:	e008      	b.n	700010d2 <MSS_UART_isr+0x112>

            default:
            {
                ASSERT( INVALID_INTERRUPT );
700010c0:	be00      	bkpt	0x0000
700010c2:	e006      	b.n	700010d2 <MSS_UART_isr+0x112>
                if( NULL_HANDLER != this_uart->modemsts_handler )
                {
                   (*(this_uart->modemsts_handler))( this_uart );
                }
            }
            break;
700010c4:	bf00      	nop
700010c6:	e004      	b.n	700010d2 <MSS_UART_isr+0x112>
                if ( NULL_HANDLER != this_uart->tx_handler )
                {
                    (*(this_uart->tx_handler))( this_uart );
                }
            }
            break;
700010c8:	bf00      	nop
700010ca:	e002      	b.n	700010d2 <MSS_UART_isr+0x112>
                if ( NULL_HANDLER != this_uart->rx_handler )
                {
                    (*(this_uart->rx_handler))( this_uart );
                }
            }
            break;
700010cc:	bf00      	nop
700010ce:	e000      	b.n	700010d2 <MSS_UART_isr+0x112>
                if ( NULL_HANDLER != this_uart->linests_handler )
                {
                   (*(this_uart->linests_handler))( this_uart );
                }
            }
            break;
700010d0:	bf00      	nop
                ASSERT( INVALID_INTERRUPT );
            }
            break;
        }
    }
}
700010d2:	f107 0710 	add.w	r7, r7, #16
700010d6:	46bd      	mov	sp, r7
700010d8:	bd80      	pop	{r7, pc}
700010da:	bf00      	nop

700010dc <default_tx_handler>:
static void
default_tx_handler
(
    mss_uart_instance_t * this_uart
)
{
700010dc:	b480      	push	{r7}
700010de:	b087      	sub	sp, #28
700010e0:	af00      	add	r7, sp, #0
700010e2:	6078      	str	r0, [r7, #4]
    uint8_t status;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
700010e4:	687a      	ldr	r2, [r7, #4]
700010e6:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700010ea:	f2c7 0300 	movt	r3, #28672	; 0x7000
700010ee:	429a      	cmp	r2, r3
700010f0:	d007      	beq.n	70001102 <default_tx_handler+0x26>
700010f2:	687a      	ldr	r2, [r7, #4]
700010f4:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700010f8:	f2c7 0300 	movt	r3, #28672	; 0x7000
700010fc:	429a      	cmp	r2, r3
700010fe:	d000      	beq.n	70001102 <default_tx_handler+0x26>
70001100:	be00      	bkpt	0x0000
    ASSERT( ( (uint8_t *)0 ) != this_uart->tx_buffer );
70001102:	687b      	ldr	r3, [r7, #4]
70001104:	68db      	ldr	r3, [r3, #12]
70001106:	2b00      	cmp	r3, #0
70001108:	d100      	bne.n	7000110c <default_tx_handler+0x30>
7000110a:	be00      	bkpt	0x0000
    ASSERT( 0U < this_uart->tx_buff_size );
7000110c:	687b      	ldr	r3, [r7, #4]
7000110e:	691b      	ldr	r3, [r3, #16]
70001110:	2b00      	cmp	r3, #0
70001112:	d100      	bne.n	70001116 <default_tx_handler+0x3a>
70001114:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70001116:	687a      	ldr	r2, [r7, #4]
70001118:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000111c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001120:	429a      	cmp	r2, r3
70001122:	d006      	beq.n	70001132 <default_tx_handler+0x56>
70001124:	687a      	ldr	r2, [r7, #4]
70001126:	f648 23a8 	movw	r3, #35496	; 0x8aa8
7000112a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000112e:	429a      	cmp	r2, r3
70001130:	d152      	bne.n	700011d8 <default_tx_handler+0xfc>
        ( ( (uint8_t *)0 ) != this_uart->tx_buffer ) &&
70001132:	687b      	ldr	r3, [r7, #4]
70001134:	68db      	ldr	r3, [r3, #12]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
    ASSERT( ( (uint8_t *)0 ) != this_uart->tx_buffer );
    ASSERT( 0U < this_uart->tx_buff_size );

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70001136:	2b00      	cmp	r3, #0
70001138:	d04e      	beq.n	700011d8 <default_tx_handler+0xfc>
        ( ( (uint8_t *)0 ) != this_uart->tx_buffer ) &&
        ( 0U < this_uart->tx_buff_size ) )
7000113a:	687b      	ldr	r3, [r7, #4]
7000113c:	691b      	ldr	r3, [r3, #16]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
    ASSERT( ( (uint8_t *)0 ) != this_uart->tx_buffer );
    ASSERT( 0U < this_uart->tx_buff_size );

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
7000113e:	2b00      	cmp	r3, #0
70001140:	d04a      	beq.n	700011d8 <default_tx_handler+0xfc>
        ( ( (uint8_t *)0 ) != this_uart->tx_buffer ) &&
        ( 0U < this_uart->tx_buff_size ) )
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
70001142:	687b      	ldr	r3, [r7, #4]
70001144:	681b      	ldr	r3, [r3, #0]
70001146:	7d1b      	ldrb	r3, [r3, #20]
70001148:	72fb      	strb	r3, [r7, #11]
        this_uart->status |= status;
7000114a:	687b      	ldr	r3, [r7, #4]
7000114c:	7a9a      	ldrb	r2, [r3, #10]
7000114e:	7afb      	ldrb	r3, [r7, #11]
70001150:	ea42 0303 	orr.w	r3, r2, r3
70001154:	b2da      	uxtb	r2, r3
70001156:	687b      	ldr	r3, [r7, #4]
70001158:	729a      	strb	r2, [r3, #10]

        /*
         * This function should only be called as a result of a THRE interrupt.
         * Verify that this is true before proceeding to transmit data.
         */
        if ( status & MSS_UART_THRE )
7000115a:	7afb      	ldrb	r3, [r7, #11]
7000115c:	f003 0320 	and.w	r3, r3, #32
70001160:	2b00      	cmp	r3, #0
70001162:	d029      	beq.n	700011b8 <default_tx_handler+0xdc>
        {
            uint32_t i;
            uint32_t fill_size = TX_FIFO_SIZE;
70001164:	f04f 0310 	mov.w	r3, #16
70001168:	613b      	str	r3, [r7, #16]
            uint32_t tx_remain = this_uart->tx_buff_size - this_uart->tx_idx;
7000116a:	687b      	ldr	r3, [r7, #4]
7000116c:	691a      	ldr	r2, [r3, #16]
7000116e:	687b      	ldr	r3, [r7, #4]
70001170:	695b      	ldr	r3, [r3, #20]
70001172:	ebc3 0302 	rsb	r3, r3, r2
70001176:	617b      	str	r3, [r7, #20]

            /* Calculate the number of bytes to transmit. */
            if ( tx_remain < TX_FIFO_SIZE )
70001178:	697b      	ldr	r3, [r7, #20]
7000117a:	2b0f      	cmp	r3, #15
7000117c:	d801      	bhi.n	70001182 <default_tx_handler+0xa6>
            {
                fill_size = tx_remain;
7000117e:	697b      	ldr	r3, [r7, #20]
70001180:	613b      	str	r3, [r7, #16]
            }

            /* Fill the TX FIFO with the calculated the number of bytes. */
            for ( i = 0U; i < fill_size; ++i )
70001182:	f04f 0300 	mov.w	r3, #0
70001186:	60fb      	str	r3, [r7, #12]
70001188:	e012      	b.n	700011b0 <default_tx_handler+0xd4>
            {
                /* Send next character in the buffer. */
                this_uart->hw_reg->THR = this_uart->tx_buffer[this_uart->tx_idx];
7000118a:	687b      	ldr	r3, [r7, #4]
7000118c:	681b      	ldr	r3, [r3, #0]
7000118e:	687a      	ldr	r2, [r7, #4]
70001190:	68d1      	ldr	r1, [r2, #12]
70001192:	687a      	ldr	r2, [r7, #4]
70001194:	6952      	ldr	r2, [r2, #20]
70001196:	440a      	add	r2, r1
70001198:	7812      	ldrb	r2, [r2, #0]
7000119a:	701a      	strb	r2, [r3, #0]
                ++this_uart->tx_idx;
7000119c:	687b      	ldr	r3, [r7, #4]
7000119e:	695b      	ldr	r3, [r3, #20]
700011a0:	f103 0201 	add.w	r2, r3, #1
700011a4:	687b      	ldr	r3, [r7, #4]
700011a6:	615a      	str	r2, [r3, #20]
            {
                fill_size = tx_remain;
            }

            /* Fill the TX FIFO with the calculated the number of bytes. */
            for ( i = 0U; i < fill_size; ++i )
700011a8:	68fb      	ldr	r3, [r7, #12]
700011aa:	f103 0301 	add.w	r3, r3, #1
700011ae:	60fb      	str	r3, [r7, #12]
700011b0:	68fa      	ldr	r2, [r7, #12]
700011b2:	693b      	ldr	r3, [r7, #16]
700011b4:	429a      	cmp	r2, r3
700011b6:	d3e8      	bcc.n	7000118a <default_tx_handler+0xae>
                ++this_uart->tx_idx;
            }
        }

        /* Flag Tx as complete if all data has been pushed into the Tx FIFO. */
        if ( this_uart->tx_idx == this_uart->tx_buff_size )
700011b8:	687b      	ldr	r3, [r7, #4]
700011ba:	695a      	ldr	r2, [r3, #20]
700011bc:	687b      	ldr	r3, [r7, #4]
700011be:	691b      	ldr	r3, [r3, #16]
700011c0:	429a      	cmp	r2, r3
700011c2:	d109      	bne.n	700011d8 <default_tx_handler+0xfc>
        {
            this_uart->tx_buff_size = TX_COMPLETE;
700011c4:	687b      	ldr	r3, [r7, #4]
700011c6:	f04f 0200 	mov.w	r2, #0
700011ca:	611a      	str	r2, [r3, #16]
            /* disables TX interrupt */
            this_uart->hw_reg_bit->IER_ETBEI = 0U;
700011cc:	687b      	ldr	r3, [r7, #4]
700011ce:	685b      	ldr	r3, [r3, #4]
700011d0:	f04f 0200 	mov.w	r2, #0
700011d4:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84
        }
    }
}
700011d8:	f107 071c 	add.w	r7, r7, #28
700011dc:	46bd      	mov	sp, r7
700011de:	bc80      	pop	{r7}
700011e0:	4770      	bx	lr
700011e2:	bf00      	nop

700011e4 <MSS_UART_set_rx_handler>:
(
    mss_uart_instance_t *       this_uart,
    mss_uart_irq_handler_t      handler,
    mss_uart_rx_trig_level_t    trigger_level
)
{
700011e4:	b580      	push	{r7, lr}
700011e6:	b084      	sub	sp, #16
700011e8:	af00      	add	r7, sp, #0
700011ea:	60f8      	str	r0, [r7, #12]
700011ec:	60b9      	str	r1, [r7, #8]
700011ee:	4613      	mov	r3, r2
700011f0:	71fb      	strb	r3, [r7, #7]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
700011f2:	68fa      	ldr	r2, [r7, #12]
700011f4:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700011f8:	f2c7 0300 	movt	r3, #28672	; 0x7000
700011fc:	429a      	cmp	r2, r3
700011fe:	d007      	beq.n	70001210 <MSS_UART_set_rx_handler+0x2c>
70001200:	68fa      	ldr	r2, [r7, #12]
70001202:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001206:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000120a:	429a      	cmp	r2, r3
7000120c:	d000      	beq.n	70001210 <MSS_UART_set_rx_handler+0x2c>
7000120e:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER );
70001210:	68bb      	ldr	r3, [r7, #8]
70001212:	2b00      	cmp	r3, #0
70001214:	d100      	bne.n	70001218 <MSS_UART_set_rx_handler+0x34>
70001216:	be00      	bkpt	0x0000
    ASSERT( trigger_level < MSS_UART_FIFO_INVALID_TRIG_LEVEL );
70001218:	79fb      	ldrb	r3, [r7, #7]
7000121a:	2bc0      	cmp	r3, #192	; 0xc0
7000121c:	d900      	bls.n	70001220 <MSS_UART_set_rx_handler+0x3c>
7000121e:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70001220:	68fa      	ldr	r2, [r7, #12]
70001222:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70001226:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000122a:	429a      	cmp	r2, r3
7000122c:	d006      	beq.n	7000123c <MSS_UART_set_rx_handler+0x58>
7000122e:	68fa      	ldr	r2, [r7, #12]
70001230:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001234:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001238:	429a      	cmp	r2, r3
7000123a:	d12b      	bne.n	70001294 <MSS_UART_set_rx_handler+0xb0>
7000123c:	68bb      	ldr	r3, [r7, #8]
7000123e:	2b00      	cmp	r3, #0
70001240:	d028      	beq.n	70001294 <MSS_UART_set_rx_handler+0xb0>
70001242:	79fb      	ldrb	r3, [r7, #7]
70001244:	2bc0      	cmp	r3, #192	; 0xc0
70001246:	d825      	bhi.n	70001294 <MSS_UART_set_rx_handler+0xb0>
        ( handler != INVALID_IRQ_HANDLER) &&
        ( trigger_level < MSS_UART_FIFO_INVALID_TRIG_LEVEL) )
    {
        this_uart->rx_handler = handler;
70001248:	68fb      	ldr	r3, [r7, #12]
7000124a:	68ba      	ldr	r2, [r7, #8]
7000124c:	61da      	str	r2, [r3, #28]

        /* Set the receive interrupt trigger level. */
        this_uart->hw_reg->FCR = (this_uart->hw_reg->FCR &
7000124e:	68fb      	ldr	r3, [r7, #12]
70001250:	681a      	ldr	r2, [r3, #0]
70001252:	68fb      	ldr	r3, [r7, #12]
70001254:	681b      	ldr	r3, [r3, #0]
70001256:	7a1b      	ldrb	r3, [r3, #8]
70001258:	b2db      	uxtb	r3, r3
7000125a:	b2db      	uxtb	r3, r3
7000125c:	f003 033f 	and.w	r3, r3, #63	; 0x3f
70001260:	79f8      	ldrb	r0, [r7, #7]
70001262:	4619      	mov	r1, r3
70001264:	4603      	mov	r3, r0
70001266:	ea41 0303 	orr.w	r3, r1, r3
7000126a:	b2db      	uxtb	r3, r3
7000126c:	b2db      	uxtb	r3, r3
7000126e:	7213      	strb	r3, [r2, #8]
                              (uint8_t)(~((uint8_t)FCR_TRIG_LEVEL_MASK))) |
                              (uint8_t)trigger_level;
        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
70001270:	68fb      	ldr	r3, [r7, #12]
70001272:	891b      	ldrh	r3, [r3, #8]
70001274:	b21b      	sxth	r3, r3
70001276:	4618      	mov	r0, r3
70001278:	f7ff fb1e 	bl	700008b8 <NVIC_ClearPendingIRQ>

        /* Enable receive interrupt. */
        this_uart->hw_reg_bit->IER_ERBFI = 1U;
7000127c:	68fb      	ldr	r3, [r7, #12]
7000127e:	685b      	ldr	r3, [r3, #4]
70001280:	f04f 0201 	mov.w	r2, #1
70001284:	f8c3 2080 	str.w	r2, [r3, #128]	; 0x80

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
70001288:	68fb      	ldr	r3, [r7, #12]
7000128a:	891b      	ldrh	r3, [r3, #8]
7000128c:	b21b      	sxth	r3, r3
7000128e:	4618      	mov	r0, r3
70001290:	f7ff fad8 	bl	70000844 <NVIC_EnableIRQ>
    }
}
70001294:	f107 0710 	add.w	r7, r7, #16
70001298:	46bd      	mov	sp, r7
7000129a:	bd80      	pop	{r7, pc}

7000129c <MSS_UART_set_loopback>:
MSS_UART_set_loopback
(
    mss_uart_instance_t *   this_uart,
    mss_uart_loopback_t     loopback
)
{
7000129c:	b480      	push	{r7}
7000129e:	b083      	sub	sp, #12
700012a0:	af00      	add	r7, sp, #0
700012a2:	6078      	str	r0, [r7, #4]
700012a4:	460b      	mov	r3, r1
700012a6:	70fb      	strb	r3, [r7, #3]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
700012a8:	687a      	ldr	r2, [r7, #4]
700012aa:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700012ae:	f2c7 0300 	movt	r3, #28672	; 0x7000
700012b2:	429a      	cmp	r2, r3
700012b4:	d007      	beq.n	700012c6 <MSS_UART_set_loopback+0x2a>
700012b6:	687a      	ldr	r2, [r7, #4]
700012b8:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700012bc:	f2c7 0300 	movt	r3, #28672	; 0x7000
700012c0:	429a      	cmp	r2, r3
700012c2:	d000      	beq.n	700012c6 <MSS_UART_set_loopback+0x2a>
700012c4:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
700012c6:	687a      	ldr	r2, [r7, #4]
700012c8:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700012cc:	f2c7 0300 	movt	r3, #28672	; 0x7000
700012d0:	429a      	cmp	r2, r3
700012d2:	d006      	beq.n	700012e2 <MSS_UART_set_loopback+0x46>
700012d4:	687a      	ldr	r2, [r7, #4]
700012d6:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700012da:	f2c7 0300 	movt	r3, #28672	; 0x7000
700012de:	429a      	cmp	r2, r3
700012e0:	d10f      	bne.n	70001302 <MSS_UART_set_loopback+0x66>
    {
        if ( loopback == MSS_UART_LOOPBACK_OFF )
700012e2:	78fb      	ldrb	r3, [r7, #3]
700012e4:	2b00      	cmp	r3, #0
700012e6:	d106      	bne.n	700012f6 <MSS_UART_set_loopback+0x5a>
        {
            this_uart->hw_reg_bit->MCR_LOOP = 0U;
700012e8:	687b      	ldr	r3, [r7, #4]
700012ea:	685b      	ldr	r3, [r3, #4]
700012ec:	f04f 0200 	mov.w	r2, #0
700012f0:	f8c3 2210 	str.w	r2, [r3, #528]	; 0x210
700012f4:	e005      	b.n	70001302 <MSS_UART_set_loopback+0x66>
        }
        else
        {
            this_uart->hw_reg_bit->MCR_LOOP = 1U;
700012f6:	687b      	ldr	r3, [r7, #4]
700012f8:	685b      	ldr	r3, [r3, #4]
700012fa:	f04f 0201 	mov.w	r2, #1
700012fe:	f8c3 2210 	str.w	r2, [r3, #528]	; 0x210
        }
    }
}
70001302:	f107 070c 	add.w	r7, r7, #12
70001306:	46bd      	mov	sp, r7
70001308:	bc80      	pop	{r7}
7000130a:	4770      	bx	lr

7000130c <UART0_IRQHandler>:
#if defined(__GNUC__)
__attribute__((__interrupt__)) void UART0_IRQHandler( void )
#else
void UART0_IRQHandler( void )
#endif
{
7000130c:	4668      	mov	r0, sp
7000130e:	f020 0107 	bic.w	r1, r0, #7
70001312:	468d      	mov	sp, r1
70001314:	b589      	push	{r0, r3, r7, lr}
70001316:	af00      	add	r7, sp, #0
    MSS_UART_isr( &g_mss_uart0 );
70001318:	f648 20d0 	movw	r0, #35536	; 0x8ad0
7000131c:	f2c7 0000 	movt	r0, #28672	; 0x7000
70001320:	f7ff fe4e 	bl	70000fc0 <MSS_UART_isr>
    NVIC_ClearPendingIRQ( UART0_IRQn );
70001324:	f04f 000a 	mov.w	r0, #10
70001328:	f7ff fac6 	bl	700008b8 <NVIC_ClearPendingIRQ>
}
7000132c:	46bd      	mov	sp, r7
7000132e:	e8bd 4089 	ldmia.w	sp!, {r0, r3, r7, lr}
70001332:	4685      	mov	sp, r0
70001334:	4770      	bx	lr
70001336:	bf00      	nop

70001338 <UART1_IRQHandler>:
#if defined(__GNUC__)
__attribute__((__interrupt__)) void UART1_IRQHandler( void )
#else
void UART1_IRQHandler( void )
#endif
{
70001338:	4668      	mov	r0, sp
7000133a:	f020 0107 	bic.w	r1, r0, #7
7000133e:	468d      	mov	sp, r1
70001340:	b589      	push	{r0, r3, r7, lr}
70001342:	af00      	add	r7, sp, #0
    MSS_UART_isr( &g_mss_uart1 );
70001344:	f648 20a8 	movw	r0, #35496	; 0x8aa8
70001348:	f2c7 0000 	movt	r0, #28672	; 0x7000
7000134c:	f7ff fe38 	bl	70000fc0 <MSS_UART_isr>
    NVIC_ClearPendingIRQ( UART1_IRQn );
70001350:	f04f 000b 	mov.w	r0, #11
70001354:	f7ff fab0 	bl	700008b8 <NVIC_ClearPendingIRQ>
}
70001358:	46bd      	mov	sp, r7
7000135a:	e8bd 4089 	ldmia.w	sp!, {r0, r3, r7, lr}
7000135e:	4685      	mov	sp, r0
70001360:	4770      	bx	lr
70001362:	bf00      	nop

70001364 <MSS_UART_set_rxstatus_handler>:
MSS_UART_set_rxstatus_handler
(
    mss_uart_instance_t * this_uart,
    mss_uart_irq_handler_t handler
)
{
70001364:	b580      	push	{r7, lr}
70001366:	b082      	sub	sp, #8
70001368:	af00      	add	r7, sp, #0
7000136a:	6078      	str	r0, [r7, #4]
7000136c:	6039      	str	r1, [r7, #0]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
7000136e:	687a      	ldr	r2, [r7, #4]
70001370:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70001374:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001378:	429a      	cmp	r2, r3
7000137a:	d007      	beq.n	7000138c <MSS_UART_set_rxstatus_handler+0x28>
7000137c:	687a      	ldr	r2, [r7, #4]
7000137e:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001382:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001386:	429a      	cmp	r2, r3
70001388:	d000      	beq.n	7000138c <MSS_UART_set_rxstatus_handler+0x28>
7000138a:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER);
7000138c:	683b      	ldr	r3, [r7, #0]
7000138e:	2b00      	cmp	r3, #0
70001390:	d100      	bne.n	70001394 <MSS_UART_set_rxstatus_handler+0x30>
70001392:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70001394:	687a      	ldr	r2, [r7, #4]
70001396:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000139a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000139e:	429a      	cmp	r2, r3
700013a0:	d006      	beq.n	700013b0 <MSS_UART_set_rxstatus_handler+0x4c>
700013a2:	687a      	ldr	r2, [r7, #4]
700013a4:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700013a8:	f2c7 0300 	movt	r3, #28672	; 0x7000
700013ac:	429a      	cmp	r2, r3
700013ae:	d117      	bne.n	700013e0 <MSS_UART_set_rxstatus_handler+0x7c>
700013b0:	683b      	ldr	r3, [r7, #0]
700013b2:	2b00      	cmp	r3, #0
700013b4:	d014      	beq.n	700013e0 <MSS_UART_set_rxstatus_handler+0x7c>
        ( handler != INVALID_IRQ_HANDLER) )
    {
        this_uart->linests_handler = handler;
700013b6:	687b      	ldr	r3, [r7, #4]
700013b8:	683a      	ldr	r2, [r7, #0]
700013ba:	619a      	str	r2, [r3, #24]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
700013bc:	687b      	ldr	r3, [r7, #4]
700013be:	891b      	ldrh	r3, [r3, #8]
700013c0:	b21b      	sxth	r3, r3
700013c2:	4618      	mov	r0, r3
700013c4:	f7ff fa78 	bl	700008b8 <NVIC_ClearPendingIRQ>

        /* Enable receiver line status interrupt. */
        this_uart->hw_reg_bit->IER_ELSI = 1U;
700013c8:	687b      	ldr	r3, [r7, #4]
700013ca:	685b      	ldr	r3, [r3, #4]
700013cc:	f04f 0201 	mov.w	r2, #1
700013d0:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
700013d4:	687b      	ldr	r3, [r7, #4]
700013d6:	891b      	ldrh	r3, [r3, #8]
700013d8:	b21b      	sxth	r3, r3
700013da:	4618      	mov	r0, r3
700013dc:	f7ff fa32 	bl	70000844 <NVIC_EnableIRQ>
    }
}
700013e0:	f107 0708 	add.w	r7, r7, #8
700013e4:	46bd      	mov	sp, r7
700013e6:	bd80      	pop	{r7, pc}

700013e8 <MSS_UART_set_tx_handler>:
MSS_UART_set_tx_handler
(
    mss_uart_instance_t * this_uart,
    mss_uart_irq_handler_t handler
)
{
700013e8:	b580      	push	{r7, lr}
700013ea:	b082      	sub	sp, #8
700013ec:	af00      	add	r7, sp, #0
700013ee:	6078      	str	r0, [r7, #4]
700013f0:	6039      	str	r1, [r7, #0]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
700013f2:	687a      	ldr	r2, [r7, #4]
700013f4:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700013f8:	f2c7 0300 	movt	r3, #28672	; 0x7000
700013fc:	429a      	cmp	r2, r3
700013fe:	d007      	beq.n	70001410 <MSS_UART_set_tx_handler+0x28>
70001400:	687a      	ldr	r2, [r7, #4]
70001402:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001406:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000140a:	429a      	cmp	r2, r3
7000140c:	d000      	beq.n	70001410 <MSS_UART_set_tx_handler+0x28>
7000140e:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER);
70001410:	683b      	ldr	r3, [r7, #0]
70001412:	2b00      	cmp	r3, #0
70001414:	d100      	bne.n	70001418 <MSS_UART_set_tx_handler+0x30>
70001416:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
70001418:	687a      	ldr	r2, [r7, #4]
7000141a:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000141e:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001422:	429a      	cmp	r2, r3
70001424:	d006      	beq.n	70001434 <MSS_UART_set_tx_handler+0x4c>
70001426:	687a      	ldr	r2, [r7, #4]
70001428:	f648 23a8 	movw	r3, #35496	; 0x8aa8
7000142c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001430:	429a      	cmp	r2, r3
70001432:	d11f      	bne.n	70001474 <MSS_UART_set_tx_handler+0x8c>
70001434:	683b      	ldr	r3, [r7, #0]
70001436:	2b00      	cmp	r3, #0
70001438:	d01c      	beq.n	70001474 <MSS_UART_set_tx_handler+0x8c>
        ( handler != INVALID_IRQ_HANDLER) )
    {
        this_uart->tx_handler = handler;
7000143a:	687b      	ldr	r3, [r7, #4]
7000143c:	683a      	ldr	r2, [r7, #0]
7000143e:	621a      	str	r2, [r3, #32]

        /* Make TX buffer info invalid */
        this_uart->tx_buffer = (const uint8_t *)0;
70001440:	687b      	ldr	r3, [r7, #4]
70001442:	f04f 0200 	mov.w	r2, #0
70001446:	60da      	str	r2, [r3, #12]
        this_uart->tx_buff_size = 0U;
70001448:	687b      	ldr	r3, [r7, #4]
7000144a:	f04f 0200 	mov.w	r2, #0
7000144e:	611a      	str	r2, [r3, #16]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
70001450:	687b      	ldr	r3, [r7, #4]
70001452:	891b      	ldrh	r3, [r3, #8]
70001454:	b21b      	sxth	r3, r3
70001456:	4618      	mov	r0, r3
70001458:	f7ff fa2e 	bl	700008b8 <NVIC_ClearPendingIRQ>

        /* Enable transmitter holding register Empty interrupt. */
        this_uart->hw_reg_bit->IER_ETBEI = 1U;
7000145c:	687b      	ldr	r3, [r7, #4]
7000145e:	685b      	ldr	r3, [r3, #4]
70001460:	f04f 0201 	mov.w	r2, #1
70001464:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
70001468:	687b      	ldr	r3, [r7, #4]
7000146a:	891b      	ldrh	r3, [r3, #8]
7000146c:	b21b      	sxth	r3, r3
7000146e:	4618      	mov	r0, r3
70001470:	f7ff f9e8 	bl	70000844 <NVIC_EnableIRQ>
    }
}
70001474:	f107 0708 	add.w	r7, r7, #8
70001478:	46bd      	mov	sp, r7
7000147a:	bd80      	pop	{r7, pc}

7000147c <MSS_UART_set_modemstatus_handler>:
MSS_UART_set_modemstatus_handler
(
    mss_uart_instance_t * this_uart,
    mss_uart_irq_handler_t handler
)
{
7000147c:	b580      	push	{r7, lr}
7000147e:	b082      	sub	sp, #8
70001480:	af00      	add	r7, sp, #0
70001482:	6078      	str	r0, [r7, #4]
70001484:	6039      	str	r1, [r7, #0]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70001486:	687a      	ldr	r2, [r7, #4]
70001488:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000148c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001490:	429a      	cmp	r2, r3
70001492:	d007      	beq.n	700014a4 <MSS_UART_set_modemstatus_handler+0x28>
70001494:	687a      	ldr	r2, [r7, #4]
70001496:	f648 23a8 	movw	r3, #35496	; 0x8aa8
7000149a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000149e:	429a      	cmp	r2, r3
700014a0:	d000      	beq.n	700014a4 <MSS_UART_set_modemstatus_handler+0x28>
700014a2:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER );
700014a4:	683b      	ldr	r3, [r7, #0]
700014a6:	2b00      	cmp	r3, #0
700014a8:	d100      	bne.n	700014ac <MSS_UART_set_modemstatus_handler+0x30>
700014aa:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
700014ac:	687a      	ldr	r2, [r7, #4]
700014ae:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700014b2:	f2c7 0300 	movt	r3, #28672	; 0x7000
700014b6:	429a      	cmp	r2, r3
700014b8:	d006      	beq.n	700014c8 <MSS_UART_set_modemstatus_handler+0x4c>
700014ba:	687a      	ldr	r2, [r7, #4]
700014bc:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700014c0:	f2c7 0300 	movt	r3, #28672	; 0x7000
700014c4:	429a      	cmp	r2, r3
700014c6:	d117      	bne.n	700014f8 <MSS_UART_set_modemstatus_handler+0x7c>
700014c8:	683b      	ldr	r3, [r7, #0]
700014ca:	2b00      	cmp	r3, #0
700014cc:	d014      	beq.n	700014f8 <MSS_UART_set_modemstatus_handler+0x7c>
        ( handler != INVALID_IRQ_HANDLER) )
    {
        this_uart->modemsts_handler = handler;
700014ce:	687b      	ldr	r3, [r7, #4]
700014d0:	683a      	ldr	r2, [r7, #0]
700014d2:	625a      	str	r2, [r3, #36]	; 0x24

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
700014d4:	687b      	ldr	r3, [r7, #4]
700014d6:	891b      	ldrh	r3, [r3, #8]
700014d8:	b21b      	sxth	r3, r3
700014da:	4618      	mov	r0, r3
700014dc:	f7ff f9ec 	bl	700008b8 <NVIC_ClearPendingIRQ>

        /* Enable modem status interrupt. */
        this_uart->hw_reg_bit->IER_EDSSI = 1U;
700014e0:	687b      	ldr	r3, [r7, #4]
700014e2:	685b      	ldr	r3, [r3, #4]
700014e4:	f04f 0201 	mov.w	r2, #1
700014e8:	f8c3 208c 	str.w	r2, [r3, #140]	; 0x8c

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
700014ec:	687b      	ldr	r3, [r7, #4]
700014ee:	891b      	ldrh	r3, [r3, #8]
700014f0:	b21b      	sxth	r3, r3
700014f2:	4618      	mov	r0, r3
700014f4:	f7ff f9a6 	bl	70000844 <NVIC_EnableIRQ>
    }
}
700014f8:	f107 0708 	add.w	r7, r7, #8
700014fc:	46bd      	mov	sp, r7
700014fe:	bd80      	pop	{r7, pc}

70001500 <MSS_UART_fill_tx_fifo>:
(
    mss_uart_instance_t * this_uart,
    const uint8_t * tx_buffer,
    size_t tx_size
)
{
70001500:	b480      	push	{r7}
70001502:	b089      	sub	sp, #36	; 0x24
70001504:	af00      	add	r7, sp, #0
70001506:	60f8      	str	r0, [r7, #12]
70001508:	60b9      	str	r1, [r7, #8]
7000150a:	607a      	str	r2, [r7, #4]
    uint8_t status = 0U;
7000150c:	f04f 0300 	mov.w	r3, #0
70001510:	75fb      	strb	r3, [r7, #23]
    size_t size_sent = 0U;
70001512:	f04f 0300 	mov.w	r3, #0
70001516:	61bb      	str	r3, [r7, #24]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70001518:	68fa      	ldr	r2, [r7, #12]
7000151a:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000151e:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001522:	429a      	cmp	r2, r3
70001524:	d007      	beq.n	70001536 <MSS_UART_fill_tx_fifo+0x36>
70001526:	68fa      	ldr	r2, [r7, #12]
70001528:	f648 23a8 	movw	r3, #35496	; 0x8aa8
7000152c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001530:	429a      	cmp	r2, r3
70001532:	d000      	beq.n	70001536 <MSS_UART_fill_tx_fifo+0x36>
70001534:	be00      	bkpt	0x0000
    ASSERT( tx_buffer != ( (uint8_t *)0 ) );
70001536:	68bb      	ldr	r3, [r7, #8]
70001538:	2b00      	cmp	r3, #0
7000153a:	d100      	bne.n	7000153e <MSS_UART_fill_tx_fifo+0x3e>
7000153c:	be00      	bkpt	0x0000
    ASSERT( tx_size > 0 );
7000153e:	687b      	ldr	r3, [r7, #4]
70001540:	2b00      	cmp	r3, #0
70001542:	d100      	bne.n	70001546 <MSS_UART_fill_tx_fifo+0x46>
70001544:	be00      	bkpt	0x0000

    /* Fill the UART's Tx FIFO until the FIFO is full or the complete input
     * buffer has been written. */
    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1 ) ) &&
70001546:	68fa      	ldr	r2, [r7, #12]
70001548:	f648 23d0 	movw	r3, #35536	; 0x8ad0
7000154c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001550:	429a      	cmp	r2, r3
70001552:	d006      	beq.n	70001562 <MSS_UART_fill_tx_fifo+0x62>
70001554:	68fa      	ldr	r2, [r7, #12]
70001556:	f648 23a8 	movw	r3, #35496	; 0x8aa8
7000155a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000155e:	429a      	cmp	r2, r3
70001560:	d131      	bne.n	700015c6 <MSS_UART_fill_tx_fifo+0xc6>
70001562:	68bb      	ldr	r3, [r7, #8]
70001564:	2b00      	cmp	r3, #0
70001566:	d02e      	beq.n	700015c6 <MSS_UART_fill_tx_fifo+0xc6>
70001568:	687b      	ldr	r3, [r7, #4]
7000156a:	2b00      	cmp	r3, #0
7000156c:	d02b      	beq.n	700015c6 <MSS_UART_fill_tx_fifo+0xc6>
        (tx_buffer != ( (uint8_t *)0 ))   &&
        (tx_size > 0u) )
    {
        status = this_uart->hw_reg->LSR;
7000156e:	68fb      	ldr	r3, [r7, #12]
70001570:	681b      	ldr	r3, [r3, #0]
70001572:	7d1b      	ldrb	r3, [r3, #20]
70001574:	75fb      	strb	r3, [r7, #23]
        this_uart->status |= status;
70001576:	68fb      	ldr	r3, [r7, #12]
70001578:	7a9a      	ldrb	r2, [r3, #10]
7000157a:	7dfb      	ldrb	r3, [r7, #23]
7000157c:	ea42 0303 	orr.w	r3, r2, r3
70001580:	b2da      	uxtb	r2, r3
70001582:	68fb      	ldr	r3, [r7, #12]
70001584:	729a      	strb	r2, [r3, #10]

        if( status & MSS_UART_THRE )
70001586:	7dfb      	ldrb	r3, [r7, #23]
70001588:	f003 0320 	and.w	r3, r3, #32
7000158c:	2b00      	cmp	r3, #0
7000158e:	d01a      	beq.n	700015c6 <MSS_UART_fill_tx_fifo+0xc6>
        {
            uint32_t fill_size = TX_FIFO_SIZE;
70001590:	f04f 0310 	mov.w	r3, #16
70001594:	61fb      	str	r3, [r7, #28]

            if ( tx_size < TX_FIFO_SIZE )
70001596:	687b      	ldr	r3, [r7, #4]
70001598:	2b0f      	cmp	r3, #15
7000159a:	d801      	bhi.n	700015a0 <MSS_UART_fill_tx_fifo+0xa0>
            {
                fill_size = tx_size;
7000159c:	687b      	ldr	r3, [r7, #4]
7000159e:	61fb      	str	r3, [r7, #28]
            }
            /* Fill up FIFO */
            for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
700015a0:	f04f 0300 	mov.w	r3, #0
700015a4:	61bb      	str	r3, [r7, #24]
700015a6:	e00a      	b.n	700015be <MSS_UART_fill_tx_fifo+0xbe>
            {

                /* Send next character in the buffer. */
                this_uart->hw_reg->THR = tx_buffer[size_sent];
700015a8:	68fb      	ldr	r3, [r7, #12]
700015aa:	681b      	ldr	r3, [r3, #0]
700015ac:	68b9      	ldr	r1, [r7, #8]
700015ae:	69ba      	ldr	r2, [r7, #24]
700015b0:	440a      	add	r2, r1
700015b2:	7812      	ldrb	r2, [r2, #0]
700015b4:	701a      	strb	r2, [r3, #0]
            if ( tx_size < TX_FIFO_SIZE )
            {
                fill_size = tx_size;
            }
            /* Fill up FIFO */
            for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
700015b6:	69bb      	ldr	r3, [r7, #24]
700015b8:	f103 0301 	add.w	r3, r3, #1
700015bc:	61bb      	str	r3, [r7, #24]
700015be:	69ba      	ldr	r2, [r7, #24]
700015c0:	69fb      	ldr	r3, [r7, #28]
700015c2:	429a      	cmp	r2, r3
700015c4:	d3f0      	bcc.n	700015a8 <MSS_UART_fill_tx_fifo+0xa8>
                /* Send next character in the buffer. */
                this_uart->hw_reg->THR = tx_buffer[size_sent];
            }
        }
    }
    return size_sent;
700015c6:	69bb      	ldr	r3, [r7, #24]
}
700015c8:	4618      	mov	r0, r3
700015ca:	f107 0724 	add.w	r7, r7, #36	; 0x24
700015ce:	46bd      	mov	sp, r7
700015d0:	bc80      	pop	{r7}
700015d2:	4770      	bx	lr

700015d4 <MSS_UART_get_rx_status>:
uint8_t
MSS_UART_get_rx_status
(
    mss_uart_instance_t * this_uart
)
{
700015d4:	b480      	push	{r7}
700015d6:	b085      	sub	sp, #20
700015d8:	af00      	add	r7, sp, #0
700015da:	6078      	str	r0, [r7, #4]
    uint8_t status = MSS_UART_INVALID_PARAM;
700015dc:	f04f 33ff 	mov.w	r3, #4294967295
700015e0:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
700015e2:	687a      	ldr	r2, [r7, #4]
700015e4:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700015e8:	f2c7 0300 	movt	r3, #28672	; 0x7000
700015ec:	429a      	cmp	r2, r3
700015ee:	d007      	beq.n	70001600 <MSS_UART_get_rx_status+0x2c>
700015f0:	687a      	ldr	r2, [r7, #4]
700015f2:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700015f6:	f2c7 0300 	movt	r3, #28672	; 0x7000
700015fa:	429a      	cmp	r2, r3
700015fc:	d000      	beq.n	70001600 <MSS_UART_get_rx_status+0x2c>
700015fe:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
70001600:	687a      	ldr	r2, [r7, #4]
70001602:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70001606:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000160a:	429a      	cmp	r2, r3
7000160c:	d006      	beq.n	7000161c <MSS_UART_get_rx_status+0x48>
7000160e:	687a      	ldr	r2, [r7, #4]
70001610:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001614:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001618:	429a      	cmp	r2, r3
7000161a:	d113      	bne.n	70001644 <MSS_UART_get_rx_status+0x70>
         * Bit 2 - Parity error status
         * Bit 3 - Frame error status
         * Bit 4 - Break interrupt indicator
         * Bit 7 - FIFO data error status
         */
        this_uart->status |= (this_uart->hw_reg->LSR);
7000161c:	687b      	ldr	r3, [r7, #4]
7000161e:	7a9a      	ldrb	r2, [r3, #10]
70001620:	687b      	ldr	r3, [r7, #4]
70001622:	681b      	ldr	r3, [r3, #0]
70001624:	7d1b      	ldrb	r3, [r3, #20]
70001626:	b2db      	uxtb	r3, r3
70001628:	ea42 0303 	orr.w	r3, r2, r3
7000162c:	b2da      	uxtb	r2, r3
7000162e:	687b      	ldr	r3, [r7, #4]
70001630:	729a      	strb	r2, [r3, #10]
        status = (this_uart->status & STATUS_ERROR_MASK );
70001632:	687b      	ldr	r3, [r7, #4]
70001634:	7a9b      	ldrb	r3, [r3, #10]
70001636:	f023 0361 	bic.w	r3, r3, #97	; 0x61
7000163a:	73fb      	strb	r3, [r7, #15]
        /* Clear the sticky status after reading */
        this_uart->status = 0U;
7000163c:	687b      	ldr	r3, [r7, #4]
7000163e:	f04f 0200 	mov.w	r2, #0
70001642:	729a      	strb	r2, [r3, #10]
    }
    return status;
70001644:	7bfb      	ldrb	r3, [r7, #15]
}
70001646:	4618      	mov	r0, r3
70001648:	f107 0714 	add.w	r7, r7, #20
7000164c:	46bd      	mov	sp, r7
7000164e:	bc80      	pop	{r7}
70001650:	4770      	bx	lr
70001652:	bf00      	nop

70001654 <MSS_UART_get_modem_status>:
uint8_t
MSS_UART_get_modem_status
(
    mss_uart_instance_t * this_uart
)
{
70001654:	b480      	push	{r7}
70001656:	b085      	sub	sp, #20
70001658:	af00      	add	r7, sp, #0
7000165a:	6078      	str	r0, [r7, #4]
    uint8_t status = MSS_UART_INVALID_PARAM;
7000165c:	f04f 33ff 	mov.w	r3, #4294967295
70001660:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
70001662:	687a      	ldr	r2, [r7, #4]
70001664:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70001668:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000166c:	429a      	cmp	r2, r3
7000166e:	d007      	beq.n	70001680 <MSS_UART_get_modem_status+0x2c>
70001670:	687a      	ldr	r2, [r7, #4]
70001672:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001676:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000167a:	429a      	cmp	r2, r3
7000167c:	d000      	beq.n	70001680 <MSS_UART_get_modem_status+0x2c>
7000167e:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
70001680:	687a      	ldr	r2, [r7, #4]
70001682:	f648 23d0 	movw	r3, #35536	; 0x8ad0
70001686:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000168a:	429a      	cmp	r2, r3
7000168c:	d006      	beq.n	7000169c <MSS_UART_get_modem_status+0x48>
7000168e:	687a      	ldr	r2, [r7, #4]
70001690:	f648 23a8 	movw	r3, #35496	; 0x8aa8
70001694:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001698:	429a      	cmp	r2, r3
7000169a:	d103      	bne.n	700016a4 <MSS_UART_get_modem_status+0x50>
         * Bit 4 - Clear To Send
         * Bit 5 - Data Set Ready
         * Bit 6 - Ring Indicator
         * Bit 7 - Data Carrier Detect
         */
        status = this_uart->hw_reg->MSR;
7000169c:	687b      	ldr	r3, [r7, #4]
7000169e:	681b      	ldr	r3, [r3, #0]
700016a0:	7e1b      	ldrb	r3, [r3, #24]
700016a2:	73fb      	strb	r3, [r7, #15]
    }
    return status;
700016a4:	7bfb      	ldrb	r3, [r7, #15]
}
700016a6:	4618      	mov	r0, r3
700016a8:	f107 0714 	add.w	r7, r7, #20
700016ac:	46bd      	mov	sp, r7
700016ae:	bc80      	pop	{r7}
700016b0:	4770      	bx	lr
700016b2:	bf00      	nop

700016b4 <MSS_UART_get_tx_status>:
uint8_t
MSS_UART_get_tx_status
(
    mss_uart_instance_t * this_uart
)
{
700016b4:	b480      	push	{r7}
700016b6:	b085      	sub	sp, #20
700016b8:	af00      	add	r7, sp, #0
700016ba:	6078      	str	r0, [r7, #4]
    uint8_t status = MSS_UART_TX_BUSY;
700016bc:	f04f 0300 	mov.w	r3, #0
700016c0:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
700016c2:	687a      	ldr	r2, [r7, #4]
700016c4:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700016c8:	f2c7 0300 	movt	r3, #28672	; 0x7000
700016cc:	429a      	cmp	r2, r3
700016ce:	d007      	beq.n	700016e0 <MSS_UART_get_tx_status+0x2c>
700016d0:	687a      	ldr	r2, [r7, #4]
700016d2:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700016d6:	f2c7 0300 	movt	r3, #28672	; 0x7000
700016da:	429a      	cmp	r2, r3
700016dc:	d000      	beq.n	700016e0 <MSS_UART_get_tx_status+0x2c>
700016de:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
700016e0:	687a      	ldr	r2, [r7, #4]
700016e2:	f648 23d0 	movw	r3, #35536	; 0x8ad0
700016e6:	f2c7 0300 	movt	r3, #28672	; 0x7000
700016ea:	429a      	cmp	r2, r3
700016ec:	d006      	beq.n	700016fc <MSS_UART_get_tx_status+0x48>
700016ee:	687a      	ldr	r2, [r7, #4]
700016f0:	f648 23a8 	movw	r3, #35496	; 0x8aa8
700016f4:	f2c7 0300 	movt	r3, #28672	; 0x7000
700016f8:	429a      	cmp	r2, r3
700016fa:	d10f      	bne.n	7000171c <MSS_UART_get_tx_status+0x68>
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
700016fc:	687b      	ldr	r3, [r7, #4]
700016fe:	681b      	ldr	r3, [r3, #0]
70001700:	7d1b      	ldrb	r3, [r3, #20]
70001702:	73fb      	strb	r3, [r7, #15]
        this_uart->status |= status;
70001704:	687b      	ldr	r3, [r7, #4]
70001706:	7a9a      	ldrb	r2, [r3, #10]
70001708:	7bfb      	ldrb	r3, [r7, #15]
7000170a:	ea42 0303 	orr.w	r3, r2, r3
7000170e:	b2da      	uxtb	r2, r3
70001710:	687b      	ldr	r3, [r7, #4]
70001712:	729a      	strb	r2, [r3, #10]
        /*
         * Extract the transmit status bits from the UART's Line Status Register.
         * Bit 5 - Transmitter Holding Register/FIFO Empty (THRE) status. (If = 1, TX FIFO is empty)
         * Bit 6 - Transmitter Empty (TEMT) status. (If = 1, both TX FIFO and shift register are empty)
         */
        status &= ( MSS_UART_THRE | MSS_UART_TEMT );
70001714:	7bfb      	ldrb	r3, [r7, #15]
70001716:	f003 0360 	and.w	r3, r3, #96	; 0x60
7000171a:	73fb      	strb	r3, [r7, #15]
    }
    return status;
7000171c:	7bfb      	ldrb	r3, [r7, #15]
}
7000171e:	4618      	mov	r0, r3
70001720:	f107 0714 	add.w	r7, r7, #20
70001724:	46bd      	mov	sp, r7
70001726:	bc80      	pop	{r7}
70001728:	4770      	bx	lr
7000172a:	bf00      	nop

7000172c <NVIC_EnableIRQ>:
 *
 * Enable a device specific interupt in the NVIC interrupt controller.
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
7000172c:	b480      	push	{r7}
7000172e:	b083      	sub	sp, #12
70001730:	af00      	add	r7, sp, #0
70001732:	4603      	mov	r3, r0
70001734:	80fb      	strh	r3, [r7, #6]
  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
70001736:	f24e 1300 	movw	r3, #57600	; 0xe100
7000173a:	f2ce 0300 	movt	r3, #57344	; 0xe000
7000173e:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
70001742:	ea4f 1252 	mov.w	r2, r2, lsr #5
70001746:	88f9      	ldrh	r1, [r7, #6]
70001748:	f001 011f 	and.w	r1, r1, #31
7000174c:	f04f 0001 	mov.w	r0, #1
70001750:	fa00 f101 	lsl.w	r1, r0, r1
70001754:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
70001758:	f107 070c 	add.w	r7, r7, #12
7000175c:	46bd      	mov	sp, r7
7000175e:	bc80      	pop	{r7}
70001760:	4770      	bx	lr
70001762:	bf00      	nop

70001764 <NVIC_ClearPendingIRQ>:
 *
 * Clear the pending bit for the specified interrupt. 
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
70001764:	b480      	push	{r7}
70001766:	b083      	sub	sp, #12
70001768:	af00      	add	r7, sp, #0
7000176a:	4603      	mov	r3, r0
7000176c:	80fb      	strh	r3, [r7, #6]
  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
7000176e:	f24e 1300 	movw	r3, #57600	; 0xe100
70001772:	f2ce 0300 	movt	r3, #57344	; 0xe000
70001776:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
7000177a:	ea4f 1252 	mov.w	r2, r2, lsr #5
7000177e:	88f9      	ldrh	r1, [r7, #6]
70001780:	f001 011f 	and.w	r1, r1, #31
70001784:	f04f 0001 	mov.w	r0, #1
70001788:	fa00 f101 	lsl.w	r1, r0, r1
7000178c:	f102 0260 	add.w	r2, r2, #96	; 0x60
70001790:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
70001794:	f107 070c 	add.w	r7, r7, #12
70001798:	46bd      	mov	sp, r7
7000179a:	bc80      	pop	{r7}
7000179c:	4770      	bx	lr
7000179e:	bf00      	nop

700017a0 <MSS_GPIO_init>:
/*-------------------------------------------------------------------------*//**
 * MSS_GPIO_init
 * See "mss_gpio.h" for details of how to use this function.
 */
void MSS_GPIO_init( void )
{
700017a0:	b580      	push	{r7, lr}
700017a2:	b082      	sub	sp, #8
700017a4:	af00      	add	r7, sp, #0
    uint32_t i;
    
    /* reset MSS GPIO hardware */
    SYSREG->SOFT_RST_CR |= SYSREG_GPIO_SOFTRESET_MASK;
700017a6:	f242 0300 	movw	r3, #8192	; 0x2000
700017aa:	f2ce 0304 	movt	r3, #57348	; 0xe004
700017ae:	f242 0200 	movw	r2, #8192	; 0x2000
700017b2:	f2ce 0204 	movt	r2, #57348	; 0xe004
700017b6:	6b12      	ldr	r2, [r2, #48]	; 0x30
700017b8:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
700017bc:	631a      	str	r2, [r3, #48]	; 0x30
    /* Clear any previously pended MSS GPIO interrupt */
    for ( i = 0U; i < NB_OF_GPIO; ++i )
700017be:	f04f 0300 	mov.w	r3, #0
700017c2:	607b      	str	r3, [r7, #4]
700017c4:	e00e      	b.n	700017e4 <MSS_GPIO_init+0x44>
    {
        NVIC_ClearPendingIRQ( g_gpio_irqn_lut[i] );
700017c6:	687a      	ldr	r2, [r7, #4]
700017c8:	f248 2340 	movw	r3, #33344	; 0x8240
700017cc:	f2c7 0300 	movt	r3, #28672	; 0x7000
700017d0:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
700017d4:	b21b      	sxth	r3, r3
700017d6:	4618      	mov	r0, r3
700017d8:	f7ff ffc4 	bl	70001764 <NVIC_ClearPendingIRQ>
    uint32_t i;
    
    /* reset MSS GPIO hardware */
    SYSREG->SOFT_RST_CR |= SYSREG_GPIO_SOFTRESET_MASK;
    /* Clear any previously pended MSS GPIO interrupt */
    for ( i = 0U; i < NB_OF_GPIO; ++i )
700017dc:	687b      	ldr	r3, [r7, #4]
700017de:	f103 0301 	add.w	r3, r3, #1
700017e2:	607b      	str	r3, [r7, #4]
700017e4:	687b      	ldr	r3, [r7, #4]
700017e6:	2b1f      	cmp	r3, #31
700017e8:	d9ed      	bls.n	700017c6 <MSS_GPIO_init+0x26>
    {
        NVIC_ClearPendingIRQ( g_gpio_irqn_lut[i] );
    }
    /* Take MSS GPIO hardware out of reset. */
    SYSREG->SOFT_RST_CR &= ~SYSREG_GPIO_SOFTRESET_MASK;
700017ea:	f242 0300 	movw	r3, #8192	; 0x2000
700017ee:	f2ce 0304 	movt	r3, #57348	; 0xe004
700017f2:	f242 0200 	movw	r2, #8192	; 0x2000
700017f6:	f2ce 0204 	movt	r2, #57348	; 0xe004
700017fa:	6b12      	ldr	r2, [r2, #48]	; 0x30
700017fc:	f422 4280 	bic.w	r2, r2, #16384	; 0x4000
70001800:	631a      	str	r2, [r3, #48]	; 0x30
}
70001802:	f107 0708 	add.w	r7, r7, #8
70001806:	46bd      	mov	sp, r7
70001808:	bd80      	pop	{r7, pc}
7000180a:	bf00      	nop

7000180c <MSS_GPIO_config>:
void MSS_GPIO_config
(
    mss_gpio_id_t port_id,
    uint32_t config
)
{
7000180c:	b480      	push	{r7}
7000180e:	b085      	sub	sp, #20
70001810:	af00      	add	r7, sp, #0
70001812:	4603      	mov	r3, r0
70001814:	6039      	str	r1, [r7, #0]
70001816:	71fb      	strb	r3, [r7, #7]
    uint32_t gpio_idx = (uint32_t)port_id;
70001818:	79fb      	ldrb	r3, [r7, #7]
7000181a:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
7000181c:	68fb      	ldr	r3, [r7, #12]
7000181e:	2b1f      	cmp	r3, #31
70001820:	d900      	bls.n	70001824 <MSS_GPIO_config+0x18>
70001822:	be00      	bkpt	0x0000

    if ( gpio_idx < NB_OF_GPIO )
70001824:	68fb      	ldr	r3, [r7, #12]
70001826:	2b1f      	cmp	r3, #31
70001828:	d808      	bhi.n	7000183c <MSS_GPIO_config+0x30>
    {
        *(g_config_reg_lut[gpio_idx]) = config;
7000182a:	68fa      	ldr	r2, [r7, #12]
7000182c:	f248 13c0 	movw	r3, #33216	; 0x81c0
70001830:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001834:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
70001838:	683a      	ldr	r2, [r7, #0]
7000183a:	601a      	str	r2, [r3, #0]
    }
}
7000183c:	f107 0714 	add.w	r7, r7, #20
70001840:	46bd      	mov	sp, r7
70001842:	bc80      	pop	{r7}
70001844:	4770      	bx	lr
70001846:	bf00      	nop

70001848 <MSS_GPIO_set_output>:
void MSS_GPIO_set_output
(
    mss_gpio_id_t       port_id,
    uint8_t             value
)
{
70001848:	b480      	push	{r7}
7000184a:	b085      	sub	sp, #20
7000184c:	af00      	add	r7, sp, #0
7000184e:	4602      	mov	r2, r0
70001850:	460b      	mov	r3, r1
70001852:	71fa      	strb	r2, [r7, #7]
70001854:	71bb      	strb	r3, [r7, #6]
    uint32_t gpio_idx = (uint32_t)port_id;
70001856:	79fb      	ldrb	r3, [r7, #7]
70001858:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
7000185a:	68fb      	ldr	r3, [r7, #12]
7000185c:	2b1f      	cmp	r3, #31
7000185e:	d900      	bls.n	70001862 <MSS_GPIO_set_output+0x1a>
70001860:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
70001862:	68fb      	ldr	r3, [r7, #12]
70001864:	2b1f      	cmp	r3, #31
70001866:	d809      	bhi.n	7000187c <MSS_GPIO_set_output+0x34>
    {
        GPIO_BITBAND->GPIO_OUT[gpio_idx] = (uint32_t)value;
70001868:	f240 0300 	movw	r3, #0
7000186c:	f2c4 2326 	movt	r3, #16934	; 0x4226
70001870:	68fa      	ldr	r2, [r7, #12]
70001872:	79b9      	ldrb	r1, [r7, #6]
70001874:	f502 6288 	add.w	r2, r2, #1088	; 0x440
70001878:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
    }
}
7000187c:	f107 0714 	add.w	r7, r7, #20
70001880:	46bd      	mov	sp, r7
70001882:	bc80      	pop	{r7}
70001884:	4770      	bx	lr
70001886:	bf00      	nop

70001888 <MSS_GPIO_drive_inout>:
void MSS_GPIO_drive_inout
(
    mss_gpio_id_t port_id,
    mss_gpio_inout_state_t inout_state
)
{
70001888:	b480      	push	{r7}
7000188a:	b087      	sub	sp, #28
7000188c:	af00      	add	r7, sp, #0
7000188e:	4602      	mov	r2, r0
70001890:	460b      	mov	r3, r1
70001892:	71fa      	strb	r2, [r7, #7]
70001894:	71bb      	strb	r3, [r7, #6]
    uint32_t outputs_state;
    uint32_t config;
    uint32_t gpio_idx = (uint32_t)port_id;
70001896:	79fb      	ldrb	r3, [r7, #7]
70001898:	617b      	str	r3, [r7, #20]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
7000189a:	697b      	ldr	r3, [r7, #20]
7000189c:	2b1f      	cmp	r3, #31
7000189e:	d900      	bls.n	700018a2 <MSS_GPIO_drive_inout+0x1a>
700018a0:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
700018a2:	697b      	ldr	r3, [r7, #20]
700018a4:	2b1f      	cmp	r3, #31
700018a6:	d87d      	bhi.n	700019a4 <MSS_GPIO_drive_inout+0x11c>
    {
        switch( inout_state )
700018a8:	79bb      	ldrb	r3, [r7, #6]
700018aa:	2b01      	cmp	r3, #1
700018ac:	d004      	beq.n	700018b8 <MSS_GPIO_drive_inout+0x30>
700018ae:	2b02      	cmp	r3, #2
700018b0:	d060      	beq.n	70001974 <MSS_GPIO_drive_inout+0xec>
700018b2:	2b00      	cmp	r3, #0
700018b4:	d02e      	beq.n	70001914 <MSS_GPIO_drive_inout+0x8c>
700018b6:	e074      	b.n	700019a2 <MSS_GPIO_drive_inout+0x11a>
        {
        case MSS_GPIO_DRIVE_HIGH:
            /* Set output high */
            outputs_state = GPIO->GPIO_OUT;
700018b8:	f243 0300 	movw	r3, #12288	; 0x3000
700018bc:	f2c4 0301 	movt	r3, #16385	; 0x4001
700018c0:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
700018c4:	60fb      	str	r3, [r7, #12]
            outputs_state |= (uint32_t)1 << gpio_idx;
700018c6:	697b      	ldr	r3, [r7, #20]
700018c8:	f04f 0201 	mov.w	r2, #1
700018cc:	fa02 f303 	lsl.w	r3, r2, r3
700018d0:	68fa      	ldr	r2, [r7, #12]
700018d2:	ea42 0303 	orr.w	r3, r2, r3
700018d6:	60fb      	str	r3, [r7, #12]
            GPIO->GPIO_OUT = outputs_state;
700018d8:	f243 0300 	movw	r3, #12288	; 0x3000
700018dc:	f2c4 0301 	movt	r3, #16385	; 0x4001
700018e0:	68fa      	ldr	r2, [r7, #12]
700018e2:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
            /* Enable output buffer */
            config = *(g_config_reg_lut[gpio_idx]);
700018e6:	697a      	ldr	r2, [r7, #20]
700018e8:	f248 13c0 	movw	r3, #33216	; 0x81c0
700018ec:	f2c7 0300 	movt	r3, #28672	; 0x7000
700018f0:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
700018f4:	681b      	ldr	r3, [r3, #0]
700018f6:	613b      	str	r3, [r7, #16]
            config |= OUTPUT_BUFFER_ENABLE_MASK;
700018f8:	693b      	ldr	r3, [r7, #16]
700018fa:	f043 0304 	orr.w	r3, r3, #4
700018fe:	613b      	str	r3, [r7, #16]
            *(g_config_reg_lut[gpio_idx]) = config;
70001900:	697a      	ldr	r2, [r7, #20]
70001902:	f248 13c0 	movw	r3, #33216	; 0x81c0
70001906:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000190a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
7000190e:	693a      	ldr	r2, [r7, #16]
70001910:	601a      	str	r2, [r3, #0]
            break;
70001912:	e047      	b.n	700019a4 <MSS_GPIO_drive_inout+0x11c>
            
        case MSS_GPIO_DRIVE_LOW:
            /* Set output low */
            outputs_state = GPIO->GPIO_OUT;
70001914:	f243 0300 	movw	r3, #12288	; 0x3000
70001918:	f2c4 0301 	movt	r3, #16385	; 0x4001
7000191c:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
70001920:	60fb      	str	r3, [r7, #12]
            outputs_state &= ~((uint32_t)((uint32_t)1 << gpio_idx));
70001922:	697b      	ldr	r3, [r7, #20]
70001924:	f04f 0201 	mov.w	r2, #1
70001928:	fa02 f303 	lsl.w	r3, r2, r3
7000192c:	ea6f 0303 	mvn.w	r3, r3
70001930:	68fa      	ldr	r2, [r7, #12]
70001932:	ea02 0303 	and.w	r3, r2, r3
70001936:	60fb      	str	r3, [r7, #12]
            GPIO->GPIO_OUT = outputs_state;
70001938:	f243 0300 	movw	r3, #12288	; 0x3000
7000193c:	f2c4 0301 	movt	r3, #16385	; 0x4001
70001940:	68fa      	ldr	r2, [r7, #12]
70001942:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
            /* Enable output buffer */
            config = *(g_config_reg_lut[gpio_idx]);
70001946:	697a      	ldr	r2, [r7, #20]
70001948:	f248 13c0 	movw	r3, #33216	; 0x81c0
7000194c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001950:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
70001954:	681b      	ldr	r3, [r3, #0]
70001956:	613b      	str	r3, [r7, #16]
            config |= OUTPUT_BUFFER_ENABLE_MASK;
70001958:	693b      	ldr	r3, [r7, #16]
7000195a:	f043 0304 	orr.w	r3, r3, #4
7000195e:	613b      	str	r3, [r7, #16]
            *(g_config_reg_lut[gpio_idx]) = config;
70001960:	697a      	ldr	r2, [r7, #20]
70001962:	f248 13c0 	movw	r3, #33216	; 0x81c0
70001966:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000196a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
7000196e:	693a      	ldr	r2, [r7, #16]
70001970:	601a      	str	r2, [r3, #0]
            break;
70001972:	e017      	b.n	700019a4 <MSS_GPIO_drive_inout+0x11c>
            
        case MSS_GPIO_HIGH_Z:
            /* Disable output buffer */
            config = *(g_config_reg_lut[gpio_idx]);
70001974:	697a      	ldr	r2, [r7, #20]
70001976:	f248 13c0 	movw	r3, #33216	; 0x81c0
7000197a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000197e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
70001982:	681b      	ldr	r3, [r3, #0]
70001984:	613b      	str	r3, [r7, #16]
            config &= ~OUTPUT_BUFFER_ENABLE_MASK;
70001986:	693b      	ldr	r3, [r7, #16]
70001988:	f023 0304 	bic.w	r3, r3, #4
7000198c:	613b      	str	r3, [r7, #16]
            *(g_config_reg_lut[gpio_idx]) = config;
7000198e:	697a      	ldr	r2, [r7, #20]
70001990:	f248 13c0 	movw	r3, #33216	; 0x81c0
70001994:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001998:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
7000199c:	693a      	ldr	r2, [r7, #16]
7000199e:	601a      	str	r2, [r3, #0]
            break;
700019a0:	e000      	b.n	700019a4 <MSS_GPIO_drive_inout+0x11c>
            
        default:
            ASSERT(0);
700019a2:	be00      	bkpt	0x0000
            break;
        }
    }
}
700019a4:	f107 071c 	add.w	r7, r7, #28
700019a8:	46bd      	mov	sp, r7
700019aa:	bc80      	pop	{r7}
700019ac:	4770      	bx	lr
700019ae:	bf00      	nop

700019b0 <MSS_GPIO_enable_irq>:
 */
void MSS_GPIO_enable_irq
(
    mss_gpio_id_t port_id
)
{
700019b0:	b580      	push	{r7, lr}
700019b2:	b084      	sub	sp, #16
700019b4:	af00      	add	r7, sp, #0
700019b6:	4603      	mov	r3, r0
700019b8:	71fb      	strb	r3, [r7, #7]
    uint32_t cfg_value;
    uint32_t gpio_idx = (uint32_t)port_id;
700019ba:	79fb      	ldrb	r3, [r7, #7]
700019bc:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
700019be:	68fb      	ldr	r3, [r7, #12]
700019c0:	2b1f      	cmp	r3, #31
700019c2:	d900      	bls.n	700019c6 <MSS_GPIO_enable_irq+0x16>
700019c4:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
700019c6:	68fb      	ldr	r3, [r7, #12]
700019c8:	2b1f      	cmp	r3, #31
700019ca:	d81e      	bhi.n	70001a0a <MSS_GPIO_enable_irq+0x5a>
    {
        cfg_value = *(g_config_reg_lut[gpio_idx]);
700019cc:	68fa      	ldr	r2, [r7, #12]
700019ce:	f248 13c0 	movw	r3, #33216	; 0x81c0
700019d2:	f2c7 0300 	movt	r3, #28672	; 0x7000
700019d6:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
700019da:	681b      	ldr	r3, [r3, #0]
700019dc:	60bb      	str	r3, [r7, #8]
        *(g_config_reg_lut[gpio_idx]) = (cfg_value | GPIO_INT_ENABLE_MASK);
700019de:	68fa      	ldr	r2, [r7, #12]
700019e0:	f248 13c0 	movw	r3, #33216	; 0x81c0
700019e4:	f2c7 0300 	movt	r3, #28672	; 0x7000
700019e8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
700019ec:	68ba      	ldr	r2, [r7, #8]
700019ee:	f042 0208 	orr.w	r2, r2, #8
700019f2:	601a      	str	r2, [r3, #0]
        NVIC_EnableIRQ( g_gpio_irqn_lut[gpio_idx] );
700019f4:	68fa      	ldr	r2, [r7, #12]
700019f6:	f248 2340 	movw	r3, #33344	; 0x8240
700019fa:	f2c7 0300 	movt	r3, #28672	; 0x7000
700019fe:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
70001a02:	b21b      	sxth	r3, r3
70001a04:	4618      	mov	r0, r3
70001a06:	f7ff fe91 	bl	7000172c <NVIC_EnableIRQ>
    }
}
70001a0a:	f107 0710 	add.w	r7, r7, #16
70001a0e:	46bd      	mov	sp, r7
70001a10:	bd80      	pop	{r7, pc}
70001a12:	bf00      	nop

70001a14 <MSS_GPIO_disable_irq>:
 */
void MSS_GPIO_disable_irq
(
    mss_gpio_id_t port_id
)
{
70001a14:	b480      	push	{r7}
70001a16:	b085      	sub	sp, #20
70001a18:	af00      	add	r7, sp, #0
70001a1a:	4603      	mov	r3, r0
70001a1c:	71fb      	strb	r3, [r7, #7]
    uint32_t cfg_value;
    uint32_t gpio_idx = (uint32_t)port_id;
70001a1e:	79fb      	ldrb	r3, [r7, #7]
70001a20:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
70001a22:	68fb      	ldr	r3, [r7, #12]
70001a24:	2b1f      	cmp	r3, #31
70001a26:	d900      	bls.n	70001a2a <MSS_GPIO_disable_irq+0x16>
70001a28:	be00      	bkpt	0x0000

    if ( gpio_idx < NB_OF_GPIO )
70001a2a:	68fb      	ldr	r3, [r7, #12]
70001a2c:	2b1f      	cmp	r3, #31
70001a2e:	d813      	bhi.n	70001a58 <MSS_GPIO_disable_irq+0x44>
    {
        cfg_value = *(g_config_reg_lut[gpio_idx]);
70001a30:	68fa      	ldr	r2, [r7, #12]
70001a32:	f248 13c0 	movw	r3, #33216	; 0x81c0
70001a36:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001a3a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
70001a3e:	681b      	ldr	r3, [r3, #0]
70001a40:	60bb      	str	r3, [r7, #8]
        *(g_config_reg_lut[gpio_idx]) = (cfg_value & ~GPIO_INT_ENABLE_MASK);
70001a42:	68fa      	ldr	r2, [r7, #12]
70001a44:	f248 13c0 	movw	r3, #33216	; 0x81c0
70001a48:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001a4c:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
70001a50:	68ba      	ldr	r2, [r7, #8]
70001a52:	f022 0208 	bic.w	r2, r2, #8
70001a56:	601a      	str	r2, [r3, #0]
    }
}
70001a58:	f107 0714 	add.w	r7, r7, #20
70001a5c:	46bd      	mov	sp, r7
70001a5e:	bc80      	pop	{r7}
70001a60:	4770      	bx	lr
70001a62:	bf00      	nop

70001a64 <MSS_GPIO_clear_irq>:
 */
void MSS_GPIO_clear_irq
(
    mss_gpio_id_t port_id
)
{
70001a64:	b580      	push	{r7, lr}
70001a66:	b084      	sub	sp, #16
70001a68:	af00      	add	r7, sp, #0
70001a6a:	4603      	mov	r3, r0
70001a6c:	71fb      	strb	r3, [r7, #7]
    uint32_t gpio_idx = (uint32_t)port_id;
70001a6e:	79fb      	ldrb	r3, [r7, #7]
70001a70:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
70001a72:	68fb      	ldr	r3, [r7, #12]
70001a74:	2b1f      	cmp	r3, #31
70001a76:	d900      	bls.n	70001a7a <MSS_GPIO_clear_irq+0x16>
70001a78:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
70001a7a:	68fb      	ldr	r3, [r7, #12]
70001a7c:	2b1f      	cmp	r3, #31
70001a7e:	d815      	bhi.n	70001aac <MSS_GPIO_clear_irq+0x48>
    {
        GPIO->GPIO_IRQ = ((uint32_t)1) << gpio_idx;
70001a80:	f243 0300 	movw	r3, #12288	; 0x3000
70001a84:	f2c4 0301 	movt	r3, #16385	; 0x4001
70001a88:	68fa      	ldr	r2, [r7, #12]
70001a8a:	f04f 0101 	mov.w	r1, #1
70001a8e:	fa01 f202 	lsl.w	r2, r1, r2
70001a92:	f8c3 2080 	str.w	r2, [r3, #128]	; 0x80
        NVIC_ClearPendingIRQ( g_gpio_irqn_lut[gpio_idx] );
70001a96:	68fa      	ldr	r2, [r7, #12]
70001a98:	f248 2340 	movw	r3, #33344	; 0x8240
70001a9c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001aa0:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
70001aa4:	b21b      	sxth	r3, r3
70001aa6:	4618      	mov	r0, r3
70001aa8:	f7ff fe5c 	bl	70001764 <NVIC_ClearPendingIRQ>
    }
}
70001aac:	f107 0710 	add.w	r7, r7, #16
70001ab0:	46bd      	mov	sp, r7
70001ab2:	bd80      	pop	{r7, pc}

70001ab4 <SystemInit>:

/***************************************************************************//**
 * See system_a2fxxxm3f.h for details.
 */
void SystemInit(void)
{
70001ab4:	b480      	push	{r7}
70001ab6:	af00      	add	r7, sp, #0
    /*
     * Do not make use of global variables or make any asumptions regarding
     * memory content if modifying this function. The memory content has not been
     * initialised by the time this function is called by the start-up code.
     */
}
70001ab8:	46bd      	mov	sp, r7
70001aba:	bc80      	pop	{r7}
70001abc:	4770      	bx	lr
70001abe:	bf00      	nop

70001ac0 <SystemCoreClockUpdate>:

/***************************************************************************//**
 *
 */
void SystemCoreClockUpdate (void)
{
70001ac0:	b580      	push	{r7, lr}
70001ac2:	b08a      	sub	sp, #40	; 0x28
70001ac4:	af00      	add	r7, sp, #0
    uint32_t PclkDiv0;
    uint32_t PclkDiv1;
    uint32_t AceDiv;
    uint32_t FabDiv;

    const uint32_t pclk_div_lut[4] = { 1uL, 2uL, 4uL, 1uL };
70001ac6:	f248 2380 	movw	r3, #33408	; 0x8280
70001aca:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001ace:	46bc      	mov	ip, r7
70001ad0:	cb0f      	ldmia	r3!, {r0, r1, r2, r3}
70001ad2:	e88c 000f 	stmia.w	ip, {r0, r1, r2, r3}

    /* Read PCLK dividers from system registers. Multiply the value read from
     * system register by two to get actual divider value. */
    PclkDiv0 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK0_DIV_SHIFT) & PCLK_DIV_MASK)];
70001ad6:	f242 0300 	movw	r3, #8192	; 0x2000
70001ada:	f2ce 0304 	movt	r3, #57348	; 0xe004
70001ade:	6c9b      	ldr	r3, [r3, #72]	; 0x48
70001ae0:	ea4f 0393 	mov.w	r3, r3, lsr #2
70001ae4:	f003 0303 	and.w	r3, r3, #3
70001ae8:	ea4f 0383 	mov.w	r3, r3, lsl #2
70001aec:	f107 0228 	add.w	r2, r7, #40	; 0x28
70001af0:	4413      	add	r3, r2
70001af2:	f853 3c28 	ldr.w	r3, [r3, #-40]
70001af6:	613b      	str	r3, [r7, #16]
    PclkDiv1 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK1_DIV_SHIFT) & PCLK_DIV_MASK)];
70001af8:	f242 0300 	movw	r3, #8192	; 0x2000
70001afc:	f2ce 0304 	movt	r3, #57348	; 0xe004
70001b00:	6c9b      	ldr	r3, [r3, #72]	; 0x48
70001b02:	ea4f 1313 	mov.w	r3, r3, lsr #4
70001b06:	f003 0303 	and.w	r3, r3, #3
70001b0a:	ea4f 0383 	mov.w	r3, r3, lsl #2
70001b0e:	f107 0228 	add.w	r2, r7, #40	; 0x28
70001b12:	4413      	add	r3, r2
70001b14:	f853 3c28 	ldr.w	r3, [r3, #-40]
70001b18:	617b      	str	r3, [r7, #20]
    AceDiv = pclk_div_lut[((SYSREG->MSS_CLK_CR >> ACE_DIV_SHIFT) & PCLK_DIV_MASK)];
70001b1a:	f242 0300 	movw	r3, #8192	; 0x2000
70001b1e:	f2ce 0304 	movt	r3, #57348	; 0xe004
70001b22:	6c9b      	ldr	r3, [r3, #72]	; 0x48
70001b24:	ea4f 1393 	mov.w	r3, r3, lsr #6
70001b28:	f003 0303 	and.w	r3, r3, #3
70001b2c:	ea4f 0383 	mov.w	r3, r3, lsl #2
70001b30:	f107 0228 	add.w	r2, r7, #40	; 0x28
70001b34:	4413      	add	r3, r2
70001b36:	f853 3c28 	ldr.w	r3, [r3, #-40]
70001b3a:	61bb      	str	r3, [r7, #24]
    {
        /* Compute the FPGA fabric frequency divider. */
        uint32_t obdiv;
        uint32_t obdivhalf;
        
        obdiv = (SYSREG->MSS_CCC_DIV_CR >> OBDIV_SHIFT) & OBDIV_MASK;
70001b3c:	f242 0300 	movw	r3, #8192	; 0x2000
70001b40:	f2ce 0304 	movt	r3, #57348	; 0xe004
70001b44:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
70001b46:	ea4f 2313 	mov.w	r3, r3, lsr #8
70001b4a:	f003 031f 	and.w	r3, r3, #31
70001b4e:	623b      	str	r3, [r7, #32]
        obdivhalf = (SYSREG->MSS_CCC_DIV_CR >> OBDIVHALF_SHIFT) & OBDIVHALF_MASK;
70001b50:	f242 0300 	movw	r3, #8192	; 0x2000
70001b54:	f2ce 0304 	movt	r3, #57348	; 0xe004
70001b58:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
70001b5a:	ea4f 3353 	mov.w	r3, r3, lsr #13
70001b5e:	f003 0301 	and.w	r3, r3, #1
70001b62:	627b      	str	r3, [r7, #36]	; 0x24
        FabDiv = obdiv + 1uL;
70001b64:	6a3b      	ldr	r3, [r7, #32]
70001b66:	f103 0301 	add.w	r3, r3, #1
70001b6a:	61fb      	str	r3, [r7, #28]
        if ( obdivhalf != 0uL )
70001b6c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
70001b6e:	2b00      	cmp	r3, #0
70001b70:	d003      	beq.n	70001b7a <SystemCoreClockUpdate+0xba>
        {
            FabDiv = FabDiv * 2uL;
70001b72:	69fb      	ldr	r3, [r7, #28]
70001b74:	ea4f 0343 	mov.w	r3, r3, lsl #1
70001b78:	61fb      	str	r3, [r7, #28]
    }
    
    /* Retrieve FCLK from eNVM spare pages if Actel system boot programmed as part of the system. */
    
    /* Read system clock from eNVM spare pages. */
    SystemCoreClock = GetSystemClock();
70001b7a:	f000 f849 	bl	70001c10 <GetSystemClock>
70001b7e:	4602      	mov	r2, r0
70001b80:	f248 5330 	movw	r3, #34096	; 0x8530
70001b84:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001b88:	601a      	str	r2, [r3, #0]
    g_FrequencyPCLK0 = SystemCoreClock / PclkDiv0;
70001b8a:	f248 5330 	movw	r3, #34096	; 0x8530
70001b8e:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001b92:	681a      	ldr	r2, [r3, #0]
70001b94:	693b      	ldr	r3, [r7, #16]
70001b96:	fbb2 f2f3 	udiv	r2, r2, r3
70001b9a:	f248 5334 	movw	r3, #34100	; 0x8534
70001b9e:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001ba2:	601a      	str	r2, [r3, #0]
    g_FrequencyPCLK1 = SystemCoreClock / PclkDiv1;
70001ba4:	f248 5330 	movw	r3, #34096	; 0x8530
70001ba8:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001bac:	681a      	ldr	r2, [r3, #0]
70001bae:	697b      	ldr	r3, [r7, #20]
70001bb0:	fbb2 f2f3 	udiv	r2, r2, r3
70001bb4:	f248 5338 	movw	r3, #34104	; 0x8538
70001bb8:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001bbc:	601a      	str	r2, [r3, #0]
    g_FrequencyACE = SystemCoreClock / AceDiv;
70001bbe:	f248 5330 	movw	r3, #34096	; 0x8530
70001bc2:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001bc6:	681a      	ldr	r2, [r3, #0]
70001bc8:	69bb      	ldr	r3, [r7, #24]
70001bca:	fbb2 f2f3 	udiv	r2, r2, r3
70001bce:	f248 533c 	movw	r3, #34108	; 0x853c
70001bd2:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001bd6:	601a      	str	r2, [r3, #0]
    g_FrequencyFPGA = SystemCoreClock / FabDiv;
70001bd8:	f248 5330 	movw	r3, #34096	; 0x8530
70001bdc:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001be0:	681a      	ldr	r2, [r3, #0]
70001be2:	69fb      	ldr	r3, [r7, #28]
70001be4:	fbb2 f2f3 	udiv	r2, r2, r3
70001be8:	f248 5340 	movw	r3, #34112	; 0x8540
70001bec:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001bf0:	601a      	str	r2, [r3, #0]
    
    /* Keep SystemFrequency as well as SystemCoreClock for legacy reasons. */
    SystemFrequency = SystemCoreClock;
70001bf2:	f248 5330 	movw	r3, #34096	; 0x8530
70001bf6:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001bfa:	681a      	ldr	r2, [r3, #0]
70001bfc:	f248 532c 	movw	r3, #34092	; 0x852c
70001c00:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001c04:	601a      	str	r2, [r3, #0]
}
70001c06:	f107 0728 	add.w	r7, r7, #40	; 0x28
70001c0a:	46bd      	mov	sp, r7
70001c0c:	bd80      	pop	{r7, pc}
70001c0e:	bf00      	nop

70001c10 <GetSystemClock>:
 * retrieved from eNVM spare pages.
 * The FCLK frequency value selected in the MSS Configurator software tool is
 * stored in eNVM spare pages as part of the Actel system boot configuration data.
 */
uint32_t GetSystemClock( void )
{
70001c10:	b480      	push	{r7}
70001c12:	b08b      	sub	sp, #44	; 0x2c
70001c14:	af00      	add	r7, sp, #0
    uint32_t fclk = 0uL;
70001c16:	f04f 0300 	mov.w	r3, #0
70001c1a:	607b      	str	r3, [r7, #4]
    
    uint32_t * p_sysboot_key = SYSBOOT_KEY_ADDR;
70001c1c:	f640 031c 	movw	r3, #2076	; 0x81c
70001c20:	f2c6 0308 	movt	r3, #24584	; 0x6008
70001c24:	60bb      	str	r3, [r7, #8]
    uint32_t * p_idcode = IDCODE_LOCATION;
70001c26:	f240 2330 	movw	r3, #560	; 0x230
70001c2a:	f2c6 0308 	movt	r3, #24584	; 0x6008
70001c2e:	60fb      	str	r3, [r7, #12]
    uint32_t idcode;
	
    idcode = *p_idcode & ~IDCODE_DEV_REV_MASK;
70001c30:	68fb      	ldr	r3, [r7, #12]
70001c32:	681b      	ldr	r3, [r3, #0]
70001c34:	f023 4370 	bic.w	r3, r3, #4026531840	; 0xf0000000
70001c38:	613b      	str	r3, [r7, #16]
	
    if ( A2F060IFX_ID == idcode )
70001c3a:	693a      	ldr	r2, [r7, #16]
70001c3c:	f241 13cf 	movw	r3, #4559	; 0x11cf
70001c40:	f2c0 53a1 	movt	r3, #1441	; 0x5a1
70001c44:	429a      	cmp	r2, r3
70001c46:	d108      	bne.n	70001c5a <GetSystemClock+0x4a>
    {
        uint32_t *p_fclk = SYSBOOT_A2F060_FCLK_ADDR;
70001c48:	f64e 732c 	movw	r3, #61228	; 0xef2c
70001c4c:	f2c6 0301 	movt	r3, #24577	; 0x6001
70001c50:	617b      	str	r3, [r7, #20]
        fclk = *p_fclk;
70001c52:	697b      	ldr	r3, [r7, #20]
70001c54:	681b      	ldr	r3, [r3, #0]
70001c56:	607b      	str	r3, [r7, #4]
70001c58:	e03d      	b.n	70001cd6 <GetSystemClock+0xc6>
    }
    else if ( SYSBOOT_KEY_VALUE == *p_sysboot_key )
70001c5a:	68bb      	ldr	r3, [r7, #8]
70001c5c:	681a      	ldr	r2, [r3, #0]
70001c5e:	f244 3341 	movw	r3, #17217	; 0x4341
70001c62:	f6c4 4354 	movt	r3, #19540	; 0x4c54
70001c66:	429a      	cmp	r2, r3
70001c68:	d135      	bne.n	70001cd6 <GetSystemClock+0xc6>
    {
        /* Actel system boot programmed, check if it has the FCLK value stored. */
        uint32_t *p_sysboot_version = SYSBOOT_VERSION_ADDR;
70001c6a:	f640 0340 	movw	r3, #2112	; 0x840
70001c6e:	f2c6 0308 	movt	r3, #24584	; 0x6008
70001c72:	61bb      	str	r3, [r7, #24]
        uint32_t sysboot_version = *p_sysboot_version;
70001c74:	69bb      	ldr	r3, [r7, #24]
70001c76:	681b      	ldr	r3, [r3, #0]
70001c78:	61fb      	str	r3, [r7, #28]
        
        sysboot_version &= SYSBOOT_VERSION_MASK;
70001c7a:	69fb      	ldr	r3, [r7, #28]
70001c7c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
70001c80:	61fb      	str	r3, [r7, #28]
        
        if ( sysboot_version >= MIN_SYSBOOT_VERSION )
70001c82:	69fa      	ldr	r2, [r7, #28]
70001c84:	f240 3300 	movw	r3, #768	; 0x300
70001c88:	f2c0 0301 	movt	r3, #1
70001c8c:	429a      	cmp	r2, r3
70001c8e:	d922      	bls.n	70001cd6 <GetSystemClock+0xc6>
        {
            /* Handle change of eNVM location of FCLK between 1.3.x and 2.x.x versions of the system boot. */
            if ( sysboot_version < SYSBOOT_VERSION_2_X )
70001c90:	69fa      	ldr	r2, [r7, #28]
70001c92:	f64f 73ff 	movw	r3, #65535	; 0xffff
70001c96:	f2c0 0301 	movt	r3, #1
70001c9a:	429a      	cmp	r2, r3
70001c9c:	d808      	bhi.n	70001cb0 <GetSystemClock+0xa0>
            {
                /* Read FCLK value from MSS configurator generated configuration
                 * data stored in eNVM spare pages as part of system boot version 1.3.x
                 * configuration tables. */
                uint32_t *p_fclk = SYSBOOT_1_3_FCLK_ADDR;
70001c9e:	f241 632c 	movw	r3, #5676	; 0x162c
70001ca2:	f2c6 0308 	movt	r3, #24584	; 0x6008
70001ca6:	623b      	str	r3, [r7, #32]
                fclk = *p_fclk;
70001ca8:	6a3b      	ldr	r3, [r7, #32]
70001caa:	681b      	ldr	r3, [r3, #0]
70001cac:	607b      	str	r3, [r7, #4]
70001cae:	e012      	b.n	70001cd6 <GetSystemClock+0xc6>
            }
            else if ( sysboot_version < MAX_SYSBOOT_VERSION )
70001cb0:	69fa      	ldr	r2, [r7, #28]
70001cb2:	f64f 73ff 	movw	r3, #65535	; 0xffff
70001cb6:	f2c0 0302 	movt	r3, #2
70001cba:	429a      	cmp	r2, r3
70001cbc:	d808      	bhi.n	70001cd0 <GetSystemClock+0xc0>
            {
                /* Read FCLK value from MSS configurator generated configuration
                 * data stored in eNVM spare pages as part of system boot version 2.x.x
                 * configuration tables. */
                uint32_t *p_fclk = SYSBOOT_2_x_FCLK_ADDR;
70001cbe:	f641 63ac 	movw	r3, #7852	; 0x1eac
70001cc2:	f2c6 0308 	movt	r3, #24584	; 0x6008
70001cc6:	627b      	str	r3, [r7, #36]	; 0x24
                fclk = *p_fclk;
70001cc8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
70001cca:	681b      	ldr	r3, [r3, #0]
70001ccc:	607b      	str	r3, [r7, #4]
70001cce:	e002      	b.n	70001cd6 <GetSystemClock+0xc6>
            }
            else
            {
                fclk = 0uL;
70001cd0:	f04f 0300 	mov.w	r3, #0
70001cd4:	607b      	str	r3, [r7, #4]
            }
        }
    }
    
    if ( 0uL == fclk )
70001cd6:	687b      	ldr	r3, [r7, #4]
70001cd8:	2b00      	cmp	r3, #0
70001cda:	d105      	bne.n	70001ce8 <GetSystemClock+0xd8>
        /* 
         * Could not retrieve FCLK from system boot configuration data. Fall back
         * to using SMARTFUSION_FCLK_FREQ which must then be defined as part of
         * project settings.
         */
        ASSERT( SMARTFUSION_FCLK_FREQ_DEFINED );
70001cdc:	be00      	bkpt	0x0000
        fclk = SMARTFUSION_FCLK_FREQ;
70001cde:	f647 0340 	movw	r3, #30784	; 0x7840
70001ce2:	f2c0 137d 	movt	r3, #381	; 0x17d
70001ce6:	607b      	str	r3, [r7, #4]
    }
    
    return fclk;
70001ce8:	687b      	ldr	r3, [r7, #4]
}
70001cea:	4618      	mov	r0, r3
70001cec:	f107 072c 	add.w	r7, r7, #44	; 0x2c
70001cf0:	46bd      	mov	sp, r7
70001cf2:	bc80      	pop	{r7}
70001cf4:	4770      	bx	lr
70001cf6:	bf00      	nop

70001cf8 <__errno>:
70001cf8:	f248 5344 	movw	r3, #34116	; 0x8544
70001cfc:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001d00:	6818      	ldr	r0, [r3, #0]
70001d02:	4770      	bx	lr

70001d04 <__libc_init_array>:
70001d04:	b570      	push	{r4, r5, r6, lr}
70001d06:	f248 46f0 	movw	r6, #34032	; 0x84f0
70001d0a:	f248 45f0 	movw	r5, #34032	; 0x84f0
70001d0e:	f2c7 0600 	movt	r6, #28672	; 0x7000
70001d12:	f2c7 0500 	movt	r5, #28672	; 0x7000
70001d16:	1b76      	subs	r6, r6, r5
70001d18:	10b6      	asrs	r6, r6, #2
70001d1a:	d006      	beq.n	70001d2a <__libc_init_array+0x26>
70001d1c:	2400      	movs	r4, #0
70001d1e:	f855 3024 	ldr.w	r3, [r5, r4, lsl #2]
70001d22:	3401      	adds	r4, #1
70001d24:	4798      	blx	r3
70001d26:	42a6      	cmp	r6, r4
70001d28:	d8f9      	bhi.n	70001d1e <__libc_init_array+0x1a>
70001d2a:	f248 45f0 	movw	r5, #34032	; 0x84f0
70001d2e:	f248 46f4 	movw	r6, #34036	; 0x84f4
70001d32:	f2c7 0500 	movt	r5, #28672	; 0x7000
70001d36:	f2c7 0600 	movt	r6, #28672	; 0x7000
70001d3a:	1b76      	subs	r6, r6, r5
70001d3c:	f006 fbcc 	bl	700084d8 <_init>
70001d40:	10b6      	asrs	r6, r6, #2
70001d42:	d006      	beq.n	70001d52 <__libc_init_array+0x4e>
70001d44:	2400      	movs	r4, #0
70001d46:	f855 3024 	ldr.w	r3, [r5, r4, lsl #2]
70001d4a:	3401      	adds	r4, #1
70001d4c:	4798      	blx	r3
70001d4e:	42a6      	cmp	r6, r4
70001d50:	d8f9      	bhi.n	70001d46 <__libc_init_array+0x42>
70001d52:	bd70      	pop	{r4, r5, r6, pc}

70001d54 <printf>:
70001d54:	b40f      	push	{r0, r1, r2, r3}
70001d56:	f248 5344 	movw	r3, #34116	; 0x8544
70001d5a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001d5e:	b510      	push	{r4, lr}
70001d60:	681c      	ldr	r4, [r3, #0]
70001d62:	b082      	sub	sp, #8
70001d64:	b124      	cbz	r4, 70001d70 <printf+0x1c>
70001d66:	69a3      	ldr	r3, [r4, #24]
70001d68:	b913      	cbnz	r3, 70001d70 <printf+0x1c>
70001d6a:	4620      	mov	r0, r4
70001d6c:	f002 fe94 	bl	70004a98 <__sinit>
70001d70:	4620      	mov	r0, r4
70001d72:	ac05      	add	r4, sp, #20
70001d74:	9a04      	ldr	r2, [sp, #16]
70001d76:	4623      	mov	r3, r4
70001d78:	6881      	ldr	r1, [r0, #8]
70001d7a:	9401      	str	r4, [sp, #4]
70001d7c:	f000 f82a 	bl	70001dd4 <_vfprintf_r>
70001d80:	b002      	add	sp, #8
70001d82:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
70001d86:	b004      	add	sp, #16
70001d88:	4770      	bx	lr
70001d8a:	bf00      	nop

70001d8c <_printf_r>:
70001d8c:	b40e      	push	{r1, r2, r3}
70001d8e:	b510      	push	{r4, lr}
70001d90:	4604      	mov	r4, r0
70001d92:	b083      	sub	sp, #12
70001d94:	b118      	cbz	r0, 70001d9e <_printf_r+0x12>
70001d96:	6983      	ldr	r3, [r0, #24]
70001d98:	b90b      	cbnz	r3, 70001d9e <_printf_r+0x12>
70001d9a:	f002 fe7d 	bl	70004a98 <__sinit>
70001d9e:	4620      	mov	r0, r4
70001da0:	ac06      	add	r4, sp, #24
70001da2:	9a05      	ldr	r2, [sp, #20]
70001da4:	4623      	mov	r3, r4
70001da6:	6881      	ldr	r1, [r0, #8]
70001da8:	9401      	str	r4, [sp, #4]
70001daa:	f000 f813 	bl	70001dd4 <_vfprintf_r>
70001dae:	b003      	add	sp, #12
70001db0:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
70001db4:	b003      	add	sp, #12
70001db6:	4770      	bx	lr

70001db8 <__sprint_r>:
70001db8:	6893      	ldr	r3, [r2, #8]
70001dba:	b510      	push	{r4, lr}
70001dbc:	4614      	mov	r4, r2
70001dbe:	b913      	cbnz	r3, 70001dc6 <__sprint_r+0xe>
70001dc0:	6053      	str	r3, [r2, #4]
70001dc2:	4618      	mov	r0, r3
70001dc4:	bd10      	pop	{r4, pc}
70001dc6:	f002 ffcb 	bl	70004d60 <__sfvwrite_r>
70001dca:	2300      	movs	r3, #0
70001dcc:	6063      	str	r3, [r4, #4]
70001dce:	60a3      	str	r3, [r4, #8]
70001dd0:	bd10      	pop	{r4, pc}
70001dd2:	bf00      	nop

70001dd4 <_vfprintf_r>:
70001dd4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
70001dd8:	f5ad 6dae 	sub.w	sp, sp, #1392	; 0x570
70001ddc:	b083      	sub	sp, #12
70001dde:	460e      	mov	r6, r1
70001de0:	4615      	mov	r5, r2
70001de2:	469a      	mov	sl, r3
70001de4:	4681      	mov	r9, r0
70001de6:	f003 f9ab 	bl	70005140 <_localeconv_r>
70001dea:	6800      	ldr	r0, [r0, #0]
70001dec:	901d      	str	r0, [sp, #116]	; 0x74
70001dee:	f1b9 0f00 	cmp.w	r9, #0
70001df2:	d004      	beq.n	70001dfe <_vfprintf_r+0x2a>
70001df4:	f8d9 3018 	ldr.w	r3, [r9, #24]
70001df8:	2b00      	cmp	r3, #0
70001dfa:	f000 815a 	beq.w	700020b2 <_vfprintf_r+0x2de>
70001dfe:	f248 330c 	movw	r3, #33548	; 0x830c
70001e02:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001e06:	429e      	cmp	r6, r3
70001e08:	bf08      	it	eq
70001e0a:	f8d9 6004 	ldreq.w	r6, [r9, #4]
70001e0e:	d010      	beq.n	70001e32 <_vfprintf_r+0x5e>
70001e10:	f248 332c 	movw	r3, #33580	; 0x832c
70001e14:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001e18:	429e      	cmp	r6, r3
70001e1a:	bf08      	it	eq
70001e1c:	f8d9 6008 	ldreq.w	r6, [r9, #8]
70001e20:	d007      	beq.n	70001e32 <_vfprintf_r+0x5e>
70001e22:	f248 334c 	movw	r3, #33612	; 0x834c
70001e26:	f2c7 0300 	movt	r3, #28672	; 0x7000
70001e2a:	429e      	cmp	r6, r3
70001e2c:	bf08      	it	eq
70001e2e:	f8d9 600c 	ldreq.w	r6, [r9, #12]
70001e32:	f8b6 c00c 	ldrh.w	ip, [r6, #12]
70001e36:	fa1f f38c 	uxth.w	r3, ip
70001e3a:	f413 5f00 	tst.w	r3, #8192	; 0x2000
70001e3e:	d109      	bne.n	70001e54 <_vfprintf_r+0x80>
70001e40:	f44c 5c00 	orr.w	ip, ip, #8192	; 0x2000
70001e44:	6e72      	ldr	r2, [r6, #100]	; 0x64
70001e46:	f8a6 c00c 	strh.w	ip, [r6, #12]
70001e4a:	fa1f f38c 	uxth.w	r3, ip
70001e4e:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
70001e52:	6672      	str	r2, [r6, #100]	; 0x64
70001e54:	f013 0f08 	tst.w	r3, #8
70001e58:	f001 8301 	beq.w	7000345e <_vfprintf_r+0x168a>
70001e5c:	6932      	ldr	r2, [r6, #16]
70001e5e:	2a00      	cmp	r2, #0
70001e60:	f001 82fd 	beq.w	7000345e <_vfprintf_r+0x168a>
70001e64:	f003 031a 	and.w	r3, r3, #26
70001e68:	2b0a      	cmp	r3, #10
70001e6a:	f000 80e0 	beq.w	7000202e <_vfprintf_r+0x25a>
70001e6e:	2200      	movs	r2, #0
70001e70:	9212      	str	r2, [sp, #72]	; 0x48
70001e72:	921a      	str	r2, [sp, #104]	; 0x68
70001e74:	2300      	movs	r3, #0
70001e76:	921c      	str	r2, [sp, #112]	; 0x70
70001e78:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70001e7c:	9211      	str	r2, [sp, #68]	; 0x44
70001e7e:	3404      	adds	r4, #4
70001e80:	9219      	str	r2, [sp, #100]	; 0x64
70001e82:	f50d 62a4 	add.w	r2, sp, #1312	; 0x520
70001e86:	931b      	str	r3, [sp, #108]	; 0x6c
70001e88:	3204      	adds	r2, #4
70001e8a:	f50d 6390 	add.w	r3, sp, #1152	; 0x480
70001e8e:	3228      	adds	r2, #40	; 0x28
70001e90:	3303      	adds	r3, #3
70001e92:	9218      	str	r2, [sp, #96]	; 0x60
70001e94:	9307      	str	r3, [sp, #28]
70001e96:	2300      	movs	r3, #0
70001e98:	f8cd 454c 	str.w	r4, [sp, #1356]	; 0x54c
70001e9c:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70001ea0:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
70001ea4:	782b      	ldrb	r3, [r5, #0]
70001ea6:	1e1a      	subs	r2, r3, #0
70001ea8:	bf18      	it	ne
70001eaa:	2201      	movne	r2, #1
70001eac:	2b25      	cmp	r3, #37	; 0x25
70001eae:	bf0c      	ite	eq
70001eb0:	2200      	moveq	r2, #0
70001eb2:	f002 0201 	andne.w	r2, r2, #1
70001eb6:	b332      	cbz	r2, 70001f06 <_vfprintf_r+0x132>
70001eb8:	462f      	mov	r7, r5
70001eba:	f817 3f01 	ldrb.w	r3, [r7, #1]!
70001ebe:	1e1a      	subs	r2, r3, #0
70001ec0:	bf18      	it	ne
70001ec2:	2201      	movne	r2, #1
70001ec4:	2b25      	cmp	r3, #37	; 0x25
70001ec6:	bf0c      	ite	eq
70001ec8:	2200      	moveq	r2, #0
70001eca:	f002 0201 	andne.w	r2, r2, #1
70001ece:	2a00      	cmp	r2, #0
70001ed0:	d1f3      	bne.n	70001eba <_vfprintf_r+0xe6>
70001ed2:	ebb7 0805 	subs.w	r8, r7, r5
70001ed6:	bf08      	it	eq
70001ed8:	463d      	moveq	r5, r7
70001eda:	d014      	beq.n	70001f06 <_vfprintf_r+0x132>
70001edc:	f8c4 8004 	str.w	r8, [r4, #4]
70001ee0:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70001ee4:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70001ee8:	3301      	adds	r3, #1
70001eea:	6025      	str	r5, [r4, #0]
70001eec:	2b07      	cmp	r3, #7
70001eee:	4442      	add	r2, r8
70001ef0:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70001ef4:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70001ef8:	dc78      	bgt.n	70001fec <_vfprintf_r+0x218>
70001efa:	3408      	adds	r4, #8
70001efc:	9811      	ldr	r0, [sp, #68]	; 0x44
70001efe:	463d      	mov	r5, r7
70001f00:	4440      	add	r0, r8
70001f02:	9011      	str	r0, [sp, #68]	; 0x44
70001f04:	783b      	ldrb	r3, [r7, #0]
70001f06:	2b00      	cmp	r3, #0
70001f08:	d07c      	beq.n	70002004 <_vfprintf_r+0x230>
70001f0a:	1c6b      	adds	r3, r5, #1
70001f0c:	f04f 37ff 	mov.w	r7, #4294967295
70001f10:	202b      	movs	r0, #43	; 0x2b
70001f12:	f04f 0c20 	mov.w	ip, #32
70001f16:	2100      	movs	r1, #0
70001f18:	f04f 0200 	mov.w	r2, #0
70001f1c:	910f      	str	r1, [sp, #60]	; 0x3c
70001f1e:	f88d 2577 	strb.w	r2, [sp, #1399]	; 0x577
70001f22:	f8cd a02c 	str.w	sl, [sp, #44]	; 0x2c
70001f26:	786a      	ldrb	r2, [r5, #1]
70001f28:	910a      	str	r1, [sp, #40]	; 0x28
70001f2a:	1c5d      	adds	r5, r3, #1
70001f2c:	f1a2 0320 	sub.w	r3, r2, #32
70001f30:	2b58      	cmp	r3, #88	; 0x58
70001f32:	f200 8286 	bhi.w	70002442 <_vfprintf_r+0x66e>
70001f36:	e8df f013 	tbh	[pc, r3, lsl #1]
70001f3a:	0298      	.short	0x0298
70001f3c:	02840284 	.word	0x02840284
70001f40:	028402a4 	.word	0x028402a4
70001f44:	02840284 	.word	0x02840284
70001f48:	02840284 	.word	0x02840284
70001f4c:	02ad0284 	.word	0x02ad0284
70001f50:	028402ba 	.word	0x028402ba
70001f54:	02ca02c1 	.word	0x02ca02c1
70001f58:	02e70284 	.word	0x02e70284
70001f5c:	02f002f0 	.word	0x02f002f0
70001f60:	02f002f0 	.word	0x02f002f0
70001f64:	02f002f0 	.word	0x02f002f0
70001f68:	02f002f0 	.word	0x02f002f0
70001f6c:	028402f0 	.word	0x028402f0
70001f70:	02840284 	.word	0x02840284
70001f74:	02840284 	.word	0x02840284
70001f78:	02840284 	.word	0x02840284
70001f7c:	02840284 	.word	0x02840284
70001f80:	03040284 	.word	0x03040284
70001f84:	02840326 	.word	0x02840326
70001f88:	02840326 	.word	0x02840326
70001f8c:	02840284 	.word	0x02840284
70001f90:	036a0284 	.word	0x036a0284
70001f94:	02840284 	.word	0x02840284
70001f98:	02840481 	.word	0x02840481
70001f9c:	02840284 	.word	0x02840284
70001fa0:	02840284 	.word	0x02840284
70001fa4:	02840414 	.word	0x02840414
70001fa8:	042f0284 	.word	0x042f0284
70001fac:	02840284 	.word	0x02840284
70001fb0:	02840284 	.word	0x02840284
70001fb4:	02840284 	.word	0x02840284
70001fb8:	02840284 	.word	0x02840284
70001fbc:	02840284 	.word	0x02840284
70001fc0:	0465044f 	.word	0x0465044f
70001fc4:	03260326 	.word	0x03260326
70001fc8:	03730326 	.word	0x03730326
70001fcc:	02840465 	.word	0x02840465
70001fd0:	03790284 	.word	0x03790284
70001fd4:	03850284 	.word	0x03850284
70001fd8:	03ad0396 	.word	0x03ad0396
70001fdc:	0284040a 	.word	0x0284040a
70001fe0:	028403cc 	.word	0x028403cc
70001fe4:	028403f4 	.word	0x028403f4
70001fe8:	00c00284 	.word	0x00c00284
70001fec:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70001ff0:	4648      	mov	r0, r9
70001ff2:	4631      	mov	r1, r6
70001ff4:	320c      	adds	r2, #12
70001ff6:	f7ff fedf 	bl	70001db8 <__sprint_r>
70001ffa:	b958      	cbnz	r0, 70002014 <_vfprintf_r+0x240>
70001ffc:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002000:	3404      	adds	r4, #4
70002002:	e77b      	b.n	70001efc <_vfprintf_r+0x128>
70002004:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
70002008:	2b00      	cmp	r3, #0
7000200a:	f041 8192 	bne.w	70003332 <_vfprintf_r+0x155e>
7000200e:	2300      	movs	r3, #0
70002010:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002014:	89b3      	ldrh	r3, [r6, #12]
70002016:	f013 0f40 	tst.w	r3, #64	; 0x40
7000201a:	d002      	beq.n	70002022 <_vfprintf_r+0x24e>
7000201c:	f04f 30ff 	mov.w	r0, #4294967295
70002020:	9011      	str	r0, [sp, #68]	; 0x44
70002022:	9811      	ldr	r0, [sp, #68]	; 0x44
70002024:	b05f      	add	sp, #380	; 0x17c
70002026:	f50d 6d80 	add.w	sp, sp, #1024	; 0x400
7000202a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
7000202e:	f9b6 300e 	ldrsh.w	r3, [r6, #14]
70002032:	2b00      	cmp	r3, #0
70002034:	f6ff af1b 	blt.w	70001e6e <_vfprintf_r+0x9a>
70002038:	6a37      	ldr	r7, [r6, #32]
7000203a:	f02c 0c02 	bic.w	ip, ip, #2
7000203e:	f8d6 e028 	ldr.w	lr, [r6, #40]	; 0x28
70002042:	f50d 648e 	add.w	r4, sp, #1136	; 0x470
70002046:	f8ad c488 	strh.w	ip, [sp, #1160]	; 0x488
7000204a:	340c      	adds	r4, #12
7000204c:	f8b6 c00e 	ldrh.w	ip, [r6, #14]
70002050:	462a      	mov	r2, r5
70002052:	4653      	mov	r3, sl
70002054:	4648      	mov	r0, r9
70002056:	4621      	mov	r1, r4
70002058:	ad1f      	add	r5, sp, #124	; 0x7c
7000205a:	f8cd 749c 	str.w	r7, [sp, #1180]	; 0x49c
7000205e:	2700      	movs	r7, #0
70002060:	f8cd 548c 	str.w	r5, [sp, #1164]	; 0x48c
70002064:	f8cd 547c 	str.w	r5, [sp, #1148]	; 0x47c
70002068:	f44f 6580 	mov.w	r5, #1024	; 0x400
7000206c:	f8cd e4a4 	str.w	lr, [sp, #1188]	; 0x4a4
70002070:	f8ad c48a 	strh.w	ip, [sp, #1162]	; 0x48a
70002074:	f8cd 5490 	str.w	r5, [sp, #1168]	; 0x490
70002078:	f8cd 7494 	str.w	r7, [sp, #1172]	; 0x494
7000207c:	f8cd 5484 	str.w	r5, [sp, #1156]	; 0x484
70002080:	f7ff fea8 	bl	70001dd4 <_vfprintf_r>
70002084:	2800      	cmp	r0, #0
70002086:	9011      	str	r0, [sp, #68]	; 0x44
70002088:	db09      	blt.n	7000209e <_vfprintf_r+0x2ca>
7000208a:	4621      	mov	r1, r4
7000208c:	4648      	mov	r0, r9
7000208e:	f002 fb93 	bl	700047b8 <_fflush_r>
70002092:	9911      	ldr	r1, [sp, #68]	; 0x44
70002094:	42b8      	cmp	r0, r7
70002096:	bf18      	it	ne
70002098:	f04f 31ff 	movne.w	r1, #4294967295
7000209c:	9111      	str	r1, [sp, #68]	; 0x44
7000209e:	f8bd 3488 	ldrh.w	r3, [sp, #1160]	; 0x488
700020a2:	f013 0f40 	tst.w	r3, #64	; 0x40
700020a6:	d0bc      	beq.n	70002022 <_vfprintf_r+0x24e>
700020a8:	89b3      	ldrh	r3, [r6, #12]
700020aa:	f043 0340 	orr.w	r3, r3, #64	; 0x40
700020ae:	81b3      	strh	r3, [r6, #12]
700020b0:	e7b7      	b.n	70002022 <_vfprintf_r+0x24e>
700020b2:	4648      	mov	r0, r9
700020b4:	f002 fcf0 	bl	70004a98 <__sinit>
700020b8:	e6a1      	b.n	70001dfe <_vfprintf_r+0x2a>
700020ba:	980a      	ldr	r0, [sp, #40]	; 0x28
700020bc:	f248 2cdc 	movw	ip, #33500	; 0x82dc
700020c0:	f2c7 0c00 	movt	ip, #28672	; 0x7000
700020c4:	9216      	str	r2, [sp, #88]	; 0x58
700020c6:	f010 0f20 	tst.w	r0, #32
700020ca:	f8cd c064 	str.w	ip, [sp, #100]	; 0x64
700020ce:	f000 836e 	beq.w	700027ae <_vfprintf_r+0x9da>
700020d2:	990b      	ldr	r1, [sp, #44]	; 0x2c
700020d4:	1dcb      	adds	r3, r1, #7
700020d6:	f023 0307 	bic.w	r3, r3, #7
700020da:	f103 0208 	add.w	r2, r3, #8
700020de:	920b      	str	r2, [sp, #44]	; 0x2c
700020e0:	e9d3 ab00 	ldrd	sl, fp, [r3]
700020e4:	ea5a 020b 	orrs.w	r2, sl, fp
700020e8:	9b0a      	ldr	r3, [sp, #40]	; 0x28
700020ea:	bf0c      	ite	eq
700020ec:	2200      	moveq	r2, #0
700020ee:	2201      	movne	r2, #1
700020f0:	4213      	tst	r3, r2
700020f2:	f040 866b 	bne.w	70002dcc <_vfprintf_r+0xff8>
700020f6:	2302      	movs	r3, #2
700020f8:	f04f 0100 	mov.w	r1, #0
700020fc:	f88d 1577 	strb.w	r1, [sp, #1399]	; 0x577
70002100:	2f00      	cmp	r7, #0
70002102:	bfa2      	ittt	ge
70002104:	f8dd c028 	ldrge.w	ip, [sp, #40]	; 0x28
70002108:	f02c 0c80 	bicge.w	ip, ip, #128	; 0x80
7000210c:	f8cd c028 	strge.w	ip, [sp, #40]	; 0x28
70002110:	2f00      	cmp	r7, #0
70002112:	bf18      	it	ne
70002114:	f042 0201 	orrne.w	r2, r2, #1
70002118:	2a00      	cmp	r2, #0
7000211a:	f000 841e 	beq.w	7000295a <_vfprintf_r+0xb86>
7000211e:	2b01      	cmp	r3, #1
70002120:	f000 85de 	beq.w	70002ce0 <_vfprintf_r+0xf0c>
70002124:	2b02      	cmp	r3, #2
70002126:	f000 85c1 	beq.w	70002cac <_vfprintf_r+0xed8>
7000212a:	9918      	ldr	r1, [sp, #96]	; 0x60
7000212c:	9113      	str	r1, [sp, #76]	; 0x4c
7000212e:	ea4f 08da 	mov.w	r8, sl, lsr #3
70002132:	ea4f 0cdb 	mov.w	ip, fp, lsr #3
70002136:	ea48 784b 	orr.w	r8, r8, fp, lsl #29
7000213a:	f00a 0007 	and.w	r0, sl, #7
7000213e:	46e3      	mov	fp, ip
70002140:	46c2      	mov	sl, r8
70002142:	3030      	adds	r0, #48	; 0x30
70002144:	ea5a 020b 	orrs.w	r2, sl, fp
70002148:	f801 0d01 	strb.w	r0, [r1, #-1]!
7000214c:	d1ef      	bne.n	7000212e <_vfprintf_r+0x35a>
7000214e:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002152:	9113      	str	r1, [sp, #76]	; 0x4c
70002154:	f01c 0f01 	tst.w	ip, #1
70002158:	f040 868c 	bne.w	70002e74 <_vfprintf_r+0x10a0>
7000215c:	9818      	ldr	r0, [sp, #96]	; 0x60
7000215e:	1a40      	subs	r0, r0, r1
70002160:	9010      	str	r0, [sp, #64]	; 0x40
70002162:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
70002166:	9a10      	ldr	r2, [sp, #64]	; 0x40
70002168:	9717      	str	r7, [sp, #92]	; 0x5c
7000216a:	42ba      	cmp	r2, r7
7000216c:	bfb8      	it	lt
7000216e:	463a      	movlt	r2, r7
70002170:	920c      	str	r2, [sp, #48]	; 0x30
70002172:	b113      	cbz	r3, 7000217a <_vfprintf_r+0x3a6>
70002174:	9a0c      	ldr	r2, [sp, #48]	; 0x30
70002176:	3201      	adds	r2, #1
70002178:	920c      	str	r2, [sp, #48]	; 0x30
7000217a:	9b0a      	ldr	r3, [sp, #40]	; 0x28
7000217c:	980a      	ldr	r0, [sp, #40]	; 0x28
7000217e:	f013 0302 	ands.w	r3, r3, #2
70002182:	9315      	str	r3, [sp, #84]	; 0x54
70002184:	bf1e      	ittt	ne
70002186:	f8dd c030 	ldrne.w	ip, [sp, #48]	; 0x30
7000218a:	f10c 0c02 	addne.w	ip, ip, #2
7000218e:	f8cd c030 	strne.w	ip, [sp, #48]	; 0x30
70002192:	f010 0084 	ands.w	r0, r0, #132	; 0x84
70002196:	9014      	str	r0, [sp, #80]	; 0x50
70002198:	d14d      	bne.n	70002236 <_vfprintf_r+0x462>
7000219a:	990f      	ldr	r1, [sp, #60]	; 0x3c
7000219c:	9a0c      	ldr	r2, [sp, #48]	; 0x30
7000219e:	1a8f      	subs	r7, r1, r2
700021a0:	2f00      	cmp	r7, #0
700021a2:	dd48      	ble.n	70002236 <_vfprintf_r+0x462>
700021a4:	2f10      	cmp	r7, #16
700021a6:	f248 2898 	movw	r8, #33432	; 0x8298
700021aa:	bfd8      	it	le
700021ac:	f2c7 0800 	movtle	r8, #28672	; 0x7000
700021b0:	dd30      	ble.n	70002214 <_vfprintf_r+0x440>
700021b2:	f2c7 0800 	movt	r8, #28672	; 0x7000
700021b6:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
700021ba:	4643      	mov	r3, r8
700021bc:	f04f 0a10 	mov.w	sl, #16
700021c0:	46a8      	mov	r8, r5
700021c2:	f10b 0b0c 	add.w	fp, fp, #12
700021c6:	461d      	mov	r5, r3
700021c8:	e002      	b.n	700021d0 <_vfprintf_r+0x3fc>
700021ca:	3f10      	subs	r7, #16
700021cc:	2f10      	cmp	r7, #16
700021ce:	dd1e      	ble.n	7000220e <_vfprintf_r+0x43a>
700021d0:	f8c4 a004 	str.w	sl, [r4, #4]
700021d4:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
700021d8:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
700021dc:	3301      	adds	r3, #1
700021de:	6025      	str	r5, [r4, #0]
700021e0:	3210      	adds	r2, #16
700021e2:	2b07      	cmp	r3, #7
700021e4:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
700021e8:	f104 0408 	add.w	r4, r4, #8
700021ec:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
700021f0:	ddeb      	ble.n	700021ca <_vfprintf_r+0x3f6>
700021f2:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
700021f6:	4648      	mov	r0, r9
700021f8:	4631      	mov	r1, r6
700021fa:	465a      	mov	r2, fp
700021fc:	3404      	adds	r4, #4
700021fe:	f7ff fddb 	bl	70001db8 <__sprint_r>
70002202:	2800      	cmp	r0, #0
70002204:	f47f af06 	bne.w	70002014 <_vfprintf_r+0x240>
70002208:	3f10      	subs	r7, #16
7000220a:	2f10      	cmp	r7, #16
7000220c:	dce0      	bgt.n	700021d0 <_vfprintf_r+0x3fc>
7000220e:	462b      	mov	r3, r5
70002210:	4645      	mov	r5, r8
70002212:	4698      	mov	r8, r3
70002214:	6067      	str	r7, [r4, #4]
70002216:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
7000221a:	f8c4 8000 	str.w	r8, [r4]
7000221e:	1c5a      	adds	r2, r3, #1
70002220:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
70002224:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002228:	19db      	adds	r3, r3, r7
7000222a:	2a07      	cmp	r2, #7
7000222c:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
70002230:	f300 858a 	bgt.w	70002d48 <_vfprintf_r+0xf74>
70002234:	3408      	adds	r4, #8
70002236:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7000223a:	b19b      	cbz	r3, 70002264 <_vfprintf_r+0x490>
7000223c:	2301      	movs	r3, #1
7000223e:	6063      	str	r3, [r4, #4]
70002240:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002244:	f50d 62ae 	add.w	r2, sp, #1392	; 0x570
70002248:	3207      	adds	r2, #7
7000224a:	6022      	str	r2, [r4, #0]
7000224c:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002250:	3301      	adds	r3, #1
70002252:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002256:	3201      	adds	r2, #1
70002258:	2b07      	cmp	r3, #7
7000225a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
7000225e:	f300 84b6 	bgt.w	70002bce <_vfprintf_r+0xdfa>
70002262:	3408      	adds	r4, #8
70002264:	9b15      	ldr	r3, [sp, #84]	; 0x54
70002266:	b19b      	cbz	r3, 70002290 <_vfprintf_r+0x4bc>
70002268:	2302      	movs	r3, #2
7000226a:	6063      	str	r3, [r4, #4]
7000226c:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002270:	f50d 62ae 	add.w	r2, sp, #1392	; 0x570
70002274:	3204      	adds	r2, #4
70002276:	6022      	str	r2, [r4, #0]
70002278:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
7000227c:	3301      	adds	r3, #1
7000227e:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002282:	3202      	adds	r2, #2
70002284:	2b07      	cmp	r3, #7
70002286:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
7000228a:	f300 84af 	bgt.w	70002bec <_vfprintf_r+0xe18>
7000228e:	3408      	adds	r4, #8
70002290:	f8dd c050 	ldr.w	ip, [sp, #80]	; 0x50
70002294:	f1bc 0f80 	cmp.w	ip, #128	; 0x80
70002298:	f000 8376 	beq.w	70002988 <_vfprintf_r+0xbb4>
7000229c:	9b17      	ldr	r3, [sp, #92]	; 0x5c
7000229e:	9a10      	ldr	r2, [sp, #64]	; 0x40
700022a0:	1a9f      	subs	r7, r3, r2
700022a2:	2f00      	cmp	r7, #0
700022a4:	dd43      	ble.n	7000232e <_vfprintf_r+0x55a>
700022a6:	2f10      	cmp	r7, #16
700022a8:	f8df 8b8c 	ldr.w	r8, [pc, #2956]	; 70002e38 <_vfprintf_r+0x1064>
700022ac:	dd2e      	ble.n	7000230c <_vfprintf_r+0x538>
700022ae:	4643      	mov	r3, r8
700022b0:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
700022b4:	46a8      	mov	r8, r5
700022b6:	f04f 0a10 	mov.w	sl, #16
700022ba:	f10b 0b0c 	add.w	fp, fp, #12
700022be:	461d      	mov	r5, r3
700022c0:	e002      	b.n	700022c8 <_vfprintf_r+0x4f4>
700022c2:	3f10      	subs	r7, #16
700022c4:	2f10      	cmp	r7, #16
700022c6:	dd1e      	ble.n	70002306 <_vfprintf_r+0x532>
700022c8:	f8c4 a004 	str.w	sl, [r4, #4]
700022cc:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
700022d0:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
700022d4:	3301      	adds	r3, #1
700022d6:	6025      	str	r5, [r4, #0]
700022d8:	3210      	adds	r2, #16
700022da:	2b07      	cmp	r3, #7
700022dc:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
700022e0:	f104 0408 	add.w	r4, r4, #8
700022e4:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
700022e8:	ddeb      	ble.n	700022c2 <_vfprintf_r+0x4ee>
700022ea:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
700022ee:	4648      	mov	r0, r9
700022f0:	4631      	mov	r1, r6
700022f2:	465a      	mov	r2, fp
700022f4:	3404      	adds	r4, #4
700022f6:	f7ff fd5f 	bl	70001db8 <__sprint_r>
700022fa:	2800      	cmp	r0, #0
700022fc:	f47f ae8a 	bne.w	70002014 <_vfprintf_r+0x240>
70002300:	3f10      	subs	r7, #16
70002302:	2f10      	cmp	r7, #16
70002304:	dce0      	bgt.n	700022c8 <_vfprintf_r+0x4f4>
70002306:	462b      	mov	r3, r5
70002308:	4645      	mov	r5, r8
7000230a:	4698      	mov	r8, r3
7000230c:	6067      	str	r7, [r4, #4]
7000230e:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002312:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002316:	3301      	adds	r3, #1
70002318:	f8c4 8000 	str.w	r8, [r4]
7000231c:	19d2      	adds	r2, r2, r7
7000231e:	2b07      	cmp	r3, #7
70002320:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002324:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002328:	f300 8442 	bgt.w	70002bb0 <_vfprintf_r+0xddc>
7000232c:	3408      	adds	r4, #8
7000232e:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002332:	f41c 7f80 	tst.w	ip, #256	; 0x100
70002336:	f040 829d 	bne.w	70002874 <_vfprintf_r+0xaa0>
7000233a:	9810      	ldr	r0, [sp, #64]	; 0x40
7000233c:	9913      	ldr	r1, [sp, #76]	; 0x4c
7000233e:	6060      	str	r0, [r4, #4]
70002340:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002344:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002348:	3301      	adds	r3, #1
7000234a:	6021      	str	r1, [r4, #0]
7000234c:	1812      	adds	r2, r2, r0
7000234e:	2b07      	cmp	r3, #7
70002350:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002354:	bfd8      	it	le
70002356:	f104 0308 	addle.w	r3, r4, #8
7000235a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
7000235e:	f300 839b 	bgt.w	70002a98 <_vfprintf_r+0xcc4>
70002362:	990a      	ldr	r1, [sp, #40]	; 0x28
70002364:	f011 0f04 	tst.w	r1, #4
70002368:	d055      	beq.n	70002416 <_vfprintf_r+0x642>
7000236a:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
7000236c:	f8dd c030 	ldr.w	ip, [sp, #48]	; 0x30
70002370:	ebcc 0702 	rsb	r7, ip, r2
70002374:	2f00      	cmp	r7, #0
70002376:	dd4e      	ble.n	70002416 <_vfprintf_r+0x642>
70002378:	2f10      	cmp	r7, #16
7000237a:	f248 2898 	movw	r8, #33432	; 0x8298
7000237e:	bfd8      	it	le
70002380:	f2c7 0800 	movtle	r8, #28672	; 0x7000
70002384:	dd2e      	ble.n	700023e4 <_vfprintf_r+0x610>
70002386:	f2c7 0800 	movt	r8, #28672	; 0x7000
7000238a:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
7000238e:	4642      	mov	r2, r8
70002390:	2410      	movs	r4, #16
70002392:	46a8      	mov	r8, r5
70002394:	f10a 0a0c 	add.w	sl, sl, #12
70002398:	4615      	mov	r5, r2
7000239a:	e002      	b.n	700023a2 <_vfprintf_r+0x5ce>
7000239c:	3f10      	subs	r7, #16
7000239e:	2f10      	cmp	r7, #16
700023a0:	dd1d      	ble.n	700023de <_vfprintf_r+0x60a>
700023a2:	605c      	str	r4, [r3, #4]
700023a4:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
700023a8:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
700023ac:	3201      	adds	r2, #1
700023ae:	601d      	str	r5, [r3, #0]
700023b0:	3110      	adds	r1, #16
700023b2:	2a07      	cmp	r2, #7
700023b4:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
700023b8:	f103 0308 	add.w	r3, r3, #8
700023bc:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
700023c0:	ddec      	ble.n	7000239c <_vfprintf_r+0x5c8>
700023c2:	4648      	mov	r0, r9
700023c4:	4631      	mov	r1, r6
700023c6:	4652      	mov	r2, sl
700023c8:	f7ff fcf6 	bl	70001db8 <__sprint_r>
700023cc:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700023d0:	3304      	adds	r3, #4
700023d2:	2800      	cmp	r0, #0
700023d4:	f47f ae1e 	bne.w	70002014 <_vfprintf_r+0x240>
700023d8:	3f10      	subs	r7, #16
700023da:	2f10      	cmp	r7, #16
700023dc:	dce1      	bgt.n	700023a2 <_vfprintf_r+0x5ce>
700023de:	462a      	mov	r2, r5
700023e0:	4645      	mov	r5, r8
700023e2:	4690      	mov	r8, r2
700023e4:	605f      	str	r7, [r3, #4]
700023e6:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
700023ea:	f8c3 8000 	str.w	r8, [r3]
700023ee:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
700023f2:	3201      	adds	r2, #1
700023f4:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
700023f8:	18fb      	adds	r3, r7, r3
700023fa:	2a07      	cmp	r2, #7
700023fc:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
70002400:	dd0b      	ble.n	7000241a <_vfprintf_r+0x646>
70002402:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002406:	4648      	mov	r0, r9
70002408:	4631      	mov	r1, r6
7000240a:	320c      	adds	r2, #12
7000240c:	f7ff fcd4 	bl	70001db8 <__sprint_r>
70002410:	2800      	cmp	r0, #0
70002412:	f47f adff 	bne.w	70002014 <_vfprintf_r+0x240>
70002416:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
7000241a:	9811      	ldr	r0, [sp, #68]	; 0x44
7000241c:	9a0c      	ldr	r2, [sp, #48]	; 0x30
7000241e:	990f      	ldr	r1, [sp, #60]	; 0x3c
70002420:	428a      	cmp	r2, r1
70002422:	bfac      	ite	ge
70002424:	1880      	addge	r0, r0, r2
70002426:	1840      	addlt	r0, r0, r1
70002428:	9011      	str	r0, [sp, #68]	; 0x44
7000242a:	2b00      	cmp	r3, #0
7000242c:	f040 8342 	bne.w	70002ab4 <_vfprintf_r+0xce0>
70002430:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002434:	2300      	movs	r3, #0
70002436:	f8dd a02c 	ldr.w	sl, [sp, #44]	; 0x2c
7000243a:	3404      	adds	r4, #4
7000243c:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002440:	e530      	b.n	70001ea4 <_vfprintf_r+0xd0>
70002442:	9216      	str	r2, [sp, #88]	; 0x58
70002444:	2a00      	cmp	r2, #0
70002446:	f43f addd 	beq.w	70002004 <_vfprintf_r+0x230>
7000244a:	f50d 60a4 	add.w	r0, sp, #1312	; 0x520
7000244e:	2301      	movs	r3, #1
70002450:	f04f 0c00 	mov.w	ip, #0
70002454:	3004      	adds	r0, #4
70002456:	930c      	str	r3, [sp, #48]	; 0x30
70002458:	f88d 2524 	strb.w	r2, [sp, #1316]	; 0x524
7000245c:	f88d c577 	strb.w	ip, [sp, #1399]	; 0x577
70002460:	9013      	str	r0, [sp, #76]	; 0x4c
70002462:	9310      	str	r3, [sp, #64]	; 0x40
70002464:	2100      	movs	r1, #0
70002466:	9117      	str	r1, [sp, #92]	; 0x5c
70002468:	e687      	b.n	7000217a <_vfprintf_r+0x3a6>
7000246a:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7000246e:	2b00      	cmp	r3, #0
70002470:	f040 852b 	bne.w	70002eca <_vfprintf_r+0x10f6>
70002474:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002476:	462b      	mov	r3, r5
70002478:	f88d c577 	strb.w	ip, [sp, #1399]	; 0x577
7000247c:	782a      	ldrb	r2, [r5, #0]
7000247e:	910b      	str	r1, [sp, #44]	; 0x2c
70002480:	e553      	b.n	70001f2a <_vfprintf_r+0x156>
70002482:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002484:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002486:	f043 0301 	orr.w	r3, r3, #1
7000248a:	930a      	str	r3, [sp, #40]	; 0x28
7000248c:	462b      	mov	r3, r5
7000248e:	782a      	ldrb	r2, [r5, #0]
70002490:	910b      	str	r1, [sp, #44]	; 0x2c
70002492:	e54a      	b.n	70001f2a <_vfprintf_r+0x156>
70002494:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002496:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
70002498:	6809      	ldr	r1, [r1, #0]
7000249a:	910f      	str	r1, [sp, #60]	; 0x3c
7000249c:	1d11      	adds	r1, r2, #4
7000249e:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
700024a0:	2b00      	cmp	r3, #0
700024a2:	f2c0 8780 	blt.w	700033a6 <_vfprintf_r+0x15d2>
700024a6:	782a      	ldrb	r2, [r5, #0]
700024a8:	462b      	mov	r3, r5
700024aa:	910b      	str	r1, [sp, #44]	; 0x2c
700024ac:	e53d      	b.n	70001f2a <_vfprintf_r+0x156>
700024ae:	990b      	ldr	r1, [sp, #44]	; 0x2c
700024b0:	462b      	mov	r3, r5
700024b2:	f88d 0577 	strb.w	r0, [sp, #1399]	; 0x577
700024b6:	782a      	ldrb	r2, [r5, #0]
700024b8:	910b      	str	r1, [sp, #44]	; 0x2c
700024ba:	e536      	b.n	70001f2a <_vfprintf_r+0x156>
700024bc:	990b      	ldr	r1, [sp, #44]	; 0x2c
700024be:	9b0a      	ldr	r3, [sp, #40]	; 0x28
700024c0:	f043 0304 	orr.w	r3, r3, #4
700024c4:	930a      	str	r3, [sp, #40]	; 0x28
700024c6:	462b      	mov	r3, r5
700024c8:	782a      	ldrb	r2, [r5, #0]
700024ca:	910b      	str	r1, [sp, #44]	; 0x2c
700024cc:	e52d      	b.n	70001f2a <_vfprintf_r+0x156>
700024ce:	462b      	mov	r3, r5
700024d0:	f813 2b01 	ldrb.w	r2, [r3], #1
700024d4:	2a2a      	cmp	r2, #42	; 0x2a
700024d6:	f001 80cd 	beq.w	70003674 <_vfprintf_r+0x18a0>
700024da:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
700024de:	2909      	cmp	r1, #9
700024e0:	f201 8037 	bhi.w	70003552 <_vfprintf_r+0x177e>
700024e4:	3502      	adds	r5, #2
700024e6:	2700      	movs	r7, #0
700024e8:	f815 2c01 	ldrb.w	r2, [r5, #-1]
700024ec:	eb07 0787 	add.w	r7, r7, r7, lsl #2
700024f0:	462b      	mov	r3, r5
700024f2:	3501      	adds	r5, #1
700024f4:	eb01 0747 	add.w	r7, r1, r7, lsl #1
700024f8:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
700024fc:	2909      	cmp	r1, #9
700024fe:	d9f3      	bls.n	700024e8 <_vfprintf_r+0x714>
70002500:	ea47 77e7 	orr.w	r7, r7, r7, asr #31
70002504:	461d      	mov	r5, r3
70002506:	e511      	b.n	70001f2c <_vfprintf_r+0x158>
70002508:	990b      	ldr	r1, [sp, #44]	; 0x2c
7000250a:	462b      	mov	r3, r5
7000250c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7000250e:	f042 0280 	orr.w	r2, r2, #128	; 0x80
70002512:	920a      	str	r2, [sp, #40]	; 0x28
70002514:	782a      	ldrb	r2, [r5, #0]
70002516:	910b      	str	r1, [sp, #44]	; 0x2c
70002518:	e507      	b.n	70001f2a <_vfprintf_r+0x156>
7000251a:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
7000251e:	f04f 0800 	mov.w	r8, #0
70002522:	462b      	mov	r3, r5
70002524:	eb08 0888 	add.w	r8, r8, r8, lsl #2
70002528:	f813 2b01 	ldrb.w	r2, [r3], #1
7000252c:	eb01 0848 	add.w	r8, r1, r8, lsl #1
70002530:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
70002534:	461d      	mov	r5, r3
70002536:	2909      	cmp	r1, #9
70002538:	d9f3      	bls.n	70002522 <_vfprintf_r+0x74e>
7000253a:	f8cd 803c 	str.w	r8, [sp, #60]	; 0x3c
7000253e:	461d      	mov	r5, r3
70002540:	e4f4      	b.n	70001f2c <_vfprintf_r+0x158>
70002542:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002544:	9216      	str	r2, [sp, #88]	; 0x58
70002546:	f043 0310 	orr.w	r3, r3, #16
7000254a:	930a      	str	r3, [sp, #40]	; 0x28
7000254c:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002550:	f01c 0f20 	tst.w	ip, #32
70002554:	f000 815d 	beq.w	70002812 <_vfprintf_r+0xa3e>
70002558:	980b      	ldr	r0, [sp, #44]	; 0x2c
7000255a:	1dc3      	adds	r3, r0, #7
7000255c:	f023 0307 	bic.w	r3, r3, #7
70002560:	f103 0108 	add.w	r1, r3, #8
70002564:	910b      	str	r1, [sp, #44]	; 0x2c
70002566:	e9d3 ab00 	ldrd	sl, fp, [r3]
7000256a:	f1ba 0f00 	cmp.w	sl, #0
7000256e:	f17b 0200 	sbcs.w	r2, fp, #0
70002572:	f2c0 849b 	blt.w	70002eac <_vfprintf_r+0x10d8>
70002576:	ea5a 030b 	orrs.w	r3, sl, fp
7000257a:	f04f 0301 	mov.w	r3, #1
7000257e:	bf0c      	ite	eq
70002580:	2200      	moveq	r2, #0
70002582:	2201      	movne	r2, #1
70002584:	e5bc      	b.n	70002100 <_vfprintf_r+0x32c>
70002586:	980a      	ldr	r0, [sp, #40]	; 0x28
70002588:	9216      	str	r2, [sp, #88]	; 0x58
7000258a:	f010 0f08 	tst.w	r0, #8
7000258e:	f000 84ed 	beq.w	70002f6c <_vfprintf_r+0x1198>
70002592:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002594:	1dcb      	adds	r3, r1, #7
70002596:	f023 0307 	bic.w	r3, r3, #7
7000259a:	f103 0208 	add.w	r2, r3, #8
7000259e:	920b      	str	r2, [sp, #44]	; 0x2c
700025a0:	f8d3 8004 	ldr.w	r8, [r3, #4]
700025a4:	f8d3 a000 	ldr.w	sl, [r3]
700025a8:	f8cd 806c 	str.w	r8, [sp, #108]	; 0x6c
700025ac:	f8cd a048 	str.w	sl, [sp, #72]	; 0x48
700025b0:	4650      	mov	r0, sl
700025b2:	4641      	mov	r1, r8
700025b4:	f004 f99a 	bl	700068ec <__isinfd>
700025b8:	4683      	mov	fp, r0
700025ba:	2800      	cmp	r0, #0
700025bc:	f000 8599 	beq.w	700030f2 <_vfprintf_r+0x131e>
700025c0:	4650      	mov	r0, sl
700025c2:	2200      	movs	r2, #0
700025c4:	2300      	movs	r3, #0
700025c6:	4641      	mov	r1, r8
700025c8:	f005 fa16 	bl	700079f8 <__aeabi_dcmplt>
700025cc:	2800      	cmp	r0, #0
700025ce:	f040 850b 	bne.w	70002fe8 <_vfprintf_r+0x1214>
700025d2:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
700025d6:	f248 21d0 	movw	r1, #33488	; 0x82d0
700025da:	f248 22cc 	movw	r2, #33484	; 0x82cc
700025de:	9816      	ldr	r0, [sp, #88]	; 0x58
700025e0:	f2c7 0100 	movt	r1, #28672	; 0x7000
700025e4:	f2c7 0200 	movt	r2, #28672	; 0x7000
700025e8:	f04f 0c03 	mov.w	ip, #3
700025ec:	2847      	cmp	r0, #71	; 0x47
700025ee:	bfd8      	it	le
700025f0:	4611      	movle	r1, r2
700025f2:	9113      	str	r1, [sp, #76]	; 0x4c
700025f4:	990a      	ldr	r1, [sp, #40]	; 0x28
700025f6:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
700025fa:	f021 0180 	bic.w	r1, r1, #128	; 0x80
700025fe:	f8cd c040 	str.w	ip, [sp, #64]	; 0x40
70002602:	910a      	str	r1, [sp, #40]	; 0x28
70002604:	f04f 0c00 	mov.w	ip, #0
70002608:	f8cd c05c 	str.w	ip, [sp, #92]	; 0x5c
7000260c:	e5b1      	b.n	70002172 <_vfprintf_r+0x39e>
7000260e:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002610:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002612:	f043 0308 	orr.w	r3, r3, #8
70002616:	930a      	str	r3, [sp, #40]	; 0x28
70002618:	462b      	mov	r3, r5
7000261a:	782a      	ldrb	r2, [r5, #0]
7000261c:	910b      	str	r1, [sp, #44]	; 0x2c
7000261e:	e484      	b.n	70001f2a <_vfprintf_r+0x156>
70002620:	990a      	ldr	r1, [sp, #40]	; 0x28
70002622:	f041 0140 	orr.w	r1, r1, #64	; 0x40
70002626:	910a      	str	r1, [sp, #40]	; 0x28
70002628:	990b      	ldr	r1, [sp, #44]	; 0x2c
7000262a:	e73c      	b.n	700024a6 <_vfprintf_r+0x6d2>
7000262c:	782a      	ldrb	r2, [r5, #0]
7000262e:	2a6c      	cmp	r2, #108	; 0x6c
70002630:	f000 8555 	beq.w	700030de <_vfprintf_r+0x130a>
70002634:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002636:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002638:	910b      	str	r1, [sp, #44]	; 0x2c
7000263a:	f043 0310 	orr.w	r3, r3, #16
7000263e:	930a      	str	r3, [sp, #40]	; 0x28
70002640:	462b      	mov	r3, r5
70002642:	e472      	b.n	70001f2a <_vfprintf_r+0x156>
70002644:	9a0a      	ldr	r2, [sp, #40]	; 0x28
70002646:	f012 0f20 	tst.w	r2, #32
7000264a:	f000 8482 	beq.w	70002f52 <_vfprintf_r+0x117e>
7000264e:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002650:	9a11      	ldr	r2, [sp, #68]	; 0x44
70002652:	6803      	ldr	r3, [r0, #0]
70002654:	4610      	mov	r0, r2
70002656:	ea4f 71e0 	mov.w	r1, r0, asr #31
7000265a:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
7000265c:	e9c3 0100 	strd	r0, r1, [r3]
70002660:	f102 0a04 	add.w	sl, r2, #4
70002664:	e41e      	b.n	70001ea4 <_vfprintf_r+0xd0>
70002666:	9216      	str	r2, [sp, #88]	; 0x58
70002668:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7000266a:	f012 0320 	ands.w	r3, r2, #32
7000266e:	f000 80ef 	beq.w	70002850 <_vfprintf_r+0xa7c>
70002672:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
70002674:	1dda      	adds	r2, r3, #7
70002676:	2300      	movs	r3, #0
70002678:	f022 0207 	bic.w	r2, r2, #7
7000267c:	f102 0c08 	add.w	ip, r2, #8
70002680:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
70002684:	e9d2 ab00 	ldrd	sl, fp, [r2]
70002688:	ea5a 000b 	orrs.w	r0, sl, fp
7000268c:	bf0c      	ite	eq
7000268e:	2200      	moveq	r2, #0
70002690:	2201      	movne	r2, #1
70002692:	e531      	b.n	700020f8 <_vfprintf_r+0x324>
70002694:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002696:	2178      	movs	r1, #120	; 0x78
70002698:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
7000269c:	9116      	str	r1, [sp, #88]	; 0x58
7000269e:	6803      	ldr	r3, [r0, #0]
700026a0:	f248 20dc 	movw	r0, #33500	; 0x82dc
700026a4:	f88d 1575 	strb.w	r1, [sp, #1397]	; 0x575
700026a8:	2130      	movs	r1, #48	; 0x30
700026aa:	f88d 1574 	strb.w	r1, [sp, #1396]	; 0x574
700026ae:	f04c 0c02 	orr.w	ip, ip, #2
700026b2:	990b      	ldr	r1, [sp, #44]	; 0x2c
700026b4:	1e1a      	subs	r2, r3, #0
700026b6:	bf18      	it	ne
700026b8:	2201      	movne	r2, #1
700026ba:	f2c7 0000 	movt	r0, #28672	; 0x7000
700026be:	469a      	mov	sl, r3
700026c0:	f04f 0b00 	mov.w	fp, #0
700026c4:	3104      	adds	r1, #4
700026c6:	f8cd c028 	str.w	ip, [sp, #40]	; 0x28
700026ca:	9019      	str	r0, [sp, #100]	; 0x64
700026cc:	2302      	movs	r3, #2
700026ce:	910b      	str	r1, [sp, #44]	; 0x2c
700026d0:	e512      	b.n	700020f8 <_vfprintf_r+0x324>
700026d2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
700026d4:	9216      	str	r2, [sp, #88]	; 0x58
700026d6:	f04f 0200 	mov.w	r2, #0
700026da:	1d18      	adds	r0, r3, #4
700026dc:	f88d 2577 	strb.w	r2, [sp, #1399]	; 0x577
700026e0:	681b      	ldr	r3, [r3, #0]
700026e2:	900b      	str	r0, [sp, #44]	; 0x2c
700026e4:	9313      	str	r3, [sp, #76]	; 0x4c
700026e6:	2b00      	cmp	r3, #0
700026e8:	f000 86c6 	beq.w	70003478 <_vfprintf_r+0x16a4>
700026ec:	2f00      	cmp	r7, #0
700026ee:	9813      	ldr	r0, [sp, #76]	; 0x4c
700026f0:	f2c0 868f 	blt.w	70003412 <_vfprintf_r+0x163e>
700026f4:	2100      	movs	r1, #0
700026f6:	463a      	mov	r2, r7
700026f8:	f003 f8a6 	bl	70005848 <memchr>
700026fc:	4603      	mov	r3, r0
700026fe:	2800      	cmp	r0, #0
70002700:	f000 86f5 	beq.w	700034ee <_vfprintf_r+0x171a>
70002704:	9813      	ldr	r0, [sp, #76]	; 0x4c
70002706:	1a1b      	subs	r3, r3, r0
70002708:	9310      	str	r3, [sp, #64]	; 0x40
7000270a:	42bb      	cmp	r3, r7
7000270c:	f340 85be 	ble.w	7000328c <_vfprintf_r+0x14b8>
70002710:	9710      	str	r7, [sp, #64]	; 0x40
70002712:	2100      	movs	r1, #0
70002714:	ea27 77e7 	bic.w	r7, r7, r7, asr #31
70002718:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7000271c:	970c      	str	r7, [sp, #48]	; 0x30
7000271e:	9117      	str	r1, [sp, #92]	; 0x5c
70002720:	e527      	b.n	70002172 <_vfprintf_r+0x39e>
70002722:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002726:	9216      	str	r2, [sp, #88]	; 0x58
70002728:	f01c 0f20 	tst.w	ip, #32
7000272c:	d023      	beq.n	70002776 <_vfprintf_r+0x9a2>
7000272e:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002730:	2301      	movs	r3, #1
70002732:	1dc2      	adds	r2, r0, #7
70002734:	f022 0207 	bic.w	r2, r2, #7
70002738:	f102 0108 	add.w	r1, r2, #8
7000273c:	910b      	str	r1, [sp, #44]	; 0x2c
7000273e:	e9d2 ab00 	ldrd	sl, fp, [r2]
70002742:	ea5a 020b 	orrs.w	r2, sl, fp
70002746:	bf0c      	ite	eq
70002748:	2200      	moveq	r2, #0
7000274a:	2201      	movne	r2, #1
7000274c:	e4d4      	b.n	700020f8 <_vfprintf_r+0x324>
7000274e:	990a      	ldr	r1, [sp, #40]	; 0x28
70002750:	462b      	mov	r3, r5
70002752:	f041 0120 	orr.w	r1, r1, #32
70002756:	910a      	str	r1, [sp, #40]	; 0x28
70002758:	990b      	ldr	r1, [sp, #44]	; 0x2c
7000275a:	782a      	ldrb	r2, [r5, #0]
7000275c:	910b      	str	r1, [sp, #44]	; 0x2c
7000275e:	f7ff bbe4 	b.w	70001f2a <_vfprintf_r+0x156>
70002762:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002764:	9216      	str	r2, [sp, #88]	; 0x58
70002766:	f043 0310 	orr.w	r3, r3, #16
7000276a:	930a      	str	r3, [sp, #40]	; 0x28
7000276c:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002770:	f01c 0f20 	tst.w	ip, #32
70002774:	d1db      	bne.n	7000272e <_vfprintf_r+0x95a>
70002776:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002778:	f013 0f10 	tst.w	r3, #16
7000277c:	f000 83d5 	beq.w	70002f2a <_vfprintf_r+0x1156>
70002780:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002782:	2301      	movs	r3, #1
70002784:	1d02      	adds	r2, r0, #4
70002786:	920b      	str	r2, [sp, #44]	; 0x2c
70002788:	6801      	ldr	r1, [r0, #0]
7000278a:	1e0a      	subs	r2, r1, #0
7000278c:	bf18      	it	ne
7000278e:	2201      	movne	r2, #1
70002790:	468a      	mov	sl, r1
70002792:	f04f 0b00 	mov.w	fp, #0
70002796:	e4af      	b.n	700020f8 <_vfprintf_r+0x324>
70002798:	980a      	ldr	r0, [sp, #40]	; 0x28
7000279a:	9216      	str	r2, [sp, #88]	; 0x58
7000279c:	f248 22b8 	movw	r2, #33464	; 0x82b8
700027a0:	f010 0f20 	tst.w	r0, #32
700027a4:	f2c7 0200 	movt	r2, #28672	; 0x7000
700027a8:	9219      	str	r2, [sp, #100]	; 0x64
700027aa:	f47f ac92 	bne.w	700020d2 <_vfprintf_r+0x2fe>
700027ae:	9b0a      	ldr	r3, [sp, #40]	; 0x28
700027b0:	f013 0f10 	tst.w	r3, #16
700027b4:	f040 831a 	bne.w	70002dec <_vfprintf_r+0x1018>
700027b8:	9a0a      	ldr	r2, [sp, #40]	; 0x28
700027ba:	f012 0f40 	tst.w	r2, #64	; 0x40
700027be:	f000 8315 	beq.w	70002dec <_vfprintf_r+0x1018>
700027c2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
700027c4:	f103 0c04 	add.w	ip, r3, #4
700027c8:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
700027cc:	f8b3 a000 	ldrh.w	sl, [r3]
700027d0:	46d2      	mov	sl, sl
700027d2:	f04f 0b00 	mov.w	fp, #0
700027d6:	e485      	b.n	700020e4 <_vfprintf_r+0x310>
700027d8:	9216      	str	r2, [sp, #88]	; 0x58
700027da:	f50d 61a4 	add.w	r1, sp, #1312	; 0x520
700027de:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
700027e0:	f04f 0c01 	mov.w	ip, #1
700027e4:	f04f 0000 	mov.w	r0, #0
700027e8:	3104      	adds	r1, #4
700027ea:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
700027ee:	6813      	ldr	r3, [r2, #0]
700027f0:	3204      	adds	r2, #4
700027f2:	f88d 0577 	strb.w	r0, [sp, #1399]	; 0x577
700027f6:	920b      	str	r2, [sp, #44]	; 0x2c
700027f8:	9113      	str	r1, [sp, #76]	; 0x4c
700027fa:	f8cd c040 	str.w	ip, [sp, #64]	; 0x40
700027fe:	f88d 3524 	strb.w	r3, [sp, #1316]	; 0x524
70002802:	e62f      	b.n	70002464 <_vfprintf_r+0x690>
70002804:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002808:	9216      	str	r2, [sp, #88]	; 0x58
7000280a:	f01c 0f20 	tst.w	ip, #32
7000280e:	f47f aea3 	bne.w	70002558 <_vfprintf_r+0x784>
70002812:	9a0a      	ldr	r2, [sp, #40]	; 0x28
70002814:	f012 0f10 	tst.w	r2, #16
70002818:	f040 82f1 	bne.w	70002dfe <_vfprintf_r+0x102a>
7000281c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7000281e:	f012 0f40 	tst.w	r2, #64	; 0x40
70002822:	f000 82ec 	beq.w	70002dfe <_vfprintf_r+0x102a>
70002826:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
70002828:	f103 0c04 	add.w	ip, r3, #4
7000282c:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
70002830:	f9b3 a000 	ldrsh.w	sl, [r3]
70002834:	46d2      	mov	sl, sl
70002836:	ea4f 7bea 	mov.w	fp, sl, asr #31
7000283a:	e696      	b.n	7000256a <_vfprintf_r+0x796>
7000283c:	990a      	ldr	r1, [sp, #40]	; 0x28
7000283e:	9216      	str	r2, [sp, #88]	; 0x58
70002840:	f041 0110 	orr.w	r1, r1, #16
70002844:	910a      	str	r1, [sp, #40]	; 0x28
70002846:	9a0a      	ldr	r2, [sp, #40]	; 0x28
70002848:	f012 0320 	ands.w	r3, r2, #32
7000284c:	f47f af11 	bne.w	70002672 <_vfprintf_r+0x89e>
70002850:	990a      	ldr	r1, [sp, #40]	; 0x28
70002852:	f011 0210 	ands.w	r2, r1, #16
70002856:	f000 8354 	beq.w	70002f02 <_vfprintf_r+0x112e>
7000285a:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
7000285c:	f102 0c04 	add.w	ip, r2, #4
70002860:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
70002864:	6811      	ldr	r1, [r2, #0]
70002866:	1e0a      	subs	r2, r1, #0
70002868:	bf18      	it	ne
7000286a:	2201      	movne	r2, #1
7000286c:	468a      	mov	sl, r1
7000286e:	f04f 0b00 	mov.w	fp, #0
70002872:	e441      	b.n	700020f8 <_vfprintf_r+0x324>
70002874:	9a16      	ldr	r2, [sp, #88]	; 0x58
70002876:	2a65      	cmp	r2, #101	; 0x65
70002878:	f340 8128 	ble.w	70002acc <_vfprintf_r+0xcf8>
7000287c:	9812      	ldr	r0, [sp, #72]	; 0x48
7000287e:	2200      	movs	r2, #0
70002880:	2300      	movs	r3, #0
70002882:	991b      	ldr	r1, [sp, #108]	; 0x6c
70002884:	f005 f8ae 	bl	700079e4 <__aeabi_dcmpeq>
70002888:	2800      	cmp	r0, #0
7000288a:	f000 81be 	beq.w	70002c0a <_vfprintf_r+0xe36>
7000288e:	2301      	movs	r3, #1
70002890:	6063      	str	r3, [r4, #4]
70002892:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002896:	f248 23f8 	movw	r3, #33528	; 0x82f8
7000289a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000289e:	6023      	str	r3, [r4, #0]
700028a0:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
700028a4:	3201      	adds	r2, #1
700028a6:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
700028aa:	3301      	adds	r3, #1
700028ac:	2a07      	cmp	r2, #7
700028ae:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
700028b2:	bfd8      	it	le
700028b4:	f104 0308 	addle.w	r3, r4, #8
700028b8:	f300 839b 	bgt.w	70002ff2 <_vfprintf_r+0x121e>
700028bc:	f8dd 2570 	ldr.w	r2, [sp, #1392]	; 0x570
700028c0:	981a      	ldr	r0, [sp, #104]	; 0x68
700028c2:	4282      	cmp	r2, r0
700028c4:	db04      	blt.n	700028d0 <_vfprintf_r+0xafc>
700028c6:	990a      	ldr	r1, [sp, #40]	; 0x28
700028c8:	f011 0f01 	tst.w	r1, #1
700028cc:	f43f ad49 	beq.w	70002362 <_vfprintf_r+0x58e>
700028d0:	2201      	movs	r2, #1
700028d2:	605a      	str	r2, [r3, #4]
700028d4:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
700028d8:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
700028dc:	3201      	adds	r2, #1
700028de:	981d      	ldr	r0, [sp, #116]	; 0x74
700028e0:	3101      	adds	r1, #1
700028e2:	2a07      	cmp	r2, #7
700028e4:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
700028e8:	6018      	str	r0, [r3, #0]
700028ea:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
700028ee:	f300 855f 	bgt.w	700033b0 <_vfprintf_r+0x15dc>
700028f2:	3308      	adds	r3, #8
700028f4:	991a      	ldr	r1, [sp, #104]	; 0x68
700028f6:	1e4f      	subs	r7, r1, #1
700028f8:	2f00      	cmp	r7, #0
700028fa:	f77f ad32 	ble.w	70002362 <_vfprintf_r+0x58e>
700028fe:	2f10      	cmp	r7, #16
70002900:	f8df 8534 	ldr.w	r8, [pc, #1332]	; 70002e38 <_vfprintf_r+0x1064>
70002904:	f340 82ea 	ble.w	70002edc <_vfprintf_r+0x1108>
70002908:	4642      	mov	r2, r8
7000290a:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
7000290e:	46a8      	mov	r8, r5
70002910:	2410      	movs	r4, #16
70002912:	f10a 0a0c 	add.w	sl, sl, #12
70002916:	4615      	mov	r5, r2
70002918:	e003      	b.n	70002922 <_vfprintf_r+0xb4e>
7000291a:	3f10      	subs	r7, #16
7000291c:	2f10      	cmp	r7, #16
7000291e:	f340 82da 	ble.w	70002ed6 <_vfprintf_r+0x1102>
70002922:	605c      	str	r4, [r3, #4]
70002924:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002928:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
7000292c:	3201      	adds	r2, #1
7000292e:	601d      	str	r5, [r3, #0]
70002930:	3110      	adds	r1, #16
70002932:	2a07      	cmp	r2, #7
70002934:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70002938:	f103 0308 	add.w	r3, r3, #8
7000293c:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002940:	ddeb      	ble.n	7000291a <_vfprintf_r+0xb46>
70002942:	4648      	mov	r0, r9
70002944:	4631      	mov	r1, r6
70002946:	4652      	mov	r2, sl
70002948:	f7ff fa36 	bl	70001db8 <__sprint_r>
7000294c:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
70002950:	3304      	adds	r3, #4
70002952:	2800      	cmp	r0, #0
70002954:	d0e1      	beq.n	7000291a <_vfprintf_r+0xb46>
70002956:	f7ff bb5d 	b.w	70002014 <_vfprintf_r+0x240>
7000295a:	b97b      	cbnz	r3, 7000297c <_vfprintf_r+0xba8>
7000295c:	990a      	ldr	r1, [sp, #40]	; 0x28
7000295e:	f011 0f01 	tst.w	r1, #1
70002962:	d00b      	beq.n	7000297c <_vfprintf_r+0xba8>
70002964:	f50d 62a4 	add.w	r2, sp, #1312	; 0x520
70002968:	2330      	movs	r3, #48	; 0x30
7000296a:	3204      	adds	r2, #4
7000296c:	f88d 354b 	strb.w	r3, [sp, #1355]	; 0x54b
70002970:	3227      	adds	r2, #39	; 0x27
70002972:	2301      	movs	r3, #1
70002974:	9213      	str	r2, [sp, #76]	; 0x4c
70002976:	9310      	str	r3, [sp, #64]	; 0x40
70002978:	f7ff bbf3 	b.w	70002162 <_vfprintf_r+0x38e>
7000297c:	9818      	ldr	r0, [sp, #96]	; 0x60
7000297e:	2100      	movs	r1, #0
70002980:	9110      	str	r1, [sp, #64]	; 0x40
70002982:	9013      	str	r0, [sp, #76]	; 0x4c
70002984:	f7ff bbed 	b.w	70002162 <_vfprintf_r+0x38e>
70002988:	980f      	ldr	r0, [sp, #60]	; 0x3c
7000298a:	990c      	ldr	r1, [sp, #48]	; 0x30
7000298c:	1a47      	subs	r7, r0, r1
7000298e:	2f00      	cmp	r7, #0
70002990:	f77f ac84 	ble.w	7000229c <_vfprintf_r+0x4c8>
70002994:	2f10      	cmp	r7, #16
70002996:	f8df 84a0 	ldr.w	r8, [pc, #1184]	; 70002e38 <_vfprintf_r+0x1064>
7000299a:	dd2e      	ble.n	700029fa <_vfprintf_r+0xc26>
7000299c:	4643      	mov	r3, r8
7000299e:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
700029a2:	46a8      	mov	r8, r5
700029a4:	f04f 0a10 	mov.w	sl, #16
700029a8:	f10b 0b0c 	add.w	fp, fp, #12
700029ac:	461d      	mov	r5, r3
700029ae:	e002      	b.n	700029b6 <_vfprintf_r+0xbe2>
700029b0:	3f10      	subs	r7, #16
700029b2:	2f10      	cmp	r7, #16
700029b4:	dd1e      	ble.n	700029f4 <_vfprintf_r+0xc20>
700029b6:	f8c4 a004 	str.w	sl, [r4, #4]
700029ba:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
700029be:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
700029c2:	3301      	adds	r3, #1
700029c4:	6025      	str	r5, [r4, #0]
700029c6:	3210      	adds	r2, #16
700029c8:	2b07      	cmp	r3, #7
700029ca:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
700029ce:	f104 0408 	add.w	r4, r4, #8
700029d2:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
700029d6:	ddeb      	ble.n	700029b0 <_vfprintf_r+0xbdc>
700029d8:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
700029dc:	4648      	mov	r0, r9
700029de:	4631      	mov	r1, r6
700029e0:	465a      	mov	r2, fp
700029e2:	3404      	adds	r4, #4
700029e4:	f7ff f9e8 	bl	70001db8 <__sprint_r>
700029e8:	2800      	cmp	r0, #0
700029ea:	f47f ab13 	bne.w	70002014 <_vfprintf_r+0x240>
700029ee:	3f10      	subs	r7, #16
700029f0:	2f10      	cmp	r7, #16
700029f2:	dce0      	bgt.n	700029b6 <_vfprintf_r+0xbe2>
700029f4:	462b      	mov	r3, r5
700029f6:	4645      	mov	r5, r8
700029f8:	4698      	mov	r8, r3
700029fa:	6067      	str	r7, [r4, #4]
700029fc:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002a00:	f8c4 8000 	str.w	r8, [r4]
70002a04:	1c5a      	adds	r2, r3, #1
70002a06:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
70002a0a:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002a0e:	19db      	adds	r3, r3, r7
70002a10:	2a07      	cmp	r2, #7
70002a12:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
70002a16:	f300 823a 	bgt.w	70002e8e <_vfprintf_r+0x10ba>
70002a1a:	3408      	adds	r4, #8
70002a1c:	e43e      	b.n	7000229c <_vfprintf_r+0x4c8>
70002a1e:	9913      	ldr	r1, [sp, #76]	; 0x4c
70002a20:	6063      	str	r3, [r4, #4]
70002a22:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002a26:	6021      	str	r1, [r4, #0]
70002a28:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002a2c:	3201      	adds	r2, #1
70002a2e:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002a32:	18cb      	adds	r3, r1, r3
70002a34:	2a07      	cmp	r2, #7
70002a36:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
70002a3a:	f300 8549 	bgt.w	700034d0 <_vfprintf_r+0x16fc>
70002a3e:	3408      	adds	r4, #8
70002a40:	9a1d      	ldr	r2, [sp, #116]	; 0x74
70002a42:	2301      	movs	r3, #1
70002a44:	f8dd 7570 	ldr.w	r7, [sp, #1392]	; 0x570
70002a48:	6063      	str	r3, [r4, #4]
70002a4a:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002a4e:	6022      	str	r2, [r4, #0]
70002a50:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002a54:	3301      	adds	r3, #1
70002a56:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002a5a:	3201      	adds	r2, #1
70002a5c:	2b07      	cmp	r3, #7
70002a5e:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002a62:	bfd8      	it	le
70002a64:	f104 0308 	addle.w	r3, r4, #8
70002a68:	f300 8523 	bgt.w	700034b2 <_vfprintf_r+0x16de>
70002a6c:	9813      	ldr	r0, [sp, #76]	; 0x4c
70002a6e:	f8dd 2570 	ldr.w	r2, [sp, #1392]	; 0x570
70002a72:	19c7      	adds	r7, r0, r7
70002a74:	981a      	ldr	r0, [sp, #104]	; 0x68
70002a76:	601f      	str	r7, [r3, #0]
70002a78:	1a81      	subs	r1, r0, r2
70002a7a:	6059      	str	r1, [r3, #4]
70002a7c:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002a80:	1a8a      	subs	r2, r1, r2
70002a82:	f8dd 1550 	ldr.w	r1, [sp, #1360]	; 0x550
70002a86:	1812      	adds	r2, r2, r0
70002a88:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002a8c:	3101      	adds	r1, #1
70002a8e:	f8cd 1550 	str.w	r1, [sp, #1360]	; 0x550
70002a92:	2907      	cmp	r1, #7
70002a94:	f340 8232 	ble.w	70002efc <_vfprintf_r+0x1128>
70002a98:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002a9c:	4648      	mov	r0, r9
70002a9e:	4631      	mov	r1, r6
70002aa0:	320c      	adds	r2, #12
70002aa2:	f7ff f989 	bl	70001db8 <__sprint_r>
70002aa6:	2800      	cmp	r0, #0
70002aa8:	f47f aab4 	bne.w	70002014 <_vfprintf_r+0x240>
70002aac:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
70002ab0:	3304      	adds	r3, #4
70002ab2:	e456      	b.n	70002362 <_vfprintf_r+0x58e>
70002ab4:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002ab8:	4648      	mov	r0, r9
70002aba:	4631      	mov	r1, r6
70002abc:	320c      	adds	r2, #12
70002abe:	f7ff f97b 	bl	70001db8 <__sprint_r>
70002ac2:	2800      	cmp	r0, #0
70002ac4:	f43f acb4 	beq.w	70002430 <_vfprintf_r+0x65c>
70002ac8:	f7ff baa4 	b.w	70002014 <_vfprintf_r+0x240>
70002acc:	991a      	ldr	r1, [sp, #104]	; 0x68
70002ace:	2901      	cmp	r1, #1
70002ad0:	dd4c      	ble.n	70002b6c <_vfprintf_r+0xd98>
70002ad2:	2301      	movs	r3, #1
70002ad4:	6063      	str	r3, [r4, #4]
70002ad6:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002ada:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002ade:	3301      	adds	r3, #1
70002ae0:	9813      	ldr	r0, [sp, #76]	; 0x4c
70002ae2:	3201      	adds	r2, #1
70002ae4:	2b07      	cmp	r3, #7
70002ae6:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002aea:	6020      	str	r0, [r4, #0]
70002aec:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002af0:	f300 81b2 	bgt.w	70002e58 <_vfprintf_r+0x1084>
70002af4:	3408      	adds	r4, #8
70002af6:	2301      	movs	r3, #1
70002af8:	6063      	str	r3, [r4, #4]
70002afa:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002afe:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002b02:	3301      	adds	r3, #1
70002b04:	991d      	ldr	r1, [sp, #116]	; 0x74
70002b06:	3201      	adds	r2, #1
70002b08:	2b07      	cmp	r3, #7
70002b0a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002b0e:	6021      	str	r1, [r4, #0]
70002b10:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002b14:	f300 8192 	bgt.w	70002e3c <_vfprintf_r+0x1068>
70002b18:	3408      	adds	r4, #8
70002b1a:	9812      	ldr	r0, [sp, #72]	; 0x48
70002b1c:	2200      	movs	r2, #0
70002b1e:	2300      	movs	r3, #0
70002b20:	991b      	ldr	r1, [sp, #108]	; 0x6c
70002b22:	f004 ff5f 	bl	700079e4 <__aeabi_dcmpeq>
70002b26:	2800      	cmp	r0, #0
70002b28:	f040 811d 	bne.w	70002d66 <_vfprintf_r+0xf92>
70002b2c:	9b1a      	ldr	r3, [sp, #104]	; 0x68
70002b2e:	9813      	ldr	r0, [sp, #76]	; 0x4c
70002b30:	1e5a      	subs	r2, r3, #1
70002b32:	6062      	str	r2, [r4, #4]
70002b34:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002b38:	1c41      	adds	r1, r0, #1
70002b3a:	6021      	str	r1, [r4, #0]
70002b3c:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002b40:	3301      	adds	r3, #1
70002b42:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002b46:	188a      	adds	r2, r1, r2
70002b48:	2b07      	cmp	r3, #7
70002b4a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002b4e:	dc21      	bgt.n	70002b94 <_vfprintf_r+0xdc0>
70002b50:	3408      	adds	r4, #8
70002b52:	9b1c      	ldr	r3, [sp, #112]	; 0x70
70002b54:	f50d 62ac 	add.w	r2, sp, #1376	; 0x560
70002b58:	981c      	ldr	r0, [sp, #112]	; 0x70
70002b5a:	6022      	str	r2, [r4, #0]
70002b5c:	6063      	str	r3, [r4, #4]
70002b5e:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002b62:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002b66:	3301      	adds	r3, #1
70002b68:	f7ff bbf0 	b.w	7000234c <_vfprintf_r+0x578>
70002b6c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
70002b6e:	f012 0f01 	tst.w	r2, #1
70002b72:	d1ae      	bne.n	70002ad2 <_vfprintf_r+0xcfe>
70002b74:	9a13      	ldr	r2, [sp, #76]	; 0x4c
70002b76:	2301      	movs	r3, #1
70002b78:	6063      	str	r3, [r4, #4]
70002b7a:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002b7e:	6022      	str	r2, [r4, #0]
70002b80:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002b84:	3301      	adds	r3, #1
70002b86:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002b8a:	3201      	adds	r2, #1
70002b8c:	2b07      	cmp	r3, #7
70002b8e:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002b92:	dddd      	ble.n	70002b50 <_vfprintf_r+0xd7c>
70002b94:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002b98:	4648      	mov	r0, r9
70002b9a:	4631      	mov	r1, r6
70002b9c:	320c      	adds	r2, #12
70002b9e:	f7ff f90b 	bl	70001db8 <__sprint_r>
70002ba2:	2800      	cmp	r0, #0
70002ba4:	f47f aa36 	bne.w	70002014 <_vfprintf_r+0x240>
70002ba8:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002bac:	3404      	adds	r4, #4
70002bae:	e7d0      	b.n	70002b52 <_vfprintf_r+0xd7e>
70002bb0:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002bb4:	4648      	mov	r0, r9
70002bb6:	4631      	mov	r1, r6
70002bb8:	320c      	adds	r2, #12
70002bba:	f7ff f8fd 	bl	70001db8 <__sprint_r>
70002bbe:	2800      	cmp	r0, #0
70002bc0:	f47f aa28 	bne.w	70002014 <_vfprintf_r+0x240>
70002bc4:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002bc8:	3404      	adds	r4, #4
70002bca:	f7ff bbb0 	b.w	7000232e <_vfprintf_r+0x55a>
70002bce:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002bd2:	4648      	mov	r0, r9
70002bd4:	4631      	mov	r1, r6
70002bd6:	320c      	adds	r2, #12
70002bd8:	f7ff f8ee 	bl	70001db8 <__sprint_r>
70002bdc:	2800      	cmp	r0, #0
70002bde:	f47f aa19 	bne.w	70002014 <_vfprintf_r+0x240>
70002be2:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002be6:	3404      	adds	r4, #4
70002be8:	f7ff bb3c 	b.w	70002264 <_vfprintf_r+0x490>
70002bec:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002bf0:	4648      	mov	r0, r9
70002bf2:	4631      	mov	r1, r6
70002bf4:	320c      	adds	r2, #12
70002bf6:	f7ff f8df 	bl	70001db8 <__sprint_r>
70002bfa:	2800      	cmp	r0, #0
70002bfc:	f47f aa0a 	bne.w	70002014 <_vfprintf_r+0x240>
70002c00:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002c04:	3404      	adds	r4, #4
70002c06:	f7ff bb43 	b.w	70002290 <_vfprintf_r+0x4bc>
70002c0a:	f8dd 3570 	ldr.w	r3, [sp, #1392]	; 0x570
70002c0e:	2b00      	cmp	r3, #0
70002c10:	f340 81fd 	ble.w	7000300e <_vfprintf_r+0x123a>
70002c14:	991a      	ldr	r1, [sp, #104]	; 0x68
70002c16:	428b      	cmp	r3, r1
70002c18:	f6ff af01 	blt.w	70002a1e <_vfprintf_r+0xc4a>
70002c1c:	9a13      	ldr	r2, [sp, #76]	; 0x4c
70002c1e:	6061      	str	r1, [r4, #4]
70002c20:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002c24:	6022      	str	r2, [r4, #0]
70002c26:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002c2a:	3301      	adds	r3, #1
70002c2c:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002c30:	1852      	adds	r2, r2, r1
70002c32:	2b07      	cmp	r3, #7
70002c34:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002c38:	bfd8      	it	le
70002c3a:	f104 0308 	addle.w	r3, r4, #8
70002c3e:	f300 8429 	bgt.w	70003494 <_vfprintf_r+0x16c0>
70002c42:	f8dd 4570 	ldr.w	r4, [sp, #1392]	; 0x570
70002c46:	981a      	ldr	r0, [sp, #104]	; 0x68
70002c48:	1a24      	subs	r4, r4, r0
70002c4a:	2c00      	cmp	r4, #0
70002c4c:	f340 81b3 	ble.w	70002fb6 <_vfprintf_r+0x11e2>
70002c50:	2c10      	cmp	r4, #16
70002c52:	f8df 81e4 	ldr.w	r8, [pc, #484]	; 70002e38 <_vfprintf_r+0x1064>
70002c56:	f340 819d 	ble.w	70002f94 <_vfprintf_r+0x11c0>
70002c5a:	4642      	mov	r2, r8
70002c5c:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
70002c60:	46a8      	mov	r8, r5
70002c62:	2710      	movs	r7, #16
70002c64:	f10a 0a0c 	add.w	sl, sl, #12
70002c68:	4615      	mov	r5, r2
70002c6a:	e003      	b.n	70002c74 <_vfprintf_r+0xea0>
70002c6c:	3c10      	subs	r4, #16
70002c6e:	2c10      	cmp	r4, #16
70002c70:	f340 818d 	ble.w	70002f8e <_vfprintf_r+0x11ba>
70002c74:	605f      	str	r7, [r3, #4]
70002c76:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002c7a:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002c7e:	3201      	adds	r2, #1
70002c80:	601d      	str	r5, [r3, #0]
70002c82:	3110      	adds	r1, #16
70002c84:	2a07      	cmp	r2, #7
70002c86:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70002c8a:	f103 0308 	add.w	r3, r3, #8
70002c8e:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002c92:	ddeb      	ble.n	70002c6c <_vfprintf_r+0xe98>
70002c94:	4648      	mov	r0, r9
70002c96:	4631      	mov	r1, r6
70002c98:	4652      	mov	r2, sl
70002c9a:	f7ff f88d 	bl	70001db8 <__sprint_r>
70002c9e:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
70002ca2:	3304      	adds	r3, #4
70002ca4:	2800      	cmp	r0, #0
70002ca6:	d0e1      	beq.n	70002c6c <_vfprintf_r+0xe98>
70002ca8:	f7ff b9b4 	b.w	70002014 <_vfprintf_r+0x240>
70002cac:	9a18      	ldr	r2, [sp, #96]	; 0x60
70002cae:	9819      	ldr	r0, [sp, #100]	; 0x64
70002cb0:	4613      	mov	r3, r2
70002cb2:	9213      	str	r2, [sp, #76]	; 0x4c
70002cb4:	f00a 020f 	and.w	r2, sl, #15
70002cb8:	ea4f 111a 	mov.w	r1, sl, lsr #4
70002cbc:	ea41 710b 	orr.w	r1, r1, fp, lsl #28
70002cc0:	ea4f 1c1b 	mov.w	ip, fp, lsr #4
70002cc4:	5c82      	ldrb	r2, [r0, r2]
70002cc6:	468a      	mov	sl, r1
70002cc8:	46e3      	mov	fp, ip
70002cca:	ea5a 0c0b 	orrs.w	ip, sl, fp
70002cce:	f803 2d01 	strb.w	r2, [r3, #-1]!
70002cd2:	d1ef      	bne.n	70002cb4 <_vfprintf_r+0xee0>
70002cd4:	9818      	ldr	r0, [sp, #96]	; 0x60
70002cd6:	9313      	str	r3, [sp, #76]	; 0x4c
70002cd8:	1ac0      	subs	r0, r0, r3
70002cda:	9010      	str	r0, [sp, #64]	; 0x40
70002cdc:	f7ff ba41 	b.w	70002162 <_vfprintf_r+0x38e>
70002ce0:	2209      	movs	r2, #9
70002ce2:	2300      	movs	r3, #0
70002ce4:	4552      	cmp	r2, sl
70002ce6:	eb73 000b 	sbcs.w	r0, r3, fp
70002cea:	f8dd 8060 	ldr.w	r8, [sp, #96]	; 0x60
70002cee:	d21f      	bcs.n	70002d30 <_vfprintf_r+0xf5c>
70002cf0:	4623      	mov	r3, r4
70002cf2:	4644      	mov	r4, r8
70002cf4:	46b8      	mov	r8, r7
70002cf6:	461f      	mov	r7, r3
70002cf8:	4650      	mov	r0, sl
70002cfa:	4659      	mov	r1, fp
70002cfc:	220a      	movs	r2, #10
70002cfe:	2300      	movs	r3, #0
70002d00:	f004 feca 	bl	70007a98 <__aeabi_uldivmod>
70002d04:	2300      	movs	r3, #0
70002d06:	4650      	mov	r0, sl
70002d08:	4659      	mov	r1, fp
70002d0a:	f102 0c30 	add.w	ip, r2, #48	; 0x30
70002d0e:	220a      	movs	r2, #10
70002d10:	f804 cd01 	strb.w	ip, [r4, #-1]!
70002d14:	f004 fec0 	bl	70007a98 <__aeabi_uldivmod>
70002d18:	2209      	movs	r2, #9
70002d1a:	2300      	movs	r3, #0
70002d1c:	4682      	mov	sl, r0
70002d1e:	468b      	mov	fp, r1
70002d20:	4552      	cmp	r2, sl
70002d22:	eb73 030b 	sbcs.w	r3, r3, fp
70002d26:	d3e7      	bcc.n	70002cf8 <_vfprintf_r+0xf24>
70002d28:	463b      	mov	r3, r7
70002d2a:	4647      	mov	r7, r8
70002d2c:	46a0      	mov	r8, r4
70002d2e:	461c      	mov	r4, r3
70002d30:	f108 30ff 	add.w	r0, r8, #4294967295
70002d34:	f10a 0a30 	add.w	sl, sl, #48	; 0x30
70002d38:	9013      	str	r0, [sp, #76]	; 0x4c
70002d3a:	f808 ac01 	strb.w	sl, [r8, #-1]
70002d3e:	9918      	ldr	r1, [sp, #96]	; 0x60
70002d40:	1a09      	subs	r1, r1, r0
70002d42:	9110      	str	r1, [sp, #64]	; 0x40
70002d44:	f7ff ba0d 	b.w	70002162 <_vfprintf_r+0x38e>
70002d48:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002d4c:	4648      	mov	r0, r9
70002d4e:	4631      	mov	r1, r6
70002d50:	320c      	adds	r2, #12
70002d52:	f7ff f831 	bl	70001db8 <__sprint_r>
70002d56:	2800      	cmp	r0, #0
70002d58:	f47f a95c 	bne.w	70002014 <_vfprintf_r+0x240>
70002d5c:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002d60:	3404      	adds	r4, #4
70002d62:	f7ff ba68 	b.w	70002236 <_vfprintf_r+0x462>
70002d66:	991a      	ldr	r1, [sp, #104]	; 0x68
70002d68:	1e4f      	subs	r7, r1, #1
70002d6a:	2f00      	cmp	r7, #0
70002d6c:	f77f aef1 	ble.w	70002b52 <_vfprintf_r+0xd7e>
70002d70:	2f10      	cmp	r7, #16
70002d72:	f8df 80c4 	ldr.w	r8, [pc, #196]	; 70002e38 <_vfprintf_r+0x1064>
70002d76:	dd4e      	ble.n	70002e16 <_vfprintf_r+0x1042>
70002d78:	4643      	mov	r3, r8
70002d7a:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
70002d7e:	46a8      	mov	r8, r5
70002d80:	f04f 0a10 	mov.w	sl, #16
70002d84:	f10b 0b0c 	add.w	fp, fp, #12
70002d88:	461d      	mov	r5, r3
70002d8a:	e002      	b.n	70002d92 <_vfprintf_r+0xfbe>
70002d8c:	3f10      	subs	r7, #16
70002d8e:	2f10      	cmp	r7, #16
70002d90:	dd3e      	ble.n	70002e10 <_vfprintf_r+0x103c>
70002d92:	f8c4 a004 	str.w	sl, [r4, #4]
70002d96:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002d9a:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002d9e:	3301      	adds	r3, #1
70002da0:	6025      	str	r5, [r4, #0]
70002da2:	3210      	adds	r2, #16
70002da4:	2b07      	cmp	r3, #7
70002da6:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002daa:	f104 0408 	add.w	r4, r4, #8
70002dae:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002db2:	ddeb      	ble.n	70002d8c <_vfprintf_r+0xfb8>
70002db4:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002db8:	4648      	mov	r0, r9
70002dba:	4631      	mov	r1, r6
70002dbc:	465a      	mov	r2, fp
70002dbe:	3404      	adds	r4, #4
70002dc0:	f7fe fffa 	bl	70001db8 <__sprint_r>
70002dc4:	2800      	cmp	r0, #0
70002dc6:	d0e1      	beq.n	70002d8c <_vfprintf_r+0xfb8>
70002dc8:	f7ff b924 	b.w	70002014 <_vfprintf_r+0x240>
70002dcc:	9816      	ldr	r0, [sp, #88]	; 0x58
70002dce:	2130      	movs	r1, #48	; 0x30
70002dd0:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
70002dd4:	2201      	movs	r2, #1
70002dd6:	2302      	movs	r3, #2
70002dd8:	f88d 1574 	strb.w	r1, [sp, #1396]	; 0x574
70002ddc:	f04c 0c02 	orr.w	ip, ip, #2
70002de0:	f88d 0575 	strb.w	r0, [sp, #1397]	; 0x575
70002de4:	f8cd c028 	str.w	ip, [sp, #40]	; 0x28
70002de8:	f7ff b986 	b.w	700020f8 <_vfprintf_r+0x324>
70002dec:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002dee:	1d01      	adds	r1, r0, #4
70002df0:	6803      	ldr	r3, [r0, #0]
70002df2:	910b      	str	r1, [sp, #44]	; 0x2c
70002df4:	469a      	mov	sl, r3
70002df6:	f04f 0b00 	mov.w	fp, #0
70002dfa:	f7ff b973 	b.w	700020e4 <_vfprintf_r+0x310>
70002dfe:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002e00:	1d01      	adds	r1, r0, #4
70002e02:	6803      	ldr	r3, [r0, #0]
70002e04:	910b      	str	r1, [sp, #44]	; 0x2c
70002e06:	469a      	mov	sl, r3
70002e08:	ea4f 7bea 	mov.w	fp, sl, asr #31
70002e0c:	f7ff bbad 	b.w	7000256a <_vfprintf_r+0x796>
70002e10:	462b      	mov	r3, r5
70002e12:	4645      	mov	r5, r8
70002e14:	4698      	mov	r8, r3
70002e16:	6067      	str	r7, [r4, #4]
70002e18:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
70002e1c:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
70002e20:	3301      	adds	r3, #1
70002e22:	f8c4 8000 	str.w	r8, [r4]
70002e26:	19d2      	adds	r2, r2, r7
70002e28:	2b07      	cmp	r3, #7
70002e2a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
70002e2e:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
70002e32:	f77f ae8d 	ble.w	70002b50 <_vfprintf_r+0xd7c>
70002e36:	e6ad      	b.n	70002b94 <_vfprintf_r+0xdc0>
70002e38:	700082a8 	.word	0x700082a8
70002e3c:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002e40:	4648      	mov	r0, r9
70002e42:	4631      	mov	r1, r6
70002e44:	320c      	adds	r2, #12
70002e46:	f7fe ffb7 	bl	70001db8 <__sprint_r>
70002e4a:	2800      	cmp	r0, #0
70002e4c:	f47f a8e2 	bne.w	70002014 <_vfprintf_r+0x240>
70002e50:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002e54:	3404      	adds	r4, #4
70002e56:	e660      	b.n	70002b1a <_vfprintf_r+0xd46>
70002e58:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002e5c:	4648      	mov	r0, r9
70002e5e:	4631      	mov	r1, r6
70002e60:	320c      	adds	r2, #12
70002e62:	f7fe ffa9 	bl	70001db8 <__sprint_r>
70002e66:	2800      	cmp	r0, #0
70002e68:	f47f a8d4 	bne.w	70002014 <_vfprintf_r+0x240>
70002e6c:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002e70:	3404      	adds	r4, #4
70002e72:	e640      	b.n	70002af6 <_vfprintf_r+0xd22>
70002e74:	2830      	cmp	r0, #48	; 0x30
70002e76:	f000 82ec 	beq.w	70003452 <_vfprintf_r+0x167e>
70002e7a:	9813      	ldr	r0, [sp, #76]	; 0x4c
70002e7c:	2330      	movs	r3, #48	; 0x30
70002e7e:	f800 3d01 	strb.w	r3, [r0, #-1]!
70002e82:	9918      	ldr	r1, [sp, #96]	; 0x60
70002e84:	9013      	str	r0, [sp, #76]	; 0x4c
70002e86:	1a09      	subs	r1, r1, r0
70002e88:	9110      	str	r1, [sp, #64]	; 0x40
70002e8a:	f7ff b96a 	b.w	70002162 <_vfprintf_r+0x38e>
70002e8e:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002e92:	4648      	mov	r0, r9
70002e94:	4631      	mov	r1, r6
70002e96:	320c      	adds	r2, #12
70002e98:	f7fe ff8e 	bl	70001db8 <__sprint_r>
70002e9c:	2800      	cmp	r0, #0
70002e9e:	f47f a8b9 	bne.w	70002014 <_vfprintf_r+0x240>
70002ea2:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
70002ea6:	3404      	adds	r4, #4
70002ea8:	f7ff b9f8 	b.w	7000229c <_vfprintf_r+0x4c8>
70002eac:	f1da 0a00 	rsbs	sl, sl, #0
70002eb0:	eb6b 0b4b 	sbc.w	fp, fp, fp, lsl #1
70002eb4:	232d      	movs	r3, #45	; 0x2d
70002eb6:	ea5a 0c0b 	orrs.w	ip, sl, fp
70002eba:	f88d 3577 	strb.w	r3, [sp, #1399]	; 0x577
70002ebe:	bf0c      	ite	eq
70002ec0:	2200      	moveq	r2, #0
70002ec2:	2201      	movne	r2, #1
70002ec4:	2301      	movs	r3, #1
70002ec6:	f7ff b91b 	b.w	70002100 <_vfprintf_r+0x32c>
70002eca:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002ecc:	462b      	mov	r3, r5
70002ece:	782a      	ldrb	r2, [r5, #0]
70002ed0:	910b      	str	r1, [sp, #44]	; 0x2c
70002ed2:	f7ff b82a 	b.w	70001f2a <_vfprintf_r+0x156>
70002ed6:	462a      	mov	r2, r5
70002ed8:	4645      	mov	r5, r8
70002eda:	4690      	mov	r8, r2
70002edc:	605f      	str	r7, [r3, #4]
70002ede:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002ee2:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002ee6:	3201      	adds	r2, #1
70002ee8:	f8c3 8000 	str.w	r8, [r3]
70002eec:	19c9      	adds	r1, r1, r7
70002eee:	2a07      	cmp	r2, #7
70002ef0:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70002ef4:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002ef8:	f73f adce 	bgt.w	70002a98 <_vfprintf_r+0xcc4>
70002efc:	3308      	adds	r3, #8
70002efe:	f7ff ba30 	b.w	70002362 <_vfprintf_r+0x58e>
70002f02:	980a      	ldr	r0, [sp, #40]	; 0x28
70002f04:	f010 0340 	ands.w	r3, r0, #64	; 0x40
70002f08:	f000 81ed 	beq.w	700032e6 <_vfprintf_r+0x1512>
70002f0c:	990b      	ldr	r1, [sp, #44]	; 0x2c
70002f0e:	4613      	mov	r3, r2
70002f10:	1d0a      	adds	r2, r1, #4
70002f12:	920b      	str	r2, [sp, #44]	; 0x2c
70002f14:	f8b1 a000 	ldrh.w	sl, [r1]
70002f18:	f1ba 0200 	subs.w	r2, sl, #0
70002f1c:	bf18      	it	ne
70002f1e:	2201      	movne	r2, #1
70002f20:	46d2      	mov	sl, sl
70002f22:	f04f 0b00 	mov.w	fp, #0
70002f26:	f7ff b8e7 	b.w	700020f8 <_vfprintf_r+0x324>
70002f2a:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002f2c:	f013 0f40 	tst.w	r3, #64	; 0x40
70002f30:	f000 81cc 	beq.w	700032cc <_vfprintf_r+0x14f8>
70002f34:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002f36:	2301      	movs	r3, #1
70002f38:	1d01      	adds	r1, r0, #4
70002f3a:	910b      	str	r1, [sp, #44]	; 0x2c
70002f3c:	f8b0 a000 	ldrh.w	sl, [r0]
70002f40:	f1ba 0200 	subs.w	r2, sl, #0
70002f44:	bf18      	it	ne
70002f46:	2201      	movne	r2, #1
70002f48:	46d2      	mov	sl, sl
70002f4a:	f04f 0b00 	mov.w	fp, #0
70002f4e:	f7ff b8d3 	b.w	700020f8 <_vfprintf_r+0x324>
70002f52:	9b0a      	ldr	r3, [sp, #40]	; 0x28
70002f54:	f013 0f10 	tst.w	r3, #16
70002f58:	f000 81a4 	beq.w	700032a4 <_vfprintf_r+0x14d0>
70002f5c:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002f5e:	9911      	ldr	r1, [sp, #68]	; 0x44
70002f60:	f100 0a04 	add.w	sl, r0, #4
70002f64:	6803      	ldr	r3, [r0, #0]
70002f66:	6019      	str	r1, [r3, #0]
70002f68:	f7fe bf9c 	b.w	70001ea4 <_vfprintf_r+0xd0>
70002f6c:	980b      	ldr	r0, [sp, #44]	; 0x2c
70002f6e:	1dc3      	adds	r3, r0, #7
70002f70:	f023 0307 	bic.w	r3, r3, #7
70002f74:	f103 0108 	add.w	r1, r3, #8
70002f78:	910b      	str	r1, [sp, #44]	; 0x2c
70002f7a:	f8d3 8004 	ldr.w	r8, [r3, #4]
70002f7e:	f8d3 a000 	ldr.w	sl, [r3]
70002f82:	f8cd 806c 	str.w	r8, [sp, #108]	; 0x6c
70002f86:	f8cd a048 	str.w	sl, [sp, #72]	; 0x48
70002f8a:	f7ff bb11 	b.w	700025b0 <_vfprintf_r+0x7dc>
70002f8e:	462a      	mov	r2, r5
70002f90:	4645      	mov	r5, r8
70002f92:	4690      	mov	r8, r2
70002f94:	605c      	str	r4, [r3, #4]
70002f96:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002f9a:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002f9e:	3201      	adds	r2, #1
70002fa0:	f8c3 8000 	str.w	r8, [r3]
70002fa4:	1909      	adds	r1, r1, r4
70002fa6:	2a07      	cmp	r2, #7
70002fa8:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70002fac:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002fb0:	f300 82ea 	bgt.w	70003588 <_vfprintf_r+0x17b4>
70002fb4:	3308      	adds	r3, #8
70002fb6:	990a      	ldr	r1, [sp, #40]	; 0x28
70002fb8:	f011 0f01 	tst.w	r1, #1
70002fbc:	f43f a9d1 	beq.w	70002362 <_vfprintf_r+0x58e>
70002fc0:	2201      	movs	r2, #1
70002fc2:	605a      	str	r2, [r3, #4]
70002fc4:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70002fc8:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
70002fcc:	3201      	adds	r2, #1
70002fce:	981d      	ldr	r0, [sp, #116]	; 0x74
70002fd0:	3101      	adds	r1, #1
70002fd2:	2a07      	cmp	r2, #7
70002fd4:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70002fd8:	6018      	str	r0, [r3, #0]
70002fda:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70002fde:	f73f ad5b 	bgt.w	70002a98 <_vfprintf_r+0xcc4>
70002fe2:	3308      	adds	r3, #8
70002fe4:	f7ff b9bd 	b.w	70002362 <_vfprintf_r+0x58e>
70002fe8:	232d      	movs	r3, #45	; 0x2d
70002fea:	f88d 3577 	strb.w	r3, [sp, #1399]	; 0x577
70002fee:	f7ff baf2 	b.w	700025d6 <_vfprintf_r+0x802>
70002ff2:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70002ff6:	4648      	mov	r0, r9
70002ff8:	4631      	mov	r1, r6
70002ffa:	320c      	adds	r2, #12
70002ffc:	f7fe fedc 	bl	70001db8 <__sprint_r>
70003000:	2800      	cmp	r0, #0
70003002:	f47f a807 	bne.w	70002014 <_vfprintf_r+0x240>
70003006:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
7000300a:	3304      	adds	r3, #4
7000300c:	e456      	b.n	700028bc <_vfprintf_r+0xae8>
7000300e:	2301      	movs	r3, #1
70003010:	6063      	str	r3, [r4, #4]
70003012:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70003016:	f248 23f8 	movw	r3, #33528	; 0x82f8
7000301a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000301e:	6023      	str	r3, [r4, #0]
70003020:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
70003024:	3201      	adds	r2, #1
70003026:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
7000302a:	3301      	adds	r3, #1
7000302c:	2a07      	cmp	r2, #7
7000302e:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
70003032:	bfd8      	it	le
70003034:	f104 0308 	addle.w	r3, r4, #8
70003038:	f300 8187 	bgt.w	7000334a <_vfprintf_r+0x1576>
7000303c:	f8dd 2570 	ldr.w	r2, [sp, #1392]	; 0x570
70003040:	b93a      	cbnz	r2, 70003052 <_vfprintf_r+0x127e>
70003042:	9a1a      	ldr	r2, [sp, #104]	; 0x68
70003044:	b92a      	cbnz	r2, 70003052 <_vfprintf_r+0x127e>
70003046:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
7000304a:	f01c 0f01 	tst.w	ip, #1
7000304e:	f43f a988 	beq.w	70002362 <_vfprintf_r+0x58e>
70003052:	2201      	movs	r2, #1
70003054:	605a      	str	r2, [r3, #4]
70003056:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
7000305a:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
7000305e:	3201      	adds	r2, #1
70003060:	981d      	ldr	r0, [sp, #116]	; 0x74
70003062:	3101      	adds	r1, #1
70003064:	2a07      	cmp	r2, #7
70003066:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
7000306a:	6018      	str	r0, [r3, #0]
7000306c:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70003070:	f300 8179 	bgt.w	70003366 <_vfprintf_r+0x1592>
70003074:	3308      	adds	r3, #8
70003076:	f8dd 7570 	ldr.w	r7, [sp, #1392]	; 0x570
7000307a:	427f      	negs	r7, r7
7000307c:	2f00      	cmp	r7, #0
7000307e:	f340 81b3 	ble.w	700033e8 <_vfprintf_r+0x1614>
70003082:	2f10      	cmp	r7, #16
70003084:	f8df 8650 	ldr.w	r8, [pc, #1616]	; 700036d8 <_vfprintf_r+0x1904>
70003088:	f340 81d2 	ble.w	70003430 <_vfprintf_r+0x165c>
7000308c:	4642      	mov	r2, r8
7000308e:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
70003092:	46a8      	mov	r8, r5
70003094:	2410      	movs	r4, #16
70003096:	f10a 0a0c 	add.w	sl, sl, #12
7000309a:	4615      	mov	r5, r2
7000309c:	e003      	b.n	700030a6 <_vfprintf_r+0x12d2>
7000309e:	3f10      	subs	r7, #16
700030a0:	2f10      	cmp	r7, #16
700030a2:	f340 81c2 	ble.w	7000342a <_vfprintf_r+0x1656>
700030a6:	605c      	str	r4, [r3, #4]
700030a8:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
700030ac:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
700030b0:	3201      	adds	r2, #1
700030b2:	601d      	str	r5, [r3, #0]
700030b4:	3110      	adds	r1, #16
700030b6:	2a07      	cmp	r2, #7
700030b8:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
700030bc:	f103 0308 	add.w	r3, r3, #8
700030c0:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
700030c4:	ddeb      	ble.n	7000309e <_vfprintf_r+0x12ca>
700030c6:	4648      	mov	r0, r9
700030c8:	4631      	mov	r1, r6
700030ca:	4652      	mov	r2, sl
700030cc:	f7fe fe74 	bl	70001db8 <__sprint_r>
700030d0:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700030d4:	3304      	adds	r3, #4
700030d6:	2800      	cmp	r0, #0
700030d8:	d0e1      	beq.n	7000309e <_vfprintf_r+0x12ca>
700030da:	f7fe bf9b 	b.w	70002014 <_vfprintf_r+0x240>
700030de:	990b      	ldr	r1, [sp, #44]	; 0x2c
700030e0:	1c6b      	adds	r3, r5, #1
700030e2:	9a0a      	ldr	r2, [sp, #40]	; 0x28
700030e4:	f042 0220 	orr.w	r2, r2, #32
700030e8:	920a      	str	r2, [sp, #40]	; 0x28
700030ea:	786a      	ldrb	r2, [r5, #1]
700030ec:	910b      	str	r1, [sp, #44]	; 0x2c
700030ee:	f7fe bf1c 	b.w	70001f2a <_vfprintf_r+0x156>
700030f2:	4650      	mov	r0, sl
700030f4:	4641      	mov	r1, r8
700030f6:	f003 fc0b 	bl	70006910 <__isnand>
700030fa:	2800      	cmp	r0, #0
700030fc:	f040 80ff 	bne.w	700032fe <_vfprintf_r+0x152a>
70003100:	f1b7 3fff 	cmp.w	r7, #4294967295
70003104:	f000 8251 	beq.w	700035aa <_vfprintf_r+0x17d6>
70003108:	9816      	ldr	r0, [sp, #88]	; 0x58
7000310a:	2867      	cmp	r0, #103	; 0x67
7000310c:	bf14      	ite	ne
7000310e:	2300      	movne	r3, #0
70003110:	2301      	moveq	r3, #1
70003112:	2847      	cmp	r0, #71	; 0x47
70003114:	bf08      	it	eq
70003116:	f043 0301 	orreq.w	r3, r3, #1
7000311a:	b113      	cbz	r3, 70003122 <_vfprintf_r+0x134e>
7000311c:	2f00      	cmp	r7, #0
7000311e:	bf08      	it	eq
70003120:	2701      	moveq	r7, #1
70003122:	f50d 60ab 	add.w	r0, sp, #1368	; 0x558
70003126:	4643      	mov	r3, r8
70003128:	4652      	mov	r2, sl
7000312a:	990a      	ldr	r1, [sp, #40]	; 0x28
7000312c:	e9c0 2300 	strd	r2, r3, [r0]
70003130:	f8dd 355c 	ldr.w	r3, [sp, #1372]	; 0x55c
70003134:	f441 7180 	orr.w	r1, r1, #256	; 0x100
70003138:	910a      	str	r1, [sp, #40]	; 0x28
7000313a:	2b00      	cmp	r3, #0
7000313c:	f2c0 8264 	blt.w	70003608 <_vfprintf_r+0x1834>
70003140:	2100      	movs	r1, #0
70003142:	9117      	str	r1, [sp, #92]	; 0x5c
70003144:	9816      	ldr	r0, [sp, #88]	; 0x58
70003146:	2866      	cmp	r0, #102	; 0x66
70003148:	bf14      	ite	ne
7000314a:	2300      	movne	r3, #0
7000314c:	2301      	moveq	r3, #1
7000314e:	2846      	cmp	r0, #70	; 0x46
70003150:	bf08      	it	eq
70003152:	f043 0301 	orreq.w	r3, r3, #1
70003156:	9310      	str	r3, [sp, #64]	; 0x40
70003158:	2b00      	cmp	r3, #0
7000315a:	f000 81d1 	beq.w	70003500 <_vfprintf_r+0x172c>
7000315e:	46bc      	mov	ip, r7
70003160:	2303      	movs	r3, #3
70003162:	f8cd a030 	str.w	sl, [sp, #48]	; 0x30
70003166:	f50d 61ae 	add.w	r1, sp, #1392	; 0x570
7000316a:	f8cd 8034 	str.w	r8, [sp, #52]	; 0x34
7000316e:	4648      	mov	r0, r9
70003170:	9300      	str	r3, [sp, #0]
70003172:	9102      	str	r1, [sp, #8]
70003174:	f50d 61ac 	add.w	r1, sp, #1376	; 0x560
70003178:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
7000317c:	310c      	adds	r1, #12
7000317e:	f8cd c004 	str.w	ip, [sp, #4]
70003182:	9103      	str	r1, [sp, #12]
70003184:	f50d 61ad 	add.w	r1, sp, #1384	; 0x568
70003188:	f8cd c024 	str.w	ip, [sp, #36]	; 0x24
7000318c:	9104      	str	r1, [sp, #16]
7000318e:	f000 fbc7 	bl	70003920 <_dtoa_r>
70003192:	9a16      	ldr	r2, [sp, #88]	; 0x58
70003194:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
70003198:	f1b2 0367 	subs.w	r3, r2, #103	; 0x67
7000319c:	bf18      	it	ne
7000319e:	2301      	movne	r3, #1
700031a0:	2a47      	cmp	r2, #71	; 0x47
700031a2:	bf0c      	ite	eq
700031a4:	2300      	moveq	r3, #0
700031a6:	f003 0301 	andne.w	r3, r3, #1
700031aa:	9013      	str	r0, [sp, #76]	; 0x4c
700031ac:	b933      	cbnz	r3, 700031bc <_vfprintf_r+0x13e8>
700031ae:	9b0a      	ldr	r3, [sp, #40]	; 0x28
700031b0:	f013 0f01 	tst.w	r3, #1
700031b4:	bf08      	it	eq
700031b6:	f8dd b568 	ldreq.w	fp, [sp, #1384]	; 0x568
700031ba:	d016      	beq.n	700031ea <_vfprintf_r+0x1416>
700031bc:	9813      	ldr	r0, [sp, #76]	; 0x4c
700031be:	9910      	ldr	r1, [sp, #64]	; 0x40
700031c0:	eb00 0b0c 	add.w	fp, r0, ip
700031c4:	b131      	cbz	r1, 700031d4 <_vfprintf_r+0x1400>
700031c6:	7803      	ldrb	r3, [r0, #0]
700031c8:	2b30      	cmp	r3, #48	; 0x30
700031ca:	f000 80da 	beq.w	70003382 <_vfprintf_r+0x15ae>
700031ce:	f8dd 3570 	ldr.w	r3, [sp, #1392]	; 0x570
700031d2:	449b      	add	fp, r3
700031d4:	4650      	mov	r0, sl
700031d6:	2200      	movs	r2, #0
700031d8:	2300      	movs	r3, #0
700031da:	4641      	mov	r1, r8
700031dc:	f004 fc02 	bl	700079e4 <__aeabi_dcmpeq>
700031e0:	2800      	cmp	r0, #0
700031e2:	f000 81c2 	beq.w	7000356a <_vfprintf_r+0x1796>
700031e6:	f8cd b568 	str.w	fp, [sp, #1384]	; 0x568
700031ea:	9a16      	ldr	r2, [sp, #88]	; 0x58
700031ec:	9813      	ldr	r0, [sp, #76]	; 0x4c
700031ee:	2a67      	cmp	r2, #103	; 0x67
700031f0:	bf14      	ite	ne
700031f2:	2300      	movne	r3, #0
700031f4:	2301      	moveq	r3, #1
700031f6:	2a47      	cmp	r2, #71	; 0x47
700031f8:	bf08      	it	eq
700031fa:	f043 0301 	orreq.w	r3, r3, #1
700031fe:	ebc0 000b 	rsb	r0, r0, fp
70003202:	901a      	str	r0, [sp, #104]	; 0x68
70003204:	2b00      	cmp	r3, #0
70003206:	f000 818a 	beq.w	7000351e <_vfprintf_r+0x174a>
7000320a:	f8dd 1570 	ldr.w	r1, [sp, #1392]	; 0x570
7000320e:	f111 0f03 	cmn.w	r1, #3
70003212:	9110      	str	r1, [sp, #64]	; 0x40
70003214:	db02      	blt.n	7000321c <_vfprintf_r+0x1448>
70003216:	428f      	cmp	r7, r1
70003218:	f280 818c 	bge.w	70003534 <_vfprintf_r+0x1760>
7000321c:	9a16      	ldr	r2, [sp, #88]	; 0x58
7000321e:	3a02      	subs	r2, #2
70003220:	9216      	str	r2, [sp, #88]	; 0x58
70003222:	9910      	ldr	r1, [sp, #64]	; 0x40
70003224:	9a16      	ldr	r2, [sp, #88]	; 0x58
70003226:	1e4b      	subs	r3, r1, #1
70003228:	f8cd 3570 	str.w	r3, [sp, #1392]	; 0x570
7000322c:	2b00      	cmp	r3, #0
7000322e:	f88d 2560 	strb.w	r2, [sp, #1376]	; 0x560
70003232:	f2c0 8234 	blt.w	7000369e <_vfprintf_r+0x18ca>
70003236:	222b      	movs	r2, #43	; 0x2b
70003238:	f88d 2561 	strb.w	r2, [sp, #1377]	; 0x561
7000323c:	2b09      	cmp	r3, #9
7000323e:	f300 81b6 	bgt.w	700035ae <_vfprintf_r+0x17da>
70003242:	f50d 62ac 	add.w	r2, sp, #1376	; 0x560
70003246:	3330      	adds	r3, #48	; 0x30
70003248:	3204      	adds	r2, #4
7000324a:	f88d 3563 	strb.w	r3, [sp, #1379]	; 0x563
7000324e:	2330      	movs	r3, #48	; 0x30
70003250:	f88d 3562 	strb.w	r3, [sp, #1378]	; 0x562
70003254:	f50d 63ac 	add.w	r3, sp, #1376	; 0x560
70003258:	981a      	ldr	r0, [sp, #104]	; 0x68
7000325a:	991a      	ldr	r1, [sp, #104]	; 0x68
7000325c:	1ad3      	subs	r3, r2, r3
7000325e:	1818      	adds	r0, r3, r0
70003260:	931c      	str	r3, [sp, #112]	; 0x70
70003262:	2901      	cmp	r1, #1
70003264:	9010      	str	r0, [sp, #64]	; 0x40
70003266:	f340 8210 	ble.w	7000368a <_vfprintf_r+0x18b6>
7000326a:	9810      	ldr	r0, [sp, #64]	; 0x40
7000326c:	3001      	adds	r0, #1
7000326e:	9010      	str	r0, [sp, #64]	; 0x40
70003270:	ea20 71e0 	bic.w	r1, r0, r0, asr #31
70003274:	910c      	str	r1, [sp, #48]	; 0x30
70003276:	9817      	ldr	r0, [sp, #92]	; 0x5c
70003278:	2800      	cmp	r0, #0
7000327a:	f000 816e 	beq.w	7000355a <_vfprintf_r+0x1786>
7000327e:	232d      	movs	r3, #45	; 0x2d
70003280:	2100      	movs	r1, #0
70003282:	f88d 3577 	strb.w	r3, [sp, #1399]	; 0x577
70003286:	9117      	str	r1, [sp, #92]	; 0x5c
70003288:	f7fe bf74 	b.w	70002174 <_vfprintf_r+0x3a0>
7000328c:	9a10      	ldr	r2, [sp, #64]	; 0x40
7000328e:	f04f 0c00 	mov.w	ip, #0
70003292:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
70003296:	ea22 72e2 	bic.w	r2, r2, r2, asr #31
7000329a:	f8cd c05c 	str.w	ip, [sp, #92]	; 0x5c
7000329e:	920c      	str	r2, [sp, #48]	; 0x30
700032a0:	f7fe bf67 	b.w	70002172 <_vfprintf_r+0x39e>
700032a4:	9a0a      	ldr	r2, [sp, #40]	; 0x28
700032a6:	f012 0f40 	tst.w	r2, #64	; 0x40
700032aa:	bf17      	itett	ne
700032ac:	980b      	ldrne	r0, [sp, #44]	; 0x2c
700032ae:	9a0b      	ldreq	r2, [sp, #44]	; 0x2c
700032b0:	9911      	ldrne	r1, [sp, #68]	; 0x44
700032b2:	f100 0a04 	addne.w	sl, r0, #4
700032b6:	bf11      	iteee	ne
700032b8:	6803      	ldrne	r3, [r0, #0]
700032ba:	f102 0a04 	addeq.w	sl, r2, #4
700032be:	6813      	ldreq	r3, [r2, #0]
700032c0:	9811      	ldreq	r0, [sp, #68]	; 0x44
700032c2:	bf14      	ite	ne
700032c4:	8019      	strhne	r1, [r3, #0]
700032c6:	6018      	streq	r0, [r3, #0]
700032c8:	f7fe bdec 	b.w	70001ea4 <_vfprintf_r+0xd0>
700032cc:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
700032ce:	1d13      	adds	r3, r2, #4
700032d0:	930b      	str	r3, [sp, #44]	; 0x2c
700032d2:	6811      	ldr	r1, [r2, #0]
700032d4:	2301      	movs	r3, #1
700032d6:	1e0a      	subs	r2, r1, #0
700032d8:	bf18      	it	ne
700032da:	2201      	movne	r2, #1
700032dc:	468a      	mov	sl, r1
700032de:	f04f 0b00 	mov.w	fp, #0
700032e2:	f7fe bf09 	b.w	700020f8 <_vfprintf_r+0x324>
700032e6:	980b      	ldr	r0, [sp, #44]	; 0x2c
700032e8:	1d02      	adds	r2, r0, #4
700032ea:	920b      	str	r2, [sp, #44]	; 0x2c
700032ec:	6801      	ldr	r1, [r0, #0]
700032ee:	1e0a      	subs	r2, r1, #0
700032f0:	bf18      	it	ne
700032f2:	2201      	movne	r2, #1
700032f4:	468a      	mov	sl, r1
700032f6:	f04f 0b00 	mov.w	fp, #0
700032fa:	f7fe befd 	b.w	700020f8 <_vfprintf_r+0x324>
700032fe:	f248 22d8 	movw	r2, #33496	; 0x82d8
70003302:	f248 23d4 	movw	r3, #33492	; 0x82d4
70003306:	9916      	ldr	r1, [sp, #88]	; 0x58
70003308:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000330c:	f2c7 0200 	movt	r2, #28672	; 0x7000
70003310:	2003      	movs	r0, #3
70003312:	2947      	cmp	r1, #71	; 0x47
70003314:	bfd8      	it	le
70003316:	461a      	movle	r2, r3
70003318:	9213      	str	r2, [sp, #76]	; 0x4c
7000331a:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7000331c:	900c      	str	r0, [sp, #48]	; 0x30
7000331e:	f022 0280 	bic.w	r2, r2, #128	; 0x80
70003322:	f8cd b05c 	str.w	fp, [sp, #92]	; 0x5c
70003326:	920a      	str	r2, [sp, #40]	; 0x28
70003328:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7000332c:	9010      	str	r0, [sp, #64]	; 0x40
7000332e:	f7fe bf20 	b.w	70002172 <_vfprintf_r+0x39e>
70003332:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70003336:	4648      	mov	r0, r9
70003338:	4631      	mov	r1, r6
7000333a:	320c      	adds	r2, #12
7000333c:	f7fe fd3c 	bl	70001db8 <__sprint_r>
70003340:	2800      	cmp	r0, #0
70003342:	f47e ae67 	bne.w	70002014 <_vfprintf_r+0x240>
70003346:	f7fe be62 	b.w	7000200e <_vfprintf_r+0x23a>
7000334a:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
7000334e:	4648      	mov	r0, r9
70003350:	4631      	mov	r1, r6
70003352:	320c      	adds	r2, #12
70003354:	f7fe fd30 	bl	70001db8 <__sprint_r>
70003358:	2800      	cmp	r0, #0
7000335a:	f47e ae5b 	bne.w	70002014 <_vfprintf_r+0x240>
7000335e:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
70003362:	3304      	adds	r3, #4
70003364:	e66a      	b.n	7000303c <_vfprintf_r+0x1268>
70003366:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
7000336a:	4648      	mov	r0, r9
7000336c:	4631      	mov	r1, r6
7000336e:	320c      	adds	r2, #12
70003370:	f7fe fd22 	bl	70001db8 <__sprint_r>
70003374:	2800      	cmp	r0, #0
70003376:	f47e ae4d 	bne.w	70002014 <_vfprintf_r+0x240>
7000337a:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
7000337e:	3304      	adds	r3, #4
70003380:	e679      	b.n	70003076 <_vfprintf_r+0x12a2>
70003382:	4650      	mov	r0, sl
70003384:	2200      	movs	r2, #0
70003386:	2300      	movs	r3, #0
70003388:	4641      	mov	r1, r8
7000338a:	f8cd c024 	str.w	ip, [sp, #36]	; 0x24
7000338e:	f004 fb29 	bl	700079e4 <__aeabi_dcmpeq>
70003392:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
70003396:	2800      	cmp	r0, #0
70003398:	f47f af19 	bne.w	700031ce <_vfprintf_r+0x13fa>
7000339c:	f1cc 0301 	rsb	r3, ip, #1
700033a0:	f8cd 3570 	str.w	r3, [sp, #1392]	; 0x570
700033a4:	e715      	b.n	700031d2 <_vfprintf_r+0x13fe>
700033a6:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
700033a8:	4252      	negs	r2, r2
700033aa:	920f      	str	r2, [sp, #60]	; 0x3c
700033ac:	f7ff b887 	b.w	700024be <_vfprintf_r+0x6ea>
700033b0:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
700033b4:	4648      	mov	r0, r9
700033b6:	4631      	mov	r1, r6
700033b8:	320c      	adds	r2, #12
700033ba:	f7fe fcfd 	bl	70001db8 <__sprint_r>
700033be:	2800      	cmp	r0, #0
700033c0:	f47e ae28 	bne.w	70002014 <_vfprintf_r+0x240>
700033c4:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700033c8:	3304      	adds	r3, #4
700033ca:	f7ff ba93 	b.w	700028f4 <_vfprintf_r+0xb20>
700033ce:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
700033d2:	4648      	mov	r0, r9
700033d4:	4631      	mov	r1, r6
700033d6:	320c      	adds	r2, #12
700033d8:	f7fe fcee 	bl	70001db8 <__sprint_r>
700033dc:	2800      	cmp	r0, #0
700033de:	f47e ae19 	bne.w	70002014 <_vfprintf_r+0x240>
700033e2:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700033e6:	3304      	adds	r3, #4
700033e8:	991a      	ldr	r1, [sp, #104]	; 0x68
700033ea:	9813      	ldr	r0, [sp, #76]	; 0x4c
700033ec:	6059      	str	r1, [r3, #4]
700033ee:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
700033f2:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
700033f6:	6018      	str	r0, [r3, #0]
700033f8:	3201      	adds	r2, #1
700033fa:	981a      	ldr	r0, [sp, #104]	; 0x68
700033fc:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
70003400:	1809      	adds	r1, r1, r0
70003402:	2a07      	cmp	r2, #7
70003404:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70003408:	f73f ab46 	bgt.w	70002a98 <_vfprintf_r+0xcc4>
7000340c:	3308      	adds	r3, #8
7000340e:	f7fe bfa8 	b.w	70002362 <_vfprintf_r+0x58e>
70003412:	2100      	movs	r1, #0
70003414:	9117      	str	r1, [sp, #92]	; 0x5c
70003416:	f003 fbd3 	bl	70006bc0 <strlen>
7000341a:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7000341e:	ea20 72e0 	bic.w	r2, r0, r0, asr #31
70003422:	9010      	str	r0, [sp, #64]	; 0x40
70003424:	920c      	str	r2, [sp, #48]	; 0x30
70003426:	f7fe bea4 	b.w	70002172 <_vfprintf_r+0x39e>
7000342a:	462a      	mov	r2, r5
7000342c:	4645      	mov	r5, r8
7000342e:	4690      	mov	r8, r2
70003430:	605f      	str	r7, [r3, #4]
70003432:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
70003436:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
7000343a:	3201      	adds	r2, #1
7000343c:	f8c3 8000 	str.w	r8, [r3]
70003440:	19c9      	adds	r1, r1, r7
70003442:	2a07      	cmp	r2, #7
70003444:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
70003448:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
7000344c:	dcbf      	bgt.n	700033ce <_vfprintf_r+0x15fa>
7000344e:	3308      	adds	r3, #8
70003450:	e7ca      	b.n	700033e8 <_vfprintf_r+0x1614>
70003452:	9a18      	ldr	r2, [sp, #96]	; 0x60
70003454:	9913      	ldr	r1, [sp, #76]	; 0x4c
70003456:	1a51      	subs	r1, r2, r1
70003458:	9110      	str	r1, [sp, #64]	; 0x40
7000345a:	f7fe be82 	b.w	70002162 <_vfprintf_r+0x38e>
7000345e:	4648      	mov	r0, r9
70003460:	4631      	mov	r1, r6
70003462:	f000 f949 	bl	700036f8 <__swsetup_r>
70003466:	2800      	cmp	r0, #0
70003468:	f47e add8 	bne.w	7000201c <_vfprintf_r+0x248>
7000346c:	f8b6 c00c 	ldrh.w	ip, [r6, #12]
70003470:	fa1f f38c 	uxth.w	r3, ip
70003474:	f7fe bcf6 	b.w	70001e64 <_vfprintf_r+0x90>
70003478:	2f06      	cmp	r7, #6
7000347a:	bf28      	it	cs
7000347c:	2706      	movcs	r7, #6
7000347e:	f248 21f0 	movw	r1, #33520	; 0x82f0
70003482:	f2c7 0100 	movt	r1, #28672	; 0x7000
70003486:	ea27 72e7 	bic.w	r2, r7, r7, asr #31
7000348a:	9710      	str	r7, [sp, #64]	; 0x40
7000348c:	9113      	str	r1, [sp, #76]	; 0x4c
7000348e:	920c      	str	r2, [sp, #48]	; 0x30
70003490:	f7fe bfe8 	b.w	70002464 <_vfprintf_r+0x690>
70003494:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
70003498:	4648      	mov	r0, r9
7000349a:	4631      	mov	r1, r6
7000349c:	320c      	adds	r2, #12
7000349e:	f7fe fc8b 	bl	70001db8 <__sprint_r>
700034a2:	2800      	cmp	r0, #0
700034a4:	f47e adb6 	bne.w	70002014 <_vfprintf_r+0x240>
700034a8:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700034ac:	3304      	adds	r3, #4
700034ae:	f7ff bbc8 	b.w	70002c42 <_vfprintf_r+0xe6e>
700034b2:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
700034b6:	4648      	mov	r0, r9
700034b8:	4631      	mov	r1, r6
700034ba:	320c      	adds	r2, #12
700034bc:	f7fe fc7c 	bl	70001db8 <__sprint_r>
700034c0:	2800      	cmp	r0, #0
700034c2:	f47e ada7 	bne.w	70002014 <_vfprintf_r+0x240>
700034c6:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700034ca:	3304      	adds	r3, #4
700034cc:	f7ff bace 	b.w	70002a6c <_vfprintf_r+0xc98>
700034d0:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
700034d4:	4648      	mov	r0, r9
700034d6:	4631      	mov	r1, r6
700034d8:	320c      	adds	r2, #12
700034da:	f7fe fc6d 	bl	70001db8 <__sprint_r>
700034de:	2800      	cmp	r0, #0
700034e0:	f47e ad98 	bne.w	70002014 <_vfprintf_r+0x240>
700034e4:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
700034e8:	3404      	adds	r4, #4
700034ea:	f7ff baa9 	b.w	70002a40 <_vfprintf_r+0xc6c>
700034ee:	9710      	str	r7, [sp, #64]	; 0x40
700034f0:	ea27 77e7 	bic.w	r7, r7, r7, asr #31
700034f4:	9017      	str	r0, [sp, #92]	; 0x5c
700034f6:	970c      	str	r7, [sp, #48]	; 0x30
700034f8:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
700034fc:	f7fe be39 	b.w	70002172 <_vfprintf_r+0x39e>
70003500:	9916      	ldr	r1, [sp, #88]	; 0x58
70003502:	2965      	cmp	r1, #101	; 0x65
70003504:	bf14      	ite	ne
70003506:	2300      	movne	r3, #0
70003508:	2301      	moveq	r3, #1
7000350a:	2945      	cmp	r1, #69	; 0x45
7000350c:	bf08      	it	eq
7000350e:	f043 0301 	orreq.w	r3, r3, #1
70003512:	2b00      	cmp	r3, #0
70003514:	d046      	beq.n	700035a4 <_vfprintf_r+0x17d0>
70003516:	f107 0c01 	add.w	ip, r7, #1
7000351a:	2302      	movs	r3, #2
7000351c:	e621      	b.n	70003162 <_vfprintf_r+0x138e>
7000351e:	9b16      	ldr	r3, [sp, #88]	; 0x58
70003520:	2b65      	cmp	r3, #101	; 0x65
70003522:	dd76      	ble.n	70003612 <_vfprintf_r+0x183e>
70003524:	9a16      	ldr	r2, [sp, #88]	; 0x58
70003526:	2a66      	cmp	r2, #102	; 0x66
70003528:	bf1c      	itt	ne
7000352a:	f8dd 3570 	ldrne.w	r3, [sp, #1392]	; 0x570
7000352e:	9310      	strne	r3, [sp, #64]	; 0x40
70003530:	f000 8083 	beq.w	7000363a <_vfprintf_r+0x1866>
70003534:	9b1a      	ldr	r3, [sp, #104]	; 0x68
70003536:	9810      	ldr	r0, [sp, #64]	; 0x40
70003538:	4283      	cmp	r3, r0
7000353a:	dc6e      	bgt.n	7000361a <_vfprintf_r+0x1846>
7000353c:	990a      	ldr	r1, [sp, #40]	; 0x28
7000353e:	f011 0f01 	tst.w	r1, #1
70003542:	f040 808e 	bne.w	70003662 <_vfprintf_r+0x188e>
70003546:	ea20 72e0 	bic.w	r2, r0, r0, asr #31
7000354a:	2367      	movs	r3, #103	; 0x67
7000354c:	920c      	str	r2, [sp, #48]	; 0x30
7000354e:	9316      	str	r3, [sp, #88]	; 0x58
70003550:	e691      	b.n	70003276 <_vfprintf_r+0x14a2>
70003552:	2700      	movs	r7, #0
70003554:	461d      	mov	r5, r3
70003556:	f7fe bce9 	b.w	70001f2c <_vfprintf_r+0x158>
7000355a:	9910      	ldr	r1, [sp, #64]	; 0x40
7000355c:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
70003560:	ea21 71e1 	bic.w	r1, r1, r1, asr #31
70003564:	910c      	str	r1, [sp, #48]	; 0x30
70003566:	f7fe be04 	b.w	70002172 <_vfprintf_r+0x39e>
7000356a:	f8dd 3568 	ldr.w	r3, [sp, #1384]	; 0x568
7000356e:	459b      	cmp	fp, r3
70003570:	bf98      	it	ls
70003572:	469b      	movls	fp, r3
70003574:	f67f ae39 	bls.w	700031ea <_vfprintf_r+0x1416>
70003578:	2230      	movs	r2, #48	; 0x30
7000357a:	f803 2b01 	strb.w	r2, [r3], #1
7000357e:	459b      	cmp	fp, r3
70003580:	f8cd 3568 	str.w	r3, [sp, #1384]	; 0x568
70003584:	d8f9      	bhi.n	7000357a <_vfprintf_r+0x17a6>
70003586:	e630      	b.n	700031ea <_vfprintf_r+0x1416>
70003588:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
7000358c:	4648      	mov	r0, r9
7000358e:	4631      	mov	r1, r6
70003590:	320c      	adds	r2, #12
70003592:	f7fe fc11 	bl	70001db8 <__sprint_r>
70003596:	2800      	cmp	r0, #0
70003598:	f47e ad3c 	bne.w	70002014 <_vfprintf_r+0x240>
7000359c:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
700035a0:	3304      	adds	r3, #4
700035a2:	e508      	b.n	70002fb6 <_vfprintf_r+0x11e2>
700035a4:	46bc      	mov	ip, r7
700035a6:	3302      	adds	r3, #2
700035a8:	e5db      	b.n	70003162 <_vfprintf_r+0x138e>
700035aa:	3707      	adds	r7, #7
700035ac:	e5b9      	b.n	70003122 <_vfprintf_r+0x134e>
700035ae:	f246 6c67 	movw	ip, #26215	; 0x6667
700035b2:	f50d 6190 	add.w	r1, sp, #1152	; 0x480
700035b6:	3103      	adds	r1, #3
700035b8:	f2c6 6c66 	movt	ip, #26214	; 0x6666
700035bc:	fb8c 2003 	smull	r2, r0, ip, r3
700035c0:	17da      	asrs	r2, r3, #31
700035c2:	ebc2 02a0 	rsb	r2, r2, r0, asr #2
700035c6:	eb02 0082 	add.w	r0, r2, r2, lsl #2
700035ca:	eba3 0040 	sub.w	r0, r3, r0, lsl #1
700035ce:	4613      	mov	r3, r2
700035d0:	3030      	adds	r0, #48	; 0x30
700035d2:	2a09      	cmp	r2, #9
700035d4:	f801 0d01 	strb.w	r0, [r1, #-1]!
700035d8:	dcf0      	bgt.n	700035bc <_vfprintf_r+0x17e8>
700035da:	3330      	adds	r3, #48	; 0x30
700035dc:	1e48      	subs	r0, r1, #1
700035de:	b2da      	uxtb	r2, r3
700035e0:	f801 2c01 	strb.w	r2, [r1, #-1]
700035e4:	9b07      	ldr	r3, [sp, #28]
700035e6:	4283      	cmp	r3, r0
700035e8:	d96a      	bls.n	700036c0 <_vfprintf_r+0x18ec>
700035ea:	f50d 63ac 	add.w	r3, sp, #1376	; 0x560
700035ee:	3303      	adds	r3, #3
700035f0:	e001      	b.n	700035f6 <_vfprintf_r+0x1822>
700035f2:	f811 2b01 	ldrb.w	r2, [r1], #1
700035f6:	f803 2c01 	strb.w	r2, [r3, #-1]
700035fa:	461a      	mov	r2, r3
700035fc:	f8dd c01c 	ldr.w	ip, [sp, #28]
70003600:	3301      	adds	r3, #1
70003602:	458c      	cmp	ip, r1
70003604:	d8f5      	bhi.n	700035f2 <_vfprintf_r+0x181e>
70003606:	e625      	b.n	70003254 <_vfprintf_r+0x1480>
70003608:	222d      	movs	r2, #45	; 0x2d
7000360a:	f108 4800 	add.w	r8, r8, #2147483648	; 0x80000000
7000360e:	9217      	str	r2, [sp, #92]	; 0x5c
70003610:	e598      	b.n	70003144 <_vfprintf_r+0x1370>
70003612:	f8dd 0570 	ldr.w	r0, [sp, #1392]	; 0x570
70003616:	9010      	str	r0, [sp, #64]	; 0x40
70003618:	e603      	b.n	70003222 <_vfprintf_r+0x144e>
7000361a:	9b10      	ldr	r3, [sp, #64]	; 0x40
7000361c:	991a      	ldr	r1, [sp, #104]	; 0x68
7000361e:	2b00      	cmp	r3, #0
70003620:	bfda      	itte	le
70003622:	9810      	ldrle	r0, [sp, #64]	; 0x40
70003624:	f1c0 0302 	rsble	r3, r0, #2
70003628:	2301      	movgt	r3, #1
7000362a:	185b      	adds	r3, r3, r1
7000362c:	2267      	movs	r2, #103	; 0x67
7000362e:	9310      	str	r3, [sp, #64]	; 0x40
70003630:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
70003634:	9216      	str	r2, [sp, #88]	; 0x58
70003636:	930c      	str	r3, [sp, #48]	; 0x30
70003638:	e61d      	b.n	70003276 <_vfprintf_r+0x14a2>
7000363a:	f8dd 0570 	ldr.w	r0, [sp, #1392]	; 0x570
7000363e:	2800      	cmp	r0, #0
70003640:	9010      	str	r0, [sp, #64]	; 0x40
70003642:	dd31      	ble.n	700036a8 <_vfprintf_r+0x18d4>
70003644:	b91f      	cbnz	r7, 7000364e <_vfprintf_r+0x187a>
70003646:	990a      	ldr	r1, [sp, #40]	; 0x28
70003648:	f011 0f01 	tst.w	r1, #1
7000364c:	d00e      	beq.n	7000366c <_vfprintf_r+0x1898>
7000364e:	9810      	ldr	r0, [sp, #64]	; 0x40
70003650:	2166      	movs	r1, #102	; 0x66
70003652:	9116      	str	r1, [sp, #88]	; 0x58
70003654:	1c43      	adds	r3, r0, #1
70003656:	19db      	adds	r3, r3, r7
70003658:	9310      	str	r3, [sp, #64]	; 0x40
7000365a:	ea23 72e3 	bic.w	r2, r3, r3, asr #31
7000365e:	920c      	str	r2, [sp, #48]	; 0x30
70003660:	e609      	b.n	70003276 <_vfprintf_r+0x14a2>
70003662:	9810      	ldr	r0, [sp, #64]	; 0x40
70003664:	2167      	movs	r1, #103	; 0x67
70003666:	9116      	str	r1, [sp, #88]	; 0x58
70003668:	3001      	adds	r0, #1
7000366a:	9010      	str	r0, [sp, #64]	; 0x40
7000366c:	ea20 72e0 	bic.w	r2, r0, r0, asr #31
70003670:	920c      	str	r2, [sp, #48]	; 0x30
70003672:	e600      	b.n	70003276 <_vfprintf_r+0x14a2>
70003674:	990b      	ldr	r1, [sp, #44]	; 0x2c
70003676:	781a      	ldrb	r2, [r3, #0]
70003678:	680f      	ldr	r7, [r1, #0]
7000367a:	3104      	adds	r1, #4
7000367c:	910b      	str	r1, [sp, #44]	; 0x2c
7000367e:	2f00      	cmp	r7, #0
70003680:	bfb8      	it	lt
70003682:	f04f 37ff 	movlt.w	r7, #4294967295
70003686:	f7fe bc50 	b.w	70001f2a <_vfprintf_r+0x156>
7000368a:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7000368c:	f012 0f01 	tst.w	r2, #1
70003690:	bf04      	itt	eq
70003692:	ea20 73e0 	biceq.w	r3, r0, r0, asr #31
70003696:	930c      	streq	r3, [sp, #48]	; 0x30
70003698:	f43f aded 	beq.w	70003276 <_vfprintf_r+0x14a2>
7000369c:	e5e5      	b.n	7000326a <_vfprintf_r+0x1496>
7000369e:	222d      	movs	r2, #45	; 0x2d
700036a0:	425b      	negs	r3, r3
700036a2:	f88d 2561 	strb.w	r2, [sp, #1377]	; 0x561
700036a6:	e5c9      	b.n	7000323c <_vfprintf_r+0x1468>
700036a8:	b977      	cbnz	r7, 700036c8 <_vfprintf_r+0x18f4>
700036aa:	9b0a      	ldr	r3, [sp, #40]	; 0x28
700036ac:	f013 0f01 	tst.w	r3, #1
700036b0:	d10a      	bne.n	700036c8 <_vfprintf_r+0x18f4>
700036b2:	f04f 0c01 	mov.w	ip, #1
700036b6:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
700036ba:	f8cd c040 	str.w	ip, [sp, #64]	; 0x40
700036be:	e5da      	b.n	70003276 <_vfprintf_r+0x14a2>
700036c0:	f50d 62ac 	add.w	r2, sp, #1376	; 0x560
700036c4:	3202      	adds	r2, #2
700036c6:	e5c5      	b.n	70003254 <_vfprintf_r+0x1480>
700036c8:	3702      	adds	r7, #2
700036ca:	2166      	movs	r1, #102	; 0x66
700036cc:	ea27 72e7 	bic.w	r2, r7, r7, asr #31
700036d0:	9710      	str	r7, [sp, #64]	; 0x40
700036d2:	9116      	str	r1, [sp, #88]	; 0x58
700036d4:	920c      	str	r2, [sp, #48]	; 0x30
700036d6:	e5ce      	b.n	70003276 <_vfprintf_r+0x14a2>
700036d8:	700082a8 	.word	0x700082a8

700036dc <vfprintf>:
700036dc:	b410      	push	{r4}
700036de:	f248 5444 	movw	r4, #34116	; 0x8544
700036e2:	f2c7 0400 	movt	r4, #28672	; 0x7000
700036e6:	468c      	mov	ip, r1
700036e8:	4613      	mov	r3, r2
700036ea:	4601      	mov	r1, r0
700036ec:	4662      	mov	r2, ip
700036ee:	6820      	ldr	r0, [r4, #0]
700036f0:	bc10      	pop	{r4}
700036f2:	f7fe bb6f 	b.w	70001dd4 <_vfprintf_r>
700036f6:	bf00      	nop

700036f8 <__swsetup_r>:
700036f8:	b570      	push	{r4, r5, r6, lr}
700036fa:	f248 5544 	movw	r5, #34116	; 0x8544
700036fe:	f2c7 0500 	movt	r5, #28672	; 0x7000
70003702:	4606      	mov	r6, r0
70003704:	460c      	mov	r4, r1
70003706:	6828      	ldr	r0, [r5, #0]
70003708:	b110      	cbz	r0, 70003710 <__swsetup_r+0x18>
7000370a:	6983      	ldr	r3, [r0, #24]
7000370c:	2b00      	cmp	r3, #0
7000370e:	d036      	beq.n	7000377e <__swsetup_r+0x86>
70003710:	f248 330c 	movw	r3, #33548	; 0x830c
70003714:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003718:	429c      	cmp	r4, r3
7000371a:	d038      	beq.n	7000378e <__swsetup_r+0x96>
7000371c:	f248 332c 	movw	r3, #33580	; 0x832c
70003720:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003724:	429c      	cmp	r4, r3
70003726:	d041      	beq.n	700037ac <__swsetup_r+0xb4>
70003728:	f248 334c 	movw	r3, #33612	; 0x834c
7000372c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003730:	429c      	cmp	r4, r3
70003732:	bf04      	itt	eq
70003734:	682b      	ldreq	r3, [r5, #0]
70003736:	68dc      	ldreq	r4, [r3, #12]
70003738:	89a2      	ldrh	r2, [r4, #12]
7000373a:	4611      	mov	r1, r2
7000373c:	b293      	uxth	r3, r2
7000373e:	f013 0f08 	tst.w	r3, #8
70003742:	4618      	mov	r0, r3
70003744:	bf18      	it	ne
70003746:	6922      	ldrne	r2, [r4, #16]
70003748:	d033      	beq.n	700037b2 <__swsetup_r+0xba>
7000374a:	b31a      	cbz	r2, 70003794 <__swsetup_r+0x9c>
7000374c:	f013 0101 	ands.w	r1, r3, #1
70003750:	d007      	beq.n	70003762 <__swsetup_r+0x6a>
70003752:	6963      	ldr	r3, [r4, #20]
70003754:	2100      	movs	r1, #0
70003756:	60a1      	str	r1, [r4, #8]
70003758:	425b      	negs	r3, r3
7000375a:	61a3      	str	r3, [r4, #24]
7000375c:	b142      	cbz	r2, 70003770 <__swsetup_r+0x78>
7000375e:	2000      	movs	r0, #0
70003760:	bd70      	pop	{r4, r5, r6, pc}
70003762:	f013 0f02 	tst.w	r3, #2
70003766:	bf08      	it	eq
70003768:	6961      	ldreq	r1, [r4, #20]
7000376a:	60a1      	str	r1, [r4, #8]
7000376c:	2a00      	cmp	r2, #0
7000376e:	d1f6      	bne.n	7000375e <__swsetup_r+0x66>
70003770:	89a3      	ldrh	r3, [r4, #12]
70003772:	f013 0f80 	tst.w	r3, #128	; 0x80
70003776:	d0f2      	beq.n	7000375e <__swsetup_r+0x66>
70003778:	f04f 30ff 	mov.w	r0, #4294967295
7000377c:	bd70      	pop	{r4, r5, r6, pc}
7000377e:	f001 f98b 	bl	70004a98 <__sinit>
70003782:	f248 330c 	movw	r3, #33548	; 0x830c
70003786:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000378a:	429c      	cmp	r4, r3
7000378c:	d1c6      	bne.n	7000371c <__swsetup_r+0x24>
7000378e:	682b      	ldr	r3, [r5, #0]
70003790:	685c      	ldr	r4, [r3, #4]
70003792:	e7d1      	b.n	70003738 <__swsetup_r+0x40>
70003794:	f403 7120 	and.w	r1, r3, #640	; 0x280
70003798:	f5b1 7f00 	cmp.w	r1, #512	; 0x200
7000379c:	d0d6      	beq.n	7000374c <__swsetup_r+0x54>
7000379e:	4630      	mov	r0, r6
700037a0:	4621      	mov	r1, r4
700037a2:	f001 fd01 	bl	700051a8 <__smakebuf_r>
700037a6:	89a3      	ldrh	r3, [r4, #12]
700037a8:	6922      	ldr	r2, [r4, #16]
700037aa:	e7cf      	b.n	7000374c <__swsetup_r+0x54>
700037ac:	682b      	ldr	r3, [r5, #0]
700037ae:	689c      	ldr	r4, [r3, #8]
700037b0:	e7c2      	b.n	70003738 <__swsetup_r+0x40>
700037b2:	f013 0f10 	tst.w	r3, #16
700037b6:	d0df      	beq.n	70003778 <__swsetup_r+0x80>
700037b8:	f013 0f04 	tst.w	r3, #4
700037bc:	bf08      	it	eq
700037be:	6922      	ldreq	r2, [r4, #16]
700037c0:	d017      	beq.n	700037f2 <__swsetup_r+0xfa>
700037c2:	6b61      	ldr	r1, [r4, #52]	; 0x34
700037c4:	b151      	cbz	r1, 700037dc <__swsetup_r+0xe4>
700037c6:	f104 0344 	add.w	r3, r4, #68	; 0x44
700037ca:	4299      	cmp	r1, r3
700037cc:	d003      	beq.n	700037d6 <__swsetup_r+0xde>
700037ce:	4630      	mov	r0, r6
700037d0:	f001 f9e6 	bl	70004ba0 <_free_r>
700037d4:	89a2      	ldrh	r2, [r4, #12]
700037d6:	b290      	uxth	r0, r2
700037d8:	2300      	movs	r3, #0
700037da:	6363      	str	r3, [r4, #52]	; 0x34
700037dc:	6922      	ldr	r2, [r4, #16]
700037de:	f64f 71db 	movw	r1, #65499	; 0xffdb
700037e2:	f2c0 0100 	movt	r1, #0
700037e6:	2300      	movs	r3, #0
700037e8:	ea00 0101 	and.w	r1, r0, r1
700037ec:	6063      	str	r3, [r4, #4]
700037ee:	81a1      	strh	r1, [r4, #12]
700037f0:	6022      	str	r2, [r4, #0]
700037f2:	f041 0308 	orr.w	r3, r1, #8
700037f6:	81a3      	strh	r3, [r4, #12]
700037f8:	b29b      	uxth	r3, r3
700037fa:	e7a6      	b.n	7000374a <__swsetup_r+0x52>
700037fc:	0000      	lsls	r0, r0, #0
	...

70003800 <quorem>:
70003800:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
70003804:	6903      	ldr	r3, [r0, #16]
70003806:	690e      	ldr	r6, [r1, #16]
70003808:	4682      	mov	sl, r0
7000380a:	4689      	mov	r9, r1
7000380c:	429e      	cmp	r6, r3
7000380e:	f300 8083 	bgt.w	70003918 <quorem+0x118>
70003812:	1cf2      	adds	r2, r6, #3
70003814:	f101 0514 	add.w	r5, r1, #20
70003818:	f100 0414 	add.w	r4, r0, #20
7000381c:	3e01      	subs	r6, #1
7000381e:	0092      	lsls	r2, r2, #2
70003820:	188b      	adds	r3, r1, r2
70003822:	1812      	adds	r2, r2, r0
70003824:	f103 0804 	add.w	r8, r3, #4
70003828:	6859      	ldr	r1, [r3, #4]
7000382a:	6850      	ldr	r0, [r2, #4]
7000382c:	3101      	adds	r1, #1
7000382e:	f003 fb7b 	bl	70006f28 <__aeabi_uidiv>
70003832:	4607      	mov	r7, r0
70003834:	2800      	cmp	r0, #0
70003836:	d039      	beq.n	700038ac <quorem+0xac>
70003838:	2300      	movs	r3, #0
7000383a:	469c      	mov	ip, r3
7000383c:	461a      	mov	r2, r3
7000383e:	58e9      	ldr	r1, [r5, r3]
70003840:	58e0      	ldr	r0, [r4, r3]
70003842:	fa1f fe81 	uxth.w	lr, r1
70003846:	ea4f 4b11 	mov.w	fp, r1, lsr #16
7000384a:	b281      	uxth	r1, r0
7000384c:	fb0e ce07 	mla	lr, lr, r7, ip
70003850:	1851      	adds	r1, r2, r1
70003852:	fb0b fc07 	mul.w	ip, fp, r7
70003856:	eb0c 4c1e 	add.w	ip, ip, lr, lsr #16
7000385a:	fa1f fe8e 	uxth.w	lr, lr
7000385e:	ebce 0101 	rsb	r1, lr, r1
70003862:	fa1f f28c 	uxth.w	r2, ip
70003866:	ea4f 4c1c 	mov.w	ip, ip, lsr #16
7000386a:	ebc2 4210 	rsb	r2, r2, r0, lsr #16
7000386e:	fa1f fe81 	uxth.w	lr, r1
70003872:	eb02 4221 	add.w	r2, r2, r1, asr #16
70003876:	ea4e 4102 	orr.w	r1, lr, r2, lsl #16
7000387a:	50e1      	str	r1, [r4, r3]
7000387c:	3304      	adds	r3, #4
7000387e:	1412      	asrs	r2, r2, #16
70003880:	1959      	adds	r1, r3, r5
70003882:	4588      	cmp	r8, r1
70003884:	d2db      	bcs.n	7000383e <quorem+0x3e>
70003886:	1d32      	adds	r2, r6, #4
70003888:	eb0a 0382 	add.w	r3, sl, r2, lsl #2
7000388c:	6859      	ldr	r1, [r3, #4]
7000388e:	b969      	cbnz	r1, 700038ac <quorem+0xac>
70003890:	429c      	cmp	r4, r3
70003892:	d209      	bcs.n	700038a8 <quorem+0xa8>
70003894:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
70003898:	b112      	cbz	r2, 700038a0 <quorem+0xa0>
7000389a:	e005      	b.n	700038a8 <quorem+0xa8>
7000389c:	681a      	ldr	r2, [r3, #0]
7000389e:	b91a      	cbnz	r2, 700038a8 <quorem+0xa8>
700038a0:	3b04      	subs	r3, #4
700038a2:	3e01      	subs	r6, #1
700038a4:	429c      	cmp	r4, r3
700038a6:	d3f9      	bcc.n	7000389c <quorem+0x9c>
700038a8:	f8ca 6010 	str.w	r6, [sl, #16]
700038ac:	4649      	mov	r1, r9
700038ae:	4650      	mov	r0, sl
700038b0:	f002 f9e8 	bl	70005c84 <__mcmp>
700038b4:	2800      	cmp	r0, #0
700038b6:	db2c      	blt.n	70003912 <quorem+0x112>
700038b8:	2300      	movs	r3, #0
700038ba:	3701      	adds	r7, #1
700038bc:	469c      	mov	ip, r3
700038be:	58ea      	ldr	r2, [r5, r3]
700038c0:	58e0      	ldr	r0, [r4, r3]
700038c2:	b291      	uxth	r1, r2
700038c4:	0c12      	lsrs	r2, r2, #16
700038c6:	fa1f f980 	uxth.w	r9, r0
700038ca:	ebc2 4210 	rsb	r2, r2, r0, lsr #16
700038ce:	ebc1 0109 	rsb	r1, r1, r9
700038d2:	4461      	add	r1, ip
700038d4:	eb02 4221 	add.w	r2, r2, r1, asr #16
700038d8:	b289      	uxth	r1, r1
700038da:	ea41 4102 	orr.w	r1, r1, r2, lsl #16
700038de:	50e1      	str	r1, [r4, r3]
700038e0:	3304      	adds	r3, #4
700038e2:	ea4f 4c22 	mov.w	ip, r2, asr #16
700038e6:	195a      	adds	r2, r3, r5
700038e8:	4590      	cmp	r8, r2
700038ea:	d2e8      	bcs.n	700038be <quorem+0xbe>
700038ec:	1d32      	adds	r2, r6, #4
700038ee:	eb0a 0382 	add.w	r3, sl, r2, lsl #2
700038f2:	6859      	ldr	r1, [r3, #4]
700038f4:	b969      	cbnz	r1, 70003912 <quorem+0x112>
700038f6:	429c      	cmp	r4, r3
700038f8:	d209      	bcs.n	7000390e <quorem+0x10e>
700038fa:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
700038fe:	b112      	cbz	r2, 70003906 <quorem+0x106>
70003900:	e005      	b.n	7000390e <quorem+0x10e>
70003902:	681a      	ldr	r2, [r3, #0]
70003904:	b91a      	cbnz	r2, 7000390e <quorem+0x10e>
70003906:	3b04      	subs	r3, #4
70003908:	3e01      	subs	r6, #1
7000390a:	429c      	cmp	r4, r3
7000390c:	d3f9      	bcc.n	70003902 <quorem+0x102>
7000390e:	f8ca 6010 	str.w	r6, [sl, #16]
70003912:	4638      	mov	r0, r7
70003914:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
70003918:	2000      	movs	r0, #0
7000391a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
7000391e:	bf00      	nop

70003920 <_dtoa_r>:
70003920:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
70003924:	6a46      	ldr	r6, [r0, #36]	; 0x24
70003926:	b0a1      	sub	sp, #132	; 0x84
70003928:	4604      	mov	r4, r0
7000392a:	4690      	mov	r8, r2
7000392c:	4699      	mov	r9, r3
7000392e:	9d2d      	ldr	r5, [sp, #180]	; 0xb4
70003930:	2e00      	cmp	r6, #0
70003932:	f000 8423 	beq.w	7000417c <_dtoa_r+0x85c>
70003936:	6832      	ldr	r2, [r6, #0]
70003938:	b182      	cbz	r2, 7000395c <_dtoa_r+0x3c>
7000393a:	6a61      	ldr	r1, [r4, #36]	; 0x24
7000393c:	f04f 0c01 	mov.w	ip, #1
70003940:	6876      	ldr	r6, [r6, #4]
70003942:	4620      	mov	r0, r4
70003944:	680b      	ldr	r3, [r1, #0]
70003946:	6056      	str	r6, [r2, #4]
70003948:	684a      	ldr	r2, [r1, #4]
7000394a:	4619      	mov	r1, r3
7000394c:	fa0c f202 	lsl.w	r2, ip, r2
70003950:	609a      	str	r2, [r3, #8]
70003952:	f002 fad1 	bl	70005ef8 <_Bfree>
70003956:	6a63      	ldr	r3, [r4, #36]	; 0x24
70003958:	2200      	movs	r2, #0
7000395a:	601a      	str	r2, [r3, #0]
7000395c:	f1b9 0600 	subs.w	r6, r9, #0
70003960:	db38      	blt.n	700039d4 <_dtoa_r+0xb4>
70003962:	2300      	movs	r3, #0
70003964:	602b      	str	r3, [r5, #0]
70003966:	f240 0300 	movw	r3, #0
7000396a:	f6c7 73f0 	movt	r3, #32752	; 0x7ff0
7000396e:	461a      	mov	r2, r3
70003970:	ea06 0303 	and.w	r3, r6, r3
70003974:	4293      	cmp	r3, r2
70003976:	d017      	beq.n	700039a8 <_dtoa_r+0x88>
70003978:	2200      	movs	r2, #0
7000397a:	2300      	movs	r3, #0
7000397c:	4640      	mov	r0, r8
7000397e:	4649      	mov	r1, r9
70003980:	e9cd 8906 	strd	r8, r9, [sp, #24]
70003984:	f004 f82e 	bl	700079e4 <__aeabi_dcmpeq>
70003988:	2800      	cmp	r0, #0
7000398a:	d029      	beq.n	700039e0 <_dtoa_r+0xc0>
7000398c:	982c      	ldr	r0, [sp, #176]	; 0xb0
7000398e:	2301      	movs	r3, #1
70003990:	992e      	ldr	r1, [sp, #184]	; 0xb8
70003992:	6003      	str	r3, [r0, #0]
70003994:	2900      	cmp	r1, #0
70003996:	f000 80d0 	beq.w	70003b3a <_dtoa_r+0x21a>
7000399a:	4b79      	ldr	r3, [pc, #484]	; (70003b80 <_dtoa_r+0x260>)
7000399c:	1e58      	subs	r0, r3, #1
7000399e:	9a2e      	ldr	r2, [sp, #184]	; 0xb8
700039a0:	6013      	str	r3, [r2, #0]
700039a2:	b021      	add	sp, #132	; 0x84
700039a4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
700039a8:	982c      	ldr	r0, [sp, #176]	; 0xb0
700039aa:	f242 730f 	movw	r3, #9999	; 0x270f
700039ae:	6003      	str	r3, [r0, #0]
700039b0:	f1b8 0f00 	cmp.w	r8, #0
700039b4:	f000 8095 	beq.w	70003ae2 <_dtoa_r+0x1c2>
700039b8:	f248 3008 	movw	r0, #33544	; 0x8308
700039bc:	f2c7 0000 	movt	r0, #28672	; 0x7000
700039c0:	992e      	ldr	r1, [sp, #184]	; 0xb8
700039c2:	2900      	cmp	r1, #0
700039c4:	d0ed      	beq.n	700039a2 <_dtoa_r+0x82>
700039c6:	78c2      	ldrb	r2, [r0, #3]
700039c8:	1cc3      	adds	r3, r0, #3
700039ca:	2a00      	cmp	r2, #0
700039cc:	d0e7      	beq.n	7000399e <_dtoa_r+0x7e>
700039ce:	f100 0308 	add.w	r3, r0, #8
700039d2:	e7e4      	b.n	7000399e <_dtoa_r+0x7e>
700039d4:	f026 4600 	bic.w	r6, r6, #2147483648	; 0x80000000
700039d8:	2301      	movs	r3, #1
700039da:	46b1      	mov	r9, r6
700039dc:	602b      	str	r3, [r5, #0]
700039de:	e7c2      	b.n	70003966 <_dtoa_r+0x46>
700039e0:	4620      	mov	r0, r4
700039e2:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
700039e6:	a91e      	add	r1, sp, #120	; 0x78
700039e8:	9100      	str	r1, [sp, #0]
700039ea:	a91f      	add	r1, sp, #124	; 0x7c
700039ec:	9101      	str	r1, [sp, #4]
700039ee:	f002 fad5 	bl	70005f9c <__d2b>
700039f2:	f3c6 550a 	ubfx	r5, r6, #20, #11
700039f6:	4683      	mov	fp, r0
700039f8:	2d00      	cmp	r5, #0
700039fa:	d07e      	beq.n	70003afa <_dtoa_r+0x1da>
700039fc:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
70003a00:	f5a5 757e 	sub.w	r5, r5, #1016	; 0x3f8
70003a04:	9f1f      	ldr	r7, [sp, #124]	; 0x7c
70003a06:	3d07      	subs	r5, #7
70003a08:	f021 437f 	bic.w	r3, r1, #4278190080	; 0xff000000
70003a0c:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
70003a10:	f043 517e 	orr.w	r1, r3, #1065353216	; 0x3f800000
70003a14:	2300      	movs	r3, #0
70003a16:	f441 01e0 	orr.w	r1, r1, #7340032	; 0x700000
70003a1a:	9319      	str	r3, [sp, #100]	; 0x64
70003a1c:	f240 0300 	movw	r3, #0
70003a20:	2200      	movs	r2, #0
70003a22:	f6c3 73f8 	movt	r3, #16376	; 0x3ff8
70003a26:	f003 fbc1 	bl	700071ac <__aeabi_dsub>
70003a2a:	a34f      	add	r3, pc, #316	; (adr r3, 70003b68 <_dtoa_r+0x248>)
70003a2c:	e9d3 2300 	ldrd	r2, r3, [r3]
70003a30:	f003 fd70 	bl	70007514 <__aeabi_dmul>
70003a34:	a34e      	add	r3, pc, #312	; (adr r3, 70003b70 <_dtoa_r+0x250>)
70003a36:	e9d3 2300 	ldrd	r2, r3, [r3]
70003a3a:	f003 fbb9 	bl	700071b0 <__adddf3>
70003a3e:	e9cd 0108 	strd	r0, r1, [sp, #32]
70003a42:	4628      	mov	r0, r5
70003a44:	f003 fd00 	bl	70007448 <__aeabi_i2d>
70003a48:	a34b      	add	r3, pc, #300	; (adr r3, 70003b78 <_dtoa_r+0x258>)
70003a4a:	e9d3 2300 	ldrd	r2, r3, [r3]
70003a4e:	f003 fd61 	bl	70007514 <__aeabi_dmul>
70003a52:	4602      	mov	r2, r0
70003a54:	460b      	mov	r3, r1
70003a56:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
70003a5a:	f003 fba9 	bl	700071b0 <__adddf3>
70003a5e:	e9cd 0108 	strd	r0, r1, [sp, #32]
70003a62:	f003 fff1 	bl	70007a48 <__aeabi_d2iz>
70003a66:	2200      	movs	r2, #0
70003a68:	2300      	movs	r3, #0
70003a6a:	4606      	mov	r6, r0
70003a6c:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
70003a70:	f003 ffc2 	bl	700079f8 <__aeabi_dcmplt>
70003a74:	b140      	cbz	r0, 70003a88 <_dtoa_r+0x168>
70003a76:	4630      	mov	r0, r6
70003a78:	f003 fce6 	bl	70007448 <__aeabi_i2d>
70003a7c:	e9dd 2308 	ldrd	r2, r3, [sp, #32]
70003a80:	f003 ffb0 	bl	700079e4 <__aeabi_dcmpeq>
70003a84:	b900      	cbnz	r0, 70003a88 <_dtoa_r+0x168>
70003a86:	3e01      	subs	r6, #1
70003a88:	2e16      	cmp	r6, #22
70003a8a:	d95b      	bls.n	70003b44 <_dtoa_r+0x224>
70003a8c:	2301      	movs	r3, #1
70003a8e:	9318      	str	r3, [sp, #96]	; 0x60
70003a90:	3f01      	subs	r7, #1
70003a92:	ebb7 0a05 	subs.w	sl, r7, r5
70003a96:	bf42      	ittt	mi
70003a98:	f1ca 0a00 	rsbmi	sl, sl, #0
70003a9c:	f8cd a03c 	strmi.w	sl, [sp, #60]	; 0x3c
70003aa0:	f04f 0a00 	movmi.w	sl, #0
70003aa4:	d401      	bmi.n	70003aaa <_dtoa_r+0x18a>
70003aa6:	2200      	movs	r2, #0
70003aa8:	920f      	str	r2, [sp, #60]	; 0x3c
70003aaa:	2e00      	cmp	r6, #0
70003aac:	f2c0 8371 	blt.w	70004192 <_dtoa_r+0x872>
70003ab0:	44b2      	add	sl, r6
70003ab2:	2300      	movs	r3, #0
70003ab4:	9617      	str	r6, [sp, #92]	; 0x5c
70003ab6:	9315      	str	r3, [sp, #84]	; 0x54
70003ab8:	9b2a      	ldr	r3, [sp, #168]	; 0xa8
70003aba:	2b09      	cmp	r3, #9
70003abc:	d862      	bhi.n	70003b84 <_dtoa_r+0x264>
70003abe:	2b05      	cmp	r3, #5
70003ac0:	f340 8677 	ble.w	700047b2 <_dtoa_r+0xe92>
70003ac4:	982a      	ldr	r0, [sp, #168]	; 0xa8
70003ac6:	2700      	movs	r7, #0
70003ac8:	3804      	subs	r0, #4
70003aca:	902a      	str	r0, [sp, #168]	; 0xa8
70003acc:	992a      	ldr	r1, [sp, #168]	; 0xa8
70003ace:	1e8b      	subs	r3, r1, #2
70003ad0:	2b03      	cmp	r3, #3
70003ad2:	f200 83dd 	bhi.w	70004290 <_dtoa_r+0x970>
70003ad6:	e8df f013 	tbh	[pc, r3, lsl #1]
70003ada:	03a5      	.short	0x03a5
70003adc:	03d503d8 	.word	0x03d503d8
70003ae0:	03c4      	.short	0x03c4
70003ae2:	f026 467f 	bic.w	r6, r6, #4278190080	; 0xff000000
70003ae6:	f426 0670 	bic.w	r6, r6, #15728640	; 0xf00000
70003aea:	2e00      	cmp	r6, #0
70003aec:	f47f af64 	bne.w	700039b8 <_dtoa_r+0x98>
70003af0:	f248 20fc 	movw	r0, #33532	; 0x82fc
70003af4:	f2c7 0000 	movt	r0, #28672	; 0x7000
70003af8:	e762      	b.n	700039c0 <_dtoa_r+0xa0>
70003afa:	9f1f      	ldr	r7, [sp, #124]	; 0x7c
70003afc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
70003afe:	18fb      	adds	r3, r7, r3
70003b00:	f503 6386 	add.w	r3, r3, #1072	; 0x430
70003b04:	1c9d      	adds	r5, r3, #2
70003b06:	2d20      	cmp	r5, #32
70003b08:	bfdc      	itt	le
70003b0a:	f1c5 0020 	rsble	r0, r5, #32
70003b0e:	fa08 f000 	lslle.w	r0, r8, r0
70003b12:	dd08      	ble.n	70003b26 <_dtoa_r+0x206>
70003b14:	3b1e      	subs	r3, #30
70003b16:	f1c5 0240 	rsb	r2, r5, #64	; 0x40
70003b1a:	fa16 f202 	lsls.w	r2, r6, r2
70003b1e:	fa28 f303 	lsr.w	r3, r8, r3
70003b22:	ea42 0003 	orr.w	r0, r2, r3
70003b26:	f003 fc7f 	bl	70007428 <__aeabi_ui2d>
70003b2a:	f5a5 6586 	sub.w	r5, r5, #1072	; 0x430
70003b2e:	2201      	movs	r2, #1
70003b30:	3d03      	subs	r5, #3
70003b32:	9219      	str	r2, [sp, #100]	; 0x64
70003b34:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
70003b38:	e770      	b.n	70003a1c <_dtoa_r+0xfc>
70003b3a:	f248 20f8 	movw	r0, #33528	; 0x82f8
70003b3e:	f2c7 0000 	movt	r0, #28672	; 0x7000
70003b42:	e72e      	b.n	700039a2 <_dtoa_r+0x82>
70003b44:	f248 33b0 	movw	r3, #33712	; 0x83b0
70003b48:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
70003b4c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003b50:	eb03 03c6 	add.w	r3, r3, r6, lsl #3
70003b54:	e9d3 2300 	ldrd	r2, r3, [r3]
70003b58:	f003 ff4e 	bl	700079f8 <__aeabi_dcmplt>
70003b5c:	2800      	cmp	r0, #0
70003b5e:	f040 8320 	bne.w	700041a2 <_dtoa_r+0x882>
70003b62:	9018      	str	r0, [sp, #96]	; 0x60
70003b64:	e794      	b.n	70003a90 <_dtoa_r+0x170>
70003b66:	bf00      	nop
70003b68:	636f4361 	.word	0x636f4361
70003b6c:	3fd287a7 	.word	0x3fd287a7
70003b70:	8b60c8b3 	.word	0x8b60c8b3
70003b74:	3fc68a28 	.word	0x3fc68a28
70003b78:	509f79fb 	.word	0x509f79fb
70003b7c:	3fd34413 	.word	0x3fd34413
70003b80:	700082f9 	.word	0x700082f9
70003b84:	2300      	movs	r3, #0
70003b86:	f04f 30ff 	mov.w	r0, #4294967295
70003b8a:	461f      	mov	r7, r3
70003b8c:	2101      	movs	r1, #1
70003b8e:	932a      	str	r3, [sp, #168]	; 0xa8
70003b90:	9011      	str	r0, [sp, #68]	; 0x44
70003b92:	9116      	str	r1, [sp, #88]	; 0x58
70003b94:	9008      	str	r0, [sp, #32]
70003b96:	932b      	str	r3, [sp, #172]	; 0xac
70003b98:	6a65      	ldr	r5, [r4, #36]	; 0x24
70003b9a:	2300      	movs	r3, #0
70003b9c:	606b      	str	r3, [r5, #4]
70003b9e:	4620      	mov	r0, r4
70003ba0:	6869      	ldr	r1, [r5, #4]
70003ba2:	f002 f9c5 	bl	70005f30 <_Balloc>
70003ba6:	6a63      	ldr	r3, [r4, #36]	; 0x24
70003ba8:	6028      	str	r0, [r5, #0]
70003baa:	681b      	ldr	r3, [r3, #0]
70003bac:	9310      	str	r3, [sp, #64]	; 0x40
70003bae:	2f00      	cmp	r7, #0
70003bb0:	f000 815b 	beq.w	70003e6a <_dtoa_r+0x54a>
70003bb4:	2e00      	cmp	r6, #0
70003bb6:	f340 842a 	ble.w	7000440e <_dtoa_r+0xaee>
70003bba:	f248 33b0 	movw	r3, #33712	; 0x83b0
70003bbe:	f006 020f 	and.w	r2, r6, #15
70003bc2:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003bc6:	1135      	asrs	r5, r6, #4
70003bc8:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
70003bcc:	f015 0f10 	tst.w	r5, #16
70003bd0:	e9d3 0100 	ldrd	r0, r1, [r3]
70003bd4:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70003bd8:	f000 82e7 	beq.w	700041aa <_dtoa_r+0x88a>
70003bdc:	f248 4388 	movw	r3, #33928	; 0x8488
70003be0:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
70003be4:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003be8:	f005 050f 	and.w	r5, r5, #15
70003bec:	f04f 0803 	mov.w	r8, #3
70003bf0:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
70003bf4:	f003 fdb8 	bl	70007768 <__aeabi_ddiv>
70003bf8:	e9cd 0112 	strd	r0, r1, [sp, #72]	; 0x48
70003bfc:	b1bd      	cbz	r5, 70003c2e <_dtoa_r+0x30e>
70003bfe:	f248 4788 	movw	r7, #33928	; 0x8488
70003c02:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
70003c06:	f2c7 0700 	movt	r7, #28672	; 0x7000
70003c0a:	f015 0f01 	tst.w	r5, #1
70003c0e:	4610      	mov	r0, r2
70003c10:	4619      	mov	r1, r3
70003c12:	d007      	beq.n	70003c24 <_dtoa_r+0x304>
70003c14:	e9d7 2300 	ldrd	r2, r3, [r7]
70003c18:	f108 0801 	add.w	r8, r8, #1
70003c1c:	f003 fc7a 	bl	70007514 <__aeabi_dmul>
70003c20:	4602      	mov	r2, r0
70003c22:	460b      	mov	r3, r1
70003c24:	3708      	adds	r7, #8
70003c26:	106d      	asrs	r5, r5, #1
70003c28:	d1ef      	bne.n	70003c0a <_dtoa_r+0x2ea>
70003c2a:	e9cd 230c 	strd	r2, r3, [sp, #48]	; 0x30
70003c2e:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
70003c32:	e9dd 0112 	ldrd	r0, r1, [sp, #72]	; 0x48
70003c36:	f003 fd97 	bl	70007768 <__aeabi_ddiv>
70003c3a:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70003c3e:	9918      	ldr	r1, [sp, #96]	; 0x60
70003c40:	2900      	cmp	r1, #0
70003c42:	f000 80de 	beq.w	70003e02 <_dtoa_r+0x4e2>
70003c46:	f240 0300 	movw	r3, #0
70003c4a:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003c4e:	2200      	movs	r2, #0
70003c50:	f6c3 73f0 	movt	r3, #16368	; 0x3ff0
70003c54:	f04f 0500 	mov.w	r5, #0
70003c58:	f003 fece 	bl	700079f8 <__aeabi_dcmplt>
70003c5c:	b108      	cbz	r0, 70003c62 <_dtoa_r+0x342>
70003c5e:	f04f 0501 	mov.w	r5, #1
70003c62:	9a08      	ldr	r2, [sp, #32]
70003c64:	2a00      	cmp	r2, #0
70003c66:	bfd4      	ite	le
70003c68:	2500      	movle	r5, #0
70003c6a:	f005 0501 	andgt.w	r5, r5, #1
70003c6e:	2d00      	cmp	r5, #0
70003c70:	f000 80c7 	beq.w	70003e02 <_dtoa_r+0x4e2>
70003c74:	9b11      	ldr	r3, [sp, #68]	; 0x44
70003c76:	2b00      	cmp	r3, #0
70003c78:	f340 80f5 	ble.w	70003e66 <_dtoa_r+0x546>
70003c7c:	f240 0300 	movw	r3, #0
70003c80:	2200      	movs	r2, #0
70003c82:	f2c4 0324 	movt	r3, #16420	; 0x4024
70003c86:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003c8a:	f003 fc43 	bl	70007514 <__aeabi_dmul>
70003c8e:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70003c92:	f108 0001 	add.w	r0, r8, #1
70003c96:	1e71      	subs	r1, r6, #1
70003c98:	9112      	str	r1, [sp, #72]	; 0x48
70003c9a:	f003 fbd5 	bl	70007448 <__aeabi_i2d>
70003c9e:	4602      	mov	r2, r0
70003ca0:	460b      	mov	r3, r1
70003ca2:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003ca6:	f003 fc35 	bl	70007514 <__aeabi_dmul>
70003caa:	f240 0300 	movw	r3, #0
70003cae:	2200      	movs	r2, #0
70003cb0:	f2c4 031c 	movt	r3, #16412	; 0x401c
70003cb4:	f003 fa7c 	bl	700071b0 <__adddf3>
70003cb8:	f8dd c044 	ldr.w	ip, [sp, #68]	; 0x44
70003cbc:	4680      	mov	r8, r0
70003cbe:	f1a1 7950 	sub.w	r9, r1, #54525952	; 0x3400000
70003cc2:	9b16      	ldr	r3, [sp, #88]	; 0x58
70003cc4:	2b00      	cmp	r3, #0
70003cc6:	f000 83ad 	beq.w	70004424 <_dtoa_r+0xb04>
70003cca:	f248 33b0 	movw	r3, #33712	; 0x83b0
70003cce:	f240 0100 	movw	r1, #0
70003cd2:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003cd6:	2000      	movs	r0, #0
70003cd8:	eb03 03cc 	add.w	r3, r3, ip, lsl #3
70003cdc:	f6c3 71e0 	movt	r1, #16352	; 0x3fe0
70003ce0:	f8cd c00c 	str.w	ip, [sp, #12]
70003ce4:	e953 2302 	ldrd	r2, r3, [r3, #-8]
70003ce8:	f003 fd3e 	bl	70007768 <__aeabi_ddiv>
70003cec:	4642      	mov	r2, r8
70003cee:	464b      	mov	r3, r9
70003cf0:	9d10      	ldr	r5, [sp, #64]	; 0x40
70003cf2:	f003 fa5b 	bl	700071ac <__aeabi_dsub>
70003cf6:	4680      	mov	r8, r0
70003cf8:	4689      	mov	r9, r1
70003cfa:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003cfe:	f003 fea3 	bl	70007a48 <__aeabi_d2iz>
70003d02:	4607      	mov	r7, r0
70003d04:	f003 fba0 	bl	70007448 <__aeabi_i2d>
70003d08:	4602      	mov	r2, r0
70003d0a:	460b      	mov	r3, r1
70003d0c:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003d10:	f003 fa4c 	bl	700071ac <__aeabi_dsub>
70003d14:	f107 0330 	add.w	r3, r7, #48	; 0x30
70003d18:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70003d1c:	4640      	mov	r0, r8
70003d1e:	f805 3b01 	strb.w	r3, [r5], #1
70003d22:	4649      	mov	r1, r9
70003d24:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
70003d28:	f003 fe84 	bl	70007a34 <__aeabi_dcmpgt>
70003d2c:	2800      	cmp	r0, #0
70003d2e:	f040 8213 	bne.w	70004158 <_dtoa_r+0x838>
70003d32:	f240 0100 	movw	r1, #0
70003d36:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
70003d3a:	2000      	movs	r0, #0
70003d3c:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
70003d40:	f003 fa34 	bl	700071ac <__aeabi_dsub>
70003d44:	4602      	mov	r2, r0
70003d46:	460b      	mov	r3, r1
70003d48:	4640      	mov	r0, r8
70003d4a:	4649      	mov	r1, r9
70003d4c:	f003 fe72 	bl	70007a34 <__aeabi_dcmpgt>
70003d50:	f8dd c00c 	ldr.w	ip, [sp, #12]
70003d54:	2800      	cmp	r0, #0
70003d56:	f040 83e7 	bne.w	70004528 <_dtoa_r+0xc08>
70003d5a:	f1bc 0f01 	cmp.w	ip, #1
70003d5e:	f340 8082 	ble.w	70003e66 <_dtoa_r+0x546>
70003d62:	f8cd b068 	str.w	fp, [sp, #104]	; 0x68
70003d66:	2701      	movs	r7, #1
70003d68:	f8cd a070 	str.w	sl, [sp, #112]	; 0x70
70003d6c:	961d      	str	r6, [sp, #116]	; 0x74
70003d6e:	4666      	mov	r6, ip
70003d70:	e9dd ab0c 	ldrd	sl, fp, [sp, #48]	; 0x30
70003d74:	940c      	str	r4, [sp, #48]	; 0x30
70003d76:	e010      	b.n	70003d9a <_dtoa_r+0x47a>
70003d78:	f240 0100 	movw	r1, #0
70003d7c:	2000      	movs	r0, #0
70003d7e:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
70003d82:	f003 fa13 	bl	700071ac <__aeabi_dsub>
70003d86:	4642      	mov	r2, r8
70003d88:	464b      	mov	r3, r9
70003d8a:	f003 fe35 	bl	700079f8 <__aeabi_dcmplt>
70003d8e:	2800      	cmp	r0, #0
70003d90:	f040 83c7 	bne.w	70004522 <_dtoa_r+0xc02>
70003d94:	42b7      	cmp	r7, r6
70003d96:	f280 848b 	bge.w	700046b0 <_dtoa_r+0xd90>
70003d9a:	f240 0300 	movw	r3, #0
70003d9e:	4640      	mov	r0, r8
70003da0:	4649      	mov	r1, r9
70003da2:	2200      	movs	r2, #0
70003da4:	f2c4 0324 	movt	r3, #16420	; 0x4024
70003da8:	3501      	adds	r5, #1
70003daa:	f003 fbb3 	bl	70007514 <__aeabi_dmul>
70003dae:	f240 0300 	movw	r3, #0
70003db2:	2200      	movs	r2, #0
70003db4:	f2c4 0324 	movt	r3, #16420	; 0x4024
70003db8:	4680      	mov	r8, r0
70003dba:	4689      	mov	r9, r1
70003dbc:	4650      	mov	r0, sl
70003dbe:	4659      	mov	r1, fp
70003dc0:	f003 fba8 	bl	70007514 <__aeabi_dmul>
70003dc4:	468b      	mov	fp, r1
70003dc6:	4682      	mov	sl, r0
70003dc8:	f003 fe3e 	bl	70007a48 <__aeabi_d2iz>
70003dcc:	4604      	mov	r4, r0
70003dce:	f003 fb3b 	bl	70007448 <__aeabi_i2d>
70003dd2:	3430      	adds	r4, #48	; 0x30
70003dd4:	4602      	mov	r2, r0
70003dd6:	460b      	mov	r3, r1
70003dd8:	4650      	mov	r0, sl
70003dda:	4659      	mov	r1, fp
70003ddc:	f003 f9e6 	bl	700071ac <__aeabi_dsub>
70003de0:	9a10      	ldr	r2, [sp, #64]	; 0x40
70003de2:	464b      	mov	r3, r9
70003de4:	55d4      	strb	r4, [r2, r7]
70003de6:	4642      	mov	r2, r8
70003de8:	3701      	adds	r7, #1
70003dea:	4682      	mov	sl, r0
70003dec:	468b      	mov	fp, r1
70003dee:	f003 fe03 	bl	700079f8 <__aeabi_dcmplt>
70003df2:	4652      	mov	r2, sl
70003df4:	465b      	mov	r3, fp
70003df6:	2800      	cmp	r0, #0
70003df8:	d0be      	beq.n	70003d78 <_dtoa_r+0x458>
70003dfa:	f8dd b068 	ldr.w	fp, [sp, #104]	; 0x68
70003dfe:	9c0c      	ldr	r4, [sp, #48]	; 0x30
70003e00:	e1aa      	b.n	70004158 <_dtoa_r+0x838>
70003e02:	4640      	mov	r0, r8
70003e04:	f003 fb20 	bl	70007448 <__aeabi_i2d>
70003e08:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
70003e0c:	f003 fb82 	bl	70007514 <__aeabi_dmul>
70003e10:	f240 0300 	movw	r3, #0
70003e14:	2200      	movs	r2, #0
70003e16:	f2c4 031c 	movt	r3, #16412	; 0x401c
70003e1a:	f003 f9c9 	bl	700071b0 <__adddf3>
70003e1e:	9a08      	ldr	r2, [sp, #32]
70003e20:	f1a1 7550 	sub.w	r5, r1, #54525952	; 0x3400000
70003e24:	4680      	mov	r8, r0
70003e26:	46a9      	mov	r9, r5
70003e28:	2a00      	cmp	r2, #0
70003e2a:	f040 82ec 	bne.w	70004406 <_dtoa_r+0xae6>
70003e2e:	f240 0300 	movw	r3, #0
70003e32:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003e36:	2200      	movs	r2, #0
70003e38:	f2c4 0314 	movt	r3, #16404	; 0x4014
70003e3c:	f003 f9b6 	bl	700071ac <__aeabi_dsub>
70003e40:	4642      	mov	r2, r8
70003e42:	462b      	mov	r3, r5
70003e44:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70003e48:	f003 fdf4 	bl	70007a34 <__aeabi_dcmpgt>
70003e4c:	2800      	cmp	r0, #0
70003e4e:	f040 824a 	bne.w	700042e6 <_dtoa_r+0x9c6>
70003e52:	4642      	mov	r2, r8
70003e54:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70003e58:	f105 4300 	add.w	r3, r5, #2147483648	; 0x80000000
70003e5c:	f003 fdcc 	bl	700079f8 <__aeabi_dcmplt>
70003e60:	2800      	cmp	r0, #0
70003e62:	f040 81d5 	bne.w	70004210 <_dtoa_r+0x8f0>
70003e66:	e9dd 8906 	ldrd	r8, r9, [sp, #24]
70003e6a:	9b1e      	ldr	r3, [sp, #120]	; 0x78
70003e6c:	ea6f 0703 	mvn.w	r7, r3
70003e70:	ea4f 77d7 	mov.w	r7, r7, lsr #31
70003e74:	2e0e      	cmp	r6, #14
70003e76:	bfcc      	ite	gt
70003e78:	2700      	movgt	r7, #0
70003e7a:	f007 0701 	andle.w	r7, r7, #1
70003e7e:	2f00      	cmp	r7, #0
70003e80:	f000 80b7 	beq.w	70003ff2 <_dtoa_r+0x6d2>
70003e84:	982b      	ldr	r0, [sp, #172]	; 0xac
70003e86:	f248 33b0 	movw	r3, #33712	; 0x83b0
70003e8a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70003e8e:	9908      	ldr	r1, [sp, #32]
70003e90:	eb03 03c6 	add.w	r3, r3, r6, lsl #3
70003e94:	0fc2      	lsrs	r2, r0, #31
70003e96:	2900      	cmp	r1, #0
70003e98:	bfcc      	ite	gt
70003e9a:	2200      	movgt	r2, #0
70003e9c:	f002 0201 	andle.w	r2, r2, #1
70003ea0:	e9d3 0100 	ldrd	r0, r1, [r3]
70003ea4:	e9cd 0104 	strd	r0, r1, [sp, #16]
70003ea8:	2a00      	cmp	r2, #0
70003eaa:	f040 81a0 	bne.w	700041ee <_dtoa_r+0x8ce>
70003eae:	4602      	mov	r2, r0
70003eb0:	460b      	mov	r3, r1
70003eb2:	4640      	mov	r0, r8
70003eb4:	4649      	mov	r1, r9
70003eb6:	f003 fc57 	bl	70007768 <__aeabi_ddiv>
70003eba:	9d10      	ldr	r5, [sp, #64]	; 0x40
70003ebc:	f003 fdc4 	bl	70007a48 <__aeabi_d2iz>
70003ec0:	4682      	mov	sl, r0
70003ec2:	f003 fac1 	bl	70007448 <__aeabi_i2d>
70003ec6:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
70003eca:	f003 fb23 	bl	70007514 <__aeabi_dmul>
70003ece:	4602      	mov	r2, r0
70003ed0:	460b      	mov	r3, r1
70003ed2:	4640      	mov	r0, r8
70003ed4:	4649      	mov	r1, r9
70003ed6:	f003 f969 	bl	700071ac <__aeabi_dsub>
70003eda:	f10a 0330 	add.w	r3, sl, #48	; 0x30
70003ede:	f805 3b01 	strb.w	r3, [r5], #1
70003ee2:	9a08      	ldr	r2, [sp, #32]
70003ee4:	2a01      	cmp	r2, #1
70003ee6:	4680      	mov	r8, r0
70003ee8:	4689      	mov	r9, r1
70003eea:	d052      	beq.n	70003f92 <_dtoa_r+0x672>
70003eec:	f240 0300 	movw	r3, #0
70003ef0:	2200      	movs	r2, #0
70003ef2:	f2c4 0324 	movt	r3, #16420	; 0x4024
70003ef6:	f003 fb0d 	bl	70007514 <__aeabi_dmul>
70003efa:	2200      	movs	r2, #0
70003efc:	2300      	movs	r3, #0
70003efe:	e9cd 0106 	strd	r0, r1, [sp, #24]
70003f02:	f003 fd6f 	bl	700079e4 <__aeabi_dcmpeq>
70003f06:	2800      	cmp	r0, #0
70003f08:	f040 81eb 	bne.w	700042e2 <_dtoa_r+0x9c2>
70003f0c:	9810      	ldr	r0, [sp, #64]	; 0x40
70003f0e:	f04f 0801 	mov.w	r8, #1
70003f12:	f8cd b02c 	str.w	fp, [sp, #44]	; 0x2c
70003f16:	46a3      	mov	fp, r4
70003f18:	1c87      	adds	r7, r0, #2
70003f1a:	960f      	str	r6, [sp, #60]	; 0x3c
70003f1c:	f8dd 9020 	ldr.w	r9, [sp, #32]
70003f20:	e9dd 4506 	ldrd	r4, r5, [sp, #24]
70003f24:	e00a      	b.n	70003f3c <_dtoa_r+0x61c>
70003f26:	f003 faf5 	bl	70007514 <__aeabi_dmul>
70003f2a:	2200      	movs	r2, #0
70003f2c:	2300      	movs	r3, #0
70003f2e:	4604      	mov	r4, r0
70003f30:	460d      	mov	r5, r1
70003f32:	f003 fd57 	bl	700079e4 <__aeabi_dcmpeq>
70003f36:	2800      	cmp	r0, #0
70003f38:	f040 81ce 	bne.w	700042d8 <_dtoa_r+0x9b8>
70003f3c:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
70003f40:	4620      	mov	r0, r4
70003f42:	4629      	mov	r1, r5
70003f44:	f108 0801 	add.w	r8, r8, #1
70003f48:	f003 fc0e 	bl	70007768 <__aeabi_ddiv>
70003f4c:	463e      	mov	r6, r7
70003f4e:	f003 fd7b 	bl	70007a48 <__aeabi_d2iz>
70003f52:	4682      	mov	sl, r0
70003f54:	f003 fa78 	bl	70007448 <__aeabi_i2d>
70003f58:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
70003f5c:	f003 fada 	bl	70007514 <__aeabi_dmul>
70003f60:	4602      	mov	r2, r0
70003f62:	460b      	mov	r3, r1
70003f64:	4620      	mov	r0, r4
70003f66:	4629      	mov	r1, r5
70003f68:	f003 f920 	bl	700071ac <__aeabi_dsub>
70003f6c:	2200      	movs	r2, #0
70003f6e:	f10a 0c30 	add.w	ip, sl, #48	; 0x30
70003f72:	f807 cc01 	strb.w	ip, [r7, #-1]
70003f76:	3701      	adds	r7, #1
70003f78:	45c1      	cmp	r9, r8
70003f7a:	f240 0300 	movw	r3, #0
70003f7e:	f2c4 0324 	movt	r3, #16420	; 0x4024
70003f82:	d1d0      	bne.n	70003f26 <_dtoa_r+0x606>
70003f84:	4635      	mov	r5, r6
70003f86:	465c      	mov	r4, fp
70003f88:	9e0f      	ldr	r6, [sp, #60]	; 0x3c
70003f8a:	4680      	mov	r8, r0
70003f8c:	f8dd b02c 	ldr.w	fp, [sp, #44]	; 0x2c
70003f90:	4689      	mov	r9, r1
70003f92:	4642      	mov	r2, r8
70003f94:	464b      	mov	r3, r9
70003f96:	4640      	mov	r0, r8
70003f98:	4649      	mov	r1, r9
70003f9a:	f003 f909 	bl	700071b0 <__adddf3>
70003f9e:	4680      	mov	r8, r0
70003fa0:	4689      	mov	r9, r1
70003fa2:	4642      	mov	r2, r8
70003fa4:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
70003fa8:	464b      	mov	r3, r9
70003faa:	f003 fd25 	bl	700079f8 <__aeabi_dcmplt>
70003fae:	b960      	cbnz	r0, 70003fca <_dtoa_r+0x6aa>
70003fb0:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
70003fb4:	4642      	mov	r2, r8
70003fb6:	464b      	mov	r3, r9
70003fb8:	f003 fd14 	bl	700079e4 <__aeabi_dcmpeq>
70003fbc:	2800      	cmp	r0, #0
70003fbe:	f000 8190 	beq.w	700042e2 <_dtoa_r+0x9c2>
70003fc2:	f01a 0f01 	tst.w	sl, #1
70003fc6:	f000 818c 	beq.w	700042e2 <_dtoa_r+0x9c2>
70003fca:	9910      	ldr	r1, [sp, #64]	; 0x40
70003fcc:	e000      	b.n	70003fd0 <_dtoa_r+0x6b0>
70003fce:	461d      	mov	r5, r3
70003fd0:	f815 2c01 	ldrb.w	r2, [r5, #-1]
70003fd4:	1e6b      	subs	r3, r5, #1
70003fd6:	2a39      	cmp	r2, #57	; 0x39
70003fd8:	f040 8367 	bne.w	700046aa <_dtoa_r+0xd8a>
70003fdc:	428b      	cmp	r3, r1
70003fde:	d1f6      	bne.n	70003fce <_dtoa_r+0x6ae>
70003fe0:	9910      	ldr	r1, [sp, #64]	; 0x40
70003fe2:	2330      	movs	r3, #48	; 0x30
70003fe4:	3601      	adds	r6, #1
70003fe6:	2231      	movs	r2, #49	; 0x31
70003fe8:	700b      	strb	r3, [r1, #0]
70003fea:	9b10      	ldr	r3, [sp, #64]	; 0x40
70003fec:	701a      	strb	r2, [r3, #0]
70003fee:	9612      	str	r6, [sp, #72]	; 0x48
70003ff0:	e0b2      	b.n	70004158 <_dtoa_r+0x838>
70003ff2:	9a16      	ldr	r2, [sp, #88]	; 0x58
70003ff4:	2a00      	cmp	r2, #0
70003ff6:	f040 80df 	bne.w	700041b8 <_dtoa_r+0x898>
70003ffa:	9f15      	ldr	r7, [sp, #84]	; 0x54
70003ffc:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
70003ffe:	920c      	str	r2, [sp, #48]	; 0x30
70004000:	2d00      	cmp	r5, #0
70004002:	bfd4      	ite	le
70004004:	2300      	movle	r3, #0
70004006:	2301      	movgt	r3, #1
70004008:	f1ba 0f00 	cmp.w	sl, #0
7000400c:	bfd4      	ite	le
7000400e:	2300      	movle	r3, #0
70004010:	f003 0301 	andgt.w	r3, r3, #1
70004014:	b14b      	cbz	r3, 7000402a <_dtoa_r+0x70a>
70004016:	45aa      	cmp	sl, r5
70004018:	bfb4      	ite	lt
7000401a:	4653      	movlt	r3, sl
7000401c:	462b      	movge	r3, r5
7000401e:	980f      	ldr	r0, [sp, #60]	; 0x3c
70004020:	ebc3 0a0a 	rsb	sl, r3, sl
70004024:	1aed      	subs	r5, r5, r3
70004026:	1ac0      	subs	r0, r0, r3
70004028:	900f      	str	r0, [sp, #60]	; 0x3c
7000402a:	9915      	ldr	r1, [sp, #84]	; 0x54
7000402c:	2900      	cmp	r1, #0
7000402e:	dd1c      	ble.n	7000406a <_dtoa_r+0x74a>
70004030:	9a16      	ldr	r2, [sp, #88]	; 0x58
70004032:	2a00      	cmp	r2, #0
70004034:	f000 82e9 	beq.w	7000460a <_dtoa_r+0xcea>
70004038:	2f00      	cmp	r7, #0
7000403a:	dd12      	ble.n	70004062 <_dtoa_r+0x742>
7000403c:	990c      	ldr	r1, [sp, #48]	; 0x30
7000403e:	463a      	mov	r2, r7
70004040:	4620      	mov	r0, r4
70004042:	f002 f9d5 	bl	700063f0 <__pow5mult>
70004046:	465a      	mov	r2, fp
70004048:	900c      	str	r0, [sp, #48]	; 0x30
7000404a:	4620      	mov	r0, r4
7000404c:	990c      	ldr	r1, [sp, #48]	; 0x30
7000404e:	f002 f8e7 	bl	70006220 <__multiply>
70004052:	4659      	mov	r1, fp
70004054:	4603      	mov	r3, r0
70004056:	4620      	mov	r0, r4
70004058:	9303      	str	r3, [sp, #12]
7000405a:	f001 ff4d 	bl	70005ef8 <_Bfree>
7000405e:	9b03      	ldr	r3, [sp, #12]
70004060:	469b      	mov	fp, r3
70004062:	9b15      	ldr	r3, [sp, #84]	; 0x54
70004064:	1bda      	subs	r2, r3, r7
70004066:	f040 8311 	bne.w	7000468c <_dtoa_r+0xd6c>
7000406a:	2101      	movs	r1, #1
7000406c:	4620      	mov	r0, r4
7000406e:	f002 f971 	bl	70006354 <__i2b>
70004072:	9006      	str	r0, [sp, #24]
70004074:	9817      	ldr	r0, [sp, #92]	; 0x5c
70004076:	2800      	cmp	r0, #0
70004078:	dd05      	ble.n	70004086 <_dtoa_r+0x766>
7000407a:	9906      	ldr	r1, [sp, #24]
7000407c:	4620      	mov	r0, r4
7000407e:	9a17      	ldr	r2, [sp, #92]	; 0x5c
70004080:	f002 f9b6 	bl	700063f0 <__pow5mult>
70004084:	9006      	str	r0, [sp, #24]
70004086:	992a      	ldr	r1, [sp, #168]	; 0xa8
70004088:	2901      	cmp	r1, #1
7000408a:	f340 810a 	ble.w	700042a2 <_dtoa_r+0x982>
7000408e:	2700      	movs	r7, #0
70004090:	9b17      	ldr	r3, [sp, #92]	; 0x5c
70004092:	2b00      	cmp	r3, #0
70004094:	f040 8261 	bne.w	7000455a <_dtoa_r+0xc3a>
70004098:	2301      	movs	r3, #1
7000409a:	4453      	add	r3, sl
7000409c:	f013 031f 	ands.w	r3, r3, #31
700040a0:	f040 812a 	bne.w	700042f8 <_dtoa_r+0x9d8>
700040a4:	231c      	movs	r3, #28
700040a6:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
700040a8:	449a      	add	sl, r3
700040aa:	18ed      	adds	r5, r5, r3
700040ac:	18d2      	adds	r2, r2, r3
700040ae:	920f      	str	r2, [sp, #60]	; 0x3c
700040b0:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
700040b2:	2b00      	cmp	r3, #0
700040b4:	dd05      	ble.n	700040c2 <_dtoa_r+0x7a2>
700040b6:	4659      	mov	r1, fp
700040b8:	461a      	mov	r2, r3
700040ba:	4620      	mov	r0, r4
700040bc:	f002 f852 	bl	70006164 <__lshift>
700040c0:	4683      	mov	fp, r0
700040c2:	f1ba 0f00 	cmp.w	sl, #0
700040c6:	dd05      	ble.n	700040d4 <_dtoa_r+0x7b4>
700040c8:	9906      	ldr	r1, [sp, #24]
700040ca:	4652      	mov	r2, sl
700040cc:	4620      	mov	r0, r4
700040ce:	f002 f849 	bl	70006164 <__lshift>
700040d2:	9006      	str	r0, [sp, #24]
700040d4:	9818      	ldr	r0, [sp, #96]	; 0x60
700040d6:	2800      	cmp	r0, #0
700040d8:	f040 8229 	bne.w	7000452e <_dtoa_r+0xc0e>
700040dc:	982a      	ldr	r0, [sp, #168]	; 0xa8
700040de:	9908      	ldr	r1, [sp, #32]
700040e0:	2802      	cmp	r0, #2
700040e2:	bfd4      	ite	le
700040e4:	2300      	movle	r3, #0
700040e6:	2301      	movgt	r3, #1
700040e8:	2900      	cmp	r1, #0
700040ea:	bfcc      	ite	gt
700040ec:	2300      	movgt	r3, #0
700040ee:	f003 0301 	andle.w	r3, r3, #1
700040f2:	2b00      	cmp	r3, #0
700040f4:	f000 810c 	beq.w	70004310 <_dtoa_r+0x9f0>
700040f8:	2900      	cmp	r1, #0
700040fa:	f040 808c 	bne.w	70004216 <_dtoa_r+0x8f6>
700040fe:	2205      	movs	r2, #5
70004100:	9906      	ldr	r1, [sp, #24]
70004102:	9b08      	ldr	r3, [sp, #32]
70004104:	4620      	mov	r0, r4
70004106:	f002 f92f 	bl	70006368 <__multadd>
7000410a:	9006      	str	r0, [sp, #24]
7000410c:	4658      	mov	r0, fp
7000410e:	9906      	ldr	r1, [sp, #24]
70004110:	f001 fdb8 	bl	70005c84 <__mcmp>
70004114:	2800      	cmp	r0, #0
70004116:	dd7e      	ble.n	70004216 <_dtoa_r+0x8f6>
70004118:	9d10      	ldr	r5, [sp, #64]	; 0x40
7000411a:	3601      	adds	r6, #1
7000411c:	2700      	movs	r7, #0
7000411e:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
70004122:	2331      	movs	r3, #49	; 0x31
70004124:	f805 3b01 	strb.w	r3, [r5], #1
70004128:	9906      	ldr	r1, [sp, #24]
7000412a:	4620      	mov	r0, r4
7000412c:	f001 fee4 	bl	70005ef8 <_Bfree>
70004130:	f1ba 0f00 	cmp.w	sl, #0
70004134:	f000 80d5 	beq.w	700042e2 <_dtoa_r+0x9c2>
70004138:	1e3b      	subs	r3, r7, #0
7000413a:	bf18      	it	ne
7000413c:	2301      	movne	r3, #1
7000413e:	4557      	cmp	r7, sl
70004140:	bf0c      	ite	eq
70004142:	2300      	moveq	r3, #0
70004144:	f003 0301 	andne.w	r3, r3, #1
70004148:	2b00      	cmp	r3, #0
7000414a:	f040 80d0 	bne.w	700042ee <_dtoa_r+0x9ce>
7000414e:	4651      	mov	r1, sl
70004150:	4620      	mov	r0, r4
70004152:	f001 fed1 	bl	70005ef8 <_Bfree>
70004156:	9612      	str	r6, [sp, #72]	; 0x48
70004158:	4620      	mov	r0, r4
7000415a:	4659      	mov	r1, fp
7000415c:	f001 fecc 	bl	70005ef8 <_Bfree>
70004160:	9a12      	ldr	r2, [sp, #72]	; 0x48
70004162:	1c53      	adds	r3, r2, #1
70004164:	2200      	movs	r2, #0
70004166:	702a      	strb	r2, [r5, #0]
70004168:	982c      	ldr	r0, [sp, #176]	; 0xb0
7000416a:	992e      	ldr	r1, [sp, #184]	; 0xb8
7000416c:	6003      	str	r3, [r0, #0]
7000416e:	2900      	cmp	r1, #0
70004170:	f000 81d4 	beq.w	7000451c <_dtoa_r+0xbfc>
70004174:	9a2e      	ldr	r2, [sp, #184]	; 0xb8
70004176:	9810      	ldr	r0, [sp, #64]	; 0x40
70004178:	6015      	str	r5, [r2, #0]
7000417a:	e412      	b.n	700039a2 <_dtoa_r+0x82>
7000417c:	2010      	movs	r0, #16
7000417e:	f001 f889 	bl	70005294 <malloc>
70004182:	60c6      	str	r6, [r0, #12]
70004184:	6046      	str	r6, [r0, #4]
70004186:	6086      	str	r6, [r0, #8]
70004188:	6006      	str	r6, [r0, #0]
7000418a:	4606      	mov	r6, r0
7000418c:	6260      	str	r0, [r4, #36]	; 0x24
7000418e:	f7ff bbd2 	b.w	70003936 <_dtoa_r+0x16>
70004192:	980f      	ldr	r0, [sp, #60]	; 0x3c
70004194:	4271      	negs	r1, r6
70004196:	2200      	movs	r2, #0
70004198:	9115      	str	r1, [sp, #84]	; 0x54
7000419a:	1b80      	subs	r0, r0, r6
7000419c:	9217      	str	r2, [sp, #92]	; 0x5c
7000419e:	900f      	str	r0, [sp, #60]	; 0x3c
700041a0:	e48a      	b.n	70003ab8 <_dtoa_r+0x198>
700041a2:	2100      	movs	r1, #0
700041a4:	3e01      	subs	r6, #1
700041a6:	9118      	str	r1, [sp, #96]	; 0x60
700041a8:	e472      	b.n	70003a90 <_dtoa_r+0x170>
700041aa:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
700041ae:	f04f 0802 	mov.w	r8, #2
700041b2:	e9cd 2312 	strd	r2, r3, [sp, #72]	; 0x48
700041b6:	e521      	b.n	70003bfc <_dtoa_r+0x2dc>
700041b8:	982a      	ldr	r0, [sp, #168]	; 0xa8
700041ba:	2801      	cmp	r0, #1
700041bc:	f340 826c 	ble.w	70004698 <_dtoa_r+0xd78>
700041c0:	9a08      	ldr	r2, [sp, #32]
700041c2:	9815      	ldr	r0, [sp, #84]	; 0x54
700041c4:	1e53      	subs	r3, r2, #1
700041c6:	4298      	cmp	r0, r3
700041c8:	f2c0 8258 	blt.w	7000467c <_dtoa_r+0xd5c>
700041cc:	1ac7      	subs	r7, r0, r3
700041ce:	9b08      	ldr	r3, [sp, #32]
700041d0:	2b00      	cmp	r3, #0
700041d2:	bfa8      	it	ge
700041d4:	9d0f      	ldrge	r5, [sp, #60]	; 0x3c
700041d6:	f2c0 8273 	blt.w	700046c0 <_dtoa_r+0xda0>
700041da:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
700041dc:	4620      	mov	r0, r4
700041de:	2101      	movs	r1, #1
700041e0:	449a      	add	sl, r3
700041e2:	18d2      	adds	r2, r2, r3
700041e4:	920f      	str	r2, [sp, #60]	; 0x3c
700041e6:	f002 f8b5 	bl	70006354 <__i2b>
700041ea:	900c      	str	r0, [sp, #48]	; 0x30
700041ec:	e708      	b.n	70004000 <_dtoa_r+0x6e0>
700041ee:	9b08      	ldr	r3, [sp, #32]
700041f0:	b973      	cbnz	r3, 70004210 <_dtoa_r+0x8f0>
700041f2:	f240 0300 	movw	r3, #0
700041f6:	2200      	movs	r2, #0
700041f8:	f2c4 0314 	movt	r3, #16404	; 0x4014
700041fc:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
70004200:	f003 f988 	bl	70007514 <__aeabi_dmul>
70004204:	4642      	mov	r2, r8
70004206:	464b      	mov	r3, r9
70004208:	f003 fc0a 	bl	70007a20 <__aeabi_dcmpge>
7000420c:	2800      	cmp	r0, #0
7000420e:	d06a      	beq.n	700042e6 <_dtoa_r+0x9c6>
70004210:	2200      	movs	r2, #0
70004212:	9206      	str	r2, [sp, #24]
70004214:	920c      	str	r2, [sp, #48]	; 0x30
70004216:	9b2b      	ldr	r3, [sp, #172]	; 0xac
70004218:	2700      	movs	r7, #0
7000421a:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
7000421e:	43de      	mvns	r6, r3
70004220:	9d10      	ldr	r5, [sp, #64]	; 0x40
70004222:	e781      	b.n	70004128 <_dtoa_r+0x808>
70004224:	2100      	movs	r1, #0
70004226:	9116      	str	r1, [sp, #88]	; 0x58
70004228:	982b      	ldr	r0, [sp, #172]	; 0xac
7000422a:	2800      	cmp	r0, #0
7000422c:	f340 819f 	ble.w	7000456e <_dtoa_r+0xc4e>
70004230:	982b      	ldr	r0, [sp, #172]	; 0xac
70004232:	4601      	mov	r1, r0
70004234:	9011      	str	r0, [sp, #68]	; 0x44
70004236:	9008      	str	r0, [sp, #32]
70004238:	6a65      	ldr	r5, [r4, #36]	; 0x24
7000423a:	2200      	movs	r2, #0
7000423c:	2917      	cmp	r1, #23
7000423e:	606a      	str	r2, [r5, #4]
70004240:	f240 82ab 	bls.w	7000479a <_dtoa_r+0xe7a>
70004244:	2304      	movs	r3, #4
70004246:	005b      	lsls	r3, r3, #1
70004248:	3201      	adds	r2, #1
7000424a:	f103 0014 	add.w	r0, r3, #20
7000424e:	4288      	cmp	r0, r1
70004250:	d9f9      	bls.n	70004246 <_dtoa_r+0x926>
70004252:	9b08      	ldr	r3, [sp, #32]
70004254:	606a      	str	r2, [r5, #4]
70004256:	2b0e      	cmp	r3, #14
70004258:	bf8c      	ite	hi
7000425a:	2700      	movhi	r7, #0
7000425c:	f007 0701 	andls.w	r7, r7, #1
70004260:	e49d      	b.n	70003b9e <_dtoa_r+0x27e>
70004262:	2201      	movs	r2, #1
70004264:	9216      	str	r2, [sp, #88]	; 0x58
70004266:	9b2b      	ldr	r3, [sp, #172]	; 0xac
70004268:	18f3      	adds	r3, r6, r3
7000426a:	9311      	str	r3, [sp, #68]	; 0x44
7000426c:	1c59      	adds	r1, r3, #1
7000426e:	2900      	cmp	r1, #0
70004270:	bfc8      	it	gt
70004272:	9108      	strgt	r1, [sp, #32]
70004274:	dce0      	bgt.n	70004238 <_dtoa_r+0x918>
70004276:	290e      	cmp	r1, #14
70004278:	bf8c      	ite	hi
7000427a:	2700      	movhi	r7, #0
7000427c:	f007 0701 	andls.w	r7, r7, #1
70004280:	9108      	str	r1, [sp, #32]
70004282:	e489      	b.n	70003b98 <_dtoa_r+0x278>
70004284:	2301      	movs	r3, #1
70004286:	9316      	str	r3, [sp, #88]	; 0x58
70004288:	e7ce      	b.n	70004228 <_dtoa_r+0x908>
7000428a:	2200      	movs	r2, #0
7000428c:	9216      	str	r2, [sp, #88]	; 0x58
7000428e:	e7ea      	b.n	70004266 <_dtoa_r+0x946>
70004290:	f04f 33ff 	mov.w	r3, #4294967295
70004294:	2700      	movs	r7, #0
70004296:	2001      	movs	r0, #1
70004298:	9311      	str	r3, [sp, #68]	; 0x44
7000429a:	9016      	str	r0, [sp, #88]	; 0x58
7000429c:	9308      	str	r3, [sp, #32]
7000429e:	972b      	str	r7, [sp, #172]	; 0xac
700042a0:	e47a      	b.n	70003b98 <_dtoa_r+0x278>
700042a2:	f1b8 0f00 	cmp.w	r8, #0
700042a6:	f47f aef2 	bne.w	7000408e <_dtoa_r+0x76e>
700042aa:	f029 437f 	bic.w	r3, r9, #4278190080	; 0xff000000
700042ae:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
700042b2:	2b00      	cmp	r3, #0
700042b4:	f47f aeeb 	bne.w	7000408e <_dtoa_r+0x76e>
700042b8:	f240 0300 	movw	r3, #0
700042bc:	f6c7 73f0 	movt	r3, #32752	; 0x7ff0
700042c0:	ea09 0303 	and.w	r3, r9, r3
700042c4:	2b00      	cmp	r3, #0
700042c6:	f43f aee2 	beq.w	7000408e <_dtoa_r+0x76e>
700042ca:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
700042cc:	f10a 0a01 	add.w	sl, sl, #1
700042d0:	2701      	movs	r7, #1
700042d2:	3201      	adds	r2, #1
700042d4:	920f      	str	r2, [sp, #60]	; 0x3c
700042d6:	e6db      	b.n	70004090 <_dtoa_r+0x770>
700042d8:	4635      	mov	r5, r6
700042da:	465c      	mov	r4, fp
700042dc:	9e0f      	ldr	r6, [sp, #60]	; 0x3c
700042de:	f8dd b02c 	ldr.w	fp, [sp, #44]	; 0x2c
700042e2:	9612      	str	r6, [sp, #72]	; 0x48
700042e4:	e738      	b.n	70004158 <_dtoa_r+0x838>
700042e6:	2000      	movs	r0, #0
700042e8:	9006      	str	r0, [sp, #24]
700042ea:	900c      	str	r0, [sp, #48]	; 0x30
700042ec:	e714      	b.n	70004118 <_dtoa_r+0x7f8>
700042ee:	4639      	mov	r1, r7
700042f0:	4620      	mov	r0, r4
700042f2:	f001 fe01 	bl	70005ef8 <_Bfree>
700042f6:	e72a      	b.n	7000414e <_dtoa_r+0x82e>
700042f8:	f1c3 0320 	rsb	r3, r3, #32
700042fc:	2b04      	cmp	r3, #4
700042fe:	f340 8254 	ble.w	700047aa <_dtoa_r+0xe8a>
70004302:	990f      	ldr	r1, [sp, #60]	; 0x3c
70004304:	3b04      	subs	r3, #4
70004306:	449a      	add	sl, r3
70004308:	18ed      	adds	r5, r5, r3
7000430a:	18c9      	adds	r1, r1, r3
7000430c:	910f      	str	r1, [sp, #60]	; 0x3c
7000430e:	e6cf      	b.n	700040b0 <_dtoa_r+0x790>
70004310:	9916      	ldr	r1, [sp, #88]	; 0x58
70004312:	2900      	cmp	r1, #0
70004314:	f000 8131 	beq.w	7000457a <_dtoa_r+0xc5a>
70004318:	2d00      	cmp	r5, #0
7000431a:	dd05      	ble.n	70004328 <_dtoa_r+0xa08>
7000431c:	990c      	ldr	r1, [sp, #48]	; 0x30
7000431e:	462a      	mov	r2, r5
70004320:	4620      	mov	r0, r4
70004322:	f001 ff1f 	bl	70006164 <__lshift>
70004326:	900c      	str	r0, [sp, #48]	; 0x30
70004328:	2f00      	cmp	r7, #0
7000432a:	f040 81ea 	bne.w	70004702 <_dtoa_r+0xde2>
7000432e:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
70004332:	9d10      	ldr	r5, [sp, #64]	; 0x40
70004334:	2301      	movs	r3, #1
70004336:	f008 0001 	and.w	r0, r8, #1
7000433a:	9f0c      	ldr	r7, [sp, #48]	; 0x30
7000433c:	9011      	str	r0, [sp, #68]	; 0x44
7000433e:	950f      	str	r5, [sp, #60]	; 0x3c
70004340:	461d      	mov	r5, r3
70004342:	960c      	str	r6, [sp, #48]	; 0x30
70004344:	9906      	ldr	r1, [sp, #24]
70004346:	4658      	mov	r0, fp
70004348:	f7ff fa5a 	bl	70003800 <quorem>
7000434c:	4639      	mov	r1, r7
7000434e:	3030      	adds	r0, #48	; 0x30
70004350:	900b      	str	r0, [sp, #44]	; 0x2c
70004352:	4658      	mov	r0, fp
70004354:	f001 fc96 	bl	70005c84 <__mcmp>
70004358:	9906      	ldr	r1, [sp, #24]
7000435a:	4652      	mov	r2, sl
7000435c:	4606      	mov	r6, r0
7000435e:	4620      	mov	r0, r4
70004360:	f001 fe84 	bl	7000606c <__mdiff>
70004364:	68c3      	ldr	r3, [r0, #12]
70004366:	4680      	mov	r8, r0
70004368:	2b00      	cmp	r3, #0
7000436a:	d03d      	beq.n	700043e8 <_dtoa_r+0xac8>
7000436c:	f04f 0901 	mov.w	r9, #1
70004370:	4641      	mov	r1, r8
70004372:	4620      	mov	r0, r4
70004374:	f001 fdc0 	bl	70005ef8 <_Bfree>
70004378:	992a      	ldr	r1, [sp, #168]	; 0xa8
7000437a:	ea59 0101 	orrs.w	r1, r9, r1
7000437e:	d103      	bne.n	70004388 <_dtoa_r+0xa68>
70004380:	9a11      	ldr	r2, [sp, #68]	; 0x44
70004382:	2a00      	cmp	r2, #0
70004384:	f000 81eb 	beq.w	7000475e <_dtoa_r+0xe3e>
70004388:	2e00      	cmp	r6, #0
7000438a:	f2c0 819e 	blt.w	700046ca <_dtoa_r+0xdaa>
7000438e:	9a2a      	ldr	r2, [sp, #168]	; 0xa8
70004390:	4332      	orrs	r2, r6
70004392:	d103      	bne.n	7000439c <_dtoa_r+0xa7c>
70004394:	9b11      	ldr	r3, [sp, #68]	; 0x44
70004396:	2b00      	cmp	r3, #0
70004398:	f000 8197 	beq.w	700046ca <_dtoa_r+0xdaa>
7000439c:	f1b9 0f00 	cmp.w	r9, #0
700043a0:	f300 81ce 	bgt.w	70004740 <_dtoa_r+0xe20>
700043a4:	990f      	ldr	r1, [sp, #60]	; 0x3c
700043a6:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
700043a8:	f801 2b01 	strb.w	r2, [r1], #1
700043ac:	9b08      	ldr	r3, [sp, #32]
700043ae:	910f      	str	r1, [sp, #60]	; 0x3c
700043b0:	429d      	cmp	r5, r3
700043b2:	f000 81c2 	beq.w	7000473a <_dtoa_r+0xe1a>
700043b6:	4659      	mov	r1, fp
700043b8:	220a      	movs	r2, #10
700043ba:	2300      	movs	r3, #0
700043bc:	4620      	mov	r0, r4
700043be:	f001 ffd3 	bl	70006368 <__multadd>
700043c2:	4557      	cmp	r7, sl
700043c4:	4639      	mov	r1, r7
700043c6:	4683      	mov	fp, r0
700043c8:	d014      	beq.n	700043f4 <_dtoa_r+0xad4>
700043ca:	220a      	movs	r2, #10
700043cc:	2300      	movs	r3, #0
700043ce:	4620      	mov	r0, r4
700043d0:	3501      	adds	r5, #1
700043d2:	f001 ffc9 	bl	70006368 <__multadd>
700043d6:	4651      	mov	r1, sl
700043d8:	220a      	movs	r2, #10
700043da:	2300      	movs	r3, #0
700043dc:	4607      	mov	r7, r0
700043de:	4620      	mov	r0, r4
700043e0:	f001 ffc2 	bl	70006368 <__multadd>
700043e4:	4682      	mov	sl, r0
700043e6:	e7ad      	b.n	70004344 <_dtoa_r+0xa24>
700043e8:	4658      	mov	r0, fp
700043ea:	4641      	mov	r1, r8
700043ec:	f001 fc4a 	bl	70005c84 <__mcmp>
700043f0:	4681      	mov	r9, r0
700043f2:	e7bd      	b.n	70004370 <_dtoa_r+0xa50>
700043f4:	4620      	mov	r0, r4
700043f6:	220a      	movs	r2, #10
700043f8:	2300      	movs	r3, #0
700043fa:	3501      	adds	r5, #1
700043fc:	f001 ffb4 	bl	70006368 <__multadd>
70004400:	4607      	mov	r7, r0
70004402:	4682      	mov	sl, r0
70004404:	e79e      	b.n	70004344 <_dtoa_r+0xa24>
70004406:	9612      	str	r6, [sp, #72]	; 0x48
70004408:	f8dd c020 	ldr.w	ip, [sp, #32]
7000440c:	e459      	b.n	70003cc2 <_dtoa_r+0x3a2>
7000440e:	4275      	negs	r5, r6
70004410:	2d00      	cmp	r5, #0
70004412:	f040 8101 	bne.w	70004618 <_dtoa_r+0xcf8>
70004416:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
7000441a:	f04f 0802 	mov.w	r8, #2
7000441e:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70004422:	e40c      	b.n	70003c3e <_dtoa_r+0x31e>
70004424:	f248 31b0 	movw	r1, #33712	; 0x83b0
70004428:	4642      	mov	r2, r8
7000442a:	f2c7 0100 	movt	r1, #28672	; 0x7000
7000442e:	464b      	mov	r3, r9
70004430:	eb01 01cc 	add.w	r1, r1, ip, lsl #3
70004434:	f8cd c00c 	str.w	ip, [sp, #12]
70004438:	9d10      	ldr	r5, [sp, #64]	; 0x40
7000443a:	e951 0102 	ldrd	r0, r1, [r1, #-8]
7000443e:	f003 f869 	bl	70007514 <__aeabi_dmul>
70004442:	e9cd 011a 	strd	r0, r1, [sp, #104]	; 0x68
70004446:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
7000444a:	f003 fafd 	bl	70007a48 <__aeabi_d2iz>
7000444e:	4607      	mov	r7, r0
70004450:	f002 fffa 	bl	70007448 <__aeabi_i2d>
70004454:	460b      	mov	r3, r1
70004456:	4602      	mov	r2, r0
70004458:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
7000445c:	f002 fea6 	bl	700071ac <__aeabi_dsub>
70004460:	f107 0330 	add.w	r3, r7, #48	; 0x30
70004464:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70004468:	f805 3b01 	strb.w	r3, [r5], #1
7000446c:	f8dd c00c 	ldr.w	ip, [sp, #12]
70004470:	f1bc 0f01 	cmp.w	ip, #1
70004474:	d029      	beq.n	700044ca <_dtoa_r+0xbaa>
70004476:	46d1      	mov	r9, sl
70004478:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
7000447c:	46b2      	mov	sl, r6
7000447e:	9e10      	ldr	r6, [sp, #64]	; 0x40
70004480:	951c      	str	r5, [sp, #112]	; 0x70
70004482:	2701      	movs	r7, #1
70004484:	4665      	mov	r5, ip
70004486:	46a0      	mov	r8, r4
70004488:	f240 0300 	movw	r3, #0
7000448c:	2200      	movs	r2, #0
7000448e:	f2c4 0324 	movt	r3, #16420	; 0x4024
70004492:	f003 f83f 	bl	70007514 <__aeabi_dmul>
70004496:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
7000449a:	f003 fad5 	bl	70007a48 <__aeabi_d2iz>
7000449e:	4604      	mov	r4, r0
700044a0:	f002 ffd2 	bl	70007448 <__aeabi_i2d>
700044a4:	3430      	adds	r4, #48	; 0x30
700044a6:	4602      	mov	r2, r0
700044a8:	460b      	mov	r3, r1
700044aa:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
700044ae:	f002 fe7d 	bl	700071ac <__aeabi_dsub>
700044b2:	55f4      	strb	r4, [r6, r7]
700044b4:	3701      	adds	r7, #1
700044b6:	42af      	cmp	r7, r5
700044b8:	d1e6      	bne.n	70004488 <_dtoa_r+0xb68>
700044ba:	9d1c      	ldr	r5, [sp, #112]	; 0x70
700044bc:	3f01      	subs	r7, #1
700044be:	4656      	mov	r6, sl
700044c0:	4644      	mov	r4, r8
700044c2:	46ca      	mov	sl, r9
700044c4:	19ed      	adds	r5, r5, r7
700044c6:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
700044ca:	f240 0300 	movw	r3, #0
700044ce:	2200      	movs	r2, #0
700044d0:	f6c3 73e0 	movt	r3, #16352	; 0x3fe0
700044d4:	e9dd 011a 	ldrd	r0, r1, [sp, #104]	; 0x68
700044d8:	f002 fe6a 	bl	700071b0 <__adddf3>
700044dc:	4602      	mov	r2, r0
700044de:	460b      	mov	r3, r1
700044e0:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
700044e4:	f003 faa6 	bl	70007a34 <__aeabi_dcmpgt>
700044e8:	b9f0      	cbnz	r0, 70004528 <_dtoa_r+0xc08>
700044ea:	f240 0100 	movw	r1, #0
700044ee:	e9dd 231a 	ldrd	r2, r3, [sp, #104]	; 0x68
700044f2:	2000      	movs	r0, #0
700044f4:	f6c3 71e0 	movt	r1, #16352	; 0x3fe0
700044f8:	f002 fe58 	bl	700071ac <__aeabi_dsub>
700044fc:	4602      	mov	r2, r0
700044fe:	460b      	mov	r3, r1
70004500:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
70004504:	f003 fa78 	bl	700079f8 <__aeabi_dcmplt>
70004508:	2800      	cmp	r0, #0
7000450a:	f43f acac 	beq.w	70003e66 <_dtoa_r+0x546>
7000450e:	462b      	mov	r3, r5
70004510:	461d      	mov	r5, r3
70004512:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
70004516:	2a30      	cmp	r2, #48	; 0x30
70004518:	d0fa      	beq.n	70004510 <_dtoa_r+0xbf0>
7000451a:	e61d      	b.n	70004158 <_dtoa_r+0x838>
7000451c:	9810      	ldr	r0, [sp, #64]	; 0x40
7000451e:	f7ff ba40 	b.w	700039a2 <_dtoa_r+0x82>
70004522:	f8dd b068 	ldr.w	fp, [sp, #104]	; 0x68
70004526:	9c0c      	ldr	r4, [sp, #48]	; 0x30
70004528:	9e12      	ldr	r6, [sp, #72]	; 0x48
7000452a:	9910      	ldr	r1, [sp, #64]	; 0x40
7000452c:	e550      	b.n	70003fd0 <_dtoa_r+0x6b0>
7000452e:	4658      	mov	r0, fp
70004530:	9906      	ldr	r1, [sp, #24]
70004532:	f001 fba7 	bl	70005c84 <__mcmp>
70004536:	2800      	cmp	r0, #0
70004538:	f6bf add0 	bge.w	700040dc <_dtoa_r+0x7bc>
7000453c:	4659      	mov	r1, fp
7000453e:	4620      	mov	r0, r4
70004540:	220a      	movs	r2, #10
70004542:	2300      	movs	r3, #0
70004544:	f001 ff10 	bl	70006368 <__multadd>
70004548:	9916      	ldr	r1, [sp, #88]	; 0x58
7000454a:	3e01      	subs	r6, #1
7000454c:	4683      	mov	fp, r0
7000454e:	2900      	cmp	r1, #0
70004550:	f040 8119 	bne.w	70004786 <_dtoa_r+0xe66>
70004554:	9a11      	ldr	r2, [sp, #68]	; 0x44
70004556:	9208      	str	r2, [sp, #32]
70004558:	e5c0      	b.n	700040dc <_dtoa_r+0x7bc>
7000455a:	9806      	ldr	r0, [sp, #24]
7000455c:	6903      	ldr	r3, [r0, #16]
7000455e:	eb00 0383 	add.w	r3, r0, r3, lsl #2
70004562:	6918      	ldr	r0, [r3, #16]
70004564:	f001 fb3c 	bl	70005be0 <__hi0bits>
70004568:	f1c0 0320 	rsb	r3, r0, #32
7000456c:	e595      	b.n	7000409a <_dtoa_r+0x77a>
7000456e:	2101      	movs	r1, #1
70004570:	9111      	str	r1, [sp, #68]	; 0x44
70004572:	9108      	str	r1, [sp, #32]
70004574:	912b      	str	r1, [sp, #172]	; 0xac
70004576:	f7ff bb0f 	b.w	70003b98 <_dtoa_r+0x278>
7000457a:	9d10      	ldr	r5, [sp, #64]	; 0x40
7000457c:	46b1      	mov	r9, r6
7000457e:	9f16      	ldr	r7, [sp, #88]	; 0x58
70004580:	46aa      	mov	sl, r5
70004582:	f8dd 8018 	ldr.w	r8, [sp, #24]
70004586:	9e08      	ldr	r6, [sp, #32]
70004588:	e002      	b.n	70004590 <_dtoa_r+0xc70>
7000458a:	f001 feed 	bl	70006368 <__multadd>
7000458e:	4683      	mov	fp, r0
70004590:	4641      	mov	r1, r8
70004592:	4658      	mov	r0, fp
70004594:	f7ff f934 	bl	70003800 <quorem>
70004598:	3501      	adds	r5, #1
7000459a:	220a      	movs	r2, #10
7000459c:	2300      	movs	r3, #0
7000459e:	4659      	mov	r1, fp
700045a0:	f100 0c30 	add.w	ip, r0, #48	; 0x30
700045a4:	f80a c007 	strb.w	ip, [sl, r7]
700045a8:	3701      	adds	r7, #1
700045aa:	4620      	mov	r0, r4
700045ac:	42be      	cmp	r6, r7
700045ae:	dcec      	bgt.n	7000458a <_dtoa_r+0xc6a>
700045b0:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
700045b4:	464e      	mov	r6, r9
700045b6:	2700      	movs	r7, #0
700045b8:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
700045bc:	4659      	mov	r1, fp
700045be:	2201      	movs	r2, #1
700045c0:	4620      	mov	r0, r4
700045c2:	f001 fdcf 	bl	70006164 <__lshift>
700045c6:	9906      	ldr	r1, [sp, #24]
700045c8:	4683      	mov	fp, r0
700045ca:	f001 fb5b 	bl	70005c84 <__mcmp>
700045ce:	2800      	cmp	r0, #0
700045d0:	dd0f      	ble.n	700045f2 <_dtoa_r+0xcd2>
700045d2:	9910      	ldr	r1, [sp, #64]	; 0x40
700045d4:	e000      	b.n	700045d8 <_dtoa_r+0xcb8>
700045d6:	461d      	mov	r5, r3
700045d8:	f815 2c01 	ldrb.w	r2, [r5, #-1]
700045dc:	1e6b      	subs	r3, r5, #1
700045de:	2a39      	cmp	r2, #57	; 0x39
700045e0:	f040 808c 	bne.w	700046fc <_dtoa_r+0xddc>
700045e4:	428b      	cmp	r3, r1
700045e6:	d1f6      	bne.n	700045d6 <_dtoa_r+0xcb6>
700045e8:	9910      	ldr	r1, [sp, #64]	; 0x40
700045ea:	2331      	movs	r3, #49	; 0x31
700045ec:	3601      	adds	r6, #1
700045ee:	700b      	strb	r3, [r1, #0]
700045f0:	e59a      	b.n	70004128 <_dtoa_r+0x808>
700045f2:	d103      	bne.n	700045fc <_dtoa_r+0xcdc>
700045f4:	980b      	ldr	r0, [sp, #44]	; 0x2c
700045f6:	f010 0f01 	tst.w	r0, #1
700045fa:	d1ea      	bne.n	700045d2 <_dtoa_r+0xcb2>
700045fc:	462b      	mov	r3, r5
700045fe:	461d      	mov	r5, r3
70004600:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
70004604:	2a30      	cmp	r2, #48	; 0x30
70004606:	d0fa      	beq.n	700045fe <_dtoa_r+0xcde>
70004608:	e58e      	b.n	70004128 <_dtoa_r+0x808>
7000460a:	4659      	mov	r1, fp
7000460c:	9a15      	ldr	r2, [sp, #84]	; 0x54
7000460e:	4620      	mov	r0, r4
70004610:	f001 feee 	bl	700063f0 <__pow5mult>
70004614:	4683      	mov	fp, r0
70004616:	e528      	b.n	7000406a <_dtoa_r+0x74a>
70004618:	f005 030f 	and.w	r3, r5, #15
7000461c:	f248 32b0 	movw	r2, #33712	; 0x83b0
70004620:	f2c7 0200 	movt	r2, #28672	; 0x7000
70004624:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
70004628:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
7000462c:	e9d3 2300 	ldrd	r2, r3, [r3]
70004630:	f002 ff70 	bl	70007514 <__aeabi_dmul>
70004634:	112d      	asrs	r5, r5, #4
70004636:	bf08      	it	eq
70004638:	f04f 0802 	moveq.w	r8, #2
7000463c:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
70004640:	f43f aafd 	beq.w	70003c3e <_dtoa_r+0x31e>
70004644:	f248 4788 	movw	r7, #33928	; 0x8488
70004648:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
7000464c:	f04f 0802 	mov.w	r8, #2
70004650:	f2c7 0700 	movt	r7, #28672	; 0x7000
70004654:	f015 0f01 	tst.w	r5, #1
70004658:	4610      	mov	r0, r2
7000465a:	4619      	mov	r1, r3
7000465c:	d007      	beq.n	7000466e <_dtoa_r+0xd4e>
7000465e:	e9d7 2300 	ldrd	r2, r3, [r7]
70004662:	f108 0801 	add.w	r8, r8, #1
70004666:	f002 ff55 	bl	70007514 <__aeabi_dmul>
7000466a:	4602      	mov	r2, r0
7000466c:	460b      	mov	r3, r1
7000466e:	3708      	adds	r7, #8
70004670:	106d      	asrs	r5, r5, #1
70004672:	d1ef      	bne.n	70004654 <_dtoa_r+0xd34>
70004674:	e9cd 230c 	strd	r2, r3, [sp, #48]	; 0x30
70004678:	f7ff bae1 	b.w	70003c3e <_dtoa_r+0x31e>
7000467c:	9915      	ldr	r1, [sp, #84]	; 0x54
7000467e:	9a17      	ldr	r2, [sp, #92]	; 0x5c
70004680:	1a5b      	subs	r3, r3, r1
70004682:	18c9      	adds	r1, r1, r3
70004684:	18d2      	adds	r2, r2, r3
70004686:	9115      	str	r1, [sp, #84]	; 0x54
70004688:	9217      	str	r2, [sp, #92]	; 0x5c
7000468a:	e5a0      	b.n	700041ce <_dtoa_r+0x8ae>
7000468c:	4659      	mov	r1, fp
7000468e:	4620      	mov	r0, r4
70004690:	f001 feae 	bl	700063f0 <__pow5mult>
70004694:	4683      	mov	fp, r0
70004696:	e4e8      	b.n	7000406a <_dtoa_r+0x74a>
70004698:	9919      	ldr	r1, [sp, #100]	; 0x64
7000469a:	2900      	cmp	r1, #0
7000469c:	d047      	beq.n	7000472e <_dtoa_r+0xe0e>
7000469e:	f503 6386 	add.w	r3, r3, #1072	; 0x430
700046a2:	9f15      	ldr	r7, [sp, #84]	; 0x54
700046a4:	3303      	adds	r3, #3
700046a6:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
700046a8:	e597      	b.n	700041da <_dtoa_r+0x8ba>
700046aa:	3201      	adds	r2, #1
700046ac:	b2d2      	uxtb	r2, r2
700046ae:	e49d      	b.n	70003fec <_dtoa_r+0x6cc>
700046b0:	f8dd b068 	ldr.w	fp, [sp, #104]	; 0x68
700046b4:	f8dd a070 	ldr.w	sl, [sp, #112]	; 0x70
700046b8:	9e1d      	ldr	r6, [sp, #116]	; 0x74
700046ba:	9c0c      	ldr	r4, [sp, #48]	; 0x30
700046bc:	f7ff bbd3 	b.w	70003e66 <_dtoa_r+0x546>
700046c0:	990f      	ldr	r1, [sp, #60]	; 0x3c
700046c2:	2300      	movs	r3, #0
700046c4:	9808      	ldr	r0, [sp, #32]
700046c6:	1a0d      	subs	r5, r1, r0
700046c8:	e587      	b.n	700041da <_dtoa_r+0x8ba>
700046ca:	f1b9 0f00 	cmp.w	r9, #0
700046ce:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
700046d0:	9e0c      	ldr	r6, [sp, #48]	; 0x30
700046d2:	dd0f      	ble.n	700046f4 <_dtoa_r+0xdd4>
700046d4:	4659      	mov	r1, fp
700046d6:	2201      	movs	r2, #1
700046d8:	4620      	mov	r0, r4
700046da:	f001 fd43 	bl	70006164 <__lshift>
700046de:	9906      	ldr	r1, [sp, #24]
700046e0:	4683      	mov	fp, r0
700046e2:	f001 facf 	bl	70005c84 <__mcmp>
700046e6:	2800      	cmp	r0, #0
700046e8:	dd47      	ble.n	7000477a <_dtoa_r+0xe5a>
700046ea:	990b      	ldr	r1, [sp, #44]	; 0x2c
700046ec:	2939      	cmp	r1, #57	; 0x39
700046ee:	d031      	beq.n	70004754 <_dtoa_r+0xe34>
700046f0:	3101      	adds	r1, #1
700046f2:	910b      	str	r1, [sp, #44]	; 0x2c
700046f4:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
700046f6:	f805 2b01 	strb.w	r2, [r5], #1
700046fa:	e515      	b.n	70004128 <_dtoa_r+0x808>
700046fc:	3201      	adds	r2, #1
700046fe:	701a      	strb	r2, [r3, #0]
70004700:	e512      	b.n	70004128 <_dtoa_r+0x808>
70004702:	9a0c      	ldr	r2, [sp, #48]	; 0x30
70004704:	4620      	mov	r0, r4
70004706:	6851      	ldr	r1, [r2, #4]
70004708:	f001 fc12 	bl	70005f30 <_Balloc>
7000470c:	9b0c      	ldr	r3, [sp, #48]	; 0x30
7000470e:	f103 010c 	add.w	r1, r3, #12
70004712:	691a      	ldr	r2, [r3, #16]
70004714:	3202      	adds	r2, #2
70004716:	0092      	lsls	r2, r2, #2
70004718:	4605      	mov	r5, r0
7000471a:	300c      	adds	r0, #12
7000471c:	f001 f8ce 	bl	700058bc <memcpy>
70004720:	4620      	mov	r0, r4
70004722:	4629      	mov	r1, r5
70004724:	2201      	movs	r2, #1
70004726:	f001 fd1d 	bl	70006164 <__lshift>
7000472a:	4682      	mov	sl, r0
7000472c:	e601      	b.n	70004332 <_dtoa_r+0xa12>
7000472e:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
70004730:	9f15      	ldr	r7, [sp, #84]	; 0x54
70004732:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
70004734:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
70004738:	e54f      	b.n	700041da <_dtoa_r+0x8ba>
7000473a:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
7000473c:	9e0c      	ldr	r6, [sp, #48]	; 0x30
7000473e:	e73d      	b.n	700045bc <_dtoa_r+0xc9c>
70004740:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
70004742:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
70004744:	2b39      	cmp	r3, #57	; 0x39
70004746:	9e0c      	ldr	r6, [sp, #48]	; 0x30
70004748:	d004      	beq.n	70004754 <_dtoa_r+0xe34>
7000474a:	980b      	ldr	r0, [sp, #44]	; 0x2c
7000474c:	1c43      	adds	r3, r0, #1
7000474e:	f805 3b01 	strb.w	r3, [r5], #1
70004752:	e4e9      	b.n	70004128 <_dtoa_r+0x808>
70004754:	2339      	movs	r3, #57	; 0x39
70004756:	f805 3b01 	strb.w	r3, [r5], #1
7000475a:	9910      	ldr	r1, [sp, #64]	; 0x40
7000475c:	e73c      	b.n	700045d8 <_dtoa_r+0xcb8>
7000475e:	980b      	ldr	r0, [sp, #44]	; 0x2c
70004760:	4633      	mov	r3, r6
70004762:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
70004764:	2839      	cmp	r0, #57	; 0x39
70004766:	9e0c      	ldr	r6, [sp, #48]	; 0x30
70004768:	d0f4      	beq.n	70004754 <_dtoa_r+0xe34>
7000476a:	2b00      	cmp	r3, #0
7000476c:	dd01      	ble.n	70004772 <_dtoa_r+0xe52>
7000476e:	3001      	adds	r0, #1
70004770:	900b      	str	r0, [sp, #44]	; 0x2c
70004772:	990b      	ldr	r1, [sp, #44]	; 0x2c
70004774:	f805 1b01 	strb.w	r1, [r5], #1
70004778:	e4d6      	b.n	70004128 <_dtoa_r+0x808>
7000477a:	d1bb      	bne.n	700046f4 <_dtoa_r+0xdd4>
7000477c:	980b      	ldr	r0, [sp, #44]	; 0x2c
7000477e:	f010 0f01 	tst.w	r0, #1
70004782:	d0b7      	beq.n	700046f4 <_dtoa_r+0xdd4>
70004784:	e7b1      	b.n	700046ea <_dtoa_r+0xdca>
70004786:	2300      	movs	r3, #0
70004788:	990c      	ldr	r1, [sp, #48]	; 0x30
7000478a:	4620      	mov	r0, r4
7000478c:	220a      	movs	r2, #10
7000478e:	f001 fdeb 	bl	70006368 <__multadd>
70004792:	9b11      	ldr	r3, [sp, #68]	; 0x44
70004794:	9308      	str	r3, [sp, #32]
70004796:	900c      	str	r0, [sp, #48]	; 0x30
70004798:	e4a0      	b.n	700040dc <_dtoa_r+0x7bc>
7000479a:	9908      	ldr	r1, [sp, #32]
7000479c:	290e      	cmp	r1, #14
7000479e:	bf8c      	ite	hi
700047a0:	2700      	movhi	r7, #0
700047a2:	f007 0701 	andls.w	r7, r7, #1
700047a6:	f7ff b9fa 	b.w	70003b9e <_dtoa_r+0x27e>
700047aa:	f43f ac81 	beq.w	700040b0 <_dtoa_r+0x790>
700047ae:	331c      	adds	r3, #28
700047b0:	e479      	b.n	700040a6 <_dtoa_r+0x786>
700047b2:	2701      	movs	r7, #1
700047b4:	f7ff b98a 	b.w	70003acc <_dtoa_r+0x1ac>

700047b8 <_fflush_r>:
700047b8:	690b      	ldr	r3, [r1, #16]
700047ba:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
700047be:	460c      	mov	r4, r1
700047c0:	4680      	mov	r8, r0
700047c2:	2b00      	cmp	r3, #0
700047c4:	d071      	beq.n	700048aa <_fflush_r+0xf2>
700047c6:	b110      	cbz	r0, 700047ce <_fflush_r+0x16>
700047c8:	6983      	ldr	r3, [r0, #24]
700047ca:	2b00      	cmp	r3, #0
700047cc:	d078      	beq.n	700048c0 <_fflush_r+0x108>
700047ce:	f248 330c 	movw	r3, #33548	; 0x830c
700047d2:	f2c7 0300 	movt	r3, #28672	; 0x7000
700047d6:	429c      	cmp	r4, r3
700047d8:	bf08      	it	eq
700047da:	f8d8 4004 	ldreq.w	r4, [r8, #4]
700047de:	d010      	beq.n	70004802 <_fflush_r+0x4a>
700047e0:	f248 332c 	movw	r3, #33580	; 0x832c
700047e4:	f2c7 0300 	movt	r3, #28672	; 0x7000
700047e8:	429c      	cmp	r4, r3
700047ea:	bf08      	it	eq
700047ec:	f8d8 4008 	ldreq.w	r4, [r8, #8]
700047f0:	d007      	beq.n	70004802 <_fflush_r+0x4a>
700047f2:	f248 334c 	movw	r3, #33612	; 0x834c
700047f6:	f2c7 0300 	movt	r3, #28672	; 0x7000
700047fa:	429c      	cmp	r4, r3
700047fc:	bf08      	it	eq
700047fe:	f8d8 400c 	ldreq.w	r4, [r8, #12]
70004802:	89a3      	ldrh	r3, [r4, #12]
70004804:	b21a      	sxth	r2, r3
70004806:	f012 0f08 	tst.w	r2, #8
7000480a:	d135      	bne.n	70004878 <_fflush_r+0xc0>
7000480c:	6862      	ldr	r2, [r4, #4]
7000480e:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
70004812:	81a3      	strh	r3, [r4, #12]
70004814:	2a00      	cmp	r2, #0
70004816:	dd5e      	ble.n	700048d6 <_fflush_r+0x11e>
70004818:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
7000481a:	2e00      	cmp	r6, #0
7000481c:	d045      	beq.n	700048aa <_fflush_r+0xf2>
7000481e:	b29b      	uxth	r3, r3
70004820:	f413 5280 	ands.w	r2, r3, #4096	; 0x1000
70004824:	bf18      	it	ne
70004826:	6d65      	ldrne	r5, [r4, #84]	; 0x54
70004828:	d059      	beq.n	700048de <_fflush_r+0x126>
7000482a:	f013 0f04 	tst.w	r3, #4
7000482e:	d14a      	bne.n	700048c6 <_fflush_r+0x10e>
70004830:	2300      	movs	r3, #0
70004832:	4640      	mov	r0, r8
70004834:	6a21      	ldr	r1, [r4, #32]
70004836:	462a      	mov	r2, r5
70004838:	47b0      	blx	r6
7000483a:	4285      	cmp	r5, r0
7000483c:	d138      	bne.n	700048b0 <_fflush_r+0xf8>
7000483e:	89a1      	ldrh	r1, [r4, #12]
70004840:	f24f 73ff 	movw	r3, #63487	; 0xf7ff
70004844:	6922      	ldr	r2, [r4, #16]
70004846:	f2c0 0300 	movt	r3, #0
7000484a:	ea01 0303 	and.w	r3, r1, r3
7000484e:	2100      	movs	r1, #0
70004850:	6061      	str	r1, [r4, #4]
70004852:	f413 5f80 	tst.w	r3, #4096	; 0x1000
70004856:	6b61      	ldr	r1, [r4, #52]	; 0x34
70004858:	81a3      	strh	r3, [r4, #12]
7000485a:	6022      	str	r2, [r4, #0]
7000485c:	bf18      	it	ne
7000485e:	6565      	strne	r5, [r4, #84]	; 0x54
70004860:	b319      	cbz	r1, 700048aa <_fflush_r+0xf2>
70004862:	f104 0344 	add.w	r3, r4, #68	; 0x44
70004866:	4299      	cmp	r1, r3
70004868:	d002      	beq.n	70004870 <_fflush_r+0xb8>
7000486a:	4640      	mov	r0, r8
7000486c:	f000 f998 	bl	70004ba0 <_free_r>
70004870:	2000      	movs	r0, #0
70004872:	6360      	str	r0, [r4, #52]	; 0x34
70004874:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
70004878:	6926      	ldr	r6, [r4, #16]
7000487a:	b1b6      	cbz	r6, 700048aa <_fflush_r+0xf2>
7000487c:	6825      	ldr	r5, [r4, #0]
7000487e:	6026      	str	r6, [r4, #0]
70004880:	1bad      	subs	r5, r5, r6
70004882:	f012 0f03 	tst.w	r2, #3
70004886:	bf0c      	ite	eq
70004888:	6963      	ldreq	r3, [r4, #20]
7000488a:	2300      	movne	r3, #0
7000488c:	60a3      	str	r3, [r4, #8]
7000488e:	e00a      	b.n	700048a6 <_fflush_r+0xee>
70004890:	4632      	mov	r2, r6
70004892:	462b      	mov	r3, r5
70004894:	6aa7      	ldr	r7, [r4, #40]	; 0x28
70004896:	4640      	mov	r0, r8
70004898:	6a21      	ldr	r1, [r4, #32]
7000489a:	47b8      	blx	r7
7000489c:	2800      	cmp	r0, #0
7000489e:	ebc0 0505 	rsb	r5, r0, r5
700048a2:	4406      	add	r6, r0
700048a4:	dd04      	ble.n	700048b0 <_fflush_r+0xf8>
700048a6:	2d00      	cmp	r5, #0
700048a8:	dcf2      	bgt.n	70004890 <_fflush_r+0xd8>
700048aa:	2000      	movs	r0, #0
700048ac:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
700048b0:	89a3      	ldrh	r3, [r4, #12]
700048b2:	f04f 30ff 	mov.w	r0, #4294967295
700048b6:	f043 0340 	orr.w	r3, r3, #64	; 0x40
700048ba:	81a3      	strh	r3, [r4, #12]
700048bc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
700048c0:	f000 f8ea 	bl	70004a98 <__sinit>
700048c4:	e783      	b.n	700047ce <_fflush_r+0x16>
700048c6:	6862      	ldr	r2, [r4, #4]
700048c8:	6b63      	ldr	r3, [r4, #52]	; 0x34
700048ca:	1aad      	subs	r5, r5, r2
700048cc:	2b00      	cmp	r3, #0
700048ce:	d0af      	beq.n	70004830 <_fflush_r+0x78>
700048d0:	6c23      	ldr	r3, [r4, #64]	; 0x40
700048d2:	1aed      	subs	r5, r5, r3
700048d4:	e7ac      	b.n	70004830 <_fflush_r+0x78>
700048d6:	6c22      	ldr	r2, [r4, #64]	; 0x40
700048d8:	2a00      	cmp	r2, #0
700048da:	dc9d      	bgt.n	70004818 <_fflush_r+0x60>
700048dc:	e7e5      	b.n	700048aa <_fflush_r+0xf2>
700048de:	2301      	movs	r3, #1
700048e0:	4640      	mov	r0, r8
700048e2:	6a21      	ldr	r1, [r4, #32]
700048e4:	47b0      	blx	r6
700048e6:	f1b0 3fff 	cmp.w	r0, #4294967295
700048ea:	4605      	mov	r5, r0
700048ec:	d002      	beq.n	700048f4 <_fflush_r+0x13c>
700048ee:	89a3      	ldrh	r3, [r4, #12]
700048f0:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
700048f2:	e79a      	b.n	7000482a <_fflush_r+0x72>
700048f4:	f8d8 3000 	ldr.w	r3, [r8]
700048f8:	2b1d      	cmp	r3, #29
700048fa:	d0d6      	beq.n	700048aa <_fflush_r+0xf2>
700048fc:	89a3      	ldrh	r3, [r4, #12]
700048fe:	f043 0340 	orr.w	r3, r3, #64	; 0x40
70004902:	81a3      	strh	r3, [r4, #12]
70004904:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

70004908 <fflush>:
70004908:	4601      	mov	r1, r0
7000490a:	b128      	cbz	r0, 70004918 <fflush+0x10>
7000490c:	f248 5344 	movw	r3, #34116	; 0x8544
70004910:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004914:	6818      	ldr	r0, [r3, #0]
70004916:	e74f      	b.n	700047b8 <_fflush_r>
70004918:	f248 2390 	movw	r3, #33424	; 0x8290
7000491c:	f244 71b9 	movw	r1, #18361	; 0x47b9
70004920:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004924:	f2c7 0100 	movt	r1, #28672	; 0x7000
70004928:	6818      	ldr	r0, [r3, #0]
7000492a:	f000 bbb3 	b.w	70005094 <_fwalk_reent>
7000492e:	bf00      	nop

70004930 <__sfp_lock_acquire>:
70004930:	4770      	bx	lr
70004932:	bf00      	nop

70004934 <__sfp_lock_release>:
70004934:	4770      	bx	lr
70004936:	bf00      	nop

70004938 <__sinit_lock_acquire>:
70004938:	4770      	bx	lr
7000493a:	bf00      	nop

7000493c <__sinit_lock_release>:
7000493c:	4770      	bx	lr
7000493e:	bf00      	nop

70004940 <__fp_lock>:
70004940:	2000      	movs	r0, #0
70004942:	4770      	bx	lr

70004944 <__fp_unlock>:
70004944:	2000      	movs	r0, #0
70004946:	4770      	bx	lr

70004948 <__fp_unlock_all>:
70004948:	f248 5344 	movw	r3, #34116	; 0x8544
7000494c:	f644 1145 	movw	r1, #18757	; 0x4945
70004950:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004954:	f2c7 0100 	movt	r1, #28672	; 0x7000
70004958:	6818      	ldr	r0, [r3, #0]
7000495a:	f000 bbc5 	b.w	700050e8 <_fwalk>
7000495e:	bf00      	nop

70004960 <__fp_lock_all>:
70004960:	f248 5344 	movw	r3, #34116	; 0x8544
70004964:	f644 1141 	movw	r1, #18753	; 0x4941
70004968:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000496c:	f2c7 0100 	movt	r1, #28672	; 0x7000
70004970:	6818      	ldr	r0, [r3, #0]
70004972:	f000 bbb9 	b.w	700050e8 <_fwalk>
70004976:	bf00      	nop

70004978 <_cleanup_r>:
70004978:	f646 5161 	movw	r1, #28001	; 0x6d61
7000497c:	f2c7 0100 	movt	r1, #28672	; 0x7000
70004980:	f000 bbb2 	b.w	700050e8 <_fwalk>

70004984 <_cleanup>:
70004984:	f248 2390 	movw	r3, #33424	; 0x8290
70004988:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000498c:	6818      	ldr	r0, [r3, #0]
7000498e:	e7f3      	b.n	70004978 <_cleanup_r>

70004990 <std>:
70004990:	b510      	push	{r4, lr}
70004992:	4604      	mov	r4, r0
70004994:	2300      	movs	r3, #0
70004996:	305c      	adds	r0, #92	; 0x5c
70004998:	81a1      	strh	r1, [r4, #12]
7000499a:	4619      	mov	r1, r3
7000499c:	81e2      	strh	r2, [r4, #14]
7000499e:	2208      	movs	r2, #8
700049a0:	6023      	str	r3, [r4, #0]
700049a2:	6063      	str	r3, [r4, #4]
700049a4:	60a3      	str	r3, [r4, #8]
700049a6:	6663      	str	r3, [r4, #100]	; 0x64
700049a8:	6123      	str	r3, [r4, #16]
700049aa:	6163      	str	r3, [r4, #20]
700049ac:	61a3      	str	r3, [r4, #24]
700049ae:	f001 f8a9 	bl	70005b04 <memset>
700049b2:	f646 10c1 	movw	r0, #27073	; 0x69c1
700049b6:	f646 1185 	movw	r1, #27013	; 0x6985
700049ba:	f646 125d 	movw	r2, #26973	; 0x695d
700049be:	f646 1355 	movw	r3, #26965	; 0x6955
700049c2:	f2c7 0000 	movt	r0, #28672	; 0x7000
700049c6:	f2c7 0100 	movt	r1, #28672	; 0x7000
700049ca:	f2c7 0200 	movt	r2, #28672	; 0x7000
700049ce:	f2c7 0300 	movt	r3, #28672	; 0x7000
700049d2:	6260      	str	r0, [r4, #36]	; 0x24
700049d4:	62a1      	str	r1, [r4, #40]	; 0x28
700049d6:	62e2      	str	r2, [r4, #44]	; 0x2c
700049d8:	6323      	str	r3, [r4, #48]	; 0x30
700049da:	6224      	str	r4, [r4, #32]
700049dc:	bd10      	pop	{r4, pc}
700049de:	bf00      	nop

700049e0 <__sfmoreglue>:
700049e0:	b570      	push	{r4, r5, r6, lr}
700049e2:	2568      	movs	r5, #104	; 0x68
700049e4:	460e      	mov	r6, r1
700049e6:	fb05 f501 	mul.w	r5, r5, r1
700049ea:	f105 010c 	add.w	r1, r5, #12
700049ee:	f000 fc59 	bl	700052a4 <_malloc_r>
700049f2:	4604      	mov	r4, r0
700049f4:	b148      	cbz	r0, 70004a0a <__sfmoreglue+0x2a>
700049f6:	f100 030c 	add.w	r3, r0, #12
700049fa:	2100      	movs	r1, #0
700049fc:	6046      	str	r6, [r0, #4]
700049fe:	462a      	mov	r2, r5
70004a00:	4618      	mov	r0, r3
70004a02:	6021      	str	r1, [r4, #0]
70004a04:	60a3      	str	r3, [r4, #8]
70004a06:	f001 f87d 	bl	70005b04 <memset>
70004a0a:	4620      	mov	r0, r4
70004a0c:	bd70      	pop	{r4, r5, r6, pc}
70004a0e:	bf00      	nop

70004a10 <__sfp>:
70004a10:	f248 2390 	movw	r3, #33424	; 0x8290
70004a14:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004a18:	b570      	push	{r4, r5, r6, lr}
70004a1a:	681d      	ldr	r5, [r3, #0]
70004a1c:	4606      	mov	r6, r0
70004a1e:	69ab      	ldr	r3, [r5, #24]
70004a20:	2b00      	cmp	r3, #0
70004a22:	d02a      	beq.n	70004a7a <__sfp+0x6a>
70004a24:	35d8      	adds	r5, #216	; 0xd8
70004a26:	686b      	ldr	r3, [r5, #4]
70004a28:	68ac      	ldr	r4, [r5, #8]
70004a2a:	3b01      	subs	r3, #1
70004a2c:	d503      	bpl.n	70004a36 <__sfp+0x26>
70004a2e:	e020      	b.n	70004a72 <__sfp+0x62>
70004a30:	3468      	adds	r4, #104	; 0x68
70004a32:	3b01      	subs	r3, #1
70004a34:	d41d      	bmi.n	70004a72 <__sfp+0x62>
70004a36:	f9b4 200c 	ldrsh.w	r2, [r4, #12]
70004a3a:	2a00      	cmp	r2, #0
70004a3c:	d1f8      	bne.n	70004a30 <__sfp+0x20>
70004a3e:	2500      	movs	r5, #0
70004a40:	f04f 33ff 	mov.w	r3, #4294967295
70004a44:	6665      	str	r5, [r4, #100]	; 0x64
70004a46:	f104 005c 	add.w	r0, r4, #92	; 0x5c
70004a4a:	81e3      	strh	r3, [r4, #14]
70004a4c:	4629      	mov	r1, r5
70004a4e:	f04f 0301 	mov.w	r3, #1
70004a52:	6025      	str	r5, [r4, #0]
70004a54:	81a3      	strh	r3, [r4, #12]
70004a56:	2208      	movs	r2, #8
70004a58:	60a5      	str	r5, [r4, #8]
70004a5a:	6065      	str	r5, [r4, #4]
70004a5c:	6125      	str	r5, [r4, #16]
70004a5e:	6165      	str	r5, [r4, #20]
70004a60:	61a5      	str	r5, [r4, #24]
70004a62:	f001 f84f 	bl	70005b04 <memset>
70004a66:	64e5      	str	r5, [r4, #76]	; 0x4c
70004a68:	6365      	str	r5, [r4, #52]	; 0x34
70004a6a:	63a5      	str	r5, [r4, #56]	; 0x38
70004a6c:	64a5      	str	r5, [r4, #72]	; 0x48
70004a6e:	4620      	mov	r0, r4
70004a70:	bd70      	pop	{r4, r5, r6, pc}
70004a72:	6828      	ldr	r0, [r5, #0]
70004a74:	b128      	cbz	r0, 70004a82 <__sfp+0x72>
70004a76:	4605      	mov	r5, r0
70004a78:	e7d5      	b.n	70004a26 <__sfp+0x16>
70004a7a:	4628      	mov	r0, r5
70004a7c:	f000 f80c 	bl	70004a98 <__sinit>
70004a80:	e7d0      	b.n	70004a24 <__sfp+0x14>
70004a82:	4630      	mov	r0, r6
70004a84:	2104      	movs	r1, #4
70004a86:	f7ff ffab 	bl	700049e0 <__sfmoreglue>
70004a8a:	6028      	str	r0, [r5, #0]
70004a8c:	2800      	cmp	r0, #0
70004a8e:	d1f2      	bne.n	70004a76 <__sfp+0x66>
70004a90:	230c      	movs	r3, #12
70004a92:	4604      	mov	r4, r0
70004a94:	6033      	str	r3, [r6, #0]
70004a96:	e7ea      	b.n	70004a6e <__sfp+0x5e>

70004a98 <__sinit>:
70004a98:	b570      	push	{r4, r5, r6, lr}
70004a9a:	6986      	ldr	r6, [r0, #24]
70004a9c:	4604      	mov	r4, r0
70004a9e:	b106      	cbz	r6, 70004aa2 <__sinit+0xa>
70004aa0:	bd70      	pop	{r4, r5, r6, pc}
70004aa2:	f644 1379 	movw	r3, #18809	; 0x4979
70004aa6:	2501      	movs	r5, #1
70004aa8:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004aac:	f8c0 60d8 	str.w	r6, [r0, #216]	; 0xd8
70004ab0:	6283      	str	r3, [r0, #40]	; 0x28
70004ab2:	f8c0 60dc 	str.w	r6, [r0, #220]	; 0xdc
70004ab6:	f8c0 60e0 	str.w	r6, [r0, #224]	; 0xe0
70004aba:	6185      	str	r5, [r0, #24]
70004abc:	f7ff ffa8 	bl	70004a10 <__sfp>
70004ac0:	6060      	str	r0, [r4, #4]
70004ac2:	4620      	mov	r0, r4
70004ac4:	f7ff ffa4 	bl	70004a10 <__sfp>
70004ac8:	60a0      	str	r0, [r4, #8]
70004aca:	4620      	mov	r0, r4
70004acc:	f7ff ffa0 	bl	70004a10 <__sfp>
70004ad0:	4632      	mov	r2, r6
70004ad2:	2104      	movs	r1, #4
70004ad4:	4623      	mov	r3, r4
70004ad6:	60e0      	str	r0, [r4, #12]
70004ad8:	6860      	ldr	r0, [r4, #4]
70004ada:	f7ff ff59 	bl	70004990 <std>
70004ade:	462a      	mov	r2, r5
70004ae0:	68a0      	ldr	r0, [r4, #8]
70004ae2:	2109      	movs	r1, #9
70004ae4:	4623      	mov	r3, r4
70004ae6:	f7ff ff53 	bl	70004990 <std>
70004aea:	4623      	mov	r3, r4
70004aec:	68e0      	ldr	r0, [r4, #12]
70004aee:	2112      	movs	r1, #18
70004af0:	2202      	movs	r2, #2
70004af2:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
70004af6:	e74b      	b.n	70004990 <std>

70004af8 <_malloc_trim_r>:
70004af8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
70004afa:	f248 6448 	movw	r4, #34376	; 0x8648
70004afe:	f2c7 0400 	movt	r4, #28672	; 0x7000
70004b02:	460f      	mov	r7, r1
70004b04:	4605      	mov	r5, r0
70004b06:	f001 f867 	bl	70005bd8 <__malloc_lock>
70004b0a:	68a3      	ldr	r3, [r4, #8]
70004b0c:	685e      	ldr	r6, [r3, #4]
70004b0e:	f026 0603 	bic.w	r6, r6, #3
70004b12:	f506 637e 	add.w	r3, r6, #4064	; 0xfe0
70004b16:	330f      	adds	r3, #15
70004b18:	1bdf      	subs	r7, r3, r7
70004b1a:	0b3f      	lsrs	r7, r7, #12
70004b1c:	3f01      	subs	r7, #1
70004b1e:	033f      	lsls	r7, r7, #12
70004b20:	f5b7 5f80 	cmp.w	r7, #4096	; 0x1000
70004b24:	db07      	blt.n	70004b36 <_malloc_trim_r+0x3e>
70004b26:	2100      	movs	r1, #0
70004b28:	4628      	mov	r0, r5
70004b2a:	f001 feff 	bl	7000692c <_sbrk_r>
70004b2e:	68a3      	ldr	r3, [r4, #8]
70004b30:	18f3      	adds	r3, r6, r3
70004b32:	4283      	cmp	r3, r0
70004b34:	d004      	beq.n	70004b40 <_malloc_trim_r+0x48>
70004b36:	4628      	mov	r0, r5
70004b38:	f001 f850 	bl	70005bdc <__malloc_unlock>
70004b3c:	2000      	movs	r0, #0
70004b3e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
70004b40:	4279      	negs	r1, r7
70004b42:	4628      	mov	r0, r5
70004b44:	f001 fef2 	bl	7000692c <_sbrk_r>
70004b48:	f1b0 3fff 	cmp.w	r0, #4294967295
70004b4c:	d010      	beq.n	70004b70 <_malloc_trim_r+0x78>
70004b4e:	68a2      	ldr	r2, [r4, #8]
70004b50:	f648 2378 	movw	r3, #35448	; 0x8a78
70004b54:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004b58:	1bf6      	subs	r6, r6, r7
70004b5a:	f046 0601 	orr.w	r6, r6, #1
70004b5e:	4628      	mov	r0, r5
70004b60:	6056      	str	r6, [r2, #4]
70004b62:	681a      	ldr	r2, [r3, #0]
70004b64:	1bd7      	subs	r7, r2, r7
70004b66:	601f      	str	r7, [r3, #0]
70004b68:	f001 f838 	bl	70005bdc <__malloc_unlock>
70004b6c:	2001      	movs	r0, #1
70004b6e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
70004b70:	2100      	movs	r1, #0
70004b72:	4628      	mov	r0, r5
70004b74:	f001 feda 	bl	7000692c <_sbrk_r>
70004b78:	68a3      	ldr	r3, [r4, #8]
70004b7a:	1ac2      	subs	r2, r0, r3
70004b7c:	2a0f      	cmp	r2, #15
70004b7e:	ddda      	ble.n	70004b36 <_malloc_trim_r+0x3e>
70004b80:	f648 2450 	movw	r4, #35408	; 0x8a50
70004b84:	f648 2178 	movw	r1, #35448	; 0x8a78
70004b88:	f2c7 0400 	movt	r4, #28672	; 0x7000
70004b8c:	f2c7 0100 	movt	r1, #28672	; 0x7000
70004b90:	f042 0201 	orr.w	r2, r2, #1
70004b94:	6824      	ldr	r4, [r4, #0]
70004b96:	1b00      	subs	r0, r0, r4
70004b98:	6008      	str	r0, [r1, #0]
70004b9a:	605a      	str	r2, [r3, #4]
70004b9c:	e7cb      	b.n	70004b36 <_malloc_trim_r+0x3e>
70004b9e:	bf00      	nop

70004ba0 <_free_r>:
70004ba0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
70004ba4:	4605      	mov	r5, r0
70004ba6:	460c      	mov	r4, r1
70004ba8:	2900      	cmp	r1, #0
70004baa:	f000 8088 	beq.w	70004cbe <_free_r+0x11e>
70004bae:	f001 f813 	bl	70005bd8 <__malloc_lock>
70004bb2:	f1a4 0208 	sub.w	r2, r4, #8
70004bb6:	f248 6048 	movw	r0, #34376	; 0x8648
70004bba:	6856      	ldr	r6, [r2, #4]
70004bbc:	f2c7 0000 	movt	r0, #28672	; 0x7000
70004bc0:	f026 0301 	bic.w	r3, r6, #1
70004bc4:	f8d0 c008 	ldr.w	ip, [r0, #8]
70004bc8:	18d1      	adds	r1, r2, r3
70004bca:	458c      	cmp	ip, r1
70004bcc:	684f      	ldr	r7, [r1, #4]
70004bce:	f027 0703 	bic.w	r7, r7, #3
70004bd2:	f000 8095 	beq.w	70004d00 <_free_r+0x160>
70004bd6:	f016 0601 	ands.w	r6, r6, #1
70004bda:	604f      	str	r7, [r1, #4]
70004bdc:	d05f      	beq.n	70004c9e <_free_r+0xfe>
70004bde:	2600      	movs	r6, #0
70004be0:	19cc      	adds	r4, r1, r7
70004be2:	6864      	ldr	r4, [r4, #4]
70004be4:	f014 0f01 	tst.w	r4, #1
70004be8:	d106      	bne.n	70004bf8 <_free_r+0x58>
70004bea:	19db      	adds	r3, r3, r7
70004bec:	2e00      	cmp	r6, #0
70004bee:	d07a      	beq.n	70004ce6 <_free_r+0x146>
70004bf0:	688c      	ldr	r4, [r1, #8]
70004bf2:	68c9      	ldr	r1, [r1, #12]
70004bf4:	608c      	str	r4, [r1, #8]
70004bf6:	60e1      	str	r1, [r4, #12]
70004bf8:	f043 0101 	orr.w	r1, r3, #1
70004bfc:	50d3      	str	r3, [r2, r3]
70004bfe:	6051      	str	r1, [r2, #4]
70004c00:	2e00      	cmp	r6, #0
70004c02:	d147      	bne.n	70004c94 <_free_r+0xf4>
70004c04:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
70004c08:	d35b      	bcc.n	70004cc2 <_free_r+0x122>
70004c0a:	0a59      	lsrs	r1, r3, #9
70004c0c:	2904      	cmp	r1, #4
70004c0e:	bf9e      	ittt	ls
70004c10:	ea4f 1c93 	movls.w	ip, r3, lsr #6
70004c14:	f10c 0c38 	addls.w	ip, ip, #56	; 0x38
70004c18:	ea4f 04cc 	movls.w	r4, ip, lsl #3
70004c1c:	d928      	bls.n	70004c70 <_free_r+0xd0>
70004c1e:	2914      	cmp	r1, #20
70004c20:	bf9c      	itt	ls
70004c22:	f101 0c5b 	addls.w	ip, r1, #91	; 0x5b
70004c26:	ea4f 04cc 	movls.w	r4, ip, lsl #3
70004c2a:	d921      	bls.n	70004c70 <_free_r+0xd0>
70004c2c:	2954      	cmp	r1, #84	; 0x54
70004c2e:	bf9e      	ittt	ls
70004c30:	ea4f 3c13 	movls.w	ip, r3, lsr #12
70004c34:	f10c 0c6e 	addls.w	ip, ip, #110	; 0x6e
70004c38:	ea4f 04cc 	movls.w	r4, ip, lsl #3
70004c3c:	d918      	bls.n	70004c70 <_free_r+0xd0>
70004c3e:	f5b1 7faa 	cmp.w	r1, #340	; 0x154
70004c42:	bf9e      	ittt	ls
70004c44:	ea4f 3cd3 	movls.w	ip, r3, lsr #15
70004c48:	f10c 0c77 	addls.w	ip, ip, #119	; 0x77
70004c4c:	ea4f 04cc 	movls.w	r4, ip, lsl #3
70004c50:	d90e      	bls.n	70004c70 <_free_r+0xd0>
70004c52:	f240 5c54 	movw	ip, #1364	; 0x554
70004c56:	4561      	cmp	r1, ip
70004c58:	bf95      	itete	ls
70004c5a:	ea4f 4c93 	movls.w	ip, r3, lsr #18
70004c5e:	f44f 747c 	movhi.w	r4, #1008	; 0x3f0
70004c62:	f10c 0c7c 	addls.w	ip, ip, #124	; 0x7c
70004c66:	f04f 0c7e 	movhi.w	ip, #126	; 0x7e
70004c6a:	bf98      	it	ls
70004c6c:	ea4f 04cc 	movls.w	r4, ip, lsl #3
70004c70:	1904      	adds	r4, r0, r4
70004c72:	68a1      	ldr	r1, [r4, #8]
70004c74:	42a1      	cmp	r1, r4
70004c76:	d103      	bne.n	70004c80 <_free_r+0xe0>
70004c78:	e064      	b.n	70004d44 <_free_r+0x1a4>
70004c7a:	6889      	ldr	r1, [r1, #8]
70004c7c:	428c      	cmp	r4, r1
70004c7e:	d004      	beq.n	70004c8a <_free_r+0xea>
70004c80:	6848      	ldr	r0, [r1, #4]
70004c82:	f020 0003 	bic.w	r0, r0, #3
70004c86:	4283      	cmp	r3, r0
70004c88:	d3f7      	bcc.n	70004c7a <_free_r+0xda>
70004c8a:	68cb      	ldr	r3, [r1, #12]
70004c8c:	60d3      	str	r3, [r2, #12]
70004c8e:	6091      	str	r1, [r2, #8]
70004c90:	60ca      	str	r2, [r1, #12]
70004c92:	609a      	str	r2, [r3, #8]
70004c94:	4628      	mov	r0, r5
70004c96:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
70004c9a:	f000 bf9f 	b.w	70005bdc <__malloc_unlock>
70004c9e:	f854 4c08 	ldr.w	r4, [r4, #-8]
70004ca2:	f100 0c08 	add.w	ip, r0, #8
70004ca6:	1b12      	subs	r2, r2, r4
70004ca8:	191b      	adds	r3, r3, r4
70004caa:	6894      	ldr	r4, [r2, #8]
70004cac:	4564      	cmp	r4, ip
70004cae:	d047      	beq.n	70004d40 <_free_r+0x1a0>
70004cb0:	f8d2 c00c 	ldr.w	ip, [r2, #12]
70004cb4:	f8cc 4008 	str.w	r4, [ip, #8]
70004cb8:	f8c4 c00c 	str.w	ip, [r4, #12]
70004cbc:	e790      	b.n	70004be0 <_free_r+0x40>
70004cbe:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
70004cc2:	08db      	lsrs	r3, r3, #3
70004cc4:	f04f 0c01 	mov.w	ip, #1
70004cc8:	6846      	ldr	r6, [r0, #4]
70004cca:	eb00 01c3 	add.w	r1, r0, r3, lsl #3
70004cce:	109b      	asrs	r3, r3, #2
70004cd0:	fa0c f303 	lsl.w	r3, ip, r3
70004cd4:	60d1      	str	r1, [r2, #12]
70004cd6:	688c      	ldr	r4, [r1, #8]
70004cd8:	ea46 0303 	orr.w	r3, r6, r3
70004cdc:	6043      	str	r3, [r0, #4]
70004cde:	6094      	str	r4, [r2, #8]
70004ce0:	60e2      	str	r2, [r4, #12]
70004ce2:	608a      	str	r2, [r1, #8]
70004ce4:	e7d6      	b.n	70004c94 <_free_r+0xf4>
70004ce6:	688c      	ldr	r4, [r1, #8]
70004ce8:	4f1c      	ldr	r7, [pc, #112]	; (70004d5c <_free_r+0x1bc>)
70004cea:	42bc      	cmp	r4, r7
70004cec:	d181      	bne.n	70004bf2 <_free_r+0x52>
70004cee:	50d3      	str	r3, [r2, r3]
70004cf0:	f043 0301 	orr.w	r3, r3, #1
70004cf4:	60e2      	str	r2, [r4, #12]
70004cf6:	60a2      	str	r2, [r4, #8]
70004cf8:	6053      	str	r3, [r2, #4]
70004cfa:	6094      	str	r4, [r2, #8]
70004cfc:	60d4      	str	r4, [r2, #12]
70004cfe:	e7c9      	b.n	70004c94 <_free_r+0xf4>
70004d00:	18fb      	adds	r3, r7, r3
70004d02:	f016 0f01 	tst.w	r6, #1
70004d06:	d107      	bne.n	70004d18 <_free_r+0x178>
70004d08:	f854 1c08 	ldr.w	r1, [r4, #-8]
70004d0c:	1a52      	subs	r2, r2, r1
70004d0e:	185b      	adds	r3, r3, r1
70004d10:	68d4      	ldr	r4, [r2, #12]
70004d12:	6891      	ldr	r1, [r2, #8]
70004d14:	60a1      	str	r1, [r4, #8]
70004d16:	60cc      	str	r4, [r1, #12]
70004d18:	f648 2154 	movw	r1, #35412	; 0x8a54
70004d1c:	6082      	str	r2, [r0, #8]
70004d1e:	f2c7 0100 	movt	r1, #28672	; 0x7000
70004d22:	f043 0001 	orr.w	r0, r3, #1
70004d26:	6050      	str	r0, [r2, #4]
70004d28:	680a      	ldr	r2, [r1, #0]
70004d2a:	4293      	cmp	r3, r2
70004d2c:	d3b2      	bcc.n	70004c94 <_free_r+0xf4>
70004d2e:	f648 2374 	movw	r3, #35444	; 0x8a74
70004d32:	4628      	mov	r0, r5
70004d34:	f2c7 0300 	movt	r3, #28672	; 0x7000
70004d38:	6819      	ldr	r1, [r3, #0]
70004d3a:	f7ff fedd 	bl	70004af8 <_malloc_trim_r>
70004d3e:	e7a9      	b.n	70004c94 <_free_r+0xf4>
70004d40:	2601      	movs	r6, #1
70004d42:	e74d      	b.n	70004be0 <_free_r+0x40>
70004d44:	2601      	movs	r6, #1
70004d46:	6844      	ldr	r4, [r0, #4]
70004d48:	ea4f 0cac 	mov.w	ip, ip, asr #2
70004d4c:	460b      	mov	r3, r1
70004d4e:	fa06 fc0c 	lsl.w	ip, r6, ip
70004d52:	ea44 040c 	orr.w	r4, r4, ip
70004d56:	6044      	str	r4, [r0, #4]
70004d58:	e798      	b.n	70004c8c <_free_r+0xec>
70004d5a:	bf00      	nop
70004d5c:	70008650 	.word	0x70008650

70004d60 <__sfvwrite_r>:
70004d60:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
70004d64:	6893      	ldr	r3, [r2, #8]
70004d66:	b085      	sub	sp, #20
70004d68:	4690      	mov	r8, r2
70004d6a:	460c      	mov	r4, r1
70004d6c:	9003      	str	r0, [sp, #12]
70004d6e:	2b00      	cmp	r3, #0
70004d70:	d064      	beq.n	70004e3c <__sfvwrite_r+0xdc>
70004d72:	8988      	ldrh	r0, [r1, #12]
70004d74:	fa1f fa80 	uxth.w	sl, r0
70004d78:	f01a 0f08 	tst.w	sl, #8
70004d7c:	f000 80a0 	beq.w	70004ec0 <__sfvwrite_r+0x160>
70004d80:	690b      	ldr	r3, [r1, #16]
70004d82:	2b00      	cmp	r3, #0
70004d84:	f000 809c 	beq.w	70004ec0 <__sfvwrite_r+0x160>
70004d88:	f01a 0b02 	ands.w	fp, sl, #2
70004d8c:	f8d8 5000 	ldr.w	r5, [r8]
70004d90:	bf1c      	itt	ne
70004d92:	f04f 0a00 	movne.w	sl, #0
70004d96:	4657      	movne	r7, sl
70004d98:	d136      	bne.n	70004e08 <__sfvwrite_r+0xa8>
70004d9a:	f01a 0a01 	ands.w	sl, sl, #1
70004d9e:	bf1d      	ittte	ne
70004da0:	46dc      	movne	ip, fp
70004da2:	46d9      	movne	r9, fp
70004da4:	465f      	movne	r7, fp
70004da6:	4656      	moveq	r6, sl
70004da8:	d152      	bne.n	70004e50 <__sfvwrite_r+0xf0>
70004daa:	b326      	cbz	r6, 70004df6 <__sfvwrite_r+0x96>
70004dac:	b280      	uxth	r0, r0
70004dae:	68a7      	ldr	r7, [r4, #8]
70004db0:	f410 7f00 	tst.w	r0, #512	; 0x200
70004db4:	f000 808f 	beq.w	70004ed6 <__sfvwrite_r+0x176>
70004db8:	42be      	cmp	r6, r7
70004dba:	46bb      	mov	fp, r7
70004dbc:	f080 80a7 	bcs.w	70004f0e <__sfvwrite_r+0x1ae>
70004dc0:	6820      	ldr	r0, [r4, #0]
70004dc2:	4637      	mov	r7, r6
70004dc4:	46b3      	mov	fp, r6
70004dc6:	465a      	mov	r2, fp
70004dc8:	4651      	mov	r1, sl
70004dca:	f000 fe3f 	bl	70005a4c <memmove>
70004dce:	68a2      	ldr	r2, [r4, #8]
70004dd0:	6823      	ldr	r3, [r4, #0]
70004dd2:	46b1      	mov	r9, r6
70004dd4:	1bd7      	subs	r7, r2, r7
70004dd6:	60a7      	str	r7, [r4, #8]
70004dd8:	4637      	mov	r7, r6
70004dda:	445b      	add	r3, fp
70004ddc:	6023      	str	r3, [r4, #0]
70004dde:	f8d8 3008 	ldr.w	r3, [r8, #8]
70004de2:	ebc9 0606 	rsb	r6, r9, r6
70004de6:	44ca      	add	sl, r9
70004de8:	1bdf      	subs	r7, r3, r7
70004dea:	f8c8 7008 	str.w	r7, [r8, #8]
70004dee:	b32f      	cbz	r7, 70004e3c <__sfvwrite_r+0xdc>
70004df0:	89a0      	ldrh	r0, [r4, #12]
70004df2:	2e00      	cmp	r6, #0
70004df4:	d1da      	bne.n	70004dac <__sfvwrite_r+0x4c>
70004df6:	f8d5 a000 	ldr.w	sl, [r5]
70004dfa:	686e      	ldr	r6, [r5, #4]
70004dfc:	3508      	adds	r5, #8
70004dfe:	e7d4      	b.n	70004daa <__sfvwrite_r+0x4a>
70004e00:	f8d5 a000 	ldr.w	sl, [r5]
70004e04:	686f      	ldr	r7, [r5, #4]
70004e06:	3508      	adds	r5, #8
70004e08:	f5b7 6f80 	cmp.w	r7, #1024	; 0x400
70004e0c:	bf34      	ite	cc
70004e0e:	463b      	movcc	r3, r7
70004e10:	f44f 6380 	movcs.w	r3, #1024	; 0x400
70004e14:	4652      	mov	r2, sl
70004e16:	9803      	ldr	r0, [sp, #12]
70004e18:	2f00      	cmp	r7, #0
70004e1a:	d0f1      	beq.n	70004e00 <__sfvwrite_r+0xa0>
70004e1c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
70004e1e:	6a21      	ldr	r1, [r4, #32]
70004e20:	47b0      	blx	r6
70004e22:	2800      	cmp	r0, #0
70004e24:	4482      	add	sl, r0
70004e26:	ebc0 0707 	rsb	r7, r0, r7
70004e2a:	f340 80ec 	ble.w	70005006 <__sfvwrite_r+0x2a6>
70004e2e:	f8d8 3008 	ldr.w	r3, [r8, #8]
70004e32:	1a18      	subs	r0, r3, r0
70004e34:	f8c8 0008 	str.w	r0, [r8, #8]
70004e38:	2800      	cmp	r0, #0
70004e3a:	d1e5      	bne.n	70004e08 <__sfvwrite_r+0xa8>
70004e3c:	2000      	movs	r0, #0
70004e3e:	b005      	add	sp, #20
70004e40:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
70004e44:	f8d5 9000 	ldr.w	r9, [r5]
70004e48:	f04f 0c00 	mov.w	ip, #0
70004e4c:	686f      	ldr	r7, [r5, #4]
70004e4e:	3508      	adds	r5, #8
70004e50:	2f00      	cmp	r7, #0
70004e52:	d0f7      	beq.n	70004e44 <__sfvwrite_r+0xe4>
70004e54:	f1bc 0f00 	cmp.w	ip, #0
70004e58:	f000 80b5 	beq.w	70004fc6 <__sfvwrite_r+0x266>
70004e5c:	6963      	ldr	r3, [r4, #20]
70004e5e:	45bb      	cmp	fp, r7
70004e60:	bf34      	ite	cc
70004e62:	46da      	movcc	sl, fp
70004e64:	46ba      	movcs	sl, r7
70004e66:	68a6      	ldr	r6, [r4, #8]
70004e68:	6820      	ldr	r0, [r4, #0]
70004e6a:	6922      	ldr	r2, [r4, #16]
70004e6c:	199e      	adds	r6, r3, r6
70004e6e:	4290      	cmp	r0, r2
70004e70:	bf94      	ite	ls
70004e72:	2200      	movls	r2, #0
70004e74:	2201      	movhi	r2, #1
70004e76:	45b2      	cmp	sl, r6
70004e78:	bfd4      	ite	le
70004e7a:	2200      	movle	r2, #0
70004e7c:	f002 0201 	andgt.w	r2, r2, #1
70004e80:	2a00      	cmp	r2, #0
70004e82:	f040 80ae 	bne.w	70004fe2 <__sfvwrite_r+0x282>
70004e86:	459a      	cmp	sl, r3
70004e88:	f2c0 8082 	blt.w	70004f90 <__sfvwrite_r+0x230>
70004e8c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
70004e8e:	464a      	mov	r2, r9
70004e90:	f8cd c004 	str.w	ip, [sp, #4]
70004e94:	9803      	ldr	r0, [sp, #12]
70004e96:	6a21      	ldr	r1, [r4, #32]
70004e98:	47b0      	blx	r6
70004e9a:	f8dd c004 	ldr.w	ip, [sp, #4]
70004e9e:	1e06      	subs	r6, r0, #0
70004ea0:	f340 80b1 	ble.w	70005006 <__sfvwrite_r+0x2a6>
70004ea4:	ebbb 0b06 	subs.w	fp, fp, r6
70004ea8:	f000 8086 	beq.w	70004fb8 <__sfvwrite_r+0x258>
70004eac:	f8d8 3008 	ldr.w	r3, [r8, #8]
70004eb0:	44b1      	add	r9, r6
70004eb2:	1bbf      	subs	r7, r7, r6
70004eb4:	1b9e      	subs	r6, r3, r6
70004eb6:	f8c8 6008 	str.w	r6, [r8, #8]
70004eba:	2e00      	cmp	r6, #0
70004ebc:	d1c8      	bne.n	70004e50 <__sfvwrite_r+0xf0>
70004ebe:	e7bd      	b.n	70004e3c <__sfvwrite_r+0xdc>
70004ec0:	9803      	ldr	r0, [sp, #12]
70004ec2:	4621      	mov	r1, r4
70004ec4:	f7fe fc18 	bl	700036f8 <__swsetup_r>
70004ec8:	2800      	cmp	r0, #0
70004eca:	f040 80d4 	bne.w	70005076 <__sfvwrite_r+0x316>
70004ece:	89a0      	ldrh	r0, [r4, #12]
70004ed0:	fa1f fa80 	uxth.w	sl, r0
70004ed4:	e758      	b.n	70004d88 <__sfvwrite_r+0x28>
70004ed6:	6820      	ldr	r0, [r4, #0]
70004ed8:	46b9      	mov	r9, r7
70004eda:	6923      	ldr	r3, [r4, #16]
70004edc:	4298      	cmp	r0, r3
70004ede:	bf94      	ite	ls
70004ee0:	2300      	movls	r3, #0
70004ee2:	2301      	movhi	r3, #1
70004ee4:	42b7      	cmp	r7, r6
70004ee6:	bf2c      	ite	cs
70004ee8:	2300      	movcs	r3, #0
70004eea:	f003 0301 	andcc.w	r3, r3, #1
70004eee:	2b00      	cmp	r3, #0
70004ef0:	f040 809d 	bne.w	7000502e <__sfvwrite_r+0x2ce>
70004ef4:	6963      	ldr	r3, [r4, #20]
70004ef6:	429e      	cmp	r6, r3
70004ef8:	f0c0 808c 	bcc.w	70005014 <__sfvwrite_r+0x2b4>
70004efc:	6aa7      	ldr	r7, [r4, #40]	; 0x28
70004efe:	4652      	mov	r2, sl
70004f00:	9803      	ldr	r0, [sp, #12]
70004f02:	6a21      	ldr	r1, [r4, #32]
70004f04:	47b8      	blx	r7
70004f06:	1e07      	subs	r7, r0, #0
70004f08:	dd7d      	ble.n	70005006 <__sfvwrite_r+0x2a6>
70004f0a:	46b9      	mov	r9, r7
70004f0c:	e767      	b.n	70004dde <__sfvwrite_r+0x7e>
70004f0e:	f410 6f90 	tst.w	r0, #1152	; 0x480
70004f12:	bf08      	it	eq
70004f14:	6820      	ldreq	r0, [r4, #0]
70004f16:	f43f af56 	beq.w	70004dc6 <__sfvwrite_r+0x66>
70004f1a:	6962      	ldr	r2, [r4, #20]
70004f1c:	6921      	ldr	r1, [r4, #16]
70004f1e:	6823      	ldr	r3, [r4, #0]
70004f20:	eb02 0942 	add.w	r9, r2, r2, lsl #1
70004f24:	1a5b      	subs	r3, r3, r1
70004f26:	eb09 79d9 	add.w	r9, r9, r9, lsr #31
70004f2a:	f103 0c01 	add.w	ip, r3, #1
70004f2e:	44b4      	add	ip, r6
70004f30:	ea4f 0969 	mov.w	r9, r9, asr #1
70004f34:	45e1      	cmp	r9, ip
70004f36:	464a      	mov	r2, r9
70004f38:	bf3c      	itt	cc
70004f3a:	46e1      	movcc	r9, ip
70004f3c:	464a      	movcc	r2, r9
70004f3e:	f410 6f80 	tst.w	r0, #1024	; 0x400
70004f42:	f000 8083 	beq.w	7000504c <__sfvwrite_r+0x2ec>
70004f46:	4611      	mov	r1, r2
70004f48:	9803      	ldr	r0, [sp, #12]
70004f4a:	9302      	str	r3, [sp, #8]
70004f4c:	f000 f9aa 	bl	700052a4 <_malloc_r>
70004f50:	9b02      	ldr	r3, [sp, #8]
70004f52:	2800      	cmp	r0, #0
70004f54:	f000 8099 	beq.w	7000508a <__sfvwrite_r+0x32a>
70004f58:	461a      	mov	r2, r3
70004f5a:	6921      	ldr	r1, [r4, #16]
70004f5c:	9302      	str	r3, [sp, #8]
70004f5e:	9001      	str	r0, [sp, #4]
70004f60:	f000 fcac 	bl	700058bc <memcpy>
70004f64:	89a2      	ldrh	r2, [r4, #12]
70004f66:	9b02      	ldr	r3, [sp, #8]
70004f68:	f8dd c004 	ldr.w	ip, [sp, #4]
70004f6c:	f422 6290 	bic.w	r2, r2, #1152	; 0x480
70004f70:	f042 0280 	orr.w	r2, r2, #128	; 0x80
70004f74:	81a2      	strh	r2, [r4, #12]
70004f76:	ebc3 0209 	rsb	r2, r3, r9
70004f7a:	eb0c 0003 	add.w	r0, ip, r3
70004f7e:	4637      	mov	r7, r6
70004f80:	46b3      	mov	fp, r6
70004f82:	60a2      	str	r2, [r4, #8]
70004f84:	f8c4 c010 	str.w	ip, [r4, #16]
70004f88:	6020      	str	r0, [r4, #0]
70004f8a:	f8c4 9014 	str.w	r9, [r4, #20]
70004f8e:	e71a      	b.n	70004dc6 <__sfvwrite_r+0x66>
70004f90:	4652      	mov	r2, sl
70004f92:	4649      	mov	r1, r9
70004f94:	4656      	mov	r6, sl
70004f96:	f8cd c004 	str.w	ip, [sp, #4]
70004f9a:	f000 fd57 	bl	70005a4c <memmove>
70004f9e:	68a2      	ldr	r2, [r4, #8]
70004fa0:	6823      	ldr	r3, [r4, #0]
70004fa2:	ebbb 0b06 	subs.w	fp, fp, r6
70004fa6:	ebca 0202 	rsb	r2, sl, r2
70004faa:	f8dd c004 	ldr.w	ip, [sp, #4]
70004fae:	4453      	add	r3, sl
70004fb0:	60a2      	str	r2, [r4, #8]
70004fb2:	6023      	str	r3, [r4, #0]
70004fb4:	f47f af7a 	bne.w	70004eac <__sfvwrite_r+0x14c>
70004fb8:	9803      	ldr	r0, [sp, #12]
70004fba:	4621      	mov	r1, r4
70004fbc:	f7ff fbfc 	bl	700047b8 <_fflush_r>
70004fc0:	bb08      	cbnz	r0, 70005006 <__sfvwrite_r+0x2a6>
70004fc2:	46dc      	mov	ip, fp
70004fc4:	e772      	b.n	70004eac <__sfvwrite_r+0x14c>
70004fc6:	4648      	mov	r0, r9
70004fc8:	210a      	movs	r1, #10
70004fca:	463a      	mov	r2, r7
70004fcc:	f000 fc3c 	bl	70005848 <memchr>
70004fd0:	2800      	cmp	r0, #0
70004fd2:	d04b      	beq.n	7000506c <__sfvwrite_r+0x30c>
70004fd4:	f100 0b01 	add.w	fp, r0, #1
70004fd8:	f04f 0c01 	mov.w	ip, #1
70004fdc:	ebc9 0b0b 	rsb	fp, r9, fp
70004fe0:	e73c      	b.n	70004e5c <__sfvwrite_r+0xfc>
70004fe2:	4649      	mov	r1, r9
70004fe4:	4632      	mov	r2, r6
70004fe6:	f8cd c004 	str.w	ip, [sp, #4]
70004fea:	f000 fd2f 	bl	70005a4c <memmove>
70004fee:	6823      	ldr	r3, [r4, #0]
70004ff0:	4621      	mov	r1, r4
70004ff2:	9803      	ldr	r0, [sp, #12]
70004ff4:	199b      	adds	r3, r3, r6
70004ff6:	6023      	str	r3, [r4, #0]
70004ff8:	f7ff fbde 	bl	700047b8 <_fflush_r>
70004ffc:	f8dd c004 	ldr.w	ip, [sp, #4]
70005000:	2800      	cmp	r0, #0
70005002:	f43f af4f 	beq.w	70004ea4 <__sfvwrite_r+0x144>
70005006:	89a3      	ldrh	r3, [r4, #12]
70005008:	f04f 30ff 	mov.w	r0, #4294967295
7000500c:	f043 0340 	orr.w	r3, r3, #64	; 0x40
70005010:	81a3      	strh	r3, [r4, #12]
70005012:	e714      	b.n	70004e3e <__sfvwrite_r+0xde>
70005014:	4632      	mov	r2, r6
70005016:	4651      	mov	r1, sl
70005018:	f000 fd18 	bl	70005a4c <memmove>
7000501c:	68a2      	ldr	r2, [r4, #8]
7000501e:	6823      	ldr	r3, [r4, #0]
70005020:	4637      	mov	r7, r6
70005022:	1b92      	subs	r2, r2, r6
70005024:	46b1      	mov	r9, r6
70005026:	199b      	adds	r3, r3, r6
70005028:	60a2      	str	r2, [r4, #8]
7000502a:	6023      	str	r3, [r4, #0]
7000502c:	e6d7      	b.n	70004dde <__sfvwrite_r+0x7e>
7000502e:	4651      	mov	r1, sl
70005030:	463a      	mov	r2, r7
70005032:	f000 fd0b 	bl	70005a4c <memmove>
70005036:	6823      	ldr	r3, [r4, #0]
70005038:	9803      	ldr	r0, [sp, #12]
7000503a:	4621      	mov	r1, r4
7000503c:	19db      	adds	r3, r3, r7
7000503e:	6023      	str	r3, [r4, #0]
70005040:	f7ff fbba 	bl	700047b8 <_fflush_r>
70005044:	2800      	cmp	r0, #0
70005046:	f43f aeca 	beq.w	70004dde <__sfvwrite_r+0x7e>
7000504a:	e7dc      	b.n	70005006 <__sfvwrite_r+0x2a6>
7000504c:	9803      	ldr	r0, [sp, #12]
7000504e:	9302      	str	r3, [sp, #8]
70005050:	f001 fa72 	bl	70006538 <_realloc_r>
70005054:	9b02      	ldr	r3, [sp, #8]
70005056:	4684      	mov	ip, r0
70005058:	2800      	cmp	r0, #0
7000505a:	d18c      	bne.n	70004f76 <__sfvwrite_r+0x216>
7000505c:	6921      	ldr	r1, [r4, #16]
7000505e:	9803      	ldr	r0, [sp, #12]
70005060:	f7ff fd9e 	bl	70004ba0 <_free_r>
70005064:	9903      	ldr	r1, [sp, #12]
70005066:	230c      	movs	r3, #12
70005068:	600b      	str	r3, [r1, #0]
7000506a:	e7cc      	b.n	70005006 <__sfvwrite_r+0x2a6>
7000506c:	f107 0b01 	add.w	fp, r7, #1
70005070:	f04f 0c01 	mov.w	ip, #1
70005074:	e6f2      	b.n	70004e5c <__sfvwrite_r+0xfc>
70005076:	9903      	ldr	r1, [sp, #12]
70005078:	2209      	movs	r2, #9
7000507a:	89a3      	ldrh	r3, [r4, #12]
7000507c:	f04f 30ff 	mov.w	r0, #4294967295
70005080:	f043 0340 	orr.w	r3, r3, #64	; 0x40
70005084:	600a      	str	r2, [r1, #0]
70005086:	81a3      	strh	r3, [r4, #12]
70005088:	e6d9      	b.n	70004e3e <__sfvwrite_r+0xde>
7000508a:	9a03      	ldr	r2, [sp, #12]
7000508c:	230c      	movs	r3, #12
7000508e:	6013      	str	r3, [r2, #0]
70005090:	e7b9      	b.n	70005006 <__sfvwrite_r+0x2a6>
70005092:	bf00      	nop

70005094 <_fwalk_reent>:
70005094:	e92d 45f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
70005098:	4607      	mov	r7, r0
7000509a:	468a      	mov	sl, r1
7000509c:	f7ff fc48 	bl	70004930 <__sfp_lock_acquire>
700050a0:	f117 06d8 	adds.w	r6, r7, #216	; 0xd8
700050a4:	bf08      	it	eq
700050a6:	46b0      	moveq	r8, r6
700050a8:	d018      	beq.n	700050dc <_fwalk_reent+0x48>
700050aa:	f04f 0800 	mov.w	r8, #0
700050ae:	6875      	ldr	r5, [r6, #4]
700050b0:	68b4      	ldr	r4, [r6, #8]
700050b2:	3d01      	subs	r5, #1
700050b4:	d40f      	bmi.n	700050d6 <_fwalk_reent+0x42>
700050b6:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
700050ba:	b14b      	cbz	r3, 700050d0 <_fwalk_reent+0x3c>
700050bc:	f9b4 300e 	ldrsh.w	r3, [r4, #14]
700050c0:	4621      	mov	r1, r4
700050c2:	4638      	mov	r0, r7
700050c4:	f1b3 3fff 	cmp.w	r3, #4294967295
700050c8:	d002      	beq.n	700050d0 <_fwalk_reent+0x3c>
700050ca:	47d0      	blx	sl
700050cc:	ea48 0800 	orr.w	r8, r8, r0
700050d0:	3468      	adds	r4, #104	; 0x68
700050d2:	3d01      	subs	r5, #1
700050d4:	d5ef      	bpl.n	700050b6 <_fwalk_reent+0x22>
700050d6:	6836      	ldr	r6, [r6, #0]
700050d8:	2e00      	cmp	r6, #0
700050da:	d1e8      	bne.n	700050ae <_fwalk_reent+0x1a>
700050dc:	f7ff fc2a 	bl	70004934 <__sfp_lock_release>
700050e0:	4640      	mov	r0, r8
700050e2:	e8bd 85f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
700050e6:	bf00      	nop

700050e8 <_fwalk>:
700050e8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
700050ec:	4606      	mov	r6, r0
700050ee:	4688      	mov	r8, r1
700050f0:	f7ff fc1e 	bl	70004930 <__sfp_lock_acquire>
700050f4:	36d8      	adds	r6, #216	; 0xd8
700050f6:	bf08      	it	eq
700050f8:	4637      	moveq	r7, r6
700050fa:	d015      	beq.n	70005128 <_fwalk+0x40>
700050fc:	2700      	movs	r7, #0
700050fe:	6875      	ldr	r5, [r6, #4]
70005100:	68b4      	ldr	r4, [r6, #8]
70005102:	3d01      	subs	r5, #1
70005104:	d40d      	bmi.n	70005122 <_fwalk+0x3a>
70005106:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
7000510a:	b13b      	cbz	r3, 7000511c <_fwalk+0x34>
7000510c:	f9b4 300e 	ldrsh.w	r3, [r4, #14]
70005110:	4620      	mov	r0, r4
70005112:	f1b3 3fff 	cmp.w	r3, #4294967295
70005116:	d001      	beq.n	7000511c <_fwalk+0x34>
70005118:	47c0      	blx	r8
7000511a:	4307      	orrs	r7, r0
7000511c:	3468      	adds	r4, #104	; 0x68
7000511e:	3d01      	subs	r5, #1
70005120:	d5f1      	bpl.n	70005106 <_fwalk+0x1e>
70005122:	6836      	ldr	r6, [r6, #0]
70005124:	2e00      	cmp	r6, #0
70005126:	d1ea      	bne.n	700050fe <_fwalk+0x16>
70005128:	f7ff fc04 	bl	70004934 <__sfp_lock_release>
7000512c:	4638      	mov	r0, r7
7000512e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
70005132:	bf00      	nop

70005134 <__locale_charset>:
70005134:	f248 336c 	movw	r3, #33644	; 0x836c
70005138:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000513c:	6818      	ldr	r0, [r3, #0]
7000513e:	4770      	bx	lr

70005140 <_localeconv_r>:
70005140:	4800      	ldr	r0, [pc, #0]	; (70005144 <_localeconv_r+0x4>)
70005142:	4770      	bx	lr
70005144:	70008370 	.word	0x70008370

70005148 <localeconv>:
70005148:	4800      	ldr	r0, [pc, #0]	; (7000514c <localeconv+0x4>)
7000514a:	4770      	bx	lr
7000514c:	70008370 	.word	0x70008370

70005150 <_setlocale_r>:
70005150:	b570      	push	{r4, r5, r6, lr}
70005152:	4605      	mov	r5, r0
70005154:	460e      	mov	r6, r1
70005156:	4614      	mov	r4, r2
70005158:	b172      	cbz	r2, 70005178 <_setlocale_r+0x28>
7000515a:	f248 2194 	movw	r1, #33428	; 0x8294
7000515e:	4610      	mov	r0, r2
70005160:	f2c7 0100 	movt	r1, #28672	; 0x7000
70005164:	f001 fc3e 	bl	700069e4 <strcmp>
70005168:	b958      	cbnz	r0, 70005182 <_setlocale_r+0x32>
7000516a:	f248 2094 	movw	r0, #33428	; 0x8294
7000516e:	622c      	str	r4, [r5, #32]
70005170:	f2c7 0000 	movt	r0, #28672	; 0x7000
70005174:	61ee      	str	r6, [r5, #28]
70005176:	bd70      	pop	{r4, r5, r6, pc}
70005178:	f248 2094 	movw	r0, #33428	; 0x8294
7000517c:	f2c7 0000 	movt	r0, #28672	; 0x7000
70005180:	bd70      	pop	{r4, r5, r6, pc}
70005182:	f248 21c8 	movw	r1, #33480	; 0x82c8
70005186:	4620      	mov	r0, r4
70005188:	f2c7 0100 	movt	r1, #28672	; 0x7000
7000518c:	f001 fc2a 	bl	700069e4 <strcmp>
70005190:	2800      	cmp	r0, #0
70005192:	d0ea      	beq.n	7000516a <_setlocale_r+0x1a>
70005194:	2000      	movs	r0, #0
70005196:	bd70      	pop	{r4, r5, r6, pc}

70005198 <setlocale>:
70005198:	f248 5344 	movw	r3, #34116	; 0x8544
7000519c:	460a      	mov	r2, r1
7000519e:	f2c7 0300 	movt	r3, #28672	; 0x7000
700051a2:	4601      	mov	r1, r0
700051a4:	6818      	ldr	r0, [r3, #0]
700051a6:	e7d3      	b.n	70005150 <_setlocale_r>

700051a8 <__smakebuf_r>:
700051a8:	898b      	ldrh	r3, [r1, #12]
700051aa:	b5f0      	push	{r4, r5, r6, r7, lr}
700051ac:	460c      	mov	r4, r1
700051ae:	b29a      	uxth	r2, r3
700051b0:	b091      	sub	sp, #68	; 0x44
700051b2:	f012 0f02 	tst.w	r2, #2
700051b6:	4605      	mov	r5, r0
700051b8:	d141      	bne.n	7000523e <__smakebuf_r+0x96>
700051ba:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
700051be:	2900      	cmp	r1, #0
700051c0:	db18      	blt.n	700051f4 <__smakebuf_r+0x4c>
700051c2:	aa01      	add	r2, sp, #4
700051c4:	f001 fdd4 	bl	70006d70 <_fstat_r>
700051c8:	2800      	cmp	r0, #0
700051ca:	db11      	blt.n	700051f0 <__smakebuf_r+0x48>
700051cc:	9b02      	ldr	r3, [sp, #8]
700051ce:	f403 4370 	and.w	r3, r3, #61440	; 0xf000
700051d2:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
700051d6:	bf14      	ite	ne
700051d8:	2700      	movne	r7, #0
700051da:	2701      	moveq	r7, #1
700051dc:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
700051e0:	d040      	beq.n	70005264 <__smakebuf_r+0xbc>
700051e2:	89a3      	ldrh	r3, [r4, #12]
700051e4:	f44f 6680 	mov.w	r6, #1024	; 0x400
700051e8:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
700051ec:	81a3      	strh	r3, [r4, #12]
700051ee:	e00b      	b.n	70005208 <__smakebuf_r+0x60>
700051f0:	89a3      	ldrh	r3, [r4, #12]
700051f2:	b29a      	uxth	r2, r3
700051f4:	f012 0f80 	tst.w	r2, #128	; 0x80
700051f8:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
700051fc:	bf0c      	ite	eq
700051fe:	f44f 6680 	moveq.w	r6, #1024	; 0x400
70005202:	2640      	movne	r6, #64	; 0x40
70005204:	2700      	movs	r7, #0
70005206:	81a3      	strh	r3, [r4, #12]
70005208:	4628      	mov	r0, r5
7000520a:	4631      	mov	r1, r6
7000520c:	f000 f84a 	bl	700052a4 <_malloc_r>
70005210:	b170      	cbz	r0, 70005230 <__smakebuf_r+0x88>
70005212:	89a1      	ldrh	r1, [r4, #12]
70005214:	f644 1279 	movw	r2, #18809	; 0x4979
70005218:	f2c7 0200 	movt	r2, #28672	; 0x7000
7000521c:	6120      	str	r0, [r4, #16]
7000521e:	f041 0180 	orr.w	r1, r1, #128	; 0x80
70005222:	6166      	str	r6, [r4, #20]
70005224:	62aa      	str	r2, [r5, #40]	; 0x28
70005226:	81a1      	strh	r1, [r4, #12]
70005228:	6020      	str	r0, [r4, #0]
7000522a:	b97f      	cbnz	r7, 7000524c <__smakebuf_r+0xa4>
7000522c:	b011      	add	sp, #68	; 0x44
7000522e:	bdf0      	pop	{r4, r5, r6, r7, pc}
70005230:	89a3      	ldrh	r3, [r4, #12]
70005232:	f413 7f00 	tst.w	r3, #512	; 0x200
70005236:	d1f9      	bne.n	7000522c <__smakebuf_r+0x84>
70005238:	f043 0302 	orr.w	r3, r3, #2
7000523c:	81a3      	strh	r3, [r4, #12]
7000523e:	f104 0347 	add.w	r3, r4, #71	; 0x47
70005242:	6123      	str	r3, [r4, #16]
70005244:	6023      	str	r3, [r4, #0]
70005246:	2301      	movs	r3, #1
70005248:	6163      	str	r3, [r4, #20]
7000524a:	e7ef      	b.n	7000522c <__smakebuf_r+0x84>
7000524c:	4628      	mov	r0, r5
7000524e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
70005252:	f001 fda3 	bl	70006d9c <_isatty_r>
70005256:	2800      	cmp	r0, #0
70005258:	d0e8      	beq.n	7000522c <__smakebuf_r+0x84>
7000525a:	89a3      	ldrh	r3, [r4, #12]
7000525c:	f043 0301 	orr.w	r3, r3, #1
70005260:	81a3      	strh	r3, [r4, #12]
70005262:	e7e3      	b.n	7000522c <__smakebuf_r+0x84>
70005264:	f646 135d 	movw	r3, #26973	; 0x695d
70005268:	6ae2      	ldr	r2, [r4, #44]	; 0x2c
7000526a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000526e:	429a      	cmp	r2, r3
70005270:	d1b7      	bne.n	700051e2 <__smakebuf_r+0x3a>
70005272:	89a2      	ldrh	r2, [r4, #12]
70005274:	f44f 6380 	mov.w	r3, #1024	; 0x400
70005278:	461e      	mov	r6, r3
7000527a:	6523      	str	r3, [r4, #80]	; 0x50
7000527c:	ea42 0303 	orr.w	r3, r2, r3
70005280:	81a3      	strh	r3, [r4, #12]
70005282:	e7c1      	b.n	70005208 <__smakebuf_r+0x60>

70005284 <free>:
70005284:	f248 5344 	movw	r3, #34116	; 0x8544
70005288:	4601      	mov	r1, r0
7000528a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000528e:	6818      	ldr	r0, [r3, #0]
70005290:	f7ff bc86 	b.w	70004ba0 <_free_r>

70005294 <malloc>:
70005294:	f248 5344 	movw	r3, #34116	; 0x8544
70005298:	4601      	mov	r1, r0
7000529a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000529e:	6818      	ldr	r0, [r3, #0]
700052a0:	f000 b800 	b.w	700052a4 <_malloc_r>

700052a4 <_malloc_r>:
700052a4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
700052a8:	f101 040b 	add.w	r4, r1, #11
700052ac:	2c16      	cmp	r4, #22
700052ae:	b083      	sub	sp, #12
700052b0:	4606      	mov	r6, r0
700052b2:	d82f      	bhi.n	70005314 <_malloc_r+0x70>
700052b4:	2300      	movs	r3, #0
700052b6:	2410      	movs	r4, #16
700052b8:	428c      	cmp	r4, r1
700052ba:	bf2c      	ite	cs
700052bc:	4619      	movcs	r1, r3
700052be:	f043 0101 	orrcc.w	r1, r3, #1
700052c2:	2900      	cmp	r1, #0
700052c4:	d130      	bne.n	70005328 <_malloc_r+0x84>
700052c6:	4630      	mov	r0, r6
700052c8:	f000 fc86 	bl	70005bd8 <__malloc_lock>
700052cc:	f5b4 7ffc 	cmp.w	r4, #504	; 0x1f8
700052d0:	d22e      	bcs.n	70005330 <_malloc_r+0x8c>
700052d2:	ea4f 0ed4 	mov.w	lr, r4, lsr #3
700052d6:	f248 6548 	movw	r5, #34376	; 0x8648
700052da:	f2c7 0500 	movt	r5, #28672	; 0x7000
700052de:	eb05 02ce 	add.w	r2, r5, lr, lsl #3
700052e2:	68d3      	ldr	r3, [r2, #12]
700052e4:	4293      	cmp	r3, r2
700052e6:	f000 8206 	beq.w	700056f6 <_malloc_r+0x452>
700052ea:	685a      	ldr	r2, [r3, #4]
700052ec:	f103 0508 	add.w	r5, r3, #8
700052f0:	68d9      	ldr	r1, [r3, #12]
700052f2:	4630      	mov	r0, r6
700052f4:	f022 0c03 	bic.w	ip, r2, #3
700052f8:	689a      	ldr	r2, [r3, #8]
700052fa:	4463      	add	r3, ip
700052fc:	685c      	ldr	r4, [r3, #4]
700052fe:	608a      	str	r2, [r1, #8]
70005300:	f044 0401 	orr.w	r4, r4, #1
70005304:	60d1      	str	r1, [r2, #12]
70005306:	605c      	str	r4, [r3, #4]
70005308:	f000 fc68 	bl	70005bdc <__malloc_unlock>
7000530c:	4628      	mov	r0, r5
7000530e:	b003      	add	sp, #12
70005310:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
70005314:	f024 0407 	bic.w	r4, r4, #7
70005318:	0fe3      	lsrs	r3, r4, #31
7000531a:	428c      	cmp	r4, r1
7000531c:	bf2c      	ite	cs
7000531e:	4619      	movcs	r1, r3
70005320:	f043 0101 	orrcc.w	r1, r3, #1
70005324:	2900      	cmp	r1, #0
70005326:	d0ce      	beq.n	700052c6 <_malloc_r+0x22>
70005328:	230c      	movs	r3, #12
7000532a:	2500      	movs	r5, #0
7000532c:	6033      	str	r3, [r6, #0]
7000532e:	e7ed      	b.n	7000530c <_malloc_r+0x68>
70005330:	ea5f 2e54 	movs.w	lr, r4, lsr #9
70005334:	bf04      	itt	eq
70005336:	ea4f 0ed4 	moveq.w	lr, r4, lsr #3
7000533a:	ea4f 00ce 	moveq.w	r0, lr, lsl #3
7000533e:	f040 8090 	bne.w	70005462 <_malloc_r+0x1be>
70005342:	f248 6548 	movw	r5, #34376	; 0x8648
70005346:	f2c7 0500 	movt	r5, #28672	; 0x7000
7000534a:	1828      	adds	r0, r5, r0
7000534c:	68c3      	ldr	r3, [r0, #12]
7000534e:	4298      	cmp	r0, r3
70005350:	d106      	bne.n	70005360 <_malloc_r+0xbc>
70005352:	e00d      	b.n	70005370 <_malloc_r+0xcc>
70005354:	2a00      	cmp	r2, #0
70005356:	f280 816f 	bge.w	70005638 <_malloc_r+0x394>
7000535a:	68db      	ldr	r3, [r3, #12]
7000535c:	4298      	cmp	r0, r3
7000535e:	d007      	beq.n	70005370 <_malloc_r+0xcc>
70005360:	6859      	ldr	r1, [r3, #4]
70005362:	f021 0103 	bic.w	r1, r1, #3
70005366:	1b0a      	subs	r2, r1, r4
70005368:	2a0f      	cmp	r2, #15
7000536a:	ddf3      	ble.n	70005354 <_malloc_r+0xb0>
7000536c:	f10e 3eff 	add.w	lr, lr, #4294967295
70005370:	f10e 0e01 	add.w	lr, lr, #1
70005374:	f248 6748 	movw	r7, #34376	; 0x8648
70005378:	f2c7 0700 	movt	r7, #28672	; 0x7000
7000537c:	f107 0108 	add.w	r1, r7, #8
70005380:	688b      	ldr	r3, [r1, #8]
70005382:	4299      	cmp	r1, r3
70005384:	bf08      	it	eq
70005386:	687a      	ldreq	r2, [r7, #4]
70005388:	d026      	beq.n	700053d8 <_malloc_r+0x134>
7000538a:	685a      	ldr	r2, [r3, #4]
7000538c:	f022 0c03 	bic.w	ip, r2, #3
70005390:	ebc4 020c 	rsb	r2, r4, ip
70005394:	2a0f      	cmp	r2, #15
70005396:	f300 8194 	bgt.w	700056c2 <_malloc_r+0x41e>
7000539a:	2a00      	cmp	r2, #0
7000539c:	60c9      	str	r1, [r1, #12]
7000539e:	6089      	str	r1, [r1, #8]
700053a0:	f280 8099 	bge.w	700054d6 <_malloc_r+0x232>
700053a4:	f5bc 7f00 	cmp.w	ip, #512	; 0x200
700053a8:	f080 8165 	bcs.w	70005676 <_malloc_r+0x3d2>
700053ac:	ea4f 0cdc 	mov.w	ip, ip, lsr #3
700053b0:	f04f 0a01 	mov.w	sl, #1
700053b4:	687a      	ldr	r2, [r7, #4]
700053b6:	eb07 00cc 	add.w	r0, r7, ip, lsl #3
700053ba:	ea4f 0cac 	mov.w	ip, ip, asr #2
700053be:	fa0a fc0c 	lsl.w	ip, sl, ip
700053c2:	60d8      	str	r0, [r3, #12]
700053c4:	f8d0 8008 	ldr.w	r8, [r0, #8]
700053c8:	ea4c 0202 	orr.w	r2, ip, r2
700053cc:	607a      	str	r2, [r7, #4]
700053ce:	f8c3 8008 	str.w	r8, [r3, #8]
700053d2:	f8c8 300c 	str.w	r3, [r8, #12]
700053d6:	6083      	str	r3, [r0, #8]
700053d8:	f04f 0c01 	mov.w	ip, #1
700053dc:	ea4f 03ae 	mov.w	r3, lr, asr #2
700053e0:	fa0c fc03 	lsl.w	ip, ip, r3
700053e4:	4594      	cmp	ip, r2
700053e6:	f200 8082 	bhi.w	700054ee <_malloc_r+0x24a>
700053ea:	ea12 0f0c 	tst.w	r2, ip
700053ee:	d108      	bne.n	70005402 <_malloc_r+0x15e>
700053f0:	f02e 0e03 	bic.w	lr, lr, #3
700053f4:	ea4f 0c4c 	mov.w	ip, ip, lsl #1
700053f8:	f10e 0e04 	add.w	lr, lr, #4
700053fc:	ea12 0f0c 	tst.w	r2, ip
70005400:	d0f8      	beq.n	700053f4 <_malloc_r+0x150>
70005402:	eb07 09ce 	add.w	r9, r7, lr, lsl #3
70005406:	46f2      	mov	sl, lr
70005408:	46c8      	mov	r8, r9
7000540a:	f8d8 300c 	ldr.w	r3, [r8, #12]
7000540e:	4598      	cmp	r8, r3
70005410:	d107      	bne.n	70005422 <_malloc_r+0x17e>
70005412:	e168      	b.n	700056e6 <_malloc_r+0x442>
70005414:	2a00      	cmp	r2, #0
70005416:	f280 8178 	bge.w	7000570a <_malloc_r+0x466>
7000541a:	68db      	ldr	r3, [r3, #12]
7000541c:	4598      	cmp	r8, r3
7000541e:	f000 8162 	beq.w	700056e6 <_malloc_r+0x442>
70005422:	6858      	ldr	r0, [r3, #4]
70005424:	f020 0003 	bic.w	r0, r0, #3
70005428:	1b02      	subs	r2, r0, r4
7000542a:	2a0f      	cmp	r2, #15
7000542c:	ddf2      	ble.n	70005414 <_malloc_r+0x170>
7000542e:	461d      	mov	r5, r3
70005430:	191f      	adds	r7, r3, r4
70005432:	f8d3 c00c 	ldr.w	ip, [r3, #12]
70005436:	f044 0e01 	orr.w	lr, r4, #1
7000543a:	f855 4f08 	ldr.w	r4, [r5, #8]!
7000543e:	4630      	mov	r0, r6
70005440:	50ba      	str	r2, [r7, r2]
70005442:	f042 0201 	orr.w	r2, r2, #1
70005446:	f8c3 e004 	str.w	lr, [r3, #4]
7000544a:	f8cc 4008 	str.w	r4, [ip, #8]
7000544e:	f8c4 c00c 	str.w	ip, [r4, #12]
70005452:	608f      	str	r7, [r1, #8]
70005454:	60cf      	str	r7, [r1, #12]
70005456:	607a      	str	r2, [r7, #4]
70005458:	60b9      	str	r1, [r7, #8]
7000545a:	60f9      	str	r1, [r7, #12]
7000545c:	f000 fbbe 	bl	70005bdc <__malloc_unlock>
70005460:	e754      	b.n	7000530c <_malloc_r+0x68>
70005462:	f1be 0f04 	cmp.w	lr, #4
70005466:	bf9e      	ittt	ls
70005468:	ea4f 1e94 	movls.w	lr, r4, lsr #6
7000546c:	f10e 0e38 	addls.w	lr, lr, #56	; 0x38
70005470:	ea4f 00ce 	movls.w	r0, lr, lsl #3
70005474:	f67f af65 	bls.w	70005342 <_malloc_r+0x9e>
70005478:	f1be 0f14 	cmp.w	lr, #20
7000547c:	bf9c      	itt	ls
7000547e:	f10e 0e5b 	addls.w	lr, lr, #91	; 0x5b
70005482:	ea4f 00ce 	movls.w	r0, lr, lsl #3
70005486:	f67f af5c 	bls.w	70005342 <_malloc_r+0x9e>
7000548a:	f1be 0f54 	cmp.w	lr, #84	; 0x54
7000548e:	bf9e      	ittt	ls
70005490:	ea4f 3e14 	movls.w	lr, r4, lsr #12
70005494:	f10e 0e6e 	addls.w	lr, lr, #110	; 0x6e
70005498:	ea4f 00ce 	movls.w	r0, lr, lsl #3
7000549c:	f67f af51 	bls.w	70005342 <_malloc_r+0x9e>
700054a0:	f5be 7faa 	cmp.w	lr, #340	; 0x154
700054a4:	bf9e      	ittt	ls
700054a6:	ea4f 3ed4 	movls.w	lr, r4, lsr #15
700054aa:	f10e 0e77 	addls.w	lr, lr, #119	; 0x77
700054ae:	ea4f 00ce 	movls.w	r0, lr, lsl #3
700054b2:	f67f af46 	bls.w	70005342 <_malloc_r+0x9e>
700054b6:	f240 5354 	movw	r3, #1364	; 0x554
700054ba:	459e      	cmp	lr, r3
700054bc:	bf95      	itete	ls
700054be:	ea4f 4e94 	movls.w	lr, r4, lsr #18
700054c2:	f44f 707c 	movhi.w	r0, #1008	; 0x3f0
700054c6:	f10e 0e7c 	addls.w	lr, lr, #124	; 0x7c
700054ca:	f04f 0e7e 	movhi.w	lr, #126	; 0x7e
700054ce:	bf98      	it	ls
700054d0:	ea4f 00ce 	movls.w	r0, lr, lsl #3
700054d4:	e735      	b.n	70005342 <_malloc_r+0x9e>
700054d6:	eb03 020c 	add.w	r2, r3, ip
700054da:	f103 0508 	add.w	r5, r3, #8
700054de:	4630      	mov	r0, r6
700054e0:	6853      	ldr	r3, [r2, #4]
700054e2:	f043 0301 	orr.w	r3, r3, #1
700054e6:	6053      	str	r3, [r2, #4]
700054e8:	f000 fb78 	bl	70005bdc <__malloc_unlock>
700054ec:	e70e      	b.n	7000530c <_malloc_r+0x68>
700054ee:	f8d7 8008 	ldr.w	r8, [r7, #8]
700054f2:	f8d8 3004 	ldr.w	r3, [r8, #4]
700054f6:	f023 0903 	bic.w	r9, r3, #3
700054fa:	ebc4 0209 	rsb	r2, r4, r9
700054fe:	454c      	cmp	r4, r9
70005500:	bf94      	ite	ls
70005502:	2300      	movls	r3, #0
70005504:	2301      	movhi	r3, #1
70005506:	2a0f      	cmp	r2, #15
70005508:	bfd8      	it	le
7000550a:	f043 0301 	orrle.w	r3, r3, #1
7000550e:	2b00      	cmp	r3, #0
70005510:	f000 80a1 	beq.w	70005656 <_malloc_r+0x3b2>
70005514:	f648 2b74 	movw	fp, #35444	; 0x8a74
70005518:	f8d5 2408 	ldr.w	r2, [r5, #1032]	; 0x408
7000551c:	f2c7 0b00 	movt	fp, #28672	; 0x7000
70005520:	f8db 3000 	ldr.w	r3, [fp]
70005524:	3310      	adds	r3, #16
70005526:	191b      	adds	r3, r3, r4
70005528:	f1b2 3fff 	cmp.w	r2, #4294967295
7000552c:	d006      	beq.n	7000553c <_malloc_r+0x298>
7000552e:	f503 637e 	add.w	r3, r3, #4064	; 0xfe0
70005532:	331f      	adds	r3, #31
70005534:	f423 637e 	bic.w	r3, r3, #4064	; 0xfe0
70005538:	f023 031f 	bic.w	r3, r3, #31
7000553c:	4619      	mov	r1, r3
7000553e:	4630      	mov	r0, r6
70005540:	9301      	str	r3, [sp, #4]
70005542:	f001 f9f3 	bl	7000692c <_sbrk_r>
70005546:	9b01      	ldr	r3, [sp, #4]
70005548:	f1b0 3fff 	cmp.w	r0, #4294967295
7000554c:	4682      	mov	sl, r0
7000554e:	f000 80f4 	beq.w	7000573a <_malloc_r+0x496>
70005552:	eb08 0109 	add.w	r1, r8, r9
70005556:	4281      	cmp	r1, r0
70005558:	f200 80ec 	bhi.w	70005734 <_malloc_r+0x490>
7000555c:	f8db 2004 	ldr.w	r2, [fp, #4]
70005560:	189a      	adds	r2, r3, r2
70005562:	4551      	cmp	r1, sl
70005564:	f8cb 2004 	str.w	r2, [fp, #4]
70005568:	f000 8145 	beq.w	700057f6 <_malloc_r+0x552>
7000556c:	f8d5 5408 	ldr.w	r5, [r5, #1032]	; 0x408
70005570:	f248 6048 	movw	r0, #34376	; 0x8648
70005574:	f2c7 0000 	movt	r0, #28672	; 0x7000
70005578:	f1b5 3fff 	cmp.w	r5, #4294967295
7000557c:	bf08      	it	eq
7000557e:	f8c0 a408 	streq.w	sl, [r0, #1032]	; 0x408
70005582:	d003      	beq.n	7000558c <_malloc_r+0x2e8>
70005584:	4452      	add	r2, sl
70005586:	1a51      	subs	r1, r2, r1
70005588:	f8cb 1004 	str.w	r1, [fp, #4]
7000558c:	f01a 0507 	ands.w	r5, sl, #7
70005590:	4630      	mov	r0, r6
70005592:	bf17      	itett	ne
70005594:	f1c5 0508 	rsbne	r5, r5, #8
70005598:	f44f 5580 	moveq.w	r5, #4096	; 0x1000
7000559c:	44aa      	addne	sl, r5
7000559e:	f505 5580 	addne.w	r5, r5, #4096	; 0x1000
700055a2:	4453      	add	r3, sl
700055a4:	051b      	lsls	r3, r3, #20
700055a6:	0d1b      	lsrs	r3, r3, #20
700055a8:	1aed      	subs	r5, r5, r3
700055aa:	4629      	mov	r1, r5
700055ac:	f001 f9be 	bl	7000692c <_sbrk_r>
700055b0:	f1b0 3fff 	cmp.w	r0, #4294967295
700055b4:	f000 812c 	beq.w	70005810 <_malloc_r+0x56c>
700055b8:	ebca 0100 	rsb	r1, sl, r0
700055bc:	1949      	adds	r1, r1, r5
700055be:	f041 0101 	orr.w	r1, r1, #1
700055c2:	f8db 2004 	ldr.w	r2, [fp, #4]
700055c6:	f648 2374 	movw	r3, #35444	; 0x8a74
700055ca:	f8c7 a008 	str.w	sl, [r7, #8]
700055ce:	f2c7 0300 	movt	r3, #28672	; 0x7000
700055d2:	18aa      	adds	r2, r5, r2
700055d4:	45b8      	cmp	r8, r7
700055d6:	f8cb 2004 	str.w	r2, [fp, #4]
700055da:	f8ca 1004 	str.w	r1, [sl, #4]
700055de:	d017      	beq.n	70005610 <_malloc_r+0x36c>
700055e0:	f1b9 0f0f 	cmp.w	r9, #15
700055e4:	f240 80df 	bls.w	700057a6 <_malloc_r+0x502>
700055e8:	f1a9 010c 	sub.w	r1, r9, #12
700055ec:	2505      	movs	r5, #5
700055ee:	f021 0107 	bic.w	r1, r1, #7
700055f2:	eb08 0001 	add.w	r0, r8, r1
700055f6:	290f      	cmp	r1, #15
700055f8:	6085      	str	r5, [r0, #8]
700055fa:	6045      	str	r5, [r0, #4]
700055fc:	f8d8 0004 	ldr.w	r0, [r8, #4]
70005600:	f000 0001 	and.w	r0, r0, #1
70005604:	ea41 0000 	orr.w	r0, r1, r0
70005608:	f8c8 0004 	str.w	r0, [r8, #4]
7000560c:	f200 80ac 	bhi.w	70005768 <_malloc_r+0x4c4>
70005610:	46d0      	mov	r8, sl
70005612:	f648 2374 	movw	r3, #35444	; 0x8a74
70005616:	f8db 102c 	ldr.w	r1, [fp, #44]	; 0x2c
7000561a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7000561e:	428a      	cmp	r2, r1
70005620:	f8db 1030 	ldr.w	r1, [fp, #48]	; 0x30
70005624:	bf88      	it	hi
70005626:	62da      	strhi	r2, [r3, #44]	; 0x2c
70005628:	f648 2374 	movw	r3, #35444	; 0x8a74
7000562c:	f2c7 0300 	movt	r3, #28672	; 0x7000
70005630:	428a      	cmp	r2, r1
70005632:	bf88      	it	hi
70005634:	631a      	strhi	r2, [r3, #48]	; 0x30
70005636:	e082      	b.n	7000573e <_malloc_r+0x49a>
70005638:	185c      	adds	r4, r3, r1
7000563a:	689a      	ldr	r2, [r3, #8]
7000563c:	68d9      	ldr	r1, [r3, #12]
7000563e:	4630      	mov	r0, r6
70005640:	6866      	ldr	r6, [r4, #4]
70005642:	f103 0508 	add.w	r5, r3, #8
70005646:	608a      	str	r2, [r1, #8]
70005648:	f046 0301 	orr.w	r3, r6, #1
7000564c:	60d1      	str	r1, [r2, #12]
7000564e:	6063      	str	r3, [r4, #4]
70005650:	f000 fac4 	bl	70005bdc <__malloc_unlock>
70005654:	e65a      	b.n	7000530c <_malloc_r+0x68>
70005656:	eb08 0304 	add.w	r3, r8, r4
7000565a:	f042 0201 	orr.w	r2, r2, #1
7000565e:	f044 0401 	orr.w	r4, r4, #1
70005662:	4630      	mov	r0, r6
70005664:	f8c8 4004 	str.w	r4, [r8, #4]
70005668:	f108 0508 	add.w	r5, r8, #8
7000566c:	605a      	str	r2, [r3, #4]
7000566e:	60bb      	str	r3, [r7, #8]
70005670:	f000 fab4 	bl	70005bdc <__malloc_unlock>
70005674:	e64a      	b.n	7000530c <_malloc_r+0x68>
70005676:	ea4f 225c 	mov.w	r2, ip, lsr #9
7000567a:	2a04      	cmp	r2, #4
7000567c:	d954      	bls.n	70005728 <_malloc_r+0x484>
7000567e:	2a14      	cmp	r2, #20
70005680:	f200 8089 	bhi.w	70005796 <_malloc_r+0x4f2>
70005684:	325b      	adds	r2, #91	; 0x5b
70005686:	ea4f 08c2 	mov.w	r8, r2, lsl #3
7000568a:	44a8      	add	r8, r5
7000568c:	f248 6748 	movw	r7, #34376	; 0x8648
70005690:	f2c7 0700 	movt	r7, #28672	; 0x7000
70005694:	f8d8 0008 	ldr.w	r0, [r8, #8]
70005698:	4540      	cmp	r0, r8
7000569a:	d103      	bne.n	700056a4 <_malloc_r+0x400>
7000569c:	e06f      	b.n	7000577e <_malloc_r+0x4da>
7000569e:	6880      	ldr	r0, [r0, #8]
700056a0:	4580      	cmp	r8, r0
700056a2:	d004      	beq.n	700056ae <_malloc_r+0x40a>
700056a4:	6842      	ldr	r2, [r0, #4]
700056a6:	f022 0203 	bic.w	r2, r2, #3
700056aa:	4594      	cmp	ip, r2
700056ac:	d3f7      	bcc.n	7000569e <_malloc_r+0x3fa>
700056ae:	f8d0 c00c 	ldr.w	ip, [r0, #12]
700056b2:	f8c3 c00c 	str.w	ip, [r3, #12]
700056b6:	6098      	str	r0, [r3, #8]
700056b8:	687a      	ldr	r2, [r7, #4]
700056ba:	60c3      	str	r3, [r0, #12]
700056bc:	f8cc 3008 	str.w	r3, [ip, #8]
700056c0:	e68a      	b.n	700053d8 <_malloc_r+0x134>
700056c2:	191f      	adds	r7, r3, r4
700056c4:	4630      	mov	r0, r6
700056c6:	f044 0401 	orr.w	r4, r4, #1
700056ca:	60cf      	str	r7, [r1, #12]
700056cc:	605c      	str	r4, [r3, #4]
700056ce:	f103 0508 	add.w	r5, r3, #8
700056d2:	50ba      	str	r2, [r7, r2]
700056d4:	f042 0201 	orr.w	r2, r2, #1
700056d8:	608f      	str	r7, [r1, #8]
700056da:	607a      	str	r2, [r7, #4]
700056dc:	60b9      	str	r1, [r7, #8]
700056de:	60f9      	str	r1, [r7, #12]
700056e0:	f000 fa7c 	bl	70005bdc <__malloc_unlock>
700056e4:	e612      	b.n	7000530c <_malloc_r+0x68>
700056e6:	f10a 0a01 	add.w	sl, sl, #1
700056ea:	f01a 0f03 	tst.w	sl, #3
700056ee:	d05f      	beq.n	700057b0 <_malloc_r+0x50c>
700056f0:	f103 0808 	add.w	r8, r3, #8
700056f4:	e689      	b.n	7000540a <_malloc_r+0x166>
700056f6:	f103 0208 	add.w	r2, r3, #8
700056fa:	68d3      	ldr	r3, [r2, #12]
700056fc:	429a      	cmp	r2, r3
700056fe:	bf08      	it	eq
70005700:	f10e 0e02 	addeq.w	lr, lr, #2
70005704:	f43f ae36 	beq.w	70005374 <_malloc_r+0xd0>
70005708:	e5ef      	b.n	700052ea <_malloc_r+0x46>
7000570a:	461d      	mov	r5, r3
7000570c:	1819      	adds	r1, r3, r0
7000570e:	68da      	ldr	r2, [r3, #12]
70005710:	4630      	mov	r0, r6
70005712:	f855 3f08 	ldr.w	r3, [r5, #8]!
70005716:	684c      	ldr	r4, [r1, #4]
70005718:	6093      	str	r3, [r2, #8]
7000571a:	f044 0401 	orr.w	r4, r4, #1
7000571e:	60da      	str	r2, [r3, #12]
70005720:	604c      	str	r4, [r1, #4]
70005722:	f000 fa5b 	bl	70005bdc <__malloc_unlock>
70005726:	e5f1      	b.n	7000530c <_malloc_r+0x68>
70005728:	ea4f 129c 	mov.w	r2, ip, lsr #6
7000572c:	3238      	adds	r2, #56	; 0x38
7000572e:	ea4f 08c2 	mov.w	r8, r2, lsl #3
70005732:	e7aa      	b.n	7000568a <_malloc_r+0x3e6>
70005734:	45b8      	cmp	r8, r7
70005736:	f43f af11 	beq.w	7000555c <_malloc_r+0x2b8>
7000573a:	f8d7 8008 	ldr.w	r8, [r7, #8]
7000573e:	f8d8 2004 	ldr.w	r2, [r8, #4]
70005742:	f022 0203 	bic.w	r2, r2, #3
70005746:	4294      	cmp	r4, r2
70005748:	bf94      	ite	ls
7000574a:	2300      	movls	r3, #0
7000574c:	2301      	movhi	r3, #1
7000574e:	1b12      	subs	r2, r2, r4
70005750:	2a0f      	cmp	r2, #15
70005752:	bfd8      	it	le
70005754:	f043 0301 	orrle.w	r3, r3, #1
70005758:	2b00      	cmp	r3, #0
7000575a:	f43f af7c 	beq.w	70005656 <_malloc_r+0x3b2>
7000575e:	4630      	mov	r0, r6
70005760:	2500      	movs	r5, #0
70005762:	f000 fa3b 	bl	70005bdc <__malloc_unlock>
70005766:	e5d1      	b.n	7000530c <_malloc_r+0x68>
70005768:	f108 0108 	add.w	r1, r8, #8
7000576c:	4630      	mov	r0, r6
7000576e:	9301      	str	r3, [sp, #4]
70005770:	f7ff fa16 	bl	70004ba0 <_free_r>
70005774:	9b01      	ldr	r3, [sp, #4]
70005776:	f8d7 8008 	ldr.w	r8, [r7, #8]
7000577a:	685a      	ldr	r2, [r3, #4]
7000577c:	e749      	b.n	70005612 <_malloc_r+0x36e>
7000577e:	f04f 0a01 	mov.w	sl, #1
70005782:	f8d7 8004 	ldr.w	r8, [r7, #4]
70005786:	1092      	asrs	r2, r2, #2
70005788:	4684      	mov	ip, r0
7000578a:	fa0a f202 	lsl.w	r2, sl, r2
7000578e:	ea48 0202 	orr.w	r2, r8, r2
70005792:	607a      	str	r2, [r7, #4]
70005794:	e78d      	b.n	700056b2 <_malloc_r+0x40e>
70005796:	2a54      	cmp	r2, #84	; 0x54
70005798:	d824      	bhi.n	700057e4 <_malloc_r+0x540>
7000579a:	ea4f 321c 	mov.w	r2, ip, lsr #12
7000579e:	326e      	adds	r2, #110	; 0x6e
700057a0:	ea4f 08c2 	mov.w	r8, r2, lsl #3
700057a4:	e771      	b.n	7000568a <_malloc_r+0x3e6>
700057a6:	2301      	movs	r3, #1
700057a8:	46d0      	mov	r8, sl
700057aa:	f8ca 3004 	str.w	r3, [sl, #4]
700057ae:	e7c6      	b.n	7000573e <_malloc_r+0x49a>
700057b0:	464a      	mov	r2, r9
700057b2:	f01e 0f03 	tst.w	lr, #3
700057b6:	4613      	mov	r3, r2
700057b8:	f10e 3eff 	add.w	lr, lr, #4294967295
700057bc:	d033      	beq.n	70005826 <_malloc_r+0x582>
700057be:	f853 2908 	ldr.w	r2, [r3], #-8
700057c2:	429a      	cmp	r2, r3
700057c4:	d0f5      	beq.n	700057b2 <_malloc_r+0x50e>
700057c6:	687b      	ldr	r3, [r7, #4]
700057c8:	ea4f 0c4c 	mov.w	ip, ip, lsl #1
700057cc:	459c      	cmp	ip, r3
700057ce:	f63f ae8e 	bhi.w	700054ee <_malloc_r+0x24a>
700057d2:	f1bc 0f00 	cmp.w	ip, #0
700057d6:	f43f ae8a 	beq.w	700054ee <_malloc_r+0x24a>
700057da:	ea1c 0f03 	tst.w	ip, r3
700057de:	d027      	beq.n	70005830 <_malloc_r+0x58c>
700057e0:	46d6      	mov	lr, sl
700057e2:	e60e      	b.n	70005402 <_malloc_r+0x15e>
700057e4:	f5b2 7faa 	cmp.w	r2, #340	; 0x154
700057e8:	d815      	bhi.n	70005816 <_malloc_r+0x572>
700057ea:	ea4f 32dc 	mov.w	r2, ip, lsr #15
700057ee:	3277      	adds	r2, #119	; 0x77
700057f0:	ea4f 08c2 	mov.w	r8, r2, lsl #3
700057f4:	e749      	b.n	7000568a <_malloc_r+0x3e6>
700057f6:	0508      	lsls	r0, r1, #20
700057f8:	0d00      	lsrs	r0, r0, #20
700057fa:	2800      	cmp	r0, #0
700057fc:	f47f aeb6 	bne.w	7000556c <_malloc_r+0x2c8>
70005800:	f8d7 8008 	ldr.w	r8, [r7, #8]
70005804:	444b      	add	r3, r9
70005806:	f043 0301 	orr.w	r3, r3, #1
7000580a:	f8c8 3004 	str.w	r3, [r8, #4]
7000580e:	e700      	b.n	70005612 <_malloc_r+0x36e>
70005810:	2101      	movs	r1, #1
70005812:	2500      	movs	r5, #0
70005814:	e6d5      	b.n	700055c2 <_malloc_r+0x31e>
70005816:	f240 5054 	movw	r0, #1364	; 0x554
7000581a:	4282      	cmp	r2, r0
7000581c:	d90d      	bls.n	7000583a <_malloc_r+0x596>
7000581e:	f44f 787c 	mov.w	r8, #1008	; 0x3f0
70005822:	227e      	movs	r2, #126	; 0x7e
70005824:	e731      	b.n	7000568a <_malloc_r+0x3e6>
70005826:	687b      	ldr	r3, [r7, #4]
70005828:	ea23 030c 	bic.w	r3, r3, ip
7000582c:	607b      	str	r3, [r7, #4]
7000582e:	e7cb      	b.n	700057c8 <_malloc_r+0x524>
70005830:	ea4f 0c4c 	mov.w	ip, ip, lsl #1
70005834:	f10a 0a04 	add.w	sl, sl, #4
70005838:	e7cf      	b.n	700057da <_malloc_r+0x536>
7000583a:	ea4f 429c 	mov.w	r2, ip, lsr #18
7000583e:	327c      	adds	r2, #124	; 0x7c
70005840:	ea4f 08c2 	mov.w	r8, r2, lsl #3
70005844:	e721      	b.n	7000568a <_malloc_r+0x3e6>
70005846:	bf00      	nop

70005848 <memchr>:
70005848:	f010 0f03 	tst.w	r0, #3
7000584c:	b2c9      	uxtb	r1, r1
7000584e:	b410      	push	{r4}
70005850:	d010      	beq.n	70005874 <memchr+0x2c>
70005852:	2a00      	cmp	r2, #0
70005854:	d02f      	beq.n	700058b6 <memchr+0x6e>
70005856:	7803      	ldrb	r3, [r0, #0]
70005858:	428b      	cmp	r3, r1
7000585a:	d02a      	beq.n	700058b2 <memchr+0x6a>
7000585c:	3a01      	subs	r2, #1
7000585e:	e005      	b.n	7000586c <memchr+0x24>
70005860:	2a00      	cmp	r2, #0
70005862:	d028      	beq.n	700058b6 <memchr+0x6e>
70005864:	7803      	ldrb	r3, [r0, #0]
70005866:	3a01      	subs	r2, #1
70005868:	428b      	cmp	r3, r1
7000586a:	d022      	beq.n	700058b2 <memchr+0x6a>
7000586c:	3001      	adds	r0, #1
7000586e:	f010 0f03 	tst.w	r0, #3
70005872:	d1f5      	bne.n	70005860 <memchr+0x18>
70005874:	2a03      	cmp	r2, #3
70005876:	d911      	bls.n	7000589c <memchr+0x54>
70005878:	ea41 2401 	orr.w	r4, r1, r1, lsl #8
7000587c:	ea44 4404 	orr.w	r4, r4, r4, lsl #16
70005880:	6803      	ldr	r3, [r0, #0]
70005882:	ea84 0303 	eor.w	r3, r4, r3
70005886:	f1a3 3c01 	sub.w	ip, r3, #16843009	; 0x1010101
7000588a:	ea2c 0303 	bic.w	r3, ip, r3
7000588e:	f013 3f80 	tst.w	r3, #2155905152	; 0x80808080
70005892:	d103      	bne.n	7000589c <memchr+0x54>
70005894:	3a04      	subs	r2, #4
70005896:	3004      	adds	r0, #4
70005898:	2a03      	cmp	r2, #3
7000589a:	d8f1      	bhi.n	70005880 <memchr+0x38>
7000589c:	b15a      	cbz	r2, 700058b6 <memchr+0x6e>
7000589e:	7803      	ldrb	r3, [r0, #0]
700058a0:	428b      	cmp	r3, r1
700058a2:	d006      	beq.n	700058b2 <memchr+0x6a>
700058a4:	3a01      	subs	r2, #1
700058a6:	b132      	cbz	r2, 700058b6 <memchr+0x6e>
700058a8:	f810 3f01 	ldrb.w	r3, [r0, #1]!
700058ac:	3a01      	subs	r2, #1
700058ae:	428b      	cmp	r3, r1
700058b0:	d1f9      	bne.n	700058a6 <memchr+0x5e>
700058b2:	bc10      	pop	{r4}
700058b4:	4770      	bx	lr
700058b6:	2000      	movs	r0, #0
700058b8:	e7fb      	b.n	700058b2 <memchr+0x6a>
700058ba:	bf00      	nop

700058bc <memcpy>:
700058bc:	2a03      	cmp	r2, #3
700058be:	e92d 07f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl}
700058c2:	d80b      	bhi.n	700058dc <memcpy+0x20>
700058c4:	b13a      	cbz	r2, 700058d6 <memcpy+0x1a>
700058c6:	2300      	movs	r3, #0
700058c8:	f811 c003 	ldrb.w	ip, [r1, r3]
700058cc:	f800 c003 	strb.w	ip, [r0, r3]
700058d0:	3301      	adds	r3, #1
700058d2:	4293      	cmp	r3, r2
700058d4:	d1f8      	bne.n	700058c8 <memcpy+0xc>
700058d6:	e8bd 07f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl}
700058da:	4770      	bx	lr
700058dc:	1882      	adds	r2, r0, r2
700058de:	460c      	mov	r4, r1
700058e0:	4603      	mov	r3, r0
700058e2:	e003      	b.n	700058ec <memcpy+0x30>
700058e4:	f814 1c01 	ldrb.w	r1, [r4, #-1]
700058e8:	f803 1c01 	strb.w	r1, [r3, #-1]
700058ec:	f003 0603 	and.w	r6, r3, #3
700058f0:	4619      	mov	r1, r3
700058f2:	46a4      	mov	ip, r4
700058f4:	3301      	adds	r3, #1
700058f6:	3401      	adds	r4, #1
700058f8:	2e00      	cmp	r6, #0
700058fa:	d1f3      	bne.n	700058e4 <memcpy+0x28>
700058fc:	f01c 0403 	ands.w	r4, ip, #3
70005900:	4663      	mov	r3, ip
70005902:	bf08      	it	eq
70005904:	ebc1 0c02 	rsbeq	ip, r1, r2
70005908:	d068      	beq.n	700059dc <memcpy+0x120>
7000590a:	4265      	negs	r5, r4
7000590c:	f1c4 0a04 	rsb	sl, r4, #4
70005910:	eb0c 0705 	add.w	r7, ip, r5
70005914:	4633      	mov	r3, r6
70005916:	ea4f 0aca 	mov.w	sl, sl, lsl #3
7000591a:	f85c 6005 	ldr.w	r6, [ip, r5]
7000591e:	ea4f 08c4 	mov.w	r8, r4, lsl #3
70005922:	1a55      	subs	r5, r2, r1
70005924:	e008      	b.n	70005938 <memcpy+0x7c>
70005926:	f857 4f04 	ldr.w	r4, [r7, #4]!
7000592a:	4626      	mov	r6, r4
7000592c:	fa04 f40a 	lsl.w	r4, r4, sl
70005930:	ea49 0404 	orr.w	r4, r9, r4
70005934:	50cc      	str	r4, [r1, r3]
70005936:	3304      	adds	r3, #4
70005938:	185c      	adds	r4, r3, r1
7000593a:	2d03      	cmp	r5, #3
7000593c:	fa26 f908 	lsr.w	r9, r6, r8
70005940:	f1a5 0504 	sub.w	r5, r5, #4
70005944:	eb0c 0603 	add.w	r6, ip, r3
70005948:	dced      	bgt.n	70005926 <memcpy+0x6a>
7000594a:	2300      	movs	r3, #0
7000594c:	e002      	b.n	70005954 <memcpy+0x98>
7000594e:	5cf1      	ldrb	r1, [r6, r3]
70005950:	54e1      	strb	r1, [r4, r3]
70005952:	3301      	adds	r3, #1
70005954:	1919      	adds	r1, r3, r4
70005956:	4291      	cmp	r1, r2
70005958:	d3f9      	bcc.n	7000594e <memcpy+0x92>
7000595a:	e7bc      	b.n	700058d6 <memcpy+0x1a>
7000595c:	f853 4c40 	ldr.w	r4, [r3, #-64]
70005960:	f841 4c40 	str.w	r4, [r1, #-64]
70005964:	f853 4c3c 	ldr.w	r4, [r3, #-60]
70005968:	f841 4c3c 	str.w	r4, [r1, #-60]
7000596c:	f853 4c38 	ldr.w	r4, [r3, #-56]
70005970:	f841 4c38 	str.w	r4, [r1, #-56]
70005974:	f853 4c34 	ldr.w	r4, [r3, #-52]
70005978:	f841 4c34 	str.w	r4, [r1, #-52]
7000597c:	f853 4c30 	ldr.w	r4, [r3, #-48]
70005980:	f841 4c30 	str.w	r4, [r1, #-48]
70005984:	f853 4c2c 	ldr.w	r4, [r3, #-44]
70005988:	f841 4c2c 	str.w	r4, [r1, #-44]
7000598c:	f853 4c28 	ldr.w	r4, [r3, #-40]
70005990:	f841 4c28 	str.w	r4, [r1, #-40]
70005994:	f853 4c24 	ldr.w	r4, [r3, #-36]
70005998:	f841 4c24 	str.w	r4, [r1, #-36]
7000599c:	f853 4c20 	ldr.w	r4, [r3, #-32]
700059a0:	f841 4c20 	str.w	r4, [r1, #-32]
700059a4:	f853 4c1c 	ldr.w	r4, [r3, #-28]
700059a8:	f841 4c1c 	str.w	r4, [r1, #-28]
700059ac:	f853 4c18 	ldr.w	r4, [r3, #-24]
700059b0:	f841 4c18 	str.w	r4, [r1, #-24]
700059b4:	f853 4c14 	ldr.w	r4, [r3, #-20]
700059b8:	f841 4c14 	str.w	r4, [r1, #-20]
700059bc:	f853 4c10 	ldr.w	r4, [r3, #-16]
700059c0:	f841 4c10 	str.w	r4, [r1, #-16]
700059c4:	f853 4c0c 	ldr.w	r4, [r3, #-12]
700059c8:	f841 4c0c 	str.w	r4, [r1, #-12]
700059cc:	f853 4c08 	ldr.w	r4, [r3, #-8]
700059d0:	f841 4c08 	str.w	r4, [r1, #-8]
700059d4:	f853 4c04 	ldr.w	r4, [r3, #-4]
700059d8:	f841 4c04 	str.w	r4, [r1, #-4]
700059dc:	461c      	mov	r4, r3
700059de:	460d      	mov	r5, r1
700059e0:	3340      	adds	r3, #64	; 0x40
700059e2:	3140      	adds	r1, #64	; 0x40
700059e4:	f1bc 0f3f 	cmp.w	ip, #63	; 0x3f
700059e8:	f1ac 0c40 	sub.w	ip, ip, #64	; 0x40
700059ec:	dcb6      	bgt.n	7000595c <memcpy+0xa0>
700059ee:	4621      	mov	r1, r4
700059f0:	462b      	mov	r3, r5
700059f2:	1b54      	subs	r4, r2, r5
700059f4:	e00f      	b.n	70005a16 <memcpy+0x15a>
700059f6:	f851 5c10 	ldr.w	r5, [r1, #-16]
700059fa:	f843 5c10 	str.w	r5, [r3, #-16]
700059fe:	f851 5c0c 	ldr.w	r5, [r1, #-12]
70005a02:	f843 5c0c 	str.w	r5, [r3, #-12]
70005a06:	f851 5c08 	ldr.w	r5, [r1, #-8]
70005a0a:	f843 5c08 	str.w	r5, [r3, #-8]
70005a0e:	f851 5c04 	ldr.w	r5, [r1, #-4]
70005a12:	f843 5c04 	str.w	r5, [r3, #-4]
70005a16:	2c0f      	cmp	r4, #15
70005a18:	460d      	mov	r5, r1
70005a1a:	469c      	mov	ip, r3
70005a1c:	f101 0110 	add.w	r1, r1, #16
70005a20:	f103 0310 	add.w	r3, r3, #16
70005a24:	f1a4 0410 	sub.w	r4, r4, #16
70005a28:	dce5      	bgt.n	700059f6 <memcpy+0x13a>
70005a2a:	ebcc 0102 	rsb	r1, ip, r2
70005a2e:	2300      	movs	r3, #0
70005a30:	e003      	b.n	70005a3a <memcpy+0x17e>
70005a32:	58ec      	ldr	r4, [r5, r3]
70005a34:	f84c 4003 	str.w	r4, [ip, r3]
70005a38:	3304      	adds	r3, #4
70005a3a:	195e      	adds	r6, r3, r5
70005a3c:	2903      	cmp	r1, #3
70005a3e:	eb03 040c 	add.w	r4, r3, ip
70005a42:	f1a1 0104 	sub.w	r1, r1, #4
70005a46:	dcf4      	bgt.n	70005a32 <memcpy+0x176>
70005a48:	e77f      	b.n	7000594a <memcpy+0x8e>
70005a4a:	bf00      	nop

70005a4c <memmove>:
70005a4c:	4288      	cmp	r0, r1
70005a4e:	468c      	mov	ip, r1
70005a50:	b470      	push	{r4, r5, r6}
70005a52:	4605      	mov	r5, r0
70005a54:	4614      	mov	r4, r2
70005a56:	d90e      	bls.n	70005a76 <memmove+0x2a>
70005a58:	188b      	adds	r3, r1, r2
70005a5a:	4298      	cmp	r0, r3
70005a5c:	d20b      	bcs.n	70005a76 <memmove+0x2a>
70005a5e:	b142      	cbz	r2, 70005a72 <memmove+0x26>
70005a60:	ebc2 0c03 	rsb	ip, r2, r3
70005a64:	4601      	mov	r1, r0
70005a66:	1e53      	subs	r3, r2, #1
70005a68:	f81c 2003 	ldrb.w	r2, [ip, r3]
70005a6c:	54ca      	strb	r2, [r1, r3]
70005a6e:	3b01      	subs	r3, #1
70005a70:	d2fa      	bcs.n	70005a68 <memmove+0x1c>
70005a72:	bc70      	pop	{r4, r5, r6}
70005a74:	4770      	bx	lr
70005a76:	2a0f      	cmp	r2, #15
70005a78:	d809      	bhi.n	70005a8e <memmove+0x42>
70005a7a:	2c00      	cmp	r4, #0
70005a7c:	d0f9      	beq.n	70005a72 <memmove+0x26>
70005a7e:	2300      	movs	r3, #0
70005a80:	f81c 2003 	ldrb.w	r2, [ip, r3]
70005a84:	54ea      	strb	r2, [r5, r3]
70005a86:	3301      	adds	r3, #1
70005a88:	42a3      	cmp	r3, r4
70005a8a:	d1f9      	bne.n	70005a80 <memmove+0x34>
70005a8c:	e7f1      	b.n	70005a72 <memmove+0x26>
70005a8e:	ea41 0300 	orr.w	r3, r1, r0
70005a92:	f013 0f03 	tst.w	r3, #3
70005a96:	d1f0      	bne.n	70005a7a <memmove+0x2e>
70005a98:	4694      	mov	ip, r2
70005a9a:	460c      	mov	r4, r1
70005a9c:	4603      	mov	r3, r0
70005a9e:	6825      	ldr	r5, [r4, #0]
70005aa0:	f1ac 0c10 	sub.w	ip, ip, #16
70005aa4:	601d      	str	r5, [r3, #0]
70005aa6:	6865      	ldr	r5, [r4, #4]
70005aa8:	605d      	str	r5, [r3, #4]
70005aaa:	68a5      	ldr	r5, [r4, #8]
70005aac:	609d      	str	r5, [r3, #8]
70005aae:	68e5      	ldr	r5, [r4, #12]
70005ab0:	3410      	adds	r4, #16
70005ab2:	60dd      	str	r5, [r3, #12]
70005ab4:	3310      	adds	r3, #16
70005ab6:	f1bc 0f0f 	cmp.w	ip, #15
70005aba:	d8f0      	bhi.n	70005a9e <memmove+0x52>
70005abc:	3a10      	subs	r2, #16
70005abe:	ea4f 1c12 	mov.w	ip, r2, lsr #4
70005ac2:	f10c 0501 	add.w	r5, ip, #1
70005ac6:	ebcc 7c0c 	rsb	ip, ip, ip, lsl #28
70005aca:	012d      	lsls	r5, r5, #4
70005acc:	eb02 160c 	add.w	r6, r2, ip, lsl #4
70005ad0:	eb01 0c05 	add.w	ip, r1, r5
70005ad4:	1945      	adds	r5, r0, r5
70005ad6:	2e03      	cmp	r6, #3
70005ad8:	4634      	mov	r4, r6
70005ada:	d9ce      	bls.n	70005a7a <memmove+0x2e>
70005adc:	2300      	movs	r3, #0
70005ade:	f85c 2003 	ldr.w	r2, [ip, r3]
70005ae2:	50ea      	str	r2, [r5, r3]
70005ae4:	3304      	adds	r3, #4
70005ae6:	1af2      	subs	r2, r6, r3
70005ae8:	2a03      	cmp	r2, #3
70005aea:	d8f8      	bhi.n	70005ade <memmove+0x92>
70005aec:	3e04      	subs	r6, #4
70005aee:	08b3      	lsrs	r3, r6, #2
70005af0:	1c5a      	adds	r2, r3, #1
70005af2:	ebc3 7383 	rsb	r3, r3, r3, lsl #30
70005af6:	0092      	lsls	r2, r2, #2
70005af8:	4494      	add	ip, r2
70005afa:	eb06 0483 	add.w	r4, r6, r3, lsl #2
70005afe:	18ad      	adds	r5, r5, r2
70005b00:	e7bb      	b.n	70005a7a <memmove+0x2e>
70005b02:	bf00      	nop

70005b04 <memset>:
70005b04:	2a03      	cmp	r2, #3
70005b06:	b2c9      	uxtb	r1, r1
70005b08:	b430      	push	{r4, r5}
70005b0a:	d807      	bhi.n	70005b1c <memset+0x18>
70005b0c:	b122      	cbz	r2, 70005b18 <memset+0x14>
70005b0e:	2300      	movs	r3, #0
70005b10:	54c1      	strb	r1, [r0, r3]
70005b12:	3301      	adds	r3, #1
70005b14:	4293      	cmp	r3, r2
70005b16:	d1fb      	bne.n	70005b10 <memset+0xc>
70005b18:	bc30      	pop	{r4, r5}
70005b1a:	4770      	bx	lr
70005b1c:	eb00 0c02 	add.w	ip, r0, r2
70005b20:	4603      	mov	r3, r0
70005b22:	e001      	b.n	70005b28 <memset+0x24>
70005b24:	f803 1c01 	strb.w	r1, [r3, #-1]
70005b28:	f003 0403 	and.w	r4, r3, #3
70005b2c:	461a      	mov	r2, r3
70005b2e:	3301      	adds	r3, #1
70005b30:	2c00      	cmp	r4, #0
70005b32:	d1f7      	bne.n	70005b24 <memset+0x20>
70005b34:	f04f 3301 	mov.w	r3, #16843009	; 0x1010101
70005b38:	ebc2 040c 	rsb	r4, r2, ip
70005b3c:	fb03 f301 	mul.w	r3, r3, r1
70005b40:	e01f      	b.n	70005b82 <memset+0x7e>
70005b42:	f842 3c40 	str.w	r3, [r2, #-64]
70005b46:	f842 3c3c 	str.w	r3, [r2, #-60]
70005b4a:	f842 3c38 	str.w	r3, [r2, #-56]
70005b4e:	f842 3c34 	str.w	r3, [r2, #-52]
70005b52:	f842 3c30 	str.w	r3, [r2, #-48]
70005b56:	f842 3c2c 	str.w	r3, [r2, #-44]
70005b5a:	f842 3c28 	str.w	r3, [r2, #-40]
70005b5e:	f842 3c24 	str.w	r3, [r2, #-36]
70005b62:	f842 3c20 	str.w	r3, [r2, #-32]
70005b66:	f842 3c1c 	str.w	r3, [r2, #-28]
70005b6a:	f842 3c18 	str.w	r3, [r2, #-24]
70005b6e:	f842 3c14 	str.w	r3, [r2, #-20]
70005b72:	f842 3c10 	str.w	r3, [r2, #-16]
70005b76:	f842 3c0c 	str.w	r3, [r2, #-12]
70005b7a:	f842 3c08 	str.w	r3, [r2, #-8]
70005b7e:	f842 3c04 	str.w	r3, [r2, #-4]
70005b82:	4615      	mov	r5, r2
70005b84:	3240      	adds	r2, #64	; 0x40
70005b86:	2c3f      	cmp	r4, #63	; 0x3f
70005b88:	f1a4 0440 	sub.w	r4, r4, #64	; 0x40
70005b8c:	dcd9      	bgt.n	70005b42 <memset+0x3e>
70005b8e:	462a      	mov	r2, r5
70005b90:	ebc5 040c 	rsb	r4, r5, ip
70005b94:	e007      	b.n	70005ba6 <memset+0xa2>
70005b96:	f842 3c10 	str.w	r3, [r2, #-16]
70005b9a:	f842 3c0c 	str.w	r3, [r2, #-12]
70005b9e:	f842 3c08 	str.w	r3, [r2, #-8]
70005ba2:	f842 3c04 	str.w	r3, [r2, #-4]
70005ba6:	4615      	mov	r5, r2
70005ba8:	3210      	adds	r2, #16
70005baa:	2c0f      	cmp	r4, #15
70005bac:	f1a4 0410 	sub.w	r4, r4, #16
70005bb0:	dcf1      	bgt.n	70005b96 <memset+0x92>
70005bb2:	462a      	mov	r2, r5
70005bb4:	ebc5 050c 	rsb	r5, r5, ip
70005bb8:	e001      	b.n	70005bbe <memset+0xba>
70005bba:	f842 3c04 	str.w	r3, [r2, #-4]
70005bbe:	4614      	mov	r4, r2
70005bc0:	3204      	adds	r2, #4
70005bc2:	2d03      	cmp	r5, #3
70005bc4:	f1a5 0504 	sub.w	r5, r5, #4
70005bc8:	dcf7      	bgt.n	70005bba <memset+0xb6>
70005bca:	e001      	b.n	70005bd0 <memset+0xcc>
70005bcc:	f804 1b01 	strb.w	r1, [r4], #1
70005bd0:	4564      	cmp	r4, ip
70005bd2:	d3fb      	bcc.n	70005bcc <memset+0xc8>
70005bd4:	e7a0      	b.n	70005b18 <memset+0x14>
70005bd6:	bf00      	nop

70005bd8 <__malloc_lock>:
70005bd8:	4770      	bx	lr
70005bda:	bf00      	nop

70005bdc <__malloc_unlock>:
70005bdc:	4770      	bx	lr
70005bde:	bf00      	nop

70005be0 <__hi0bits>:
70005be0:	0c02      	lsrs	r2, r0, #16
70005be2:	4603      	mov	r3, r0
70005be4:	0412      	lsls	r2, r2, #16
70005be6:	b1b2      	cbz	r2, 70005c16 <__hi0bits+0x36>
70005be8:	2000      	movs	r0, #0
70005bea:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
70005bee:	d101      	bne.n	70005bf4 <__hi0bits+0x14>
70005bf0:	3008      	adds	r0, #8
70005bf2:	021b      	lsls	r3, r3, #8
70005bf4:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
70005bf8:	d101      	bne.n	70005bfe <__hi0bits+0x1e>
70005bfa:	3004      	adds	r0, #4
70005bfc:	011b      	lsls	r3, r3, #4
70005bfe:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
70005c02:	d101      	bne.n	70005c08 <__hi0bits+0x28>
70005c04:	3002      	adds	r0, #2
70005c06:	009b      	lsls	r3, r3, #2
70005c08:	2b00      	cmp	r3, #0
70005c0a:	db03      	blt.n	70005c14 <__hi0bits+0x34>
70005c0c:	f013 4f80 	tst.w	r3, #1073741824	; 0x40000000
70005c10:	d004      	beq.n	70005c1c <__hi0bits+0x3c>
70005c12:	3001      	adds	r0, #1
70005c14:	4770      	bx	lr
70005c16:	0403      	lsls	r3, r0, #16
70005c18:	2010      	movs	r0, #16
70005c1a:	e7e6      	b.n	70005bea <__hi0bits+0xa>
70005c1c:	2020      	movs	r0, #32
70005c1e:	4770      	bx	lr

70005c20 <__lo0bits>:
70005c20:	6803      	ldr	r3, [r0, #0]
70005c22:	4602      	mov	r2, r0
70005c24:	f013 0007 	ands.w	r0, r3, #7
70005c28:	d009      	beq.n	70005c3e <__lo0bits+0x1e>
70005c2a:	f013 0f01 	tst.w	r3, #1
70005c2e:	d121      	bne.n	70005c74 <__lo0bits+0x54>
70005c30:	f013 0f02 	tst.w	r3, #2
70005c34:	d122      	bne.n	70005c7c <__lo0bits+0x5c>
70005c36:	089b      	lsrs	r3, r3, #2
70005c38:	2002      	movs	r0, #2
70005c3a:	6013      	str	r3, [r2, #0]
70005c3c:	4770      	bx	lr
70005c3e:	b299      	uxth	r1, r3
70005c40:	b909      	cbnz	r1, 70005c46 <__lo0bits+0x26>
70005c42:	0c1b      	lsrs	r3, r3, #16
70005c44:	2010      	movs	r0, #16
70005c46:	f013 0fff 	tst.w	r3, #255	; 0xff
70005c4a:	d101      	bne.n	70005c50 <__lo0bits+0x30>
70005c4c:	3008      	adds	r0, #8
70005c4e:	0a1b      	lsrs	r3, r3, #8
70005c50:	f013 0f0f 	tst.w	r3, #15
70005c54:	d101      	bne.n	70005c5a <__lo0bits+0x3a>
70005c56:	3004      	adds	r0, #4
70005c58:	091b      	lsrs	r3, r3, #4
70005c5a:	f013 0f03 	tst.w	r3, #3
70005c5e:	d101      	bne.n	70005c64 <__lo0bits+0x44>
70005c60:	3002      	adds	r0, #2
70005c62:	089b      	lsrs	r3, r3, #2
70005c64:	f013 0f01 	tst.w	r3, #1
70005c68:	d102      	bne.n	70005c70 <__lo0bits+0x50>
70005c6a:	085b      	lsrs	r3, r3, #1
70005c6c:	d004      	beq.n	70005c78 <__lo0bits+0x58>
70005c6e:	3001      	adds	r0, #1
70005c70:	6013      	str	r3, [r2, #0]
70005c72:	4770      	bx	lr
70005c74:	2000      	movs	r0, #0
70005c76:	4770      	bx	lr
70005c78:	2020      	movs	r0, #32
70005c7a:	4770      	bx	lr
70005c7c:	085b      	lsrs	r3, r3, #1
70005c7e:	2001      	movs	r0, #1
70005c80:	6013      	str	r3, [r2, #0]
70005c82:	4770      	bx	lr

70005c84 <__mcmp>:
70005c84:	4603      	mov	r3, r0
70005c86:	690a      	ldr	r2, [r1, #16]
70005c88:	6900      	ldr	r0, [r0, #16]
70005c8a:	b410      	push	{r4}
70005c8c:	1a80      	subs	r0, r0, r2
70005c8e:	d111      	bne.n	70005cb4 <__mcmp+0x30>
70005c90:	3204      	adds	r2, #4
70005c92:	f103 0c14 	add.w	ip, r3, #20
70005c96:	0092      	lsls	r2, r2, #2
70005c98:	189b      	adds	r3, r3, r2
70005c9a:	1889      	adds	r1, r1, r2
70005c9c:	3104      	adds	r1, #4
70005c9e:	3304      	adds	r3, #4
70005ca0:	f853 4c04 	ldr.w	r4, [r3, #-4]
70005ca4:	3b04      	subs	r3, #4
70005ca6:	f851 2c04 	ldr.w	r2, [r1, #-4]
70005caa:	3904      	subs	r1, #4
70005cac:	4294      	cmp	r4, r2
70005cae:	d103      	bne.n	70005cb8 <__mcmp+0x34>
70005cb0:	459c      	cmp	ip, r3
70005cb2:	d3f5      	bcc.n	70005ca0 <__mcmp+0x1c>
70005cb4:	bc10      	pop	{r4}
70005cb6:	4770      	bx	lr
70005cb8:	bf38      	it	cc
70005cba:	f04f 30ff 	movcc.w	r0, #4294967295
70005cbe:	d3f9      	bcc.n	70005cb4 <__mcmp+0x30>
70005cc0:	2001      	movs	r0, #1
70005cc2:	e7f7      	b.n	70005cb4 <__mcmp+0x30>

70005cc4 <__ulp>:
70005cc4:	f240 0300 	movw	r3, #0
70005cc8:	f6c7 73f0 	movt	r3, #32752	; 0x7ff0
70005ccc:	ea01 0303 	and.w	r3, r1, r3
70005cd0:	f1a3 7350 	sub.w	r3, r3, #54525952	; 0x3400000
70005cd4:	2b00      	cmp	r3, #0
70005cd6:	dd02      	ble.n	70005cde <__ulp+0x1a>
70005cd8:	4619      	mov	r1, r3
70005cda:	2000      	movs	r0, #0
70005cdc:	4770      	bx	lr
70005cde:	425b      	negs	r3, r3
70005ce0:	151b      	asrs	r3, r3, #20
70005ce2:	2b13      	cmp	r3, #19
70005ce4:	dd0e      	ble.n	70005d04 <__ulp+0x40>
70005ce6:	3b14      	subs	r3, #20
70005ce8:	2b1e      	cmp	r3, #30
70005cea:	dd03      	ble.n	70005cf4 <__ulp+0x30>
70005cec:	2301      	movs	r3, #1
70005cee:	2100      	movs	r1, #0
70005cf0:	4618      	mov	r0, r3
70005cf2:	4770      	bx	lr
70005cf4:	2201      	movs	r2, #1
70005cf6:	f1c3 031f 	rsb	r3, r3, #31
70005cfa:	2100      	movs	r1, #0
70005cfc:	fa12 f303 	lsls.w	r3, r2, r3
70005d00:	4618      	mov	r0, r3
70005d02:	4770      	bx	lr
70005d04:	f44f 2200 	mov.w	r2, #524288	; 0x80000
70005d08:	2000      	movs	r0, #0
70005d0a:	fa52 f103 	asrs.w	r1, r2, r3
70005d0e:	4770      	bx	lr

70005d10 <__b2d>:
70005d10:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
70005d14:	6904      	ldr	r4, [r0, #16]
70005d16:	f100 0614 	add.w	r6, r0, #20
70005d1a:	460f      	mov	r7, r1
70005d1c:	3404      	adds	r4, #4
70005d1e:	f850 5024 	ldr.w	r5, [r0, r4, lsl #2]
70005d22:	eb00 0484 	add.w	r4, r0, r4, lsl #2
70005d26:	46a0      	mov	r8, r4
70005d28:	4628      	mov	r0, r5
70005d2a:	f7ff ff59 	bl	70005be0 <__hi0bits>
70005d2e:	280a      	cmp	r0, #10
70005d30:	f1c0 0320 	rsb	r3, r0, #32
70005d34:	603b      	str	r3, [r7, #0]
70005d36:	dc14      	bgt.n	70005d62 <__b2d+0x52>
70005d38:	42a6      	cmp	r6, r4
70005d3a:	f1c0 030b 	rsb	r3, r0, #11
70005d3e:	d237      	bcs.n	70005db0 <__b2d+0xa0>
70005d40:	f854 1c04 	ldr.w	r1, [r4, #-4]
70005d44:	40d9      	lsrs	r1, r3
70005d46:	fa25 fc03 	lsr.w	ip, r5, r3
70005d4a:	3015      	adds	r0, #21
70005d4c:	f04c 537e 	orr.w	r3, ip, #1065353216	; 0x3f800000
70005d50:	4085      	lsls	r5, r0
70005d52:	f443 03e0 	orr.w	r3, r3, #7340032	; 0x700000
70005d56:	ea41 0205 	orr.w	r2, r1, r5
70005d5a:	4610      	mov	r0, r2
70005d5c:	4619      	mov	r1, r3
70005d5e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
70005d62:	42a6      	cmp	r6, r4
70005d64:	d320      	bcc.n	70005da8 <__b2d+0x98>
70005d66:	2100      	movs	r1, #0
70005d68:	380b      	subs	r0, #11
70005d6a:	bf02      	ittt	eq
70005d6c:	f045 537e 	orreq.w	r3, r5, #1065353216	; 0x3f800000
70005d70:	460a      	moveq	r2, r1
70005d72:	f443 03e0 	orreq.w	r3, r3, #7340032	; 0x700000
70005d76:	d0f0      	beq.n	70005d5a <__b2d+0x4a>
70005d78:	42b4      	cmp	r4, r6
70005d7a:	f1c0 0320 	rsb	r3, r0, #32
70005d7e:	d919      	bls.n	70005db4 <__b2d+0xa4>
70005d80:	f854 4c04 	ldr.w	r4, [r4, #-4]
70005d84:	40dc      	lsrs	r4, r3
70005d86:	4085      	lsls	r5, r0
70005d88:	fa21 fc03 	lsr.w	ip, r1, r3
70005d8c:	f045 557e 	orr.w	r5, r5, #1065353216	; 0x3f800000
70005d90:	fa11 f000 	lsls.w	r0, r1, r0
70005d94:	f445 05e0 	orr.w	r5, r5, #7340032	; 0x700000
70005d98:	ea44 0200 	orr.w	r2, r4, r0
70005d9c:	ea45 030c 	orr.w	r3, r5, ip
70005da0:	4610      	mov	r0, r2
70005da2:	4619      	mov	r1, r3
70005da4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
70005da8:	f854 1c04 	ldr.w	r1, [r4, #-4]
70005dac:	3c04      	subs	r4, #4
70005dae:	e7db      	b.n	70005d68 <__b2d+0x58>
70005db0:	2100      	movs	r1, #0
70005db2:	e7c8      	b.n	70005d46 <__b2d+0x36>
70005db4:	2400      	movs	r4, #0
70005db6:	e7e6      	b.n	70005d86 <__b2d+0x76>

70005db8 <__ratio>:
70005db8:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
70005dbc:	b083      	sub	sp, #12
70005dbe:	460e      	mov	r6, r1
70005dc0:	a901      	add	r1, sp, #4
70005dc2:	4607      	mov	r7, r0
70005dc4:	f7ff ffa4 	bl	70005d10 <__b2d>
70005dc8:	460d      	mov	r5, r1
70005dca:	4604      	mov	r4, r0
70005dcc:	4669      	mov	r1, sp
70005dce:	4630      	mov	r0, r6
70005dd0:	f7ff ff9e 	bl	70005d10 <__b2d>
70005dd4:	f8dd c004 	ldr.w	ip, [sp, #4]
70005dd8:	46a9      	mov	r9, r5
70005dda:	46a0      	mov	r8, r4
70005ddc:	460b      	mov	r3, r1
70005dde:	4602      	mov	r2, r0
70005de0:	6931      	ldr	r1, [r6, #16]
70005de2:	4616      	mov	r6, r2
70005de4:	6938      	ldr	r0, [r7, #16]
70005de6:	461f      	mov	r7, r3
70005de8:	1a40      	subs	r0, r0, r1
70005dea:	9900      	ldr	r1, [sp, #0]
70005dec:	ebc1 010c 	rsb	r1, r1, ip
70005df0:	eb01 1140 	add.w	r1, r1, r0, lsl #5
70005df4:	2900      	cmp	r1, #0
70005df6:	bfc9      	itett	gt
70005df8:	eb05 5901 	addgt.w	r9, r5, r1, lsl #20
70005dfc:	eba3 5701 	suble.w	r7, r3, r1, lsl #20
70005e00:	4624      	movgt	r4, r4
70005e02:	464d      	movgt	r5, r9
70005e04:	bfdc      	itt	le
70005e06:	4612      	movle	r2, r2
70005e08:	463b      	movle	r3, r7
70005e0a:	4620      	mov	r0, r4
70005e0c:	4629      	mov	r1, r5
70005e0e:	f001 fcab 	bl	70007768 <__aeabi_ddiv>
70005e12:	b003      	add	sp, #12
70005e14:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

70005e18 <_mprec_log10>:
70005e18:	2817      	cmp	r0, #23
70005e1a:	b510      	push	{r4, lr}
70005e1c:	4604      	mov	r4, r0
70005e1e:	dd0e      	ble.n	70005e3e <_mprec_log10+0x26>
70005e20:	f240 0100 	movw	r1, #0
70005e24:	2000      	movs	r0, #0
70005e26:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
70005e2a:	f240 0300 	movw	r3, #0
70005e2e:	2200      	movs	r2, #0
70005e30:	f2c4 0324 	movt	r3, #16420	; 0x4024
70005e34:	f001 fb6e 	bl	70007514 <__aeabi_dmul>
70005e38:	3c01      	subs	r4, #1
70005e3a:	d1f6      	bne.n	70005e2a <_mprec_log10+0x12>
70005e3c:	bd10      	pop	{r4, pc}
70005e3e:	f248 33b0 	movw	r3, #33712	; 0x83b0
70005e42:	f2c7 0300 	movt	r3, #28672	; 0x7000
70005e46:	eb03 03c0 	add.w	r3, r3, r0, lsl #3
70005e4a:	e9d3 0100 	ldrd	r0, r1, [r3]
70005e4e:	bd10      	pop	{r4, pc}

70005e50 <__copybits>:
70005e50:	6913      	ldr	r3, [r2, #16]
70005e52:	3901      	subs	r1, #1
70005e54:	f102 0c14 	add.w	ip, r2, #20
70005e58:	b410      	push	{r4}
70005e5a:	eb02 0283 	add.w	r2, r2, r3, lsl #2
70005e5e:	114c      	asrs	r4, r1, #5
70005e60:	3214      	adds	r2, #20
70005e62:	3401      	adds	r4, #1
70005e64:	4594      	cmp	ip, r2
70005e66:	eb00 0484 	add.w	r4, r0, r4, lsl #2
70005e6a:	d20f      	bcs.n	70005e8c <__copybits+0x3c>
70005e6c:	2300      	movs	r3, #0
70005e6e:	f85c 1003 	ldr.w	r1, [ip, r3]
70005e72:	50c1      	str	r1, [r0, r3]
70005e74:	3304      	adds	r3, #4
70005e76:	eb03 010c 	add.w	r1, r3, ip
70005e7a:	428a      	cmp	r2, r1
70005e7c:	d8f7      	bhi.n	70005e6e <__copybits+0x1e>
70005e7e:	ea6f 0c0c 	mvn.w	ip, ip
70005e82:	4462      	add	r2, ip
70005e84:	f022 0203 	bic.w	r2, r2, #3
70005e88:	3204      	adds	r2, #4
70005e8a:	1880      	adds	r0, r0, r2
70005e8c:	4284      	cmp	r4, r0
70005e8e:	d904      	bls.n	70005e9a <__copybits+0x4a>
70005e90:	2300      	movs	r3, #0
70005e92:	f840 3b04 	str.w	r3, [r0], #4
70005e96:	4284      	cmp	r4, r0
70005e98:	d8fb      	bhi.n	70005e92 <__copybits+0x42>
70005e9a:	bc10      	pop	{r4}
70005e9c:	4770      	bx	lr
70005e9e:	bf00      	nop

70005ea0 <__any_on>:
70005ea0:	6902      	ldr	r2, [r0, #16]
70005ea2:	114b      	asrs	r3, r1, #5
70005ea4:	429a      	cmp	r2, r3
70005ea6:	db10      	blt.n	70005eca <__any_on+0x2a>
70005ea8:	dd0e      	ble.n	70005ec8 <__any_on+0x28>
70005eaa:	f011 011f 	ands.w	r1, r1, #31
70005eae:	d00b      	beq.n	70005ec8 <__any_on+0x28>
70005eb0:	461a      	mov	r2, r3
70005eb2:	eb00 0383 	add.w	r3, r0, r3, lsl #2
70005eb6:	695b      	ldr	r3, [r3, #20]
70005eb8:	fa23 fc01 	lsr.w	ip, r3, r1
70005ebc:	fa0c f101 	lsl.w	r1, ip, r1
70005ec0:	4299      	cmp	r1, r3
70005ec2:	d002      	beq.n	70005eca <__any_on+0x2a>
70005ec4:	2001      	movs	r0, #1
70005ec6:	4770      	bx	lr
70005ec8:	461a      	mov	r2, r3
70005eca:	3204      	adds	r2, #4
70005ecc:	f100 0114 	add.w	r1, r0, #20
70005ed0:	eb00 0382 	add.w	r3, r0, r2, lsl #2
70005ed4:	f103 0c04 	add.w	ip, r3, #4
70005ed8:	4561      	cmp	r1, ip
70005eda:	d20b      	bcs.n	70005ef4 <__any_on+0x54>
70005edc:	f850 2022 	ldr.w	r2, [r0, r2, lsl #2]
70005ee0:	2a00      	cmp	r2, #0
70005ee2:	d1ef      	bne.n	70005ec4 <__any_on+0x24>
70005ee4:	4299      	cmp	r1, r3
70005ee6:	d205      	bcs.n	70005ef4 <__any_on+0x54>
70005ee8:	f853 2d04 	ldr.w	r2, [r3, #-4]!
70005eec:	2a00      	cmp	r2, #0
70005eee:	d1e9      	bne.n	70005ec4 <__any_on+0x24>
70005ef0:	4299      	cmp	r1, r3
70005ef2:	d3f9      	bcc.n	70005ee8 <__any_on+0x48>
70005ef4:	2000      	movs	r0, #0
70005ef6:	4770      	bx	lr

70005ef8 <_Bfree>:
70005ef8:	b530      	push	{r4, r5, lr}
70005efa:	6a45      	ldr	r5, [r0, #36]	; 0x24
70005efc:	b083      	sub	sp, #12
70005efe:	4604      	mov	r4, r0
70005f00:	b155      	cbz	r5, 70005f18 <_Bfree+0x20>
70005f02:	b139      	cbz	r1, 70005f14 <_Bfree+0x1c>
70005f04:	6a63      	ldr	r3, [r4, #36]	; 0x24
70005f06:	684a      	ldr	r2, [r1, #4]
70005f08:	68db      	ldr	r3, [r3, #12]
70005f0a:	f853 0022 	ldr.w	r0, [r3, r2, lsl #2]
70005f0e:	6008      	str	r0, [r1, #0]
70005f10:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
70005f14:	b003      	add	sp, #12
70005f16:	bd30      	pop	{r4, r5, pc}
70005f18:	2010      	movs	r0, #16
70005f1a:	9101      	str	r1, [sp, #4]
70005f1c:	f7ff f9ba 	bl	70005294 <malloc>
70005f20:	9901      	ldr	r1, [sp, #4]
70005f22:	6260      	str	r0, [r4, #36]	; 0x24
70005f24:	60c5      	str	r5, [r0, #12]
70005f26:	6045      	str	r5, [r0, #4]
70005f28:	6085      	str	r5, [r0, #8]
70005f2a:	6005      	str	r5, [r0, #0]
70005f2c:	e7e9      	b.n	70005f02 <_Bfree+0xa>
70005f2e:	bf00      	nop

70005f30 <_Balloc>:
70005f30:	b570      	push	{r4, r5, r6, lr}
70005f32:	6a44      	ldr	r4, [r0, #36]	; 0x24
70005f34:	4606      	mov	r6, r0
70005f36:	460d      	mov	r5, r1
70005f38:	b164      	cbz	r4, 70005f54 <_Balloc+0x24>
70005f3a:	68e2      	ldr	r2, [r4, #12]
70005f3c:	b1a2      	cbz	r2, 70005f68 <_Balloc+0x38>
70005f3e:	f852 3025 	ldr.w	r3, [r2, r5, lsl #2]
70005f42:	b1eb      	cbz	r3, 70005f80 <_Balloc+0x50>
70005f44:	6819      	ldr	r1, [r3, #0]
70005f46:	f842 1025 	str.w	r1, [r2, r5, lsl #2]
70005f4a:	2200      	movs	r2, #0
70005f4c:	60da      	str	r2, [r3, #12]
70005f4e:	611a      	str	r2, [r3, #16]
70005f50:	4618      	mov	r0, r3
70005f52:	bd70      	pop	{r4, r5, r6, pc}
70005f54:	2010      	movs	r0, #16
70005f56:	f7ff f99d 	bl	70005294 <malloc>
70005f5a:	2300      	movs	r3, #0
70005f5c:	4604      	mov	r4, r0
70005f5e:	6270      	str	r0, [r6, #36]	; 0x24
70005f60:	60c3      	str	r3, [r0, #12]
70005f62:	6043      	str	r3, [r0, #4]
70005f64:	6083      	str	r3, [r0, #8]
70005f66:	6003      	str	r3, [r0, #0]
70005f68:	2210      	movs	r2, #16
70005f6a:	4630      	mov	r0, r6
70005f6c:	2104      	movs	r1, #4
70005f6e:	f000 fe57 	bl	70006c20 <_calloc_r>
70005f72:	6a73      	ldr	r3, [r6, #36]	; 0x24
70005f74:	60e0      	str	r0, [r4, #12]
70005f76:	68da      	ldr	r2, [r3, #12]
70005f78:	2a00      	cmp	r2, #0
70005f7a:	d1e0      	bne.n	70005f3e <_Balloc+0xe>
70005f7c:	4613      	mov	r3, r2
70005f7e:	e7e7      	b.n	70005f50 <_Balloc+0x20>
70005f80:	2401      	movs	r4, #1
70005f82:	4630      	mov	r0, r6
70005f84:	4621      	mov	r1, r4
70005f86:	40ac      	lsls	r4, r5
70005f88:	1d62      	adds	r2, r4, #5
70005f8a:	0092      	lsls	r2, r2, #2
70005f8c:	f000 fe48 	bl	70006c20 <_calloc_r>
70005f90:	4603      	mov	r3, r0
70005f92:	2800      	cmp	r0, #0
70005f94:	d0dc      	beq.n	70005f50 <_Balloc+0x20>
70005f96:	6045      	str	r5, [r0, #4]
70005f98:	6084      	str	r4, [r0, #8]
70005f9a:	e7d6      	b.n	70005f4a <_Balloc+0x1a>

70005f9c <__d2b>:
70005f9c:	e92d 45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
70005fa0:	b083      	sub	sp, #12
70005fa2:	2101      	movs	r1, #1
70005fa4:	461d      	mov	r5, r3
70005fa6:	4614      	mov	r4, r2
70005fa8:	9f0a      	ldr	r7, [sp, #40]	; 0x28
70005faa:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
70005fac:	f7ff ffc0 	bl	70005f30 <_Balloc>
70005fb0:	f025 4200 	bic.w	r2, r5, #2147483648	; 0x80000000
70005fb4:	f025 437f 	bic.w	r3, r5, #4278190080	; 0xff000000
70005fb8:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
70005fbc:	4615      	mov	r5, r2
70005fbe:	ea5f 5a12 	movs.w	sl, r2, lsr #20
70005fc2:	9300      	str	r3, [sp, #0]
70005fc4:	bf1c      	itt	ne
70005fc6:	f443 1380 	orrne.w	r3, r3, #1048576	; 0x100000
70005fca:	9300      	strne	r3, [sp, #0]
70005fcc:	4680      	mov	r8, r0
70005fce:	2c00      	cmp	r4, #0
70005fd0:	d023      	beq.n	7000601a <__d2b+0x7e>
70005fd2:	a802      	add	r0, sp, #8
70005fd4:	f840 4d04 	str.w	r4, [r0, #-4]!
70005fd8:	f7ff fe22 	bl	70005c20 <__lo0bits>
70005fdc:	4603      	mov	r3, r0
70005fde:	2800      	cmp	r0, #0
70005fe0:	d137      	bne.n	70006052 <__d2b+0xb6>
70005fe2:	9901      	ldr	r1, [sp, #4]
70005fe4:	9a00      	ldr	r2, [sp, #0]
70005fe6:	f8c8 1014 	str.w	r1, [r8, #20]
70005fea:	2a00      	cmp	r2, #0
70005fec:	bf14      	ite	ne
70005fee:	2402      	movne	r4, #2
70005ff0:	2401      	moveq	r4, #1
70005ff2:	f8c8 2018 	str.w	r2, [r8, #24]
70005ff6:	f8c8 4010 	str.w	r4, [r8, #16]
70005ffa:	f1ba 0f00 	cmp.w	sl, #0
70005ffe:	d01b      	beq.n	70006038 <__d2b+0x9c>
70006000:	f5aa 6a86 	sub.w	sl, sl, #1072	; 0x430
70006004:	f1c3 0235 	rsb	r2, r3, #53	; 0x35
70006008:	f1aa 0a03 	sub.w	sl, sl, #3
7000600c:	4453      	add	r3, sl
7000600e:	603b      	str	r3, [r7, #0]
70006010:	6032      	str	r2, [r6, #0]
70006012:	4640      	mov	r0, r8
70006014:	b003      	add	sp, #12
70006016:	e8bd 85f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, sl, pc}
7000601a:	4668      	mov	r0, sp
7000601c:	f7ff fe00 	bl	70005c20 <__lo0bits>
70006020:	2301      	movs	r3, #1
70006022:	461c      	mov	r4, r3
70006024:	f8c8 3010 	str.w	r3, [r8, #16]
70006028:	9b00      	ldr	r3, [sp, #0]
7000602a:	f8c8 3014 	str.w	r3, [r8, #20]
7000602e:	f100 0320 	add.w	r3, r0, #32
70006032:	f1ba 0f00 	cmp.w	sl, #0
70006036:	d1e3      	bne.n	70006000 <__d2b+0x64>
70006038:	eb08 0284 	add.w	r2, r8, r4, lsl #2
7000603c:	f5a3 6386 	sub.w	r3, r3, #1072	; 0x430
70006040:	3b02      	subs	r3, #2
70006042:	603b      	str	r3, [r7, #0]
70006044:	6910      	ldr	r0, [r2, #16]
70006046:	f7ff fdcb 	bl	70005be0 <__hi0bits>
7000604a:	ebc0 1044 	rsb	r0, r0, r4, lsl #5
7000604e:	6030      	str	r0, [r6, #0]
70006050:	e7df      	b.n	70006012 <__d2b+0x76>
70006052:	9a00      	ldr	r2, [sp, #0]
70006054:	f1c0 0120 	rsb	r1, r0, #32
70006058:	fa12 f101 	lsls.w	r1, r2, r1
7000605c:	40c2      	lsrs	r2, r0
7000605e:	9801      	ldr	r0, [sp, #4]
70006060:	4301      	orrs	r1, r0
70006062:	f8c8 1014 	str.w	r1, [r8, #20]
70006066:	9200      	str	r2, [sp, #0]
70006068:	e7bf      	b.n	70005fea <__d2b+0x4e>
7000606a:	bf00      	nop

7000606c <__mdiff>:
7000606c:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
70006070:	6913      	ldr	r3, [r2, #16]
70006072:	690f      	ldr	r7, [r1, #16]
70006074:	460c      	mov	r4, r1
70006076:	4615      	mov	r5, r2
70006078:	1aff      	subs	r7, r7, r3
7000607a:	2f00      	cmp	r7, #0
7000607c:	d04f      	beq.n	7000611e <__mdiff+0xb2>
7000607e:	db6a      	blt.n	70006156 <__mdiff+0xea>
70006080:	2700      	movs	r7, #0
70006082:	f101 0614 	add.w	r6, r1, #20
70006086:	6861      	ldr	r1, [r4, #4]
70006088:	f7ff ff52 	bl	70005f30 <_Balloc>
7000608c:	f8d5 8010 	ldr.w	r8, [r5, #16]
70006090:	f8d4 c010 	ldr.w	ip, [r4, #16]
70006094:	f105 0114 	add.w	r1, r5, #20
70006098:	2200      	movs	r2, #0
7000609a:	eb05 0588 	add.w	r5, r5, r8, lsl #2
7000609e:	eb04 048c 	add.w	r4, r4, ip, lsl #2
700060a2:	f105 0814 	add.w	r8, r5, #20
700060a6:	3414      	adds	r4, #20
700060a8:	f100 0314 	add.w	r3, r0, #20
700060ac:	60c7      	str	r7, [r0, #12]
700060ae:	f851 7b04 	ldr.w	r7, [r1], #4
700060b2:	f856 5b04 	ldr.w	r5, [r6], #4
700060b6:	46bb      	mov	fp, r7
700060b8:	fa1f fa87 	uxth.w	sl, r7
700060bc:	0c3f      	lsrs	r7, r7, #16
700060be:	fa1f f985 	uxth.w	r9, r5
700060c2:	ebc7 4715 	rsb	r7, r7, r5, lsr #16
700060c6:	ebca 0a09 	rsb	sl, sl, r9
700060ca:	4452      	add	r2, sl
700060cc:	eb07 4722 	add.w	r7, r7, r2, asr #16
700060d0:	b292      	uxth	r2, r2
700060d2:	ea42 4207 	orr.w	r2, r2, r7, lsl #16
700060d6:	f843 2b04 	str.w	r2, [r3], #4
700060da:	143a      	asrs	r2, r7, #16
700060dc:	4588      	cmp	r8, r1
700060de:	d8e6      	bhi.n	700060ae <__mdiff+0x42>
700060e0:	42a6      	cmp	r6, r4
700060e2:	d20e      	bcs.n	70006102 <__mdiff+0x96>
700060e4:	f856 1b04 	ldr.w	r1, [r6], #4
700060e8:	b28d      	uxth	r5, r1
700060ea:	0c09      	lsrs	r1, r1, #16
700060ec:	1952      	adds	r2, r2, r5
700060ee:	eb01 4122 	add.w	r1, r1, r2, asr #16
700060f2:	b292      	uxth	r2, r2
700060f4:	ea42 4201 	orr.w	r2, r2, r1, lsl #16
700060f8:	f843 2b04 	str.w	r2, [r3], #4
700060fc:	140a      	asrs	r2, r1, #16
700060fe:	42b4      	cmp	r4, r6
70006100:	d8f0      	bhi.n	700060e4 <__mdiff+0x78>
70006102:	f853 2c04 	ldr.w	r2, [r3, #-4]
70006106:	b932      	cbnz	r2, 70006116 <__mdiff+0xaa>
70006108:	f853 2c08 	ldr.w	r2, [r3, #-8]
7000610c:	f10c 3cff 	add.w	ip, ip, #4294967295
70006110:	3b04      	subs	r3, #4
70006112:	2a00      	cmp	r2, #0
70006114:	d0f8      	beq.n	70006108 <__mdiff+0x9c>
70006116:	f8c0 c010 	str.w	ip, [r0, #16]
7000611a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
7000611e:	3304      	adds	r3, #4
70006120:	f101 0614 	add.w	r6, r1, #20
70006124:	009b      	lsls	r3, r3, #2
70006126:	18d2      	adds	r2, r2, r3
70006128:	18cb      	adds	r3, r1, r3
7000612a:	3304      	adds	r3, #4
7000612c:	3204      	adds	r2, #4
7000612e:	f853 cc04 	ldr.w	ip, [r3, #-4]
70006132:	3b04      	subs	r3, #4
70006134:	f852 1c04 	ldr.w	r1, [r2, #-4]
70006138:	3a04      	subs	r2, #4
7000613a:	458c      	cmp	ip, r1
7000613c:	d10a      	bne.n	70006154 <__mdiff+0xe8>
7000613e:	429e      	cmp	r6, r3
70006140:	d3f5      	bcc.n	7000612e <__mdiff+0xc2>
70006142:	2100      	movs	r1, #0
70006144:	f7ff fef4 	bl	70005f30 <_Balloc>
70006148:	2301      	movs	r3, #1
7000614a:	6103      	str	r3, [r0, #16]
7000614c:	2300      	movs	r3, #0
7000614e:	6143      	str	r3, [r0, #20]
70006150:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
70006154:	d297      	bcs.n	70006086 <__mdiff+0x1a>
70006156:	4623      	mov	r3, r4
70006158:	462c      	mov	r4, r5
7000615a:	2701      	movs	r7, #1
7000615c:	461d      	mov	r5, r3
7000615e:	f104 0614 	add.w	r6, r4, #20
70006162:	e790      	b.n	70006086 <__mdiff+0x1a>

70006164 <__lshift>:
70006164:	e92d 45f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
70006168:	690d      	ldr	r5, [r1, #16]
7000616a:	688b      	ldr	r3, [r1, #8]
7000616c:	1156      	asrs	r6, r2, #5
7000616e:	3501      	adds	r5, #1
70006170:	460c      	mov	r4, r1
70006172:	19ad      	adds	r5, r5, r6
70006174:	4690      	mov	r8, r2
70006176:	429d      	cmp	r5, r3
70006178:	4682      	mov	sl, r0
7000617a:	6849      	ldr	r1, [r1, #4]
7000617c:	dd03      	ble.n	70006186 <__lshift+0x22>
7000617e:	005b      	lsls	r3, r3, #1
70006180:	3101      	adds	r1, #1
70006182:	429d      	cmp	r5, r3
70006184:	dcfb      	bgt.n	7000617e <__lshift+0x1a>
70006186:	4650      	mov	r0, sl
70006188:	f7ff fed2 	bl	70005f30 <_Balloc>
7000618c:	2e00      	cmp	r6, #0
7000618e:	4607      	mov	r7, r0
70006190:	f100 0214 	add.w	r2, r0, #20
70006194:	dd0a      	ble.n	700061ac <__lshift+0x48>
70006196:	2300      	movs	r3, #0
70006198:	4619      	mov	r1, r3
7000619a:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
7000619e:	3301      	adds	r3, #1
700061a0:	42b3      	cmp	r3, r6
700061a2:	d1fa      	bne.n	7000619a <__lshift+0x36>
700061a4:	eb07 0383 	add.w	r3, r7, r3, lsl #2
700061a8:	f103 0214 	add.w	r2, r3, #20
700061ac:	6920      	ldr	r0, [r4, #16]
700061ae:	f104 0314 	add.w	r3, r4, #20
700061b2:	eb04 0080 	add.w	r0, r4, r0, lsl #2
700061b6:	3014      	adds	r0, #20
700061b8:	f018 081f 	ands.w	r8, r8, #31
700061bc:	d01b      	beq.n	700061f6 <__lshift+0x92>
700061be:	f1c8 0e20 	rsb	lr, r8, #32
700061c2:	2100      	movs	r1, #0
700061c4:	681e      	ldr	r6, [r3, #0]
700061c6:	fa06 fc08 	lsl.w	ip, r6, r8
700061ca:	ea41 010c 	orr.w	r1, r1, ip
700061ce:	f842 1b04 	str.w	r1, [r2], #4
700061d2:	f853 1b04 	ldr.w	r1, [r3], #4
700061d6:	4298      	cmp	r0, r3
700061d8:	fa21 f10e 	lsr.w	r1, r1, lr
700061dc:	d8f2      	bhi.n	700061c4 <__lshift+0x60>
700061de:	6011      	str	r1, [r2, #0]
700061e0:	b101      	cbz	r1, 700061e4 <__lshift+0x80>
700061e2:	3501      	adds	r5, #1
700061e4:	4650      	mov	r0, sl
700061e6:	3d01      	subs	r5, #1
700061e8:	4621      	mov	r1, r4
700061ea:	613d      	str	r5, [r7, #16]
700061ec:	f7ff fe84 	bl	70005ef8 <_Bfree>
700061f0:	4638      	mov	r0, r7
700061f2:	e8bd 85f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
700061f6:	f853 1008 	ldr.w	r1, [r3, r8]
700061fa:	f842 1008 	str.w	r1, [r2, r8]
700061fe:	f108 0804 	add.w	r8, r8, #4
70006202:	eb08 0103 	add.w	r1, r8, r3
70006206:	4288      	cmp	r0, r1
70006208:	d9ec      	bls.n	700061e4 <__lshift+0x80>
7000620a:	f853 1008 	ldr.w	r1, [r3, r8]
7000620e:	f842 1008 	str.w	r1, [r2, r8]
70006212:	f108 0804 	add.w	r8, r8, #4
70006216:	eb08 0103 	add.w	r1, r8, r3
7000621a:	4288      	cmp	r0, r1
7000621c:	d8eb      	bhi.n	700061f6 <__lshift+0x92>
7000621e:	e7e1      	b.n	700061e4 <__lshift+0x80>

70006220 <__multiply>:
70006220:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
70006224:	f8d1 8010 	ldr.w	r8, [r1, #16]
70006228:	6917      	ldr	r7, [r2, #16]
7000622a:	460d      	mov	r5, r1
7000622c:	4616      	mov	r6, r2
7000622e:	b087      	sub	sp, #28
70006230:	45b8      	cmp	r8, r7
70006232:	bfb5      	itete	lt
70006234:	4615      	movlt	r5, r2
70006236:	463b      	movge	r3, r7
70006238:	460b      	movlt	r3, r1
7000623a:	4647      	movge	r7, r8
7000623c:	bfb4      	ite	lt
7000623e:	461e      	movlt	r6, r3
70006240:	4698      	movge	r8, r3
70006242:	68ab      	ldr	r3, [r5, #8]
70006244:	eb08 0407 	add.w	r4, r8, r7
70006248:	6869      	ldr	r1, [r5, #4]
7000624a:	429c      	cmp	r4, r3
7000624c:	bfc8      	it	gt
7000624e:	3101      	addgt	r1, #1
70006250:	f7ff fe6e 	bl	70005f30 <_Balloc>
70006254:	eb00 0384 	add.w	r3, r0, r4, lsl #2
70006258:	f100 0b14 	add.w	fp, r0, #20
7000625c:	3314      	adds	r3, #20
7000625e:	9003      	str	r0, [sp, #12]
70006260:	459b      	cmp	fp, r3
70006262:	9304      	str	r3, [sp, #16]
70006264:	d206      	bcs.n	70006274 <__multiply+0x54>
70006266:	9904      	ldr	r1, [sp, #16]
70006268:	465b      	mov	r3, fp
7000626a:	2200      	movs	r2, #0
7000626c:	f843 2b04 	str.w	r2, [r3], #4
70006270:	4299      	cmp	r1, r3
70006272:	d8fb      	bhi.n	7000626c <__multiply+0x4c>
70006274:	eb06 0888 	add.w	r8, r6, r8, lsl #2
70006278:	f106 0914 	add.w	r9, r6, #20
7000627c:	f108 0814 	add.w	r8, r8, #20
70006280:	eb05 0c87 	add.w	ip, r5, r7, lsl #2
70006284:	3514      	adds	r5, #20
70006286:	45c1      	cmp	r9, r8
70006288:	f8cd 8004 	str.w	r8, [sp, #4]
7000628c:	f10c 0c14 	add.w	ip, ip, #20
70006290:	9502      	str	r5, [sp, #8]
70006292:	d24b      	bcs.n	7000632c <__multiply+0x10c>
70006294:	f04f 0a00 	mov.w	sl, #0
70006298:	9405      	str	r4, [sp, #20]
7000629a:	f859 400a 	ldr.w	r4, [r9, sl]
7000629e:	eb0a 080b 	add.w	r8, sl, fp
700062a2:	b2a0      	uxth	r0, r4
700062a4:	b1d8      	cbz	r0, 700062de <__multiply+0xbe>
700062a6:	9a02      	ldr	r2, [sp, #8]
700062a8:	4643      	mov	r3, r8
700062aa:	2400      	movs	r4, #0
700062ac:	f852 5b04 	ldr.w	r5, [r2], #4
700062b0:	6819      	ldr	r1, [r3, #0]
700062b2:	b2af      	uxth	r7, r5
700062b4:	0c2d      	lsrs	r5, r5, #16
700062b6:	b28e      	uxth	r6, r1
700062b8:	0c09      	lsrs	r1, r1, #16
700062ba:	fb00 6607 	mla	r6, r0, r7, r6
700062be:	fb00 1105 	mla	r1, r0, r5, r1
700062c2:	1936      	adds	r6, r6, r4
700062c4:	eb01 4116 	add.w	r1, r1, r6, lsr #16
700062c8:	b2b6      	uxth	r6, r6
700062ca:	0c0c      	lsrs	r4, r1, #16
700062cc:	4594      	cmp	ip, r2
700062ce:	ea46 4601 	orr.w	r6, r6, r1, lsl #16
700062d2:	f843 6b04 	str.w	r6, [r3], #4
700062d6:	d8e9      	bhi.n	700062ac <__multiply+0x8c>
700062d8:	601c      	str	r4, [r3, #0]
700062da:	f859 400a 	ldr.w	r4, [r9, sl]
700062de:	0c24      	lsrs	r4, r4, #16
700062e0:	d01c      	beq.n	7000631c <__multiply+0xfc>
700062e2:	f85b 200a 	ldr.w	r2, [fp, sl]
700062e6:	4641      	mov	r1, r8
700062e8:	9b02      	ldr	r3, [sp, #8]
700062ea:	2500      	movs	r5, #0
700062ec:	4610      	mov	r0, r2
700062ee:	881e      	ldrh	r6, [r3, #0]
700062f0:	b297      	uxth	r7, r2
700062f2:	fb06 5504 	mla	r5, r6, r4, r5
700062f6:	eb05 4510 	add.w	r5, r5, r0, lsr #16
700062fa:	ea47 4705 	orr.w	r7, r7, r5, lsl #16
700062fe:	600f      	str	r7, [r1, #0]
70006300:	f851 0f04 	ldr.w	r0, [r1, #4]!
70006304:	f853 2b04 	ldr.w	r2, [r3], #4
70006308:	b286      	uxth	r6, r0
7000630a:	0c12      	lsrs	r2, r2, #16
7000630c:	fb02 6204 	mla	r2, r2, r4, r6
70006310:	eb02 4215 	add.w	r2, r2, r5, lsr #16
70006314:	0c15      	lsrs	r5, r2, #16
70006316:	459c      	cmp	ip, r3
70006318:	d8e9      	bhi.n	700062ee <__multiply+0xce>
7000631a:	600a      	str	r2, [r1, #0]
7000631c:	f10a 0a04 	add.w	sl, sl, #4
70006320:	9a01      	ldr	r2, [sp, #4]
70006322:	eb0a 0309 	add.w	r3, sl, r9
70006326:	429a      	cmp	r2, r3
70006328:	d8b7      	bhi.n	7000629a <__multiply+0x7a>
7000632a:	9c05      	ldr	r4, [sp, #20]
7000632c:	2c00      	cmp	r4, #0
7000632e:	dd0b      	ble.n	70006348 <__multiply+0x128>
70006330:	9a04      	ldr	r2, [sp, #16]
70006332:	f852 3c04 	ldr.w	r3, [r2, #-4]
70006336:	b93b      	cbnz	r3, 70006348 <__multiply+0x128>
70006338:	4613      	mov	r3, r2
7000633a:	e003      	b.n	70006344 <__multiply+0x124>
7000633c:	f853 2c08 	ldr.w	r2, [r3, #-8]
70006340:	3b04      	subs	r3, #4
70006342:	b90a      	cbnz	r2, 70006348 <__multiply+0x128>
70006344:	3c01      	subs	r4, #1
70006346:	d1f9      	bne.n	7000633c <__multiply+0x11c>
70006348:	9b03      	ldr	r3, [sp, #12]
7000634a:	4618      	mov	r0, r3
7000634c:	611c      	str	r4, [r3, #16]
7000634e:	b007      	add	sp, #28
70006350:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

70006354 <__i2b>:
70006354:	b510      	push	{r4, lr}
70006356:	460c      	mov	r4, r1
70006358:	2101      	movs	r1, #1
7000635a:	f7ff fde9 	bl	70005f30 <_Balloc>
7000635e:	2201      	movs	r2, #1
70006360:	6144      	str	r4, [r0, #20]
70006362:	6102      	str	r2, [r0, #16]
70006364:	bd10      	pop	{r4, pc}
70006366:	bf00      	nop

70006368 <__multadd>:
70006368:	e92d 45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
7000636c:	460d      	mov	r5, r1
7000636e:	2100      	movs	r1, #0
70006370:	4606      	mov	r6, r0
70006372:	692c      	ldr	r4, [r5, #16]
70006374:	b083      	sub	sp, #12
70006376:	f105 0814 	add.w	r8, r5, #20
7000637a:	4608      	mov	r0, r1
7000637c:	f858 7001 	ldr.w	r7, [r8, r1]
70006380:	3001      	adds	r0, #1
70006382:	fa1f fa87 	uxth.w	sl, r7
70006386:	ea4f 4c17 	mov.w	ip, r7, lsr #16
7000638a:	fb0a 3302 	mla	r3, sl, r2, r3
7000638e:	fb0c fc02 	mul.w	ip, ip, r2
70006392:	eb0c 4c13 	add.w	ip, ip, r3, lsr #16
70006396:	b29b      	uxth	r3, r3
70006398:	eb03 430c 	add.w	r3, r3, ip, lsl #16
7000639c:	f848 3001 	str.w	r3, [r8, r1]
700063a0:	3104      	adds	r1, #4
700063a2:	4284      	cmp	r4, r0
700063a4:	ea4f 431c 	mov.w	r3, ip, lsr #16
700063a8:	dce8      	bgt.n	7000637c <__multadd+0x14>
700063aa:	b13b      	cbz	r3, 700063bc <__multadd+0x54>
700063ac:	68aa      	ldr	r2, [r5, #8]
700063ae:	4294      	cmp	r4, r2
700063b0:	da08      	bge.n	700063c4 <__multadd+0x5c>
700063b2:	eb05 0284 	add.w	r2, r5, r4, lsl #2
700063b6:	3401      	adds	r4, #1
700063b8:	612c      	str	r4, [r5, #16]
700063ba:	6153      	str	r3, [r2, #20]
700063bc:	4628      	mov	r0, r5
700063be:	b003      	add	sp, #12
700063c0:	e8bd 85f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, sl, pc}
700063c4:	6869      	ldr	r1, [r5, #4]
700063c6:	4630      	mov	r0, r6
700063c8:	9301      	str	r3, [sp, #4]
700063ca:	3101      	adds	r1, #1
700063cc:	f7ff fdb0 	bl	70005f30 <_Balloc>
700063d0:	692a      	ldr	r2, [r5, #16]
700063d2:	f105 010c 	add.w	r1, r5, #12
700063d6:	3202      	adds	r2, #2
700063d8:	0092      	lsls	r2, r2, #2
700063da:	4607      	mov	r7, r0
700063dc:	300c      	adds	r0, #12
700063de:	f7ff fa6d 	bl	700058bc <memcpy>
700063e2:	4629      	mov	r1, r5
700063e4:	4630      	mov	r0, r6
700063e6:	463d      	mov	r5, r7
700063e8:	f7ff fd86 	bl	70005ef8 <_Bfree>
700063ec:	9b01      	ldr	r3, [sp, #4]
700063ee:	e7e0      	b.n	700063b2 <__multadd+0x4a>

700063f0 <__pow5mult>:
700063f0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
700063f4:	4615      	mov	r5, r2
700063f6:	f012 0203 	ands.w	r2, r2, #3
700063fa:	4604      	mov	r4, r0
700063fc:	4688      	mov	r8, r1
700063fe:	d12c      	bne.n	7000645a <__pow5mult+0x6a>
70006400:	10ad      	asrs	r5, r5, #2
70006402:	d01e      	beq.n	70006442 <__pow5mult+0x52>
70006404:	6a66      	ldr	r6, [r4, #36]	; 0x24
70006406:	2e00      	cmp	r6, #0
70006408:	d034      	beq.n	70006474 <__pow5mult+0x84>
7000640a:	68b7      	ldr	r7, [r6, #8]
7000640c:	2f00      	cmp	r7, #0
7000640e:	d03b      	beq.n	70006488 <__pow5mult+0x98>
70006410:	f015 0f01 	tst.w	r5, #1
70006414:	d108      	bne.n	70006428 <__pow5mult+0x38>
70006416:	106d      	asrs	r5, r5, #1
70006418:	d013      	beq.n	70006442 <__pow5mult+0x52>
7000641a:	683e      	ldr	r6, [r7, #0]
7000641c:	b1a6      	cbz	r6, 70006448 <__pow5mult+0x58>
7000641e:	4630      	mov	r0, r6
70006420:	4607      	mov	r7, r0
70006422:	f015 0f01 	tst.w	r5, #1
70006426:	d0f6      	beq.n	70006416 <__pow5mult+0x26>
70006428:	4641      	mov	r1, r8
7000642a:	463a      	mov	r2, r7
7000642c:	4620      	mov	r0, r4
7000642e:	f7ff fef7 	bl	70006220 <__multiply>
70006432:	4641      	mov	r1, r8
70006434:	4606      	mov	r6, r0
70006436:	4620      	mov	r0, r4
70006438:	f7ff fd5e 	bl	70005ef8 <_Bfree>
7000643c:	106d      	asrs	r5, r5, #1
7000643e:	46b0      	mov	r8, r6
70006440:	d1eb      	bne.n	7000641a <__pow5mult+0x2a>
70006442:	4640      	mov	r0, r8
70006444:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
70006448:	4639      	mov	r1, r7
7000644a:	463a      	mov	r2, r7
7000644c:	4620      	mov	r0, r4
7000644e:	f7ff fee7 	bl	70006220 <__multiply>
70006452:	6038      	str	r0, [r7, #0]
70006454:	4607      	mov	r7, r0
70006456:	6006      	str	r6, [r0, #0]
70006458:	e7e3      	b.n	70006422 <__pow5mult+0x32>
7000645a:	f248 3cb0 	movw	ip, #33712	; 0x83b0
7000645e:	2300      	movs	r3, #0
70006460:	f2c7 0c00 	movt	ip, #28672	; 0x7000
70006464:	eb0c 0282 	add.w	r2, ip, r2, lsl #2
70006468:	f8d2 20c4 	ldr.w	r2, [r2, #196]	; 0xc4
7000646c:	f7ff ff7c 	bl	70006368 <__multadd>
70006470:	4680      	mov	r8, r0
70006472:	e7c5      	b.n	70006400 <__pow5mult+0x10>
70006474:	2010      	movs	r0, #16
70006476:	f7fe ff0d 	bl	70005294 <malloc>
7000647a:	2300      	movs	r3, #0
7000647c:	4606      	mov	r6, r0
7000647e:	6260      	str	r0, [r4, #36]	; 0x24
70006480:	60c3      	str	r3, [r0, #12]
70006482:	6043      	str	r3, [r0, #4]
70006484:	6083      	str	r3, [r0, #8]
70006486:	6003      	str	r3, [r0, #0]
70006488:	4620      	mov	r0, r4
7000648a:	f240 2171 	movw	r1, #625	; 0x271
7000648e:	f7ff ff61 	bl	70006354 <__i2b>
70006492:	2300      	movs	r3, #0
70006494:	60b0      	str	r0, [r6, #8]
70006496:	4607      	mov	r7, r0
70006498:	6003      	str	r3, [r0, #0]
7000649a:	e7b9      	b.n	70006410 <__pow5mult+0x20>

7000649c <__s2b>:
7000649c:	e92d 45f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
700064a0:	461e      	mov	r6, r3
700064a2:	f648 6339 	movw	r3, #36409	; 0x8e39
700064a6:	f106 0c08 	add.w	ip, r6, #8
700064aa:	f6c3 03e3 	movt	r3, #14563	; 0x38e3
700064ae:	4688      	mov	r8, r1
700064b0:	4605      	mov	r5, r0
700064b2:	4617      	mov	r7, r2
700064b4:	fb83 130c 	smull	r1, r3, r3, ip
700064b8:	ea4f 7cec 	mov.w	ip, ip, asr #31
700064bc:	ebcc 0c63 	rsb	ip, ip, r3, asr #1
700064c0:	f1bc 0f01 	cmp.w	ip, #1
700064c4:	dd35      	ble.n	70006532 <__s2b+0x96>
700064c6:	2100      	movs	r1, #0
700064c8:	2201      	movs	r2, #1
700064ca:	0052      	lsls	r2, r2, #1
700064cc:	3101      	adds	r1, #1
700064ce:	4594      	cmp	ip, r2
700064d0:	dcfb      	bgt.n	700064ca <__s2b+0x2e>
700064d2:	4628      	mov	r0, r5
700064d4:	f7ff fd2c 	bl	70005f30 <_Balloc>
700064d8:	9b08      	ldr	r3, [sp, #32]
700064da:	6143      	str	r3, [r0, #20]
700064dc:	2301      	movs	r3, #1
700064de:	2f09      	cmp	r7, #9
700064e0:	6103      	str	r3, [r0, #16]
700064e2:	dd22      	ble.n	7000652a <__s2b+0x8e>
700064e4:	f108 0a09 	add.w	sl, r8, #9
700064e8:	2409      	movs	r4, #9
700064ea:	f818 3004 	ldrb.w	r3, [r8, r4]
700064ee:	4601      	mov	r1, r0
700064f0:	220a      	movs	r2, #10
700064f2:	3401      	adds	r4, #1
700064f4:	3b30      	subs	r3, #48	; 0x30
700064f6:	4628      	mov	r0, r5
700064f8:	f7ff ff36 	bl	70006368 <__multadd>
700064fc:	42a7      	cmp	r7, r4
700064fe:	dcf4      	bgt.n	700064ea <__s2b+0x4e>
70006500:	eb0a 0807 	add.w	r8, sl, r7
70006504:	f1a8 0808 	sub.w	r8, r8, #8
70006508:	42be      	cmp	r6, r7
7000650a:	dd0c      	ble.n	70006526 <__s2b+0x8a>
7000650c:	2400      	movs	r4, #0
7000650e:	f818 3004 	ldrb.w	r3, [r8, r4]
70006512:	4601      	mov	r1, r0
70006514:	3401      	adds	r4, #1
70006516:	220a      	movs	r2, #10
70006518:	3b30      	subs	r3, #48	; 0x30
7000651a:	4628      	mov	r0, r5
7000651c:	f7ff ff24 	bl	70006368 <__multadd>
70006520:	19e3      	adds	r3, r4, r7
70006522:	429e      	cmp	r6, r3
70006524:	dcf3      	bgt.n	7000650e <__s2b+0x72>
70006526:	e8bd 85f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
7000652a:	f108 080a 	add.w	r8, r8, #10
7000652e:	2709      	movs	r7, #9
70006530:	e7ea      	b.n	70006508 <__s2b+0x6c>
70006532:	2100      	movs	r1, #0
70006534:	e7cd      	b.n	700064d2 <__s2b+0x36>
70006536:	bf00      	nop

70006538 <_realloc_r>:
70006538:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
7000653c:	4691      	mov	r9, r2
7000653e:	b083      	sub	sp, #12
70006540:	4607      	mov	r7, r0
70006542:	460e      	mov	r6, r1
70006544:	2900      	cmp	r1, #0
70006546:	f000 813a 	beq.w	700067be <_realloc_r+0x286>
7000654a:	f1a1 0808 	sub.w	r8, r1, #8
7000654e:	f109 040b 	add.w	r4, r9, #11
70006552:	f7ff fb41 	bl	70005bd8 <__malloc_lock>
70006556:	2c16      	cmp	r4, #22
70006558:	f8d8 1004 	ldr.w	r1, [r8, #4]
7000655c:	460b      	mov	r3, r1
7000655e:	f200 80a0 	bhi.w	700066a2 <_realloc_r+0x16a>
70006562:	2210      	movs	r2, #16
70006564:	2500      	movs	r5, #0
70006566:	4614      	mov	r4, r2
70006568:	454c      	cmp	r4, r9
7000656a:	bf38      	it	cc
7000656c:	f045 0501 	orrcc.w	r5, r5, #1
70006570:	2d00      	cmp	r5, #0
70006572:	f040 812a 	bne.w	700067ca <_realloc_r+0x292>
70006576:	f021 0a03 	bic.w	sl, r1, #3
7000657a:	4592      	cmp	sl, r2
7000657c:	bfa2      	ittt	ge
7000657e:	4640      	movge	r0, r8
70006580:	4655      	movge	r5, sl
70006582:	f108 0808 	addge.w	r8, r8, #8
70006586:	da75      	bge.n	70006674 <_realloc_r+0x13c>
70006588:	f248 6348 	movw	r3, #34376	; 0x8648
7000658c:	eb08 000a 	add.w	r0, r8, sl
70006590:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006594:	f8d3 e008 	ldr.w	lr, [r3, #8]
70006598:	4586      	cmp	lr, r0
7000659a:	f000 811a 	beq.w	700067d2 <_realloc_r+0x29a>
7000659e:	f8d0 c004 	ldr.w	ip, [r0, #4]
700065a2:	f02c 0b01 	bic.w	fp, ip, #1
700065a6:	4483      	add	fp, r0
700065a8:	f8db b004 	ldr.w	fp, [fp, #4]
700065ac:	f01b 0f01 	tst.w	fp, #1
700065b0:	d07c      	beq.n	700066ac <_realloc_r+0x174>
700065b2:	46ac      	mov	ip, r5
700065b4:	4628      	mov	r0, r5
700065b6:	f011 0f01 	tst.w	r1, #1
700065ba:	f040 809b 	bne.w	700066f4 <_realloc_r+0x1bc>
700065be:	f856 1c08 	ldr.w	r1, [r6, #-8]
700065c2:	ebc1 0b08 	rsb	fp, r1, r8
700065c6:	f8db 5004 	ldr.w	r5, [fp, #4]
700065ca:	f025 0503 	bic.w	r5, r5, #3
700065ce:	2800      	cmp	r0, #0
700065d0:	f000 80dd 	beq.w	7000678e <_realloc_r+0x256>
700065d4:	4570      	cmp	r0, lr
700065d6:	f000 811f 	beq.w	70006818 <_realloc_r+0x2e0>
700065da:	eb05 030a 	add.w	r3, r5, sl
700065de:	eb0c 0503 	add.w	r5, ip, r3
700065e2:	4295      	cmp	r5, r2
700065e4:	bfb8      	it	lt
700065e6:	461d      	movlt	r5, r3
700065e8:	f2c0 80d2 	blt.w	70006790 <_realloc_r+0x258>
700065ec:	6881      	ldr	r1, [r0, #8]
700065ee:	465b      	mov	r3, fp
700065f0:	68c0      	ldr	r0, [r0, #12]
700065f2:	f1aa 0204 	sub.w	r2, sl, #4
700065f6:	2a24      	cmp	r2, #36	; 0x24
700065f8:	6081      	str	r1, [r0, #8]
700065fa:	60c8      	str	r0, [r1, #12]
700065fc:	f853 1f08 	ldr.w	r1, [r3, #8]!
70006600:	f8db 000c 	ldr.w	r0, [fp, #12]
70006604:	6081      	str	r1, [r0, #8]
70006606:	60c8      	str	r0, [r1, #12]
70006608:	f200 80d0 	bhi.w	700067ac <_realloc_r+0x274>
7000660c:	2a13      	cmp	r2, #19
7000660e:	469c      	mov	ip, r3
70006610:	d921      	bls.n	70006656 <_realloc_r+0x11e>
70006612:	4631      	mov	r1, r6
70006614:	f10b 0c10 	add.w	ip, fp, #16
70006618:	f851 0b04 	ldr.w	r0, [r1], #4
7000661c:	f8cb 0008 	str.w	r0, [fp, #8]
70006620:	6870      	ldr	r0, [r6, #4]
70006622:	1d0e      	adds	r6, r1, #4
70006624:	2a1b      	cmp	r2, #27
70006626:	f8cb 000c 	str.w	r0, [fp, #12]
7000662a:	d914      	bls.n	70006656 <_realloc_r+0x11e>
7000662c:	6848      	ldr	r0, [r1, #4]
7000662e:	1d31      	adds	r1, r6, #4
70006630:	f10b 0c18 	add.w	ip, fp, #24
70006634:	f8cb 0010 	str.w	r0, [fp, #16]
70006638:	6870      	ldr	r0, [r6, #4]
7000663a:	1d0e      	adds	r6, r1, #4
7000663c:	2a24      	cmp	r2, #36	; 0x24
7000663e:	f8cb 0014 	str.w	r0, [fp, #20]
70006642:	d108      	bne.n	70006656 <_realloc_r+0x11e>
70006644:	684a      	ldr	r2, [r1, #4]
70006646:	f10b 0c20 	add.w	ip, fp, #32
7000664a:	f8cb 2018 	str.w	r2, [fp, #24]
7000664e:	6872      	ldr	r2, [r6, #4]
70006650:	3608      	adds	r6, #8
70006652:	f8cb 201c 	str.w	r2, [fp, #28]
70006656:	4631      	mov	r1, r6
70006658:	4698      	mov	r8, r3
7000665a:	4662      	mov	r2, ip
7000665c:	4658      	mov	r0, fp
7000665e:	f851 3b04 	ldr.w	r3, [r1], #4
70006662:	f842 3b04 	str.w	r3, [r2], #4
70006666:	6873      	ldr	r3, [r6, #4]
70006668:	f8cc 3004 	str.w	r3, [ip, #4]
7000666c:	684b      	ldr	r3, [r1, #4]
7000666e:	6053      	str	r3, [r2, #4]
70006670:	f8db 3004 	ldr.w	r3, [fp, #4]
70006674:	ebc4 0c05 	rsb	ip, r4, r5
70006678:	f1bc 0f0f 	cmp.w	ip, #15
7000667c:	d826      	bhi.n	700066cc <_realloc_r+0x194>
7000667e:	1942      	adds	r2, r0, r5
70006680:	f003 0301 	and.w	r3, r3, #1
70006684:	ea43 0505 	orr.w	r5, r3, r5
70006688:	6045      	str	r5, [r0, #4]
7000668a:	6853      	ldr	r3, [r2, #4]
7000668c:	f043 0301 	orr.w	r3, r3, #1
70006690:	6053      	str	r3, [r2, #4]
70006692:	4638      	mov	r0, r7
70006694:	4645      	mov	r5, r8
70006696:	f7ff faa1 	bl	70005bdc <__malloc_unlock>
7000669a:	4628      	mov	r0, r5
7000669c:	b003      	add	sp, #12
7000669e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
700066a2:	f024 0407 	bic.w	r4, r4, #7
700066a6:	4622      	mov	r2, r4
700066a8:	0fe5      	lsrs	r5, r4, #31
700066aa:	e75d      	b.n	70006568 <_realloc_r+0x30>
700066ac:	f02c 0c03 	bic.w	ip, ip, #3
700066b0:	eb0c 050a 	add.w	r5, ip, sl
700066b4:	4295      	cmp	r5, r2
700066b6:	f6ff af7e 	blt.w	700065b6 <_realloc_r+0x7e>
700066ba:	6882      	ldr	r2, [r0, #8]
700066bc:	460b      	mov	r3, r1
700066be:	68c1      	ldr	r1, [r0, #12]
700066c0:	4640      	mov	r0, r8
700066c2:	f108 0808 	add.w	r8, r8, #8
700066c6:	608a      	str	r2, [r1, #8]
700066c8:	60d1      	str	r1, [r2, #12]
700066ca:	e7d3      	b.n	70006674 <_realloc_r+0x13c>
700066cc:	1901      	adds	r1, r0, r4
700066ce:	f003 0301 	and.w	r3, r3, #1
700066d2:	eb01 020c 	add.w	r2, r1, ip
700066d6:	ea43 0404 	orr.w	r4, r3, r4
700066da:	f04c 0301 	orr.w	r3, ip, #1
700066de:	6044      	str	r4, [r0, #4]
700066e0:	604b      	str	r3, [r1, #4]
700066e2:	4638      	mov	r0, r7
700066e4:	6853      	ldr	r3, [r2, #4]
700066e6:	3108      	adds	r1, #8
700066e8:	f043 0301 	orr.w	r3, r3, #1
700066ec:	6053      	str	r3, [r2, #4]
700066ee:	f7fe fa57 	bl	70004ba0 <_free_r>
700066f2:	e7ce      	b.n	70006692 <_realloc_r+0x15a>
700066f4:	4649      	mov	r1, r9
700066f6:	4638      	mov	r0, r7
700066f8:	f7fe fdd4 	bl	700052a4 <_malloc_r>
700066fc:	4605      	mov	r5, r0
700066fe:	2800      	cmp	r0, #0
70006700:	d041      	beq.n	70006786 <_realloc_r+0x24e>
70006702:	f8d8 3004 	ldr.w	r3, [r8, #4]
70006706:	f1a0 0208 	sub.w	r2, r0, #8
7000670a:	f023 0101 	bic.w	r1, r3, #1
7000670e:	4441      	add	r1, r8
70006710:	428a      	cmp	r2, r1
70006712:	f000 80d7 	beq.w	700068c4 <_realloc_r+0x38c>
70006716:	f1aa 0204 	sub.w	r2, sl, #4
7000671a:	4631      	mov	r1, r6
7000671c:	2a24      	cmp	r2, #36	; 0x24
7000671e:	d878      	bhi.n	70006812 <_realloc_r+0x2da>
70006720:	2a13      	cmp	r2, #19
70006722:	4603      	mov	r3, r0
70006724:	d921      	bls.n	7000676a <_realloc_r+0x232>
70006726:	4634      	mov	r4, r6
70006728:	f854 3b04 	ldr.w	r3, [r4], #4
7000672c:	1d21      	adds	r1, r4, #4
7000672e:	f840 3b04 	str.w	r3, [r0], #4
70006732:	1d03      	adds	r3, r0, #4
70006734:	f8d6 c004 	ldr.w	ip, [r6, #4]
70006738:	2a1b      	cmp	r2, #27
7000673a:	f8c5 c004 	str.w	ip, [r5, #4]
7000673e:	d914      	bls.n	7000676a <_realloc_r+0x232>
70006740:	f8d4 e004 	ldr.w	lr, [r4, #4]
70006744:	1d1c      	adds	r4, r3, #4
70006746:	f101 0c04 	add.w	ip, r1, #4
7000674a:	f8c0 e004 	str.w	lr, [r0, #4]
7000674e:	6848      	ldr	r0, [r1, #4]
70006750:	f10c 0104 	add.w	r1, ip, #4
70006754:	6058      	str	r0, [r3, #4]
70006756:	1d23      	adds	r3, r4, #4
70006758:	2a24      	cmp	r2, #36	; 0x24
7000675a:	d106      	bne.n	7000676a <_realloc_r+0x232>
7000675c:	f8dc 2004 	ldr.w	r2, [ip, #4]
70006760:	6062      	str	r2, [r4, #4]
70006762:	684a      	ldr	r2, [r1, #4]
70006764:	3108      	adds	r1, #8
70006766:	605a      	str	r2, [r3, #4]
70006768:	3308      	adds	r3, #8
7000676a:	4608      	mov	r0, r1
7000676c:	461a      	mov	r2, r3
7000676e:	f850 4b04 	ldr.w	r4, [r0], #4
70006772:	f842 4b04 	str.w	r4, [r2], #4
70006776:	6849      	ldr	r1, [r1, #4]
70006778:	6059      	str	r1, [r3, #4]
7000677a:	6843      	ldr	r3, [r0, #4]
7000677c:	6053      	str	r3, [r2, #4]
7000677e:	4631      	mov	r1, r6
70006780:	4638      	mov	r0, r7
70006782:	f7fe fa0d 	bl	70004ba0 <_free_r>
70006786:	4638      	mov	r0, r7
70006788:	f7ff fa28 	bl	70005bdc <__malloc_unlock>
7000678c:	e785      	b.n	7000669a <_realloc_r+0x162>
7000678e:	4455      	add	r5, sl
70006790:	4295      	cmp	r5, r2
70006792:	dbaf      	blt.n	700066f4 <_realloc_r+0x1bc>
70006794:	465b      	mov	r3, fp
70006796:	f8db 000c 	ldr.w	r0, [fp, #12]
7000679a:	f1aa 0204 	sub.w	r2, sl, #4
7000679e:	f853 1f08 	ldr.w	r1, [r3, #8]!
700067a2:	2a24      	cmp	r2, #36	; 0x24
700067a4:	6081      	str	r1, [r0, #8]
700067a6:	60c8      	str	r0, [r1, #12]
700067a8:	f67f af30 	bls.w	7000660c <_realloc_r+0xd4>
700067ac:	4618      	mov	r0, r3
700067ae:	4631      	mov	r1, r6
700067b0:	4698      	mov	r8, r3
700067b2:	f7ff f94b 	bl	70005a4c <memmove>
700067b6:	4658      	mov	r0, fp
700067b8:	f8db 3004 	ldr.w	r3, [fp, #4]
700067bc:	e75a      	b.n	70006674 <_realloc_r+0x13c>
700067be:	4611      	mov	r1, r2
700067c0:	b003      	add	sp, #12
700067c2:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
700067c6:	f7fe bd6d 	b.w	700052a4 <_malloc_r>
700067ca:	230c      	movs	r3, #12
700067cc:	2500      	movs	r5, #0
700067ce:	603b      	str	r3, [r7, #0]
700067d0:	e763      	b.n	7000669a <_realloc_r+0x162>
700067d2:	f8de 5004 	ldr.w	r5, [lr, #4]
700067d6:	f104 0b10 	add.w	fp, r4, #16
700067da:	f025 0c03 	bic.w	ip, r5, #3
700067de:	eb0c 000a 	add.w	r0, ip, sl
700067e2:	4558      	cmp	r0, fp
700067e4:	bfb8      	it	lt
700067e6:	4670      	movlt	r0, lr
700067e8:	f6ff aee5 	blt.w	700065b6 <_realloc_r+0x7e>
700067ec:	eb08 0204 	add.w	r2, r8, r4
700067f0:	1b01      	subs	r1, r0, r4
700067f2:	f041 0101 	orr.w	r1, r1, #1
700067f6:	609a      	str	r2, [r3, #8]
700067f8:	6051      	str	r1, [r2, #4]
700067fa:	4638      	mov	r0, r7
700067fc:	f8d8 1004 	ldr.w	r1, [r8, #4]
70006800:	4635      	mov	r5, r6
70006802:	f001 0301 	and.w	r3, r1, #1
70006806:	431c      	orrs	r4, r3
70006808:	f8c8 4004 	str.w	r4, [r8, #4]
7000680c:	f7ff f9e6 	bl	70005bdc <__malloc_unlock>
70006810:	e743      	b.n	7000669a <_realloc_r+0x162>
70006812:	f7ff f91b 	bl	70005a4c <memmove>
70006816:	e7b2      	b.n	7000677e <_realloc_r+0x246>
70006818:	4455      	add	r5, sl
7000681a:	f104 0110 	add.w	r1, r4, #16
7000681e:	44ac      	add	ip, r5
70006820:	458c      	cmp	ip, r1
70006822:	dbb5      	blt.n	70006790 <_realloc_r+0x258>
70006824:	465d      	mov	r5, fp
70006826:	f8db 000c 	ldr.w	r0, [fp, #12]
7000682a:	f1aa 0204 	sub.w	r2, sl, #4
7000682e:	f855 1f08 	ldr.w	r1, [r5, #8]!
70006832:	2a24      	cmp	r2, #36	; 0x24
70006834:	6081      	str	r1, [r0, #8]
70006836:	60c8      	str	r0, [r1, #12]
70006838:	d84c      	bhi.n	700068d4 <_realloc_r+0x39c>
7000683a:	2a13      	cmp	r2, #19
7000683c:	4628      	mov	r0, r5
7000683e:	d924      	bls.n	7000688a <_realloc_r+0x352>
70006840:	4631      	mov	r1, r6
70006842:	f10b 0010 	add.w	r0, fp, #16
70006846:	f851 eb04 	ldr.w	lr, [r1], #4
7000684a:	f8cb e008 	str.w	lr, [fp, #8]
7000684e:	f8d6 e004 	ldr.w	lr, [r6, #4]
70006852:	1d0e      	adds	r6, r1, #4
70006854:	2a1b      	cmp	r2, #27
70006856:	f8cb e00c 	str.w	lr, [fp, #12]
7000685a:	d916      	bls.n	7000688a <_realloc_r+0x352>
7000685c:	f8d1 e004 	ldr.w	lr, [r1, #4]
70006860:	1d31      	adds	r1, r6, #4
70006862:	f10b 0018 	add.w	r0, fp, #24
70006866:	f8cb e010 	str.w	lr, [fp, #16]
7000686a:	f8d6 e004 	ldr.w	lr, [r6, #4]
7000686e:	1d0e      	adds	r6, r1, #4
70006870:	2a24      	cmp	r2, #36	; 0x24
70006872:	f8cb e014 	str.w	lr, [fp, #20]
70006876:	d108      	bne.n	7000688a <_realloc_r+0x352>
70006878:	684a      	ldr	r2, [r1, #4]
7000687a:	f10b 0020 	add.w	r0, fp, #32
7000687e:	f8cb 2018 	str.w	r2, [fp, #24]
70006882:	6872      	ldr	r2, [r6, #4]
70006884:	3608      	adds	r6, #8
70006886:	f8cb 201c 	str.w	r2, [fp, #28]
7000688a:	4631      	mov	r1, r6
7000688c:	4602      	mov	r2, r0
7000688e:	f851 eb04 	ldr.w	lr, [r1], #4
70006892:	f842 eb04 	str.w	lr, [r2], #4
70006896:	6876      	ldr	r6, [r6, #4]
70006898:	6046      	str	r6, [r0, #4]
7000689a:	6849      	ldr	r1, [r1, #4]
7000689c:	6051      	str	r1, [r2, #4]
7000689e:	eb0b 0204 	add.w	r2, fp, r4
700068a2:	ebc4 010c 	rsb	r1, r4, ip
700068a6:	f041 0101 	orr.w	r1, r1, #1
700068aa:	609a      	str	r2, [r3, #8]
700068ac:	6051      	str	r1, [r2, #4]
700068ae:	4638      	mov	r0, r7
700068b0:	f8db 1004 	ldr.w	r1, [fp, #4]
700068b4:	f001 0301 	and.w	r3, r1, #1
700068b8:	431c      	orrs	r4, r3
700068ba:	f8cb 4004 	str.w	r4, [fp, #4]
700068be:	f7ff f98d 	bl	70005bdc <__malloc_unlock>
700068c2:	e6ea      	b.n	7000669a <_realloc_r+0x162>
700068c4:	6855      	ldr	r5, [r2, #4]
700068c6:	4640      	mov	r0, r8
700068c8:	f108 0808 	add.w	r8, r8, #8
700068cc:	f025 0503 	bic.w	r5, r5, #3
700068d0:	4455      	add	r5, sl
700068d2:	e6cf      	b.n	70006674 <_realloc_r+0x13c>
700068d4:	4631      	mov	r1, r6
700068d6:	4628      	mov	r0, r5
700068d8:	9300      	str	r3, [sp, #0]
700068da:	f8cd c004 	str.w	ip, [sp, #4]
700068de:	f7ff f8b5 	bl	70005a4c <memmove>
700068e2:	f8dd c004 	ldr.w	ip, [sp, #4]
700068e6:	9b00      	ldr	r3, [sp, #0]
700068e8:	e7d9      	b.n	7000689e <_realloc_r+0x366>
700068ea:	bf00      	nop

700068ec <__isinfd>:
700068ec:	4602      	mov	r2, r0
700068ee:	4240      	negs	r0, r0
700068f0:	ea40 0302 	orr.w	r3, r0, r2
700068f4:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
700068f8:	ea41 73d3 	orr.w	r3, r1, r3, lsr #31
700068fc:	f1c3 43fe 	rsb	r3, r3, #2130706432	; 0x7f000000
70006900:	f503 0370 	add.w	r3, r3, #15728640	; 0xf00000
70006904:	4258      	negs	r0, r3
70006906:	ea40 0303 	orr.w	r3, r0, r3
7000690a:	17d8      	asrs	r0, r3, #31
7000690c:	3001      	adds	r0, #1
7000690e:	4770      	bx	lr

70006910 <__isnand>:
70006910:	4602      	mov	r2, r0
70006912:	4240      	negs	r0, r0
70006914:	4310      	orrs	r0, r2
70006916:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
7000691a:	ea41 70d0 	orr.w	r0, r1, r0, lsr #31
7000691e:	f1c0 40fe 	rsb	r0, r0, #2130706432	; 0x7f000000
70006922:	f500 0070 	add.w	r0, r0, #15728640	; 0xf00000
70006926:	0fc0      	lsrs	r0, r0, #31
70006928:	4770      	bx	lr
7000692a:	bf00      	nop

7000692c <_sbrk_r>:
7000692c:	b538      	push	{r3, r4, r5, lr}
7000692e:	f648 24f8 	movw	r4, #35576	; 0x8af8
70006932:	f2c7 0400 	movt	r4, #28672	; 0x7000
70006936:	4605      	mov	r5, r0
70006938:	4608      	mov	r0, r1
7000693a:	2300      	movs	r3, #0
7000693c:	6023      	str	r3, [r4, #0]
7000693e:	f7f9 fef5 	bl	7000072c <_sbrk>
70006942:	f1b0 3fff 	cmp.w	r0, #4294967295
70006946:	d000      	beq.n	7000694a <_sbrk_r+0x1e>
70006948:	bd38      	pop	{r3, r4, r5, pc}
7000694a:	6823      	ldr	r3, [r4, #0]
7000694c:	2b00      	cmp	r3, #0
7000694e:	d0fb      	beq.n	70006948 <_sbrk_r+0x1c>
70006950:	602b      	str	r3, [r5, #0]
70006952:	bd38      	pop	{r3, r4, r5, pc}

70006954 <__sclose>:
70006954:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
70006958:	f000 b990 	b.w	70006c7c <_close_r>

7000695c <__sseek>:
7000695c:	b510      	push	{r4, lr}
7000695e:	460c      	mov	r4, r1
70006960:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
70006964:	f000 fa2e 	bl	70006dc4 <_lseek_r>
70006968:	89a3      	ldrh	r3, [r4, #12]
7000696a:	f1b0 3fff 	cmp.w	r0, #4294967295
7000696e:	bf15      	itete	ne
70006970:	6560      	strne	r0, [r4, #84]	; 0x54
70006972:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
70006976:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
7000697a:	81a3      	strheq	r3, [r4, #12]
7000697c:	bf18      	it	ne
7000697e:	81a3      	strhne	r3, [r4, #12]
70006980:	bd10      	pop	{r4, pc}
70006982:	bf00      	nop

70006984 <__swrite>:
70006984:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
70006988:	461d      	mov	r5, r3
7000698a:	898b      	ldrh	r3, [r1, #12]
7000698c:	460c      	mov	r4, r1
7000698e:	4616      	mov	r6, r2
70006990:	4607      	mov	r7, r0
70006992:	f413 7f80 	tst.w	r3, #256	; 0x100
70006996:	d006      	beq.n	700069a6 <__swrite+0x22>
70006998:	2302      	movs	r3, #2
7000699a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
7000699e:	2200      	movs	r2, #0
700069a0:	f000 fa10 	bl	70006dc4 <_lseek_r>
700069a4:	89a3      	ldrh	r3, [r4, #12]
700069a6:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
700069aa:	4638      	mov	r0, r7
700069ac:	81a3      	strh	r3, [r4, #12]
700069ae:	4632      	mov	r2, r6
700069b0:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
700069b4:	462b      	mov	r3, r5
700069b6:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
700069ba:	f7f9 be89 	b.w	700006d0 <_write_r>
700069be:	bf00      	nop

700069c0 <__sread>:
700069c0:	b510      	push	{r4, lr}
700069c2:	460c      	mov	r4, r1
700069c4:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
700069c8:	f000 fa12 	bl	70006df0 <_read_r>
700069cc:	2800      	cmp	r0, #0
700069ce:	db03      	blt.n	700069d8 <__sread+0x18>
700069d0:	6d63      	ldr	r3, [r4, #84]	; 0x54
700069d2:	181b      	adds	r3, r3, r0
700069d4:	6563      	str	r3, [r4, #84]	; 0x54
700069d6:	bd10      	pop	{r4, pc}
700069d8:	89a3      	ldrh	r3, [r4, #12]
700069da:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
700069de:	81a3      	strh	r3, [r4, #12]
700069e0:	bd10      	pop	{r4, pc}
700069e2:	bf00      	nop

700069e4 <strcmp>:
700069e4:	ea80 0201 	eor.w	r2, r0, r1
700069e8:	f012 0f03 	tst.w	r2, #3
700069ec:	d13a      	bne.n	70006a64 <strcmp_unaligned>
700069ee:	f010 0203 	ands.w	r2, r0, #3
700069f2:	f020 0003 	bic.w	r0, r0, #3
700069f6:	f021 0103 	bic.w	r1, r1, #3
700069fa:	f850 cb04 	ldr.w	ip, [r0], #4
700069fe:	bf08      	it	eq
70006a00:	f851 3b04 	ldreq.w	r3, [r1], #4
70006a04:	d00d      	beq.n	70006a22 <strcmp+0x3e>
70006a06:	f082 0203 	eor.w	r2, r2, #3
70006a0a:	ea4f 02c2 	mov.w	r2, r2, lsl #3
70006a0e:	f06f 437f 	mvn.w	r3, #4278190080	; 0xff000000
70006a12:	fa23 f202 	lsr.w	r2, r3, r2
70006a16:	f851 3b04 	ldr.w	r3, [r1], #4
70006a1a:	ea4c 0c02 	orr.w	ip, ip, r2
70006a1e:	ea43 0302 	orr.w	r3, r3, r2
70006a22:	bf00      	nop
70006a24:	f1ac 3201 	sub.w	r2, ip, #16843009	; 0x1010101
70006a28:	459c      	cmp	ip, r3
70006a2a:	bf01      	itttt	eq
70006a2c:	ea22 020c 	biceq.w	r2, r2, ip
70006a30:	f012 3f80 	tsteq.w	r2, #2155905152	; 0x80808080
70006a34:	f850 cb04 	ldreq.w	ip, [r0], #4
70006a38:	f851 3b04 	ldreq.w	r3, [r1], #4
70006a3c:	d0f2      	beq.n	70006a24 <strcmp+0x40>
70006a3e:	ea4f 600c 	mov.w	r0, ip, lsl #24
70006a42:	ea4f 2c1c 	mov.w	ip, ip, lsr #8
70006a46:	2801      	cmp	r0, #1
70006a48:	bf28      	it	cs
70006a4a:	ebb0 6f03 	cmpcs.w	r0, r3, lsl #24
70006a4e:	bf08      	it	eq
70006a50:	0a1b      	lsreq	r3, r3, #8
70006a52:	d0f4      	beq.n	70006a3e <strcmp+0x5a>
70006a54:	f003 03ff 	and.w	r3, r3, #255	; 0xff
70006a58:	ea4f 6010 	mov.w	r0, r0, lsr #24
70006a5c:	eba0 0003 	sub.w	r0, r0, r3
70006a60:	4770      	bx	lr
70006a62:	bf00      	nop

70006a64 <strcmp_unaligned>:
70006a64:	f010 0f03 	tst.w	r0, #3
70006a68:	d00a      	beq.n	70006a80 <strcmp_unaligned+0x1c>
70006a6a:	f810 2b01 	ldrb.w	r2, [r0], #1
70006a6e:	f811 3b01 	ldrb.w	r3, [r1], #1
70006a72:	2a01      	cmp	r2, #1
70006a74:	bf28      	it	cs
70006a76:	429a      	cmpcs	r2, r3
70006a78:	d0f4      	beq.n	70006a64 <strcmp_unaligned>
70006a7a:	eba2 0003 	sub.w	r0, r2, r3
70006a7e:	4770      	bx	lr
70006a80:	f84d 5d04 	str.w	r5, [sp, #-4]!
70006a84:	f84d 4d04 	str.w	r4, [sp, #-4]!
70006a88:	f04f 0201 	mov.w	r2, #1
70006a8c:	ea42 2202 	orr.w	r2, r2, r2, lsl #8
70006a90:	ea42 4202 	orr.w	r2, r2, r2, lsl #16
70006a94:	f001 0c03 	and.w	ip, r1, #3
70006a98:	f021 0103 	bic.w	r1, r1, #3
70006a9c:	f850 4b04 	ldr.w	r4, [r0], #4
70006aa0:	f851 5b04 	ldr.w	r5, [r1], #4
70006aa4:	f1bc 0f02 	cmp.w	ip, #2
70006aa8:	d026      	beq.n	70006af8 <strcmp_unaligned+0x94>
70006aaa:	d84b      	bhi.n	70006b44 <strcmp_unaligned+0xe0>
70006aac:	f024 4c7f 	bic.w	ip, r4, #4278190080	; 0xff000000
70006ab0:	ebbc 2f15 	cmp.w	ip, r5, lsr #8
70006ab4:	eba4 0302 	sub.w	r3, r4, r2
70006ab8:	ea23 0304 	bic.w	r3, r3, r4
70006abc:	d10d      	bne.n	70006ada <strcmp_unaligned+0x76>
70006abe:	ea13 13c2 	ands.w	r3, r3, r2, lsl #7
70006ac2:	bf08      	it	eq
70006ac4:	f851 5b04 	ldreq.w	r5, [r1], #4
70006ac8:	d10a      	bne.n	70006ae0 <strcmp_unaligned+0x7c>
70006aca:	ea8c 0c04 	eor.w	ip, ip, r4
70006ace:	ebbc 6f05 	cmp.w	ip, r5, lsl #24
70006ad2:	d10c      	bne.n	70006aee <strcmp_unaligned+0x8a>
70006ad4:	f850 4b04 	ldr.w	r4, [r0], #4
70006ad8:	e7e8      	b.n	70006aac <strcmp_unaligned+0x48>
70006ada:	ea4f 2515 	mov.w	r5, r5, lsr #8
70006ade:	e05c      	b.n	70006b9a <strcmp_unaligned+0x136>
70006ae0:	f033 437f 	bics.w	r3, r3, #4278190080	; 0xff000000
70006ae4:	d152      	bne.n	70006b8c <strcmp_unaligned+0x128>
70006ae6:	780d      	ldrb	r5, [r1, #0]
70006ae8:	ea4f 6c14 	mov.w	ip, r4, lsr #24
70006aec:	e055      	b.n	70006b9a <strcmp_unaligned+0x136>
70006aee:	ea4f 6c14 	mov.w	ip, r4, lsr #24
70006af2:	f005 05ff 	and.w	r5, r5, #255	; 0xff
70006af6:	e050      	b.n	70006b9a <strcmp_unaligned+0x136>
70006af8:	ea4f 4c04 	mov.w	ip, r4, lsl #16
70006afc:	eba4 0302 	sub.w	r3, r4, r2
70006b00:	ea4f 4c1c 	mov.w	ip, ip, lsr #16
70006b04:	ea23 0304 	bic.w	r3, r3, r4
70006b08:	ebbc 4f15 	cmp.w	ip, r5, lsr #16
70006b0c:	d117      	bne.n	70006b3e <strcmp_unaligned+0xda>
70006b0e:	ea13 13c2 	ands.w	r3, r3, r2, lsl #7
70006b12:	bf08      	it	eq
70006b14:	f851 5b04 	ldreq.w	r5, [r1], #4
70006b18:	d107      	bne.n	70006b2a <strcmp_unaligned+0xc6>
70006b1a:	ea8c 0c04 	eor.w	ip, ip, r4
70006b1e:	ebbc 4f05 	cmp.w	ip, r5, lsl #16
70006b22:	d108      	bne.n	70006b36 <strcmp_unaligned+0xd2>
70006b24:	f850 4b04 	ldr.w	r4, [r0], #4
70006b28:	e7e6      	b.n	70006af8 <strcmp_unaligned+0x94>
70006b2a:	041b      	lsls	r3, r3, #16
70006b2c:	d12e      	bne.n	70006b8c <strcmp_unaligned+0x128>
70006b2e:	880d      	ldrh	r5, [r1, #0]
70006b30:	ea4f 4c14 	mov.w	ip, r4, lsr #16
70006b34:	e031      	b.n	70006b9a <strcmp_unaligned+0x136>
70006b36:	ea4f 4505 	mov.w	r5, r5, lsl #16
70006b3a:	ea4f 4c14 	mov.w	ip, r4, lsr #16
70006b3e:	ea4f 4515 	mov.w	r5, r5, lsr #16
70006b42:	e02a      	b.n	70006b9a <strcmp_unaligned+0x136>
70006b44:	f004 0cff 	and.w	ip, r4, #255	; 0xff
70006b48:	ebbc 6f15 	cmp.w	ip, r5, lsr #24
70006b4c:	eba4 0302 	sub.w	r3, r4, r2
70006b50:	ea23 0304 	bic.w	r3, r3, r4
70006b54:	d10d      	bne.n	70006b72 <strcmp_unaligned+0x10e>
70006b56:	ea13 13c2 	ands.w	r3, r3, r2, lsl #7
70006b5a:	bf08      	it	eq
70006b5c:	f851 5b04 	ldreq.w	r5, [r1], #4
70006b60:	d10a      	bne.n	70006b78 <strcmp_unaligned+0x114>
70006b62:	ea8c 0c04 	eor.w	ip, ip, r4
70006b66:	ebbc 2f05 	cmp.w	ip, r5, lsl #8
70006b6a:	d10a      	bne.n	70006b82 <strcmp_unaligned+0x11e>
70006b6c:	f850 4b04 	ldr.w	r4, [r0], #4
70006b70:	e7e8      	b.n	70006b44 <strcmp_unaligned+0xe0>
70006b72:	ea4f 6515 	mov.w	r5, r5, lsr #24
70006b76:	e010      	b.n	70006b9a <strcmp_unaligned+0x136>
70006b78:	f014 0fff 	tst.w	r4, #255	; 0xff
70006b7c:	d006      	beq.n	70006b8c <strcmp_unaligned+0x128>
70006b7e:	f851 5b04 	ldr.w	r5, [r1], #4
70006b82:	ea4f 2c14 	mov.w	ip, r4, lsr #8
70006b86:	f025 457f 	bic.w	r5, r5, #4278190080	; 0xff000000
70006b8a:	e006      	b.n	70006b9a <strcmp_unaligned+0x136>
70006b8c:	f04f 0000 	mov.w	r0, #0
70006b90:	f85d 4b04 	ldr.w	r4, [sp], #4
70006b94:	f85d 5b04 	ldr.w	r5, [sp], #4
70006b98:	4770      	bx	lr
70006b9a:	f00c 02ff 	and.w	r2, ip, #255	; 0xff
70006b9e:	f005 00ff 	and.w	r0, r5, #255	; 0xff
70006ba2:	2801      	cmp	r0, #1
70006ba4:	bf28      	it	cs
70006ba6:	4290      	cmpcs	r0, r2
70006ba8:	bf04      	itt	eq
70006baa:	ea4f 2c1c 	moveq.w	ip, ip, lsr #8
70006bae:	0a2d      	lsreq	r5, r5, #8
70006bb0:	d0f3      	beq.n	70006b9a <strcmp_unaligned+0x136>
70006bb2:	eba2 0000 	sub.w	r0, r2, r0
70006bb6:	f85d 4b04 	ldr.w	r4, [sp], #4
70006bba:	f85d 5b04 	ldr.w	r5, [sp], #4
70006bbe:	4770      	bx	lr

70006bc0 <strlen>:
70006bc0:	f020 0103 	bic.w	r1, r0, #3
70006bc4:	f010 0003 	ands.w	r0, r0, #3
70006bc8:	f1c0 0000 	rsb	r0, r0, #0
70006bcc:	f851 3b04 	ldr.w	r3, [r1], #4
70006bd0:	f100 0c04 	add.w	ip, r0, #4
70006bd4:	ea4f 0ccc 	mov.w	ip, ip, lsl #3
70006bd8:	f06f 0200 	mvn.w	r2, #0
70006bdc:	bf1c      	itt	ne
70006bde:	fa22 f20c 	lsrne.w	r2, r2, ip
70006be2:	4313      	orrne	r3, r2
70006be4:	f04f 0c01 	mov.w	ip, #1
70006be8:	ea4c 2c0c 	orr.w	ip, ip, ip, lsl #8
70006bec:	ea4c 4c0c 	orr.w	ip, ip, ip, lsl #16
70006bf0:	eba3 020c 	sub.w	r2, r3, ip
70006bf4:	ea22 0203 	bic.w	r2, r2, r3
70006bf8:	ea12 12cc 	ands.w	r2, r2, ip, lsl #7
70006bfc:	bf04      	itt	eq
70006bfe:	f851 3b04 	ldreq.w	r3, [r1], #4
70006c02:	3004      	addeq	r0, #4
70006c04:	d0f4      	beq.n	70006bf0 <strlen+0x30>
70006c06:	f013 0fff 	tst.w	r3, #255	; 0xff
70006c0a:	bf1f      	itttt	ne
70006c0c:	3001      	addne	r0, #1
70006c0e:	f413 4f7f 	tstne.w	r3, #65280	; 0xff00
70006c12:	3001      	addne	r0, #1
70006c14:	f413 0f7f 	tstne.w	r3, #16711680	; 0xff0000
70006c18:	bf18      	it	ne
70006c1a:	3001      	addne	r0, #1
70006c1c:	4770      	bx	lr
70006c1e:	bf00      	nop

70006c20 <_calloc_r>:
70006c20:	b538      	push	{r3, r4, r5, lr}
70006c22:	fb01 f102 	mul.w	r1, r1, r2
70006c26:	f7fe fb3d 	bl	700052a4 <_malloc_r>
70006c2a:	4604      	mov	r4, r0
70006c2c:	b1f8      	cbz	r0, 70006c6e <_calloc_r+0x4e>
70006c2e:	f850 2c04 	ldr.w	r2, [r0, #-4]
70006c32:	f022 0203 	bic.w	r2, r2, #3
70006c36:	3a04      	subs	r2, #4
70006c38:	2a24      	cmp	r2, #36	; 0x24
70006c3a:	d81a      	bhi.n	70006c72 <_calloc_r+0x52>
70006c3c:	2a13      	cmp	r2, #19
70006c3e:	4603      	mov	r3, r0
70006c40:	d90f      	bls.n	70006c62 <_calloc_r+0x42>
70006c42:	2100      	movs	r1, #0
70006c44:	f840 1b04 	str.w	r1, [r0], #4
70006c48:	1d03      	adds	r3, r0, #4
70006c4a:	2a1b      	cmp	r2, #27
70006c4c:	6061      	str	r1, [r4, #4]
70006c4e:	d908      	bls.n	70006c62 <_calloc_r+0x42>
70006c50:	1d1d      	adds	r5, r3, #4
70006c52:	6041      	str	r1, [r0, #4]
70006c54:	6059      	str	r1, [r3, #4]
70006c56:	1d2b      	adds	r3, r5, #4
70006c58:	2a24      	cmp	r2, #36	; 0x24
70006c5a:	bf02      	ittt	eq
70006c5c:	6069      	streq	r1, [r5, #4]
70006c5e:	6059      	streq	r1, [r3, #4]
70006c60:	3308      	addeq	r3, #8
70006c62:	461a      	mov	r2, r3
70006c64:	2100      	movs	r1, #0
70006c66:	f842 1b04 	str.w	r1, [r2], #4
70006c6a:	6059      	str	r1, [r3, #4]
70006c6c:	6051      	str	r1, [r2, #4]
70006c6e:	4620      	mov	r0, r4
70006c70:	bd38      	pop	{r3, r4, r5, pc}
70006c72:	2100      	movs	r1, #0
70006c74:	f7fe ff46 	bl	70005b04 <memset>
70006c78:	4620      	mov	r0, r4
70006c7a:	bd38      	pop	{r3, r4, r5, pc}

70006c7c <_close_r>:
70006c7c:	b538      	push	{r3, r4, r5, lr}
70006c7e:	f648 24f8 	movw	r4, #35576	; 0x8af8
70006c82:	f2c7 0400 	movt	r4, #28672	; 0x7000
70006c86:	4605      	mov	r5, r0
70006c88:	4608      	mov	r0, r1
70006c8a:	2300      	movs	r3, #0
70006c8c:	6023      	str	r3, [r4, #0]
70006c8e:	f7f9 fc79 	bl	70000584 <_close>
70006c92:	f1b0 3fff 	cmp.w	r0, #4294967295
70006c96:	d000      	beq.n	70006c9a <_close_r+0x1e>
70006c98:	bd38      	pop	{r3, r4, r5, pc}
70006c9a:	6823      	ldr	r3, [r4, #0]
70006c9c:	2b00      	cmp	r3, #0
70006c9e:	d0fb      	beq.n	70006c98 <_close_r+0x1c>
70006ca0:	602b      	str	r3, [r5, #0]
70006ca2:	bd38      	pop	{r3, r4, r5, pc}

70006ca4 <_fclose_r>:
70006ca4:	b570      	push	{r4, r5, r6, lr}
70006ca6:	4605      	mov	r5, r0
70006ca8:	460c      	mov	r4, r1
70006caa:	2900      	cmp	r1, #0
70006cac:	d04b      	beq.n	70006d46 <_fclose_r+0xa2>
70006cae:	f7fd fe3f 	bl	70004930 <__sfp_lock_acquire>
70006cb2:	b115      	cbz	r5, 70006cba <_fclose_r+0x16>
70006cb4:	69ab      	ldr	r3, [r5, #24]
70006cb6:	2b00      	cmp	r3, #0
70006cb8:	d048      	beq.n	70006d4c <_fclose_r+0xa8>
70006cba:	f248 330c 	movw	r3, #33548	; 0x830c
70006cbe:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006cc2:	429c      	cmp	r4, r3
70006cc4:	bf08      	it	eq
70006cc6:	686c      	ldreq	r4, [r5, #4]
70006cc8:	d00e      	beq.n	70006ce8 <_fclose_r+0x44>
70006cca:	f248 332c 	movw	r3, #33580	; 0x832c
70006cce:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006cd2:	429c      	cmp	r4, r3
70006cd4:	bf08      	it	eq
70006cd6:	68ac      	ldreq	r4, [r5, #8]
70006cd8:	d006      	beq.n	70006ce8 <_fclose_r+0x44>
70006cda:	f248 334c 	movw	r3, #33612	; 0x834c
70006cde:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006ce2:	429c      	cmp	r4, r3
70006ce4:	bf08      	it	eq
70006ce6:	68ec      	ldreq	r4, [r5, #12]
70006ce8:	f9b4 600c 	ldrsh.w	r6, [r4, #12]
70006cec:	b33e      	cbz	r6, 70006d3e <_fclose_r+0x9a>
70006cee:	4628      	mov	r0, r5
70006cf0:	4621      	mov	r1, r4
70006cf2:	f7fd fd61 	bl	700047b8 <_fflush_r>
70006cf6:	6b23      	ldr	r3, [r4, #48]	; 0x30
70006cf8:	4606      	mov	r6, r0
70006cfa:	b13b      	cbz	r3, 70006d0c <_fclose_r+0x68>
70006cfc:	4628      	mov	r0, r5
70006cfe:	6a21      	ldr	r1, [r4, #32]
70006d00:	4798      	blx	r3
70006d02:	ea36 0620 	bics.w	r6, r6, r0, asr #32
70006d06:	bf28      	it	cs
70006d08:	f04f 36ff 	movcs.w	r6, #4294967295
70006d0c:	89a3      	ldrh	r3, [r4, #12]
70006d0e:	f013 0f80 	tst.w	r3, #128	; 0x80
70006d12:	d11f      	bne.n	70006d54 <_fclose_r+0xb0>
70006d14:	6b61      	ldr	r1, [r4, #52]	; 0x34
70006d16:	b141      	cbz	r1, 70006d2a <_fclose_r+0x86>
70006d18:	f104 0344 	add.w	r3, r4, #68	; 0x44
70006d1c:	4299      	cmp	r1, r3
70006d1e:	d002      	beq.n	70006d26 <_fclose_r+0x82>
70006d20:	4628      	mov	r0, r5
70006d22:	f7fd ff3d 	bl	70004ba0 <_free_r>
70006d26:	2300      	movs	r3, #0
70006d28:	6363      	str	r3, [r4, #52]	; 0x34
70006d2a:	6ca1      	ldr	r1, [r4, #72]	; 0x48
70006d2c:	b121      	cbz	r1, 70006d38 <_fclose_r+0x94>
70006d2e:	4628      	mov	r0, r5
70006d30:	f7fd ff36 	bl	70004ba0 <_free_r>
70006d34:	2300      	movs	r3, #0
70006d36:	64a3      	str	r3, [r4, #72]	; 0x48
70006d38:	f04f 0300 	mov.w	r3, #0
70006d3c:	81a3      	strh	r3, [r4, #12]
70006d3e:	f7fd fdf9 	bl	70004934 <__sfp_lock_release>
70006d42:	4630      	mov	r0, r6
70006d44:	bd70      	pop	{r4, r5, r6, pc}
70006d46:	460e      	mov	r6, r1
70006d48:	4630      	mov	r0, r6
70006d4a:	bd70      	pop	{r4, r5, r6, pc}
70006d4c:	4628      	mov	r0, r5
70006d4e:	f7fd fea3 	bl	70004a98 <__sinit>
70006d52:	e7b2      	b.n	70006cba <_fclose_r+0x16>
70006d54:	4628      	mov	r0, r5
70006d56:	6921      	ldr	r1, [r4, #16]
70006d58:	f7fd ff22 	bl	70004ba0 <_free_r>
70006d5c:	e7da      	b.n	70006d14 <_fclose_r+0x70>
70006d5e:	bf00      	nop

70006d60 <fclose>:
70006d60:	f248 5344 	movw	r3, #34116	; 0x8544
70006d64:	4601      	mov	r1, r0
70006d66:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006d6a:	6818      	ldr	r0, [r3, #0]
70006d6c:	e79a      	b.n	70006ca4 <_fclose_r>
70006d6e:	bf00      	nop

70006d70 <_fstat_r>:
70006d70:	b538      	push	{r3, r4, r5, lr}
70006d72:	f648 24f8 	movw	r4, #35576	; 0x8af8
70006d76:	f2c7 0400 	movt	r4, #28672	; 0x7000
70006d7a:	4605      	mov	r5, r0
70006d7c:	4608      	mov	r0, r1
70006d7e:	4611      	mov	r1, r2
70006d80:	2300      	movs	r3, #0
70006d82:	6023      	str	r3, [r4, #0]
70006d84:	f7f9 fc30 	bl	700005e8 <_fstat>
70006d88:	f1b0 3fff 	cmp.w	r0, #4294967295
70006d8c:	d000      	beq.n	70006d90 <_fstat_r+0x20>
70006d8e:	bd38      	pop	{r3, r4, r5, pc}
70006d90:	6823      	ldr	r3, [r4, #0]
70006d92:	2b00      	cmp	r3, #0
70006d94:	d0fb      	beq.n	70006d8e <_fstat_r+0x1e>
70006d96:	602b      	str	r3, [r5, #0]
70006d98:	bd38      	pop	{r3, r4, r5, pc}
70006d9a:	bf00      	nop

70006d9c <_isatty_r>:
70006d9c:	b538      	push	{r3, r4, r5, lr}
70006d9e:	f648 24f8 	movw	r4, #35576	; 0x8af8
70006da2:	f2c7 0400 	movt	r4, #28672	; 0x7000
70006da6:	4605      	mov	r5, r0
70006da8:	4608      	mov	r0, r1
70006daa:	2300      	movs	r3, #0
70006dac:	6023      	str	r3, [r4, #0]
70006dae:	f7f9 fc35 	bl	7000061c <_isatty>
70006db2:	f1b0 3fff 	cmp.w	r0, #4294967295
70006db6:	d000      	beq.n	70006dba <_isatty_r+0x1e>
70006db8:	bd38      	pop	{r3, r4, r5, pc}
70006dba:	6823      	ldr	r3, [r4, #0]
70006dbc:	2b00      	cmp	r3, #0
70006dbe:	d0fb      	beq.n	70006db8 <_isatty_r+0x1c>
70006dc0:	602b      	str	r3, [r5, #0]
70006dc2:	bd38      	pop	{r3, r4, r5, pc}

70006dc4 <_lseek_r>:
70006dc4:	b538      	push	{r3, r4, r5, lr}
70006dc6:	f648 24f8 	movw	r4, #35576	; 0x8af8
70006dca:	f2c7 0400 	movt	r4, #28672	; 0x7000
70006dce:	4605      	mov	r5, r0
70006dd0:	4608      	mov	r0, r1
70006dd2:	4611      	mov	r1, r2
70006dd4:	461a      	mov	r2, r3
70006dd6:	2300      	movs	r3, #0
70006dd8:	6023      	str	r3, [r4, #0]
70006dda:	f7f9 fc4f 	bl	7000067c <_lseek>
70006dde:	f1b0 3fff 	cmp.w	r0, #4294967295
70006de2:	d000      	beq.n	70006de6 <_lseek_r+0x22>
70006de4:	bd38      	pop	{r3, r4, r5, pc}
70006de6:	6823      	ldr	r3, [r4, #0]
70006de8:	2b00      	cmp	r3, #0
70006dea:	d0fb      	beq.n	70006de4 <_lseek_r+0x20>
70006dec:	602b      	str	r3, [r5, #0]
70006dee:	bd38      	pop	{r3, r4, r5, pc}

70006df0 <_read_r>:
70006df0:	b538      	push	{r3, r4, r5, lr}
70006df2:	f648 24f8 	movw	r4, #35576	; 0x8af8
70006df6:	f2c7 0400 	movt	r4, #28672	; 0x7000
70006dfa:	4605      	mov	r5, r0
70006dfc:	4608      	mov	r0, r1
70006dfe:	4611      	mov	r1, r2
70006e00:	461a      	mov	r2, r3
70006e02:	2300      	movs	r3, #0
70006e04:	6023      	str	r3, [r4, #0]
70006e06:	f7f9 fc55 	bl	700006b4 <_read>
70006e0a:	f1b0 3fff 	cmp.w	r0, #4294967295
70006e0e:	d000      	beq.n	70006e12 <_read_r+0x22>
70006e10:	bd38      	pop	{r3, r4, r5, pc}
70006e12:	6823      	ldr	r3, [r4, #0]
70006e14:	2b00      	cmp	r3, #0
70006e16:	d0fb      	beq.n	70006e10 <_read_r+0x20>
70006e18:	602b      	str	r3, [r5, #0]
70006e1a:	bd38      	pop	{r3, r4, r5, pc}

70006e1c <_wrapup_reent>:
70006e1c:	b570      	push	{r4, r5, r6, lr}
70006e1e:	4604      	mov	r4, r0
70006e20:	b188      	cbz	r0, 70006e46 <_wrapup_reent+0x2a>
70006e22:	f104 0248 	add.w	r2, r4, #72	; 0x48
70006e26:	6853      	ldr	r3, [r2, #4]
70006e28:	1e5d      	subs	r5, r3, #1
70006e2a:	d407      	bmi.n	70006e3c <_wrapup_reent+0x20>
70006e2c:	3302      	adds	r3, #2
70006e2e:	eb02 0683 	add.w	r6, r2, r3, lsl #2
70006e32:	f856 3d04 	ldr.w	r3, [r6, #-4]!
70006e36:	4798      	blx	r3
70006e38:	3d01      	subs	r5, #1
70006e3a:	d5fa      	bpl.n	70006e32 <_wrapup_reent+0x16>
70006e3c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
70006e3e:	b10b      	cbz	r3, 70006e44 <_wrapup_reent+0x28>
70006e40:	4620      	mov	r0, r4
70006e42:	4798      	blx	r3
70006e44:	bd70      	pop	{r4, r5, r6, pc}
70006e46:	f248 5344 	movw	r3, #34116	; 0x8544
70006e4a:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006e4e:	681c      	ldr	r4, [r3, #0]
70006e50:	e7e7      	b.n	70006e22 <_wrapup_reent+0x6>
70006e52:	bf00      	nop

70006e54 <cleanup_glue>:
70006e54:	b570      	push	{r4, r5, r6, lr}
70006e56:	460c      	mov	r4, r1
70006e58:	6809      	ldr	r1, [r1, #0]
70006e5a:	4605      	mov	r5, r0
70006e5c:	b109      	cbz	r1, 70006e62 <cleanup_glue+0xe>
70006e5e:	f7ff fff9 	bl	70006e54 <cleanup_glue>
70006e62:	4628      	mov	r0, r5
70006e64:	4621      	mov	r1, r4
70006e66:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
70006e6a:	f7fd be99 	b.w	70004ba0 <_free_r>
70006e6e:	bf00      	nop

70006e70 <_reclaim_reent>:
70006e70:	f248 5344 	movw	r3, #34116	; 0x8544
70006e74:	f2c7 0300 	movt	r3, #28672	; 0x7000
70006e78:	b570      	push	{r4, r5, r6, lr}
70006e7a:	681b      	ldr	r3, [r3, #0]
70006e7c:	4605      	mov	r5, r0
70006e7e:	4298      	cmp	r0, r3
70006e80:	d046      	beq.n	70006f10 <_reclaim_reent+0xa0>
70006e82:	6a43      	ldr	r3, [r0, #36]	; 0x24
70006e84:	4619      	mov	r1, r3
70006e86:	b1bb      	cbz	r3, 70006eb8 <_reclaim_reent+0x48>
70006e88:	68da      	ldr	r2, [r3, #12]
70006e8a:	b1aa      	cbz	r2, 70006eb8 <_reclaim_reent+0x48>
70006e8c:	2600      	movs	r6, #0
70006e8e:	5991      	ldr	r1, [r2, r6]
70006e90:	b141      	cbz	r1, 70006ea4 <_reclaim_reent+0x34>
70006e92:	680c      	ldr	r4, [r1, #0]
70006e94:	4628      	mov	r0, r5
70006e96:	f7fd fe83 	bl	70004ba0 <_free_r>
70006e9a:	4621      	mov	r1, r4
70006e9c:	2c00      	cmp	r4, #0
70006e9e:	d1f8      	bne.n	70006e92 <_reclaim_reent+0x22>
70006ea0:	6a6b      	ldr	r3, [r5, #36]	; 0x24
70006ea2:	68da      	ldr	r2, [r3, #12]
70006ea4:	3604      	adds	r6, #4
70006ea6:	2e3c      	cmp	r6, #60	; 0x3c
70006ea8:	d001      	beq.n	70006eae <_reclaim_reent+0x3e>
70006eaa:	68da      	ldr	r2, [r3, #12]
70006eac:	e7ef      	b.n	70006e8e <_reclaim_reent+0x1e>
70006eae:	4611      	mov	r1, r2
70006eb0:	4628      	mov	r0, r5
70006eb2:	f7fd fe75 	bl	70004ba0 <_free_r>
70006eb6:	6a69      	ldr	r1, [r5, #36]	; 0x24
70006eb8:	6809      	ldr	r1, [r1, #0]
70006eba:	b111      	cbz	r1, 70006ec2 <_reclaim_reent+0x52>
70006ebc:	4628      	mov	r0, r5
70006ebe:	f7fd fe6f 	bl	70004ba0 <_free_r>
70006ec2:	6969      	ldr	r1, [r5, #20]
70006ec4:	b111      	cbz	r1, 70006ecc <_reclaim_reent+0x5c>
70006ec6:	4628      	mov	r0, r5
70006ec8:	f7fd fe6a 	bl	70004ba0 <_free_r>
70006ecc:	6a69      	ldr	r1, [r5, #36]	; 0x24
70006ece:	b111      	cbz	r1, 70006ed6 <_reclaim_reent+0x66>
70006ed0:	4628      	mov	r0, r5
70006ed2:	f7fd fe65 	bl	70004ba0 <_free_r>
70006ed6:	6ba9      	ldr	r1, [r5, #56]	; 0x38
70006ed8:	b111      	cbz	r1, 70006ee0 <_reclaim_reent+0x70>
70006eda:	4628      	mov	r0, r5
70006edc:	f7fd fe60 	bl	70004ba0 <_free_r>
70006ee0:	6be9      	ldr	r1, [r5, #60]	; 0x3c
70006ee2:	b111      	cbz	r1, 70006eea <_reclaim_reent+0x7a>
70006ee4:	4628      	mov	r0, r5
70006ee6:	f7fd fe5b 	bl	70004ba0 <_free_r>
70006eea:	6c29      	ldr	r1, [r5, #64]	; 0x40
70006eec:	b111      	cbz	r1, 70006ef4 <_reclaim_reent+0x84>
70006eee:	4628      	mov	r0, r5
70006ef0:	f7fd fe56 	bl	70004ba0 <_free_r>
70006ef4:	6cab      	ldr	r3, [r5, #72]	; 0x48
70006ef6:	f8d3 1088 	ldr.w	r1, [r3, #136]	; 0x88
70006efa:	b111      	cbz	r1, 70006f02 <_reclaim_reent+0x92>
70006efc:	4628      	mov	r0, r5
70006efe:	f7fd fe4f 	bl	70004ba0 <_free_r>
70006f02:	6b69      	ldr	r1, [r5, #52]	; 0x34
70006f04:	b111      	cbz	r1, 70006f0c <_reclaim_reent+0x9c>
70006f06:	4628      	mov	r0, r5
70006f08:	f7fd fe4a 	bl	70004ba0 <_free_r>
70006f0c:	69ab      	ldr	r3, [r5, #24]
70006f0e:	b903      	cbnz	r3, 70006f12 <_reclaim_reent+0xa2>
70006f10:	bd70      	pop	{r4, r5, r6, pc}
70006f12:	6aab      	ldr	r3, [r5, #40]	; 0x28
70006f14:	4628      	mov	r0, r5
70006f16:	4798      	blx	r3
70006f18:	f8d5 10d8 	ldr.w	r1, [r5, #216]	; 0xd8
70006f1c:	2900      	cmp	r1, #0
70006f1e:	d0f7      	beq.n	70006f10 <_reclaim_reent+0xa0>
70006f20:	4628      	mov	r0, r5
70006f22:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
70006f26:	e795      	b.n	70006e54 <cleanup_glue>

70006f28 <__aeabi_uidiv>:
70006f28:	1e4a      	subs	r2, r1, #1
70006f2a:	bf08      	it	eq
70006f2c:	4770      	bxeq	lr
70006f2e:	f0c0 8124 	bcc.w	7000717a <__aeabi_uidiv+0x252>
70006f32:	4288      	cmp	r0, r1
70006f34:	f240 8116 	bls.w	70007164 <__aeabi_uidiv+0x23c>
70006f38:	4211      	tst	r1, r2
70006f3a:	f000 8117 	beq.w	7000716c <__aeabi_uidiv+0x244>
70006f3e:	fab0 f380 	clz	r3, r0
70006f42:	fab1 f281 	clz	r2, r1
70006f46:	eba2 0303 	sub.w	r3, r2, r3
70006f4a:	f1c3 031f 	rsb	r3, r3, #31
70006f4e:	a204      	add	r2, pc, #16	; (adr r2, 70006f60 <__aeabi_uidiv+0x38>)
70006f50:	eb02 1303 	add.w	r3, r2, r3, lsl #4
70006f54:	f04f 0200 	mov.w	r2, #0
70006f58:	469f      	mov	pc, r3
70006f5a:	bf00      	nop
70006f5c:	f3af 8000 	nop.w
70006f60:	ebb0 7fc1 	cmp.w	r0, r1, lsl #31
70006f64:	bf00      	nop
70006f66:	eb42 0202 	adc.w	r2, r2, r2
70006f6a:	bf28      	it	cs
70006f6c:	eba0 70c1 	subcs.w	r0, r0, r1, lsl #31
70006f70:	ebb0 7f81 	cmp.w	r0, r1, lsl #30
70006f74:	bf00      	nop
70006f76:	eb42 0202 	adc.w	r2, r2, r2
70006f7a:	bf28      	it	cs
70006f7c:	eba0 7081 	subcs.w	r0, r0, r1, lsl #30
70006f80:	ebb0 7f41 	cmp.w	r0, r1, lsl #29
70006f84:	bf00      	nop
70006f86:	eb42 0202 	adc.w	r2, r2, r2
70006f8a:	bf28      	it	cs
70006f8c:	eba0 7041 	subcs.w	r0, r0, r1, lsl #29
70006f90:	ebb0 7f01 	cmp.w	r0, r1, lsl #28
70006f94:	bf00      	nop
70006f96:	eb42 0202 	adc.w	r2, r2, r2
70006f9a:	bf28      	it	cs
70006f9c:	eba0 7001 	subcs.w	r0, r0, r1, lsl #28
70006fa0:	ebb0 6fc1 	cmp.w	r0, r1, lsl #27
70006fa4:	bf00      	nop
70006fa6:	eb42 0202 	adc.w	r2, r2, r2
70006faa:	bf28      	it	cs
70006fac:	eba0 60c1 	subcs.w	r0, r0, r1, lsl #27
70006fb0:	ebb0 6f81 	cmp.w	r0, r1, lsl #26
70006fb4:	bf00      	nop
70006fb6:	eb42 0202 	adc.w	r2, r2, r2
70006fba:	bf28      	it	cs
70006fbc:	eba0 6081 	subcs.w	r0, r0, r1, lsl #26
70006fc0:	ebb0 6f41 	cmp.w	r0, r1, lsl #25
70006fc4:	bf00      	nop
70006fc6:	eb42 0202 	adc.w	r2, r2, r2
70006fca:	bf28      	it	cs
70006fcc:	eba0 6041 	subcs.w	r0, r0, r1, lsl #25
70006fd0:	ebb0 6f01 	cmp.w	r0, r1, lsl #24
70006fd4:	bf00      	nop
70006fd6:	eb42 0202 	adc.w	r2, r2, r2
70006fda:	bf28      	it	cs
70006fdc:	eba0 6001 	subcs.w	r0, r0, r1, lsl #24
70006fe0:	ebb0 5fc1 	cmp.w	r0, r1, lsl #23
70006fe4:	bf00      	nop
70006fe6:	eb42 0202 	adc.w	r2, r2, r2
70006fea:	bf28      	it	cs
70006fec:	eba0 50c1 	subcs.w	r0, r0, r1, lsl #23
70006ff0:	ebb0 5f81 	cmp.w	r0, r1, lsl #22
70006ff4:	bf00      	nop
70006ff6:	eb42 0202 	adc.w	r2, r2, r2
70006ffa:	bf28      	it	cs
70006ffc:	eba0 5081 	subcs.w	r0, r0, r1, lsl #22
70007000:	ebb0 5f41 	cmp.w	r0, r1, lsl #21
70007004:	bf00      	nop
70007006:	eb42 0202 	adc.w	r2, r2, r2
7000700a:	bf28      	it	cs
7000700c:	eba0 5041 	subcs.w	r0, r0, r1, lsl #21
70007010:	ebb0 5f01 	cmp.w	r0, r1, lsl #20
70007014:	bf00      	nop
70007016:	eb42 0202 	adc.w	r2, r2, r2
7000701a:	bf28      	it	cs
7000701c:	eba0 5001 	subcs.w	r0, r0, r1, lsl #20
70007020:	ebb0 4fc1 	cmp.w	r0, r1, lsl #19
70007024:	bf00      	nop
70007026:	eb42 0202 	adc.w	r2, r2, r2
7000702a:	bf28      	it	cs
7000702c:	eba0 40c1 	subcs.w	r0, r0, r1, lsl #19
70007030:	ebb0 4f81 	cmp.w	r0, r1, lsl #18
70007034:	bf00      	nop
70007036:	eb42 0202 	adc.w	r2, r2, r2
7000703a:	bf28      	it	cs
7000703c:	eba0 4081 	subcs.w	r0, r0, r1, lsl #18
70007040:	ebb0 4f41 	cmp.w	r0, r1, lsl #17
70007044:	bf00      	nop
70007046:	eb42 0202 	adc.w	r2, r2, r2
7000704a:	bf28      	it	cs
7000704c:	eba0 4041 	subcs.w	r0, r0, r1, lsl #17
70007050:	ebb0 4f01 	cmp.w	r0, r1, lsl #16
70007054:	bf00      	nop
70007056:	eb42 0202 	adc.w	r2, r2, r2
7000705a:	bf28      	it	cs
7000705c:	eba0 4001 	subcs.w	r0, r0, r1, lsl #16
70007060:	ebb0 3fc1 	cmp.w	r0, r1, lsl #15
70007064:	bf00      	nop
70007066:	eb42 0202 	adc.w	r2, r2, r2
7000706a:	bf28      	it	cs
7000706c:	eba0 30c1 	subcs.w	r0, r0, r1, lsl #15
70007070:	ebb0 3f81 	cmp.w	r0, r1, lsl #14
70007074:	bf00      	nop
70007076:	eb42 0202 	adc.w	r2, r2, r2
7000707a:	bf28      	it	cs
7000707c:	eba0 3081 	subcs.w	r0, r0, r1, lsl #14
70007080:	ebb0 3f41 	cmp.w	r0, r1, lsl #13
70007084:	bf00      	nop
70007086:	eb42 0202 	adc.w	r2, r2, r2
7000708a:	bf28      	it	cs
7000708c:	eba0 3041 	subcs.w	r0, r0, r1, lsl #13
70007090:	ebb0 3f01 	cmp.w	r0, r1, lsl #12
70007094:	bf00      	nop
70007096:	eb42 0202 	adc.w	r2, r2, r2
7000709a:	bf28      	it	cs
7000709c:	eba0 3001 	subcs.w	r0, r0, r1, lsl #12
700070a0:	ebb0 2fc1 	cmp.w	r0, r1, lsl #11
700070a4:	bf00      	nop
700070a6:	eb42 0202 	adc.w	r2, r2, r2
700070aa:	bf28      	it	cs
700070ac:	eba0 20c1 	subcs.w	r0, r0, r1, lsl #11
700070b0:	ebb0 2f81 	cmp.w	r0, r1, lsl #10
700070b4:	bf00      	nop
700070b6:	eb42 0202 	adc.w	r2, r2, r2
700070ba:	bf28      	it	cs
700070bc:	eba0 2081 	subcs.w	r0, r0, r1, lsl #10
700070c0:	ebb0 2f41 	cmp.w	r0, r1, lsl #9
700070c4:	bf00      	nop
700070c6:	eb42 0202 	adc.w	r2, r2, r2
700070ca:	bf28      	it	cs
700070cc:	eba0 2041 	subcs.w	r0, r0, r1, lsl #9
700070d0:	ebb0 2f01 	cmp.w	r0, r1, lsl #8
700070d4:	bf00      	nop
700070d6:	eb42 0202 	adc.w	r2, r2, r2
700070da:	bf28      	it	cs
700070dc:	eba0 2001 	subcs.w	r0, r0, r1, lsl #8
700070e0:	ebb0 1fc1 	cmp.w	r0, r1, lsl #7
700070e4:	bf00      	nop
700070e6:	eb42 0202 	adc.w	r2, r2, r2
700070ea:	bf28      	it	cs
700070ec:	eba0 10c1 	subcs.w	r0, r0, r1, lsl #7
700070f0:	ebb0 1f81 	cmp.w	r0, r1, lsl #6
700070f4:	bf00      	nop
700070f6:	eb42 0202 	adc.w	r2, r2, r2
700070fa:	bf28      	it	cs
700070fc:	eba0 1081 	subcs.w	r0, r0, r1, lsl #6
70007100:	ebb0 1f41 	cmp.w	r0, r1, lsl #5
70007104:	bf00      	nop
70007106:	eb42 0202 	adc.w	r2, r2, r2
7000710a:	bf28      	it	cs
7000710c:	eba0 1041 	subcs.w	r0, r0, r1, lsl #5
70007110:	ebb0 1f01 	cmp.w	r0, r1, lsl #4
70007114:	bf00      	nop
70007116:	eb42 0202 	adc.w	r2, r2, r2
7000711a:	bf28      	it	cs
7000711c:	eba0 1001 	subcs.w	r0, r0, r1, lsl #4
70007120:	ebb0 0fc1 	cmp.w	r0, r1, lsl #3
70007124:	bf00      	nop
70007126:	eb42 0202 	adc.w	r2, r2, r2
7000712a:	bf28      	it	cs
7000712c:	eba0 00c1 	subcs.w	r0, r0, r1, lsl #3
70007130:	ebb0 0f81 	cmp.w	r0, r1, lsl #2
70007134:	bf00      	nop
70007136:	eb42 0202 	adc.w	r2, r2, r2
7000713a:	bf28      	it	cs
7000713c:	eba0 0081 	subcs.w	r0, r0, r1, lsl #2
70007140:	ebb0 0f41 	cmp.w	r0, r1, lsl #1
70007144:	bf00      	nop
70007146:	eb42 0202 	adc.w	r2, r2, r2
7000714a:	bf28      	it	cs
7000714c:	eba0 0041 	subcs.w	r0, r0, r1, lsl #1
70007150:	ebb0 0f01 	cmp.w	r0, r1
70007154:	bf00      	nop
70007156:	eb42 0202 	adc.w	r2, r2, r2
7000715a:	bf28      	it	cs
7000715c:	eba0 0001 	subcs.w	r0, r0, r1
70007160:	4610      	mov	r0, r2
70007162:	4770      	bx	lr
70007164:	bf0c      	ite	eq
70007166:	2001      	moveq	r0, #1
70007168:	2000      	movne	r0, #0
7000716a:	4770      	bx	lr
7000716c:	fab1 f281 	clz	r2, r1
70007170:	f1c2 021f 	rsb	r2, r2, #31
70007174:	fa20 f002 	lsr.w	r0, r0, r2
70007178:	4770      	bx	lr
7000717a:	b108      	cbz	r0, 70007180 <__aeabi_uidiv+0x258>
7000717c:	f04f 30ff 	mov.w	r0, #4294967295
70007180:	f000 b80e 	b.w	700071a0 <__aeabi_idiv0>

70007184 <__aeabi_uidivmod>:
70007184:	2900      	cmp	r1, #0
70007186:	d0f8      	beq.n	7000717a <__aeabi_uidiv+0x252>
70007188:	e92d 4003 	stmdb	sp!, {r0, r1, lr}
7000718c:	f7ff fecc 	bl	70006f28 <__aeabi_uidiv>
70007190:	e8bd 4006 	ldmia.w	sp!, {r1, r2, lr}
70007194:	fb02 f300 	mul.w	r3, r2, r0
70007198:	eba1 0103 	sub.w	r1, r1, r3
7000719c:	4770      	bx	lr
7000719e:	bf00      	nop

700071a0 <__aeabi_idiv0>:
700071a0:	4770      	bx	lr
700071a2:	bf00      	nop

700071a4 <__aeabi_drsub>:
700071a4:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
700071a8:	e002      	b.n	700071b0 <__adddf3>
700071aa:	bf00      	nop

700071ac <__aeabi_dsub>:
700071ac:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000

700071b0 <__adddf3>:
700071b0:	b530      	push	{r4, r5, lr}
700071b2:	ea4f 0441 	mov.w	r4, r1, lsl #1
700071b6:	ea4f 0543 	mov.w	r5, r3, lsl #1
700071ba:	ea94 0f05 	teq	r4, r5
700071be:	bf08      	it	eq
700071c0:	ea90 0f02 	teqeq	r0, r2
700071c4:	bf1f      	itttt	ne
700071c6:	ea54 0c00 	orrsne.w	ip, r4, r0
700071ca:	ea55 0c02 	orrsne.w	ip, r5, r2
700071ce:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
700071d2:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
700071d6:	f000 80e2 	beq.w	7000739e <__adddf3+0x1ee>
700071da:	ea4f 5454 	mov.w	r4, r4, lsr #21
700071de:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
700071e2:	bfb8      	it	lt
700071e4:	426d      	neglt	r5, r5
700071e6:	dd0c      	ble.n	70007202 <__adddf3+0x52>
700071e8:	442c      	add	r4, r5
700071ea:	ea80 0202 	eor.w	r2, r0, r2
700071ee:	ea81 0303 	eor.w	r3, r1, r3
700071f2:	ea82 0000 	eor.w	r0, r2, r0
700071f6:	ea83 0101 	eor.w	r1, r3, r1
700071fa:	ea80 0202 	eor.w	r2, r0, r2
700071fe:	ea81 0303 	eor.w	r3, r1, r3
70007202:	2d36      	cmp	r5, #54	; 0x36
70007204:	bf88      	it	hi
70007206:	bd30      	pophi	{r4, r5, pc}
70007208:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
7000720c:	ea4f 3101 	mov.w	r1, r1, lsl #12
70007210:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
70007214:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
70007218:	d002      	beq.n	70007220 <__adddf3+0x70>
7000721a:	4240      	negs	r0, r0
7000721c:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
70007220:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
70007224:	ea4f 3303 	mov.w	r3, r3, lsl #12
70007228:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
7000722c:	d002      	beq.n	70007234 <__adddf3+0x84>
7000722e:	4252      	negs	r2, r2
70007230:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
70007234:	ea94 0f05 	teq	r4, r5
70007238:	f000 80a7 	beq.w	7000738a <__adddf3+0x1da>
7000723c:	f1a4 0401 	sub.w	r4, r4, #1
70007240:	f1d5 0e20 	rsbs	lr, r5, #32
70007244:	db0d      	blt.n	70007262 <__adddf3+0xb2>
70007246:	fa02 fc0e 	lsl.w	ip, r2, lr
7000724a:	fa22 f205 	lsr.w	r2, r2, r5
7000724e:	1880      	adds	r0, r0, r2
70007250:	f141 0100 	adc.w	r1, r1, #0
70007254:	fa03 f20e 	lsl.w	r2, r3, lr
70007258:	1880      	adds	r0, r0, r2
7000725a:	fa43 f305 	asr.w	r3, r3, r5
7000725e:	4159      	adcs	r1, r3
70007260:	e00e      	b.n	70007280 <__adddf3+0xd0>
70007262:	f1a5 0520 	sub.w	r5, r5, #32
70007266:	f10e 0e20 	add.w	lr, lr, #32
7000726a:	2a01      	cmp	r2, #1
7000726c:	fa03 fc0e 	lsl.w	ip, r3, lr
70007270:	bf28      	it	cs
70007272:	f04c 0c02 	orrcs.w	ip, ip, #2
70007276:	fa43 f305 	asr.w	r3, r3, r5
7000727a:	18c0      	adds	r0, r0, r3
7000727c:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
70007280:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
70007284:	d507      	bpl.n	70007296 <__adddf3+0xe6>
70007286:	f04f 0e00 	mov.w	lr, #0
7000728a:	f1dc 0c00 	rsbs	ip, ip, #0
7000728e:	eb7e 0000 	sbcs.w	r0, lr, r0
70007292:	eb6e 0101 	sbc.w	r1, lr, r1
70007296:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
7000729a:	d31b      	bcc.n	700072d4 <__adddf3+0x124>
7000729c:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
700072a0:	d30c      	bcc.n	700072bc <__adddf3+0x10c>
700072a2:	0849      	lsrs	r1, r1, #1
700072a4:	ea5f 0030 	movs.w	r0, r0, rrx
700072a8:	ea4f 0c3c 	mov.w	ip, ip, rrx
700072ac:	f104 0401 	add.w	r4, r4, #1
700072b0:	ea4f 5244 	mov.w	r2, r4, lsl #21
700072b4:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
700072b8:	f080 809a 	bcs.w	700073f0 <__adddf3+0x240>
700072bc:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
700072c0:	bf08      	it	eq
700072c2:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
700072c6:	f150 0000 	adcs.w	r0, r0, #0
700072ca:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
700072ce:	ea41 0105 	orr.w	r1, r1, r5
700072d2:	bd30      	pop	{r4, r5, pc}
700072d4:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
700072d8:	4140      	adcs	r0, r0
700072da:	eb41 0101 	adc.w	r1, r1, r1
700072de:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
700072e2:	f1a4 0401 	sub.w	r4, r4, #1
700072e6:	d1e9      	bne.n	700072bc <__adddf3+0x10c>
700072e8:	f091 0f00 	teq	r1, #0
700072ec:	bf04      	itt	eq
700072ee:	4601      	moveq	r1, r0
700072f0:	2000      	moveq	r0, #0
700072f2:	fab1 f381 	clz	r3, r1
700072f6:	bf08      	it	eq
700072f8:	3320      	addeq	r3, #32
700072fa:	f1a3 030b 	sub.w	r3, r3, #11
700072fe:	f1b3 0220 	subs.w	r2, r3, #32
70007302:	da0c      	bge.n	7000731e <__adddf3+0x16e>
70007304:	320c      	adds	r2, #12
70007306:	dd08      	ble.n	7000731a <__adddf3+0x16a>
70007308:	f102 0c14 	add.w	ip, r2, #20
7000730c:	f1c2 020c 	rsb	r2, r2, #12
70007310:	fa01 f00c 	lsl.w	r0, r1, ip
70007314:	fa21 f102 	lsr.w	r1, r1, r2
70007318:	e00c      	b.n	70007334 <__adddf3+0x184>
7000731a:	f102 0214 	add.w	r2, r2, #20
7000731e:	bfd8      	it	le
70007320:	f1c2 0c20 	rsble	ip, r2, #32
70007324:	fa01 f102 	lsl.w	r1, r1, r2
70007328:	fa20 fc0c 	lsr.w	ip, r0, ip
7000732c:	bfdc      	itt	le
7000732e:	ea41 010c 	orrle.w	r1, r1, ip
70007332:	4090      	lslle	r0, r2
70007334:	1ae4      	subs	r4, r4, r3
70007336:	bfa2      	ittt	ge
70007338:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
7000733c:	4329      	orrge	r1, r5
7000733e:	bd30      	popge	{r4, r5, pc}
70007340:	ea6f 0404 	mvn.w	r4, r4
70007344:	3c1f      	subs	r4, #31
70007346:	da1c      	bge.n	70007382 <__adddf3+0x1d2>
70007348:	340c      	adds	r4, #12
7000734a:	dc0e      	bgt.n	7000736a <__adddf3+0x1ba>
7000734c:	f104 0414 	add.w	r4, r4, #20
70007350:	f1c4 0220 	rsb	r2, r4, #32
70007354:	fa20 f004 	lsr.w	r0, r0, r4
70007358:	fa01 f302 	lsl.w	r3, r1, r2
7000735c:	ea40 0003 	orr.w	r0, r0, r3
70007360:	fa21 f304 	lsr.w	r3, r1, r4
70007364:	ea45 0103 	orr.w	r1, r5, r3
70007368:	bd30      	pop	{r4, r5, pc}
7000736a:	f1c4 040c 	rsb	r4, r4, #12
7000736e:	f1c4 0220 	rsb	r2, r4, #32
70007372:	fa20 f002 	lsr.w	r0, r0, r2
70007376:	fa01 f304 	lsl.w	r3, r1, r4
7000737a:	ea40 0003 	orr.w	r0, r0, r3
7000737e:	4629      	mov	r1, r5
70007380:	bd30      	pop	{r4, r5, pc}
70007382:	fa21 f004 	lsr.w	r0, r1, r4
70007386:	4629      	mov	r1, r5
70007388:	bd30      	pop	{r4, r5, pc}
7000738a:	f094 0f00 	teq	r4, #0
7000738e:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
70007392:	bf06      	itte	eq
70007394:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
70007398:	3401      	addeq	r4, #1
7000739a:	3d01      	subne	r5, #1
7000739c:	e74e      	b.n	7000723c <__adddf3+0x8c>
7000739e:	ea7f 5c64 	mvns.w	ip, r4, asr #21
700073a2:	bf18      	it	ne
700073a4:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
700073a8:	d029      	beq.n	700073fe <__adddf3+0x24e>
700073aa:	ea94 0f05 	teq	r4, r5
700073ae:	bf08      	it	eq
700073b0:	ea90 0f02 	teqeq	r0, r2
700073b4:	d005      	beq.n	700073c2 <__adddf3+0x212>
700073b6:	ea54 0c00 	orrs.w	ip, r4, r0
700073ba:	bf04      	itt	eq
700073bc:	4619      	moveq	r1, r3
700073be:	4610      	moveq	r0, r2
700073c0:	bd30      	pop	{r4, r5, pc}
700073c2:	ea91 0f03 	teq	r1, r3
700073c6:	bf1e      	ittt	ne
700073c8:	2100      	movne	r1, #0
700073ca:	2000      	movne	r0, #0
700073cc:	bd30      	popne	{r4, r5, pc}
700073ce:	ea5f 5c54 	movs.w	ip, r4, lsr #21
700073d2:	d105      	bne.n	700073e0 <__adddf3+0x230>
700073d4:	0040      	lsls	r0, r0, #1
700073d6:	4149      	adcs	r1, r1
700073d8:	bf28      	it	cs
700073da:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
700073de:	bd30      	pop	{r4, r5, pc}
700073e0:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
700073e4:	bf3c      	itt	cc
700073e6:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
700073ea:	bd30      	popcc	{r4, r5, pc}
700073ec:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
700073f0:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
700073f4:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
700073f8:	f04f 0000 	mov.w	r0, #0
700073fc:	bd30      	pop	{r4, r5, pc}
700073fe:	ea7f 5c64 	mvns.w	ip, r4, asr #21
70007402:	bf1a      	itte	ne
70007404:	4619      	movne	r1, r3
70007406:	4610      	movne	r0, r2
70007408:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
7000740c:	bf1c      	itt	ne
7000740e:	460b      	movne	r3, r1
70007410:	4602      	movne	r2, r0
70007412:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
70007416:	bf06      	itte	eq
70007418:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
7000741c:	ea91 0f03 	teqeq	r1, r3
70007420:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
70007424:	bd30      	pop	{r4, r5, pc}
70007426:	bf00      	nop

70007428 <__aeabi_ui2d>:
70007428:	f090 0f00 	teq	r0, #0
7000742c:	bf04      	itt	eq
7000742e:	2100      	moveq	r1, #0
70007430:	4770      	bxeq	lr
70007432:	b530      	push	{r4, r5, lr}
70007434:	f44f 6480 	mov.w	r4, #1024	; 0x400
70007438:	f104 0432 	add.w	r4, r4, #50	; 0x32
7000743c:	f04f 0500 	mov.w	r5, #0
70007440:	f04f 0100 	mov.w	r1, #0
70007444:	e750      	b.n	700072e8 <__adddf3+0x138>
70007446:	bf00      	nop

70007448 <__aeabi_i2d>:
70007448:	f090 0f00 	teq	r0, #0
7000744c:	bf04      	itt	eq
7000744e:	2100      	moveq	r1, #0
70007450:	4770      	bxeq	lr
70007452:	b530      	push	{r4, r5, lr}
70007454:	f44f 6480 	mov.w	r4, #1024	; 0x400
70007458:	f104 0432 	add.w	r4, r4, #50	; 0x32
7000745c:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
70007460:	bf48      	it	mi
70007462:	4240      	negmi	r0, r0
70007464:	f04f 0100 	mov.w	r1, #0
70007468:	e73e      	b.n	700072e8 <__adddf3+0x138>
7000746a:	bf00      	nop

7000746c <__aeabi_f2d>:
7000746c:	0042      	lsls	r2, r0, #1
7000746e:	ea4f 01e2 	mov.w	r1, r2, asr #3
70007472:	ea4f 0131 	mov.w	r1, r1, rrx
70007476:	ea4f 7002 	mov.w	r0, r2, lsl #28
7000747a:	bf1f      	itttt	ne
7000747c:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
70007480:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
70007484:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
70007488:	4770      	bxne	lr
7000748a:	f092 0f00 	teq	r2, #0
7000748e:	bf14      	ite	ne
70007490:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
70007494:	4770      	bxeq	lr
70007496:	b530      	push	{r4, r5, lr}
70007498:	f44f 7460 	mov.w	r4, #896	; 0x380
7000749c:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
700074a0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
700074a4:	e720      	b.n	700072e8 <__adddf3+0x138>
700074a6:	bf00      	nop

700074a8 <__aeabi_ul2d>:
700074a8:	ea50 0201 	orrs.w	r2, r0, r1
700074ac:	bf08      	it	eq
700074ae:	4770      	bxeq	lr
700074b0:	b530      	push	{r4, r5, lr}
700074b2:	f04f 0500 	mov.w	r5, #0
700074b6:	e00a      	b.n	700074ce <__aeabi_l2d+0x16>

700074b8 <__aeabi_l2d>:
700074b8:	ea50 0201 	orrs.w	r2, r0, r1
700074bc:	bf08      	it	eq
700074be:	4770      	bxeq	lr
700074c0:	b530      	push	{r4, r5, lr}
700074c2:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
700074c6:	d502      	bpl.n	700074ce <__aeabi_l2d+0x16>
700074c8:	4240      	negs	r0, r0
700074ca:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
700074ce:	f44f 6480 	mov.w	r4, #1024	; 0x400
700074d2:	f104 0432 	add.w	r4, r4, #50	; 0x32
700074d6:	ea5f 5c91 	movs.w	ip, r1, lsr #22
700074da:	f43f aedc 	beq.w	70007296 <__adddf3+0xe6>
700074de:	f04f 0203 	mov.w	r2, #3
700074e2:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
700074e6:	bf18      	it	ne
700074e8:	3203      	addne	r2, #3
700074ea:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
700074ee:	bf18      	it	ne
700074f0:	3203      	addne	r2, #3
700074f2:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
700074f6:	f1c2 0320 	rsb	r3, r2, #32
700074fa:	fa00 fc03 	lsl.w	ip, r0, r3
700074fe:	fa20 f002 	lsr.w	r0, r0, r2
70007502:	fa01 fe03 	lsl.w	lr, r1, r3
70007506:	ea40 000e 	orr.w	r0, r0, lr
7000750a:	fa21 f102 	lsr.w	r1, r1, r2
7000750e:	4414      	add	r4, r2
70007510:	e6c1      	b.n	70007296 <__adddf3+0xe6>
70007512:	bf00      	nop

70007514 <__aeabi_dmul>:
70007514:	b570      	push	{r4, r5, r6, lr}
70007516:	f04f 0cff 	mov.w	ip, #255	; 0xff
7000751a:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
7000751e:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
70007522:	bf1d      	ittte	ne
70007524:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
70007528:	ea94 0f0c 	teqne	r4, ip
7000752c:	ea95 0f0c 	teqne	r5, ip
70007530:	f000 f8de 	bleq	700076f0 <__aeabi_dmul+0x1dc>
70007534:	442c      	add	r4, r5
70007536:	ea81 0603 	eor.w	r6, r1, r3
7000753a:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
7000753e:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
70007542:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
70007546:	bf18      	it	ne
70007548:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
7000754c:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
70007550:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
70007554:	d038      	beq.n	700075c8 <__aeabi_dmul+0xb4>
70007556:	fba0 ce02 	umull	ip, lr, r0, r2
7000755a:	f04f 0500 	mov.w	r5, #0
7000755e:	fbe1 e502 	umlal	lr, r5, r1, r2
70007562:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
70007566:	fbe0 e503 	umlal	lr, r5, r0, r3
7000756a:	f04f 0600 	mov.w	r6, #0
7000756e:	fbe1 5603 	umlal	r5, r6, r1, r3
70007572:	f09c 0f00 	teq	ip, #0
70007576:	bf18      	it	ne
70007578:	f04e 0e01 	orrne.w	lr, lr, #1
7000757c:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
70007580:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
70007584:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
70007588:	d204      	bcs.n	70007594 <__aeabi_dmul+0x80>
7000758a:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
7000758e:	416d      	adcs	r5, r5
70007590:	eb46 0606 	adc.w	r6, r6, r6
70007594:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
70007598:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
7000759c:	ea4f 20c5 	mov.w	r0, r5, lsl #11
700075a0:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
700075a4:	ea4f 2ece 	mov.w	lr, lr, lsl #11
700075a8:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
700075ac:	bf88      	it	hi
700075ae:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
700075b2:	d81e      	bhi.n	700075f2 <__aeabi_dmul+0xde>
700075b4:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
700075b8:	bf08      	it	eq
700075ba:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
700075be:	f150 0000 	adcs.w	r0, r0, #0
700075c2:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
700075c6:	bd70      	pop	{r4, r5, r6, pc}
700075c8:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
700075cc:	ea46 0101 	orr.w	r1, r6, r1
700075d0:	ea40 0002 	orr.w	r0, r0, r2
700075d4:	ea81 0103 	eor.w	r1, r1, r3
700075d8:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
700075dc:	bfc2      	ittt	gt
700075de:	ebd4 050c 	rsbsgt	r5, r4, ip
700075e2:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
700075e6:	bd70      	popgt	{r4, r5, r6, pc}
700075e8:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
700075ec:	f04f 0e00 	mov.w	lr, #0
700075f0:	3c01      	subs	r4, #1
700075f2:	f300 80ab 	bgt.w	7000774c <__aeabi_dmul+0x238>
700075f6:	f114 0f36 	cmn.w	r4, #54	; 0x36
700075fa:	bfde      	ittt	le
700075fc:	2000      	movle	r0, #0
700075fe:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
70007602:	bd70      	pople	{r4, r5, r6, pc}
70007604:	f1c4 0400 	rsb	r4, r4, #0
70007608:	3c20      	subs	r4, #32
7000760a:	da35      	bge.n	70007678 <__aeabi_dmul+0x164>
7000760c:	340c      	adds	r4, #12
7000760e:	dc1b      	bgt.n	70007648 <__aeabi_dmul+0x134>
70007610:	f104 0414 	add.w	r4, r4, #20
70007614:	f1c4 0520 	rsb	r5, r4, #32
70007618:	fa00 f305 	lsl.w	r3, r0, r5
7000761c:	fa20 f004 	lsr.w	r0, r0, r4
70007620:	fa01 f205 	lsl.w	r2, r1, r5
70007624:	ea40 0002 	orr.w	r0, r0, r2
70007628:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
7000762c:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
70007630:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
70007634:	fa21 f604 	lsr.w	r6, r1, r4
70007638:	eb42 0106 	adc.w	r1, r2, r6
7000763c:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
70007640:	bf08      	it	eq
70007642:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
70007646:	bd70      	pop	{r4, r5, r6, pc}
70007648:	f1c4 040c 	rsb	r4, r4, #12
7000764c:	f1c4 0520 	rsb	r5, r4, #32
70007650:	fa00 f304 	lsl.w	r3, r0, r4
70007654:	fa20 f005 	lsr.w	r0, r0, r5
70007658:	fa01 f204 	lsl.w	r2, r1, r4
7000765c:	ea40 0002 	orr.w	r0, r0, r2
70007660:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
70007664:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
70007668:	f141 0100 	adc.w	r1, r1, #0
7000766c:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
70007670:	bf08      	it	eq
70007672:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
70007676:	bd70      	pop	{r4, r5, r6, pc}
70007678:	f1c4 0520 	rsb	r5, r4, #32
7000767c:	fa00 f205 	lsl.w	r2, r0, r5
70007680:	ea4e 0e02 	orr.w	lr, lr, r2
70007684:	fa20 f304 	lsr.w	r3, r0, r4
70007688:	fa01 f205 	lsl.w	r2, r1, r5
7000768c:	ea43 0302 	orr.w	r3, r3, r2
70007690:	fa21 f004 	lsr.w	r0, r1, r4
70007694:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
70007698:	fa21 f204 	lsr.w	r2, r1, r4
7000769c:	ea20 0002 	bic.w	r0, r0, r2
700076a0:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
700076a4:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
700076a8:	bf08      	it	eq
700076aa:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
700076ae:	bd70      	pop	{r4, r5, r6, pc}
700076b0:	f094 0f00 	teq	r4, #0
700076b4:	d10f      	bne.n	700076d6 <__aeabi_dmul+0x1c2>
700076b6:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
700076ba:	0040      	lsls	r0, r0, #1
700076bc:	eb41 0101 	adc.w	r1, r1, r1
700076c0:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
700076c4:	bf08      	it	eq
700076c6:	3c01      	subeq	r4, #1
700076c8:	d0f7      	beq.n	700076ba <__aeabi_dmul+0x1a6>
700076ca:	ea41 0106 	orr.w	r1, r1, r6
700076ce:	f095 0f00 	teq	r5, #0
700076d2:	bf18      	it	ne
700076d4:	4770      	bxne	lr
700076d6:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
700076da:	0052      	lsls	r2, r2, #1
700076dc:	eb43 0303 	adc.w	r3, r3, r3
700076e0:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
700076e4:	bf08      	it	eq
700076e6:	3d01      	subeq	r5, #1
700076e8:	d0f7      	beq.n	700076da <__aeabi_dmul+0x1c6>
700076ea:	ea43 0306 	orr.w	r3, r3, r6
700076ee:	4770      	bx	lr
700076f0:	ea94 0f0c 	teq	r4, ip
700076f4:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
700076f8:	bf18      	it	ne
700076fa:	ea95 0f0c 	teqne	r5, ip
700076fe:	d00c      	beq.n	7000771a <__aeabi_dmul+0x206>
70007700:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
70007704:	bf18      	it	ne
70007706:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
7000770a:	d1d1      	bne.n	700076b0 <__aeabi_dmul+0x19c>
7000770c:	ea81 0103 	eor.w	r1, r1, r3
70007710:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
70007714:	f04f 0000 	mov.w	r0, #0
70007718:	bd70      	pop	{r4, r5, r6, pc}
7000771a:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
7000771e:	bf06      	itte	eq
70007720:	4610      	moveq	r0, r2
70007722:	4619      	moveq	r1, r3
70007724:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
70007728:	d019      	beq.n	7000775e <__aeabi_dmul+0x24a>
7000772a:	ea94 0f0c 	teq	r4, ip
7000772e:	d102      	bne.n	70007736 <__aeabi_dmul+0x222>
70007730:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
70007734:	d113      	bne.n	7000775e <__aeabi_dmul+0x24a>
70007736:	ea95 0f0c 	teq	r5, ip
7000773a:	d105      	bne.n	70007748 <__aeabi_dmul+0x234>
7000773c:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
70007740:	bf1c      	itt	ne
70007742:	4610      	movne	r0, r2
70007744:	4619      	movne	r1, r3
70007746:	d10a      	bne.n	7000775e <__aeabi_dmul+0x24a>
70007748:	ea81 0103 	eor.w	r1, r1, r3
7000774c:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
70007750:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
70007754:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
70007758:	f04f 0000 	mov.w	r0, #0
7000775c:	bd70      	pop	{r4, r5, r6, pc}
7000775e:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
70007762:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
70007766:	bd70      	pop	{r4, r5, r6, pc}

70007768 <__aeabi_ddiv>:
70007768:	b570      	push	{r4, r5, r6, lr}
7000776a:	f04f 0cff 	mov.w	ip, #255	; 0xff
7000776e:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
70007772:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
70007776:	bf1d      	ittte	ne
70007778:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
7000777c:	ea94 0f0c 	teqne	r4, ip
70007780:	ea95 0f0c 	teqne	r5, ip
70007784:	f000 f8a7 	bleq	700078d6 <__aeabi_ddiv+0x16e>
70007788:	eba4 0405 	sub.w	r4, r4, r5
7000778c:	ea81 0e03 	eor.w	lr, r1, r3
70007790:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
70007794:	ea4f 3101 	mov.w	r1, r1, lsl #12
70007798:	f000 8088 	beq.w	700078ac <__aeabi_ddiv+0x144>
7000779c:	ea4f 3303 	mov.w	r3, r3, lsl #12
700077a0:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
700077a4:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
700077a8:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
700077ac:	ea4f 2202 	mov.w	r2, r2, lsl #8
700077b0:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
700077b4:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
700077b8:	ea4f 2600 	mov.w	r6, r0, lsl #8
700077bc:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
700077c0:	429d      	cmp	r5, r3
700077c2:	bf08      	it	eq
700077c4:	4296      	cmpeq	r6, r2
700077c6:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
700077ca:	f504 7440 	add.w	r4, r4, #768	; 0x300
700077ce:	d202      	bcs.n	700077d6 <__aeabi_ddiv+0x6e>
700077d0:	085b      	lsrs	r3, r3, #1
700077d2:	ea4f 0232 	mov.w	r2, r2, rrx
700077d6:	1ab6      	subs	r6, r6, r2
700077d8:	eb65 0503 	sbc.w	r5, r5, r3
700077dc:	085b      	lsrs	r3, r3, #1
700077de:	ea4f 0232 	mov.w	r2, r2, rrx
700077e2:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
700077e6:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
700077ea:	ebb6 0e02 	subs.w	lr, r6, r2
700077ee:	eb75 0e03 	sbcs.w	lr, r5, r3
700077f2:	bf22      	ittt	cs
700077f4:	1ab6      	subcs	r6, r6, r2
700077f6:	4675      	movcs	r5, lr
700077f8:	ea40 000c 	orrcs.w	r0, r0, ip
700077fc:	085b      	lsrs	r3, r3, #1
700077fe:	ea4f 0232 	mov.w	r2, r2, rrx
70007802:	ebb6 0e02 	subs.w	lr, r6, r2
70007806:	eb75 0e03 	sbcs.w	lr, r5, r3
7000780a:	bf22      	ittt	cs
7000780c:	1ab6      	subcs	r6, r6, r2
7000780e:	4675      	movcs	r5, lr
70007810:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
70007814:	085b      	lsrs	r3, r3, #1
70007816:	ea4f 0232 	mov.w	r2, r2, rrx
7000781a:	ebb6 0e02 	subs.w	lr, r6, r2
7000781e:	eb75 0e03 	sbcs.w	lr, r5, r3
70007822:	bf22      	ittt	cs
70007824:	1ab6      	subcs	r6, r6, r2
70007826:	4675      	movcs	r5, lr
70007828:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
7000782c:	085b      	lsrs	r3, r3, #1
7000782e:	ea4f 0232 	mov.w	r2, r2, rrx
70007832:	ebb6 0e02 	subs.w	lr, r6, r2
70007836:	eb75 0e03 	sbcs.w	lr, r5, r3
7000783a:	bf22      	ittt	cs
7000783c:	1ab6      	subcs	r6, r6, r2
7000783e:	4675      	movcs	r5, lr
70007840:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
70007844:	ea55 0e06 	orrs.w	lr, r5, r6
70007848:	d018      	beq.n	7000787c <__aeabi_ddiv+0x114>
7000784a:	ea4f 1505 	mov.w	r5, r5, lsl #4
7000784e:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
70007852:	ea4f 1606 	mov.w	r6, r6, lsl #4
70007856:	ea4f 03c3 	mov.w	r3, r3, lsl #3
7000785a:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
7000785e:	ea4f 02c2 	mov.w	r2, r2, lsl #3
70007862:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
70007866:	d1c0      	bne.n	700077ea <__aeabi_ddiv+0x82>
70007868:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
7000786c:	d10b      	bne.n	70007886 <__aeabi_ddiv+0x11e>
7000786e:	ea41 0100 	orr.w	r1, r1, r0
70007872:	f04f 0000 	mov.w	r0, #0
70007876:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
7000787a:	e7b6      	b.n	700077ea <__aeabi_ddiv+0x82>
7000787c:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
70007880:	bf04      	itt	eq
70007882:	4301      	orreq	r1, r0
70007884:	2000      	moveq	r0, #0
70007886:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
7000788a:	bf88      	it	hi
7000788c:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
70007890:	f63f aeaf 	bhi.w	700075f2 <__aeabi_dmul+0xde>
70007894:	ebb5 0c03 	subs.w	ip, r5, r3
70007898:	bf04      	itt	eq
7000789a:	ebb6 0c02 	subseq.w	ip, r6, r2
7000789e:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
700078a2:	f150 0000 	adcs.w	r0, r0, #0
700078a6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
700078aa:	bd70      	pop	{r4, r5, r6, pc}
700078ac:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
700078b0:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
700078b4:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
700078b8:	bfc2      	ittt	gt
700078ba:	ebd4 050c 	rsbsgt	r5, r4, ip
700078be:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
700078c2:	bd70      	popgt	{r4, r5, r6, pc}
700078c4:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
700078c8:	f04f 0e00 	mov.w	lr, #0
700078cc:	3c01      	subs	r4, #1
700078ce:	e690      	b.n	700075f2 <__aeabi_dmul+0xde>
700078d0:	ea45 0e06 	orr.w	lr, r5, r6
700078d4:	e68d      	b.n	700075f2 <__aeabi_dmul+0xde>
700078d6:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
700078da:	ea94 0f0c 	teq	r4, ip
700078de:	bf08      	it	eq
700078e0:	ea95 0f0c 	teqeq	r5, ip
700078e4:	f43f af3b 	beq.w	7000775e <__aeabi_dmul+0x24a>
700078e8:	ea94 0f0c 	teq	r4, ip
700078ec:	d10a      	bne.n	70007904 <__aeabi_ddiv+0x19c>
700078ee:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
700078f2:	f47f af34 	bne.w	7000775e <__aeabi_dmul+0x24a>
700078f6:	ea95 0f0c 	teq	r5, ip
700078fa:	f47f af25 	bne.w	70007748 <__aeabi_dmul+0x234>
700078fe:	4610      	mov	r0, r2
70007900:	4619      	mov	r1, r3
70007902:	e72c      	b.n	7000775e <__aeabi_dmul+0x24a>
70007904:	ea95 0f0c 	teq	r5, ip
70007908:	d106      	bne.n	70007918 <__aeabi_ddiv+0x1b0>
7000790a:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
7000790e:	f43f aefd 	beq.w	7000770c <__aeabi_dmul+0x1f8>
70007912:	4610      	mov	r0, r2
70007914:	4619      	mov	r1, r3
70007916:	e722      	b.n	7000775e <__aeabi_dmul+0x24a>
70007918:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
7000791c:	bf18      	it	ne
7000791e:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
70007922:	f47f aec5 	bne.w	700076b0 <__aeabi_dmul+0x19c>
70007926:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
7000792a:	f47f af0d 	bne.w	70007748 <__aeabi_dmul+0x234>
7000792e:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
70007932:	f47f aeeb 	bne.w	7000770c <__aeabi_dmul+0x1f8>
70007936:	e712      	b.n	7000775e <__aeabi_dmul+0x24a>

70007938 <__gedf2>:
70007938:	f04f 3cff 	mov.w	ip, #4294967295
7000793c:	e006      	b.n	7000794c <__cmpdf2+0x4>
7000793e:	bf00      	nop

70007940 <__ledf2>:
70007940:	f04f 0c01 	mov.w	ip, #1
70007944:	e002      	b.n	7000794c <__cmpdf2+0x4>
70007946:	bf00      	nop

70007948 <__cmpdf2>:
70007948:	f04f 0c01 	mov.w	ip, #1
7000794c:	f84d cd04 	str.w	ip, [sp, #-4]!
70007950:	ea4f 0c41 	mov.w	ip, r1, lsl #1
70007954:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
70007958:	ea4f 0c43 	mov.w	ip, r3, lsl #1
7000795c:	bf18      	it	ne
7000795e:	ea7f 5c6c 	mvnsne.w	ip, ip, asr #21
70007962:	d01b      	beq.n	7000799c <__cmpdf2+0x54>
70007964:	b001      	add	sp, #4
70007966:	ea50 0c41 	orrs.w	ip, r0, r1, lsl #1
7000796a:	bf0c      	ite	eq
7000796c:	ea52 0c43 	orrseq.w	ip, r2, r3, lsl #1
70007970:	ea91 0f03 	teqne	r1, r3
70007974:	bf02      	ittt	eq
70007976:	ea90 0f02 	teqeq	r0, r2
7000797a:	2000      	moveq	r0, #0
7000797c:	4770      	bxeq	lr
7000797e:	f110 0f00 	cmn.w	r0, #0
70007982:	ea91 0f03 	teq	r1, r3
70007986:	bf58      	it	pl
70007988:	4299      	cmppl	r1, r3
7000798a:	bf08      	it	eq
7000798c:	4290      	cmpeq	r0, r2
7000798e:	bf2c      	ite	cs
70007990:	17d8      	asrcs	r0, r3, #31
70007992:	ea6f 70e3 	mvncc.w	r0, r3, asr #31
70007996:	f040 0001 	orr.w	r0, r0, #1
7000799a:	4770      	bx	lr
7000799c:	ea4f 0c41 	mov.w	ip, r1, lsl #1
700079a0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
700079a4:	d102      	bne.n	700079ac <__cmpdf2+0x64>
700079a6:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
700079aa:	d107      	bne.n	700079bc <__cmpdf2+0x74>
700079ac:	ea4f 0c43 	mov.w	ip, r3, lsl #1
700079b0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
700079b4:	d1d6      	bne.n	70007964 <__cmpdf2+0x1c>
700079b6:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
700079ba:	d0d3      	beq.n	70007964 <__cmpdf2+0x1c>
700079bc:	f85d 0b04 	ldr.w	r0, [sp], #4
700079c0:	4770      	bx	lr
700079c2:	bf00      	nop

700079c4 <__aeabi_cdrcmple>:
700079c4:	4684      	mov	ip, r0
700079c6:	4610      	mov	r0, r2
700079c8:	4662      	mov	r2, ip
700079ca:	468c      	mov	ip, r1
700079cc:	4619      	mov	r1, r3
700079ce:	4663      	mov	r3, ip
700079d0:	e000      	b.n	700079d4 <__aeabi_cdcmpeq>
700079d2:	bf00      	nop

700079d4 <__aeabi_cdcmpeq>:
700079d4:	b501      	push	{r0, lr}
700079d6:	f7ff ffb7 	bl	70007948 <__cmpdf2>
700079da:	2800      	cmp	r0, #0
700079dc:	bf48      	it	mi
700079de:	f110 0f00 	cmnmi.w	r0, #0
700079e2:	bd01      	pop	{r0, pc}

700079e4 <__aeabi_dcmpeq>:
700079e4:	f84d ed08 	str.w	lr, [sp, #-8]!
700079e8:	f7ff fff4 	bl	700079d4 <__aeabi_cdcmpeq>
700079ec:	bf0c      	ite	eq
700079ee:	2001      	moveq	r0, #1
700079f0:	2000      	movne	r0, #0
700079f2:	f85d fb08 	ldr.w	pc, [sp], #8
700079f6:	bf00      	nop

700079f8 <__aeabi_dcmplt>:
700079f8:	f84d ed08 	str.w	lr, [sp, #-8]!
700079fc:	f7ff ffea 	bl	700079d4 <__aeabi_cdcmpeq>
70007a00:	bf34      	ite	cc
70007a02:	2001      	movcc	r0, #1
70007a04:	2000      	movcs	r0, #0
70007a06:	f85d fb08 	ldr.w	pc, [sp], #8
70007a0a:	bf00      	nop

70007a0c <__aeabi_dcmple>:
70007a0c:	f84d ed08 	str.w	lr, [sp, #-8]!
70007a10:	f7ff ffe0 	bl	700079d4 <__aeabi_cdcmpeq>
70007a14:	bf94      	ite	ls
70007a16:	2001      	movls	r0, #1
70007a18:	2000      	movhi	r0, #0
70007a1a:	f85d fb08 	ldr.w	pc, [sp], #8
70007a1e:	bf00      	nop

70007a20 <__aeabi_dcmpge>:
70007a20:	f84d ed08 	str.w	lr, [sp, #-8]!
70007a24:	f7ff ffce 	bl	700079c4 <__aeabi_cdrcmple>
70007a28:	bf94      	ite	ls
70007a2a:	2001      	movls	r0, #1
70007a2c:	2000      	movhi	r0, #0
70007a2e:	f85d fb08 	ldr.w	pc, [sp], #8
70007a32:	bf00      	nop

70007a34 <__aeabi_dcmpgt>:
70007a34:	f84d ed08 	str.w	lr, [sp, #-8]!
70007a38:	f7ff ffc4 	bl	700079c4 <__aeabi_cdrcmple>
70007a3c:	bf34      	ite	cc
70007a3e:	2001      	movcc	r0, #1
70007a40:	2000      	movcs	r0, #0
70007a42:	f85d fb08 	ldr.w	pc, [sp], #8
70007a46:	bf00      	nop

70007a48 <__aeabi_d2iz>:
70007a48:	ea4f 0241 	mov.w	r2, r1, lsl #1
70007a4c:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
70007a50:	d215      	bcs.n	70007a7e <__aeabi_d2iz+0x36>
70007a52:	d511      	bpl.n	70007a78 <__aeabi_d2iz+0x30>
70007a54:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
70007a58:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
70007a5c:	d912      	bls.n	70007a84 <__aeabi_d2iz+0x3c>
70007a5e:	ea4f 23c1 	mov.w	r3, r1, lsl #11
70007a62:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
70007a66:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
70007a6a:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
70007a6e:	fa23 f002 	lsr.w	r0, r3, r2
70007a72:	bf18      	it	ne
70007a74:	4240      	negne	r0, r0
70007a76:	4770      	bx	lr
70007a78:	f04f 0000 	mov.w	r0, #0
70007a7c:	4770      	bx	lr
70007a7e:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
70007a82:	d105      	bne.n	70007a90 <__aeabi_d2iz+0x48>
70007a84:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
70007a88:	bf08      	it	eq
70007a8a:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
70007a8e:	4770      	bx	lr
70007a90:	f04f 0000 	mov.w	r0, #0
70007a94:	4770      	bx	lr
70007a96:	bf00      	nop

70007a98 <__aeabi_uldivmod>:
70007a98:	b94b      	cbnz	r3, 70007aae <__aeabi_uldivmod+0x16>
70007a9a:	b942      	cbnz	r2, 70007aae <__aeabi_uldivmod+0x16>
70007a9c:	2900      	cmp	r1, #0
70007a9e:	bf08      	it	eq
70007aa0:	2800      	cmpeq	r0, #0
70007aa2:	d002      	beq.n	70007aaa <__aeabi_uldivmod+0x12>
70007aa4:	f04f 31ff 	mov.w	r1, #4294967295
70007aa8:	4608      	mov	r0, r1
70007aaa:	f7ff bb79 	b.w	700071a0 <__aeabi_idiv0>
70007aae:	b082      	sub	sp, #8
70007ab0:	46ec      	mov	ip, sp
70007ab2:	e92d 5000 	stmdb	sp!, {ip, lr}
70007ab6:	f000 f805 	bl	70007ac4 <__gnu_uldivmod_helper>
70007aba:	f8dd e004 	ldr.w	lr, [sp, #4]
70007abe:	b002      	add	sp, #8
70007ac0:	bc0c      	pop	{r2, r3}
70007ac2:	4770      	bx	lr

70007ac4 <__gnu_uldivmod_helper>:
70007ac4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
70007ac6:	4614      	mov	r4, r2
70007ac8:	461d      	mov	r5, r3
70007aca:	4606      	mov	r6, r0
70007acc:	460f      	mov	r7, r1
70007ace:	f000 f9d7 	bl	70007e80 <__udivdi3>
70007ad2:	fb00 f505 	mul.w	r5, r0, r5
70007ad6:	fba0 2304 	umull	r2, r3, r0, r4
70007ada:	fb04 5401 	mla	r4, r4, r1, r5
70007ade:	18e3      	adds	r3, r4, r3
70007ae0:	1ab6      	subs	r6, r6, r2
70007ae2:	eb67 0703 	sbc.w	r7, r7, r3
70007ae6:	9b06      	ldr	r3, [sp, #24]
70007ae8:	e9c3 6700 	strd	r6, r7, [r3]
70007aec:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
70007aee:	bf00      	nop

70007af0 <__gnu_ldivmod_helper>:
70007af0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
70007af2:	4614      	mov	r4, r2
70007af4:	461d      	mov	r5, r3
70007af6:	4606      	mov	r6, r0
70007af8:	460f      	mov	r7, r1
70007afa:	f000 f80f 	bl	70007b1c <__divdi3>
70007afe:	fb00 f505 	mul.w	r5, r0, r5
70007b02:	fba0 2304 	umull	r2, r3, r0, r4
70007b06:	fb04 5401 	mla	r4, r4, r1, r5
70007b0a:	18e3      	adds	r3, r4, r3
70007b0c:	1ab6      	subs	r6, r6, r2
70007b0e:	eb67 0703 	sbc.w	r7, r7, r3
70007b12:	9b06      	ldr	r3, [sp, #24]
70007b14:	e9c3 6700 	strd	r6, r7, [r3]
70007b18:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
70007b1a:	bf00      	nop

70007b1c <__divdi3>:
70007b1c:	2900      	cmp	r1, #0
70007b1e:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
70007b22:	b085      	sub	sp, #20
70007b24:	f2c0 80c8 	blt.w	70007cb8 <__divdi3+0x19c>
70007b28:	2600      	movs	r6, #0
70007b2a:	2b00      	cmp	r3, #0
70007b2c:	f2c0 80bf 	blt.w	70007cae <__divdi3+0x192>
70007b30:	4689      	mov	r9, r1
70007b32:	4614      	mov	r4, r2
70007b34:	4605      	mov	r5, r0
70007b36:	469b      	mov	fp, r3
70007b38:	2b00      	cmp	r3, #0
70007b3a:	d14a      	bne.n	70007bd2 <__divdi3+0xb6>
70007b3c:	428a      	cmp	r2, r1
70007b3e:	d957      	bls.n	70007bf0 <__divdi3+0xd4>
70007b40:	fab2 f382 	clz	r3, r2
70007b44:	b153      	cbz	r3, 70007b5c <__divdi3+0x40>
70007b46:	f1c3 0020 	rsb	r0, r3, #32
70007b4a:	fa01 f903 	lsl.w	r9, r1, r3
70007b4e:	fa25 f800 	lsr.w	r8, r5, r0
70007b52:	fa12 f403 	lsls.w	r4, r2, r3
70007b56:	409d      	lsls	r5, r3
70007b58:	ea48 0909 	orr.w	r9, r8, r9
70007b5c:	0c27      	lsrs	r7, r4, #16
70007b5e:	4648      	mov	r0, r9
70007b60:	4639      	mov	r1, r7
70007b62:	fa1f fb84 	uxth.w	fp, r4
70007b66:	f7ff f9df 	bl	70006f28 <__aeabi_uidiv>
70007b6a:	4639      	mov	r1, r7
70007b6c:	4682      	mov	sl, r0
70007b6e:	4648      	mov	r0, r9
70007b70:	f7ff fb08 	bl	70007184 <__aeabi_uidivmod>
70007b74:	0c2a      	lsrs	r2, r5, #16
70007b76:	fb0b f30a 	mul.w	r3, fp, sl
70007b7a:	ea42 4901 	orr.w	r9, r2, r1, lsl #16
70007b7e:	454b      	cmp	r3, r9
70007b80:	d909      	bls.n	70007b96 <__divdi3+0x7a>
70007b82:	eb19 0904 	adds.w	r9, r9, r4
70007b86:	f10a 3aff 	add.w	sl, sl, #4294967295
70007b8a:	d204      	bcs.n	70007b96 <__divdi3+0x7a>
70007b8c:	454b      	cmp	r3, r9
70007b8e:	bf84      	itt	hi
70007b90:	f10a 3aff 	addhi.w	sl, sl, #4294967295
70007b94:	44a1      	addhi	r9, r4
70007b96:	ebc3 0909 	rsb	r9, r3, r9
70007b9a:	4639      	mov	r1, r7
70007b9c:	4648      	mov	r0, r9
70007b9e:	b2ad      	uxth	r5, r5
70007ba0:	f7ff f9c2 	bl	70006f28 <__aeabi_uidiv>
70007ba4:	4639      	mov	r1, r7
70007ba6:	4680      	mov	r8, r0
70007ba8:	4648      	mov	r0, r9
70007baa:	f7ff faeb 	bl	70007184 <__aeabi_uidivmod>
70007bae:	fb0b fb08 	mul.w	fp, fp, r8
70007bb2:	ea45 4501 	orr.w	r5, r5, r1, lsl #16
70007bb6:	45ab      	cmp	fp, r5
70007bb8:	d907      	bls.n	70007bca <__divdi3+0xae>
70007bba:	192d      	adds	r5, r5, r4
70007bbc:	f108 38ff 	add.w	r8, r8, #4294967295
70007bc0:	d203      	bcs.n	70007bca <__divdi3+0xae>
70007bc2:	45ab      	cmp	fp, r5
70007bc4:	bf88      	it	hi
70007bc6:	f108 38ff 	addhi.w	r8, r8, #4294967295
70007bca:	ea48 480a 	orr.w	r8, r8, sl, lsl #16
70007bce:	2700      	movs	r7, #0
70007bd0:	e003      	b.n	70007bda <__divdi3+0xbe>
70007bd2:	428b      	cmp	r3, r1
70007bd4:	d957      	bls.n	70007c86 <__divdi3+0x16a>
70007bd6:	2700      	movs	r7, #0
70007bd8:	46b8      	mov	r8, r7
70007bda:	4642      	mov	r2, r8
70007bdc:	463b      	mov	r3, r7
70007bde:	b116      	cbz	r6, 70007be6 <__divdi3+0xca>
70007be0:	4252      	negs	r2, r2
70007be2:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
70007be6:	4619      	mov	r1, r3
70007be8:	4610      	mov	r0, r2
70007bea:	b005      	add	sp, #20
70007bec:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
70007bf0:	b922      	cbnz	r2, 70007bfc <__divdi3+0xe0>
70007bf2:	4611      	mov	r1, r2
70007bf4:	2001      	movs	r0, #1
70007bf6:	f7ff f997 	bl	70006f28 <__aeabi_uidiv>
70007bfa:	4604      	mov	r4, r0
70007bfc:	fab4 f884 	clz	r8, r4
70007c00:	f1b8 0f00 	cmp.w	r8, #0
70007c04:	d15e      	bne.n	70007cc4 <__divdi3+0x1a8>
70007c06:	ebc4 0809 	rsb	r8, r4, r9
70007c0a:	0c27      	lsrs	r7, r4, #16
70007c0c:	fa1f f984 	uxth.w	r9, r4
70007c10:	2101      	movs	r1, #1
70007c12:	9102      	str	r1, [sp, #8]
70007c14:	4639      	mov	r1, r7
70007c16:	4640      	mov	r0, r8
70007c18:	f7ff f986 	bl	70006f28 <__aeabi_uidiv>
70007c1c:	4639      	mov	r1, r7
70007c1e:	4682      	mov	sl, r0
70007c20:	4640      	mov	r0, r8
70007c22:	f7ff faaf 	bl	70007184 <__aeabi_uidivmod>
70007c26:	ea4f 4815 	mov.w	r8, r5, lsr #16
70007c2a:	fb09 f30a 	mul.w	r3, r9, sl
70007c2e:	ea48 4b01 	orr.w	fp, r8, r1, lsl #16
70007c32:	455b      	cmp	r3, fp
70007c34:	d909      	bls.n	70007c4a <__divdi3+0x12e>
70007c36:	eb1b 0b04 	adds.w	fp, fp, r4
70007c3a:	f10a 3aff 	add.w	sl, sl, #4294967295
70007c3e:	d204      	bcs.n	70007c4a <__divdi3+0x12e>
70007c40:	455b      	cmp	r3, fp
70007c42:	bf84      	itt	hi
70007c44:	f10a 3aff 	addhi.w	sl, sl, #4294967295
70007c48:	44a3      	addhi	fp, r4
70007c4a:	ebc3 0b0b 	rsb	fp, r3, fp
70007c4e:	4639      	mov	r1, r7
70007c50:	4658      	mov	r0, fp
70007c52:	b2ad      	uxth	r5, r5
70007c54:	f7ff f968 	bl	70006f28 <__aeabi_uidiv>
70007c58:	4639      	mov	r1, r7
70007c5a:	4680      	mov	r8, r0
70007c5c:	4658      	mov	r0, fp
70007c5e:	f7ff fa91 	bl	70007184 <__aeabi_uidivmod>
70007c62:	fb09 f908 	mul.w	r9, r9, r8
70007c66:	ea45 4501 	orr.w	r5, r5, r1, lsl #16
70007c6a:	45a9      	cmp	r9, r5
70007c6c:	d907      	bls.n	70007c7e <__divdi3+0x162>
70007c6e:	192d      	adds	r5, r5, r4
70007c70:	f108 38ff 	add.w	r8, r8, #4294967295
70007c74:	d203      	bcs.n	70007c7e <__divdi3+0x162>
70007c76:	45a9      	cmp	r9, r5
70007c78:	bf88      	it	hi
70007c7a:	f108 38ff 	addhi.w	r8, r8, #4294967295
70007c7e:	ea48 480a 	orr.w	r8, r8, sl, lsl #16
70007c82:	9f02      	ldr	r7, [sp, #8]
70007c84:	e7a9      	b.n	70007bda <__divdi3+0xbe>
70007c86:	fab3 f783 	clz	r7, r3
70007c8a:	2f00      	cmp	r7, #0
70007c8c:	d168      	bne.n	70007d60 <__divdi3+0x244>
70007c8e:	428b      	cmp	r3, r1
70007c90:	bf2c      	ite	cs
70007c92:	f04f 0900 	movcs.w	r9, #0
70007c96:	f04f 0901 	movcc.w	r9, #1
70007c9a:	4282      	cmp	r2, r0
70007c9c:	bf8c      	ite	hi
70007c9e:	464c      	movhi	r4, r9
70007ca0:	f049 0401 	orrls.w	r4, r9, #1
70007ca4:	2c00      	cmp	r4, #0
70007ca6:	d096      	beq.n	70007bd6 <__divdi3+0xba>
70007ca8:	f04f 0801 	mov.w	r8, #1
70007cac:	e795      	b.n	70007bda <__divdi3+0xbe>
70007cae:	4252      	negs	r2, r2
70007cb0:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
70007cb4:	43f6      	mvns	r6, r6
70007cb6:	e73b      	b.n	70007b30 <__divdi3+0x14>
70007cb8:	4240      	negs	r0, r0
70007cba:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
70007cbe:	f04f 36ff 	mov.w	r6, #4294967295
70007cc2:	e732      	b.n	70007b2a <__divdi3+0xe>
70007cc4:	fa04 f408 	lsl.w	r4, r4, r8
70007cc8:	f1c8 0720 	rsb	r7, r8, #32
70007ccc:	fa35 f307 	lsrs.w	r3, r5, r7
70007cd0:	fa29 fa07 	lsr.w	sl, r9, r7
70007cd4:	0c27      	lsrs	r7, r4, #16
70007cd6:	fa09 fb08 	lsl.w	fp, r9, r8
70007cda:	4639      	mov	r1, r7
70007cdc:	4650      	mov	r0, sl
70007cde:	ea43 020b 	orr.w	r2, r3, fp
70007ce2:	9202      	str	r2, [sp, #8]
70007ce4:	f7ff f920 	bl	70006f28 <__aeabi_uidiv>
70007ce8:	4639      	mov	r1, r7
70007cea:	fa1f f984 	uxth.w	r9, r4
70007cee:	4683      	mov	fp, r0
70007cf0:	4650      	mov	r0, sl
70007cf2:	f7ff fa47 	bl	70007184 <__aeabi_uidivmod>
70007cf6:	9802      	ldr	r0, [sp, #8]
70007cf8:	fb09 f20b 	mul.w	r2, r9, fp
70007cfc:	0c03      	lsrs	r3, r0, #16
70007cfe:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
70007d02:	429a      	cmp	r2, r3
70007d04:	d904      	bls.n	70007d10 <__divdi3+0x1f4>
70007d06:	191b      	adds	r3, r3, r4
70007d08:	f10b 3bff 	add.w	fp, fp, #4294967295
70007d0c:	f0c0 80b1 	bcc.w	70007e72 <__divdi3+0x356>
70007d10:	1a9b      	subs	r3, r3, r2
70007d12:	4639      	mov	r1, r7
70007d14:	4618      	mov	r0, r3
70007d16:	9301      	str	r3, [sp, #4]
70007d18:	f7ff f906 	bl	70006f28 <__aeabi_uidiv>
70007d1c:	9901      	ldr	r1, [sp, #4]
70007d1e:	4682      	mov	sl, r0
70007d20:	4608      	mov	r0, r1
70007d22:	4639      	mov	r1, r7
70007d24:	f7ff fa2e 	bl	70007184 <__aeabi_uidivmod>
70007d28:	f8dd c008 	ldr.w	ip, [sp, #8]
70007d2c:	fb09 f30a 	mul.w	r3, r9, sl
70007d30:	fa1f f08c 	uxth.w	r0, ip
70007d34:	ea40 4201 	orr.w	r2, r0, r1, lsl #16
70007d38:	4293      	cmp	r3, r2
70007d3a:	d908      	bls.n	70007d4e <__divdi3+0x232>
70007d3c:	1912      	adds	r2, r2, r4
70007d3e:	f10a 3aff 	add.w	sl, sl, #4294967295
70007d42:	d204      	bcs.n	70007d4e <__divdi3+0x232>
70007d44:	4293      	cmp	r3, r2
70007d46:	bf84      	itt	hi
70007d48:	f10a 3aff 	addhi.w	sl, sl, #4294967295
70007d4c:	1912      	addhi	r2, r2, r4
70007d4e:	fa05 f508 	lsl.w	r5, r5, r8
70007d52:	ea4a 4e0b 	orr.w	lr, sl, fp, lsl #16
70007d56:	ebc3 0802 	rsb	r8, r3, r2
70007d5a:	f8cd e008 	str.w	lr, [sp, #8]
70007d5e:	e759      	b.n	70007c14 <__divdi3+0xf8>
70007d60:	f1c7 0020 	rsb	r0, r7, #32
70007d64:	fa03 fa07 	lsl.w	sl, r3, r7
70007d68:	40c2      	lsrs	r2, r0
70007d6a:	fa35 f300 	lsrs.w	r3, r5, r0
70007d6e:	ea42 0b0a 	orr.w	fp, r2, sl
70007d72:	fa21 f800 	lsr.w	r8, r1, r0
70007d76:	fa01 f907 	lsl.w	r9, r1, r7
70007d7a:	4640      	mov	r0, r8
70007d7c:	ea4f 4a1b 	mov.w	sl, fp, lsr #16
70007d80:	ea43 0109 	orr.w	r1, r3, r9
70007d84:	9102      	str	r1, [sp, #8]
70007d86:	4651      	mov	r1, sl
70007d88:	fa1f f28b 	uxth.w	r2, fp
70007d8c:	9203      	str	r2, [sp, #12]
70007d8e:	f7ff f8cb 	bl	70006f28 <__aeabi_uidiv>
70007d92:	4651      	mov	r1, sl
70007d94:	4681      	mov	r9, r0
70007d96:	4640      	mov	r0, r8
70007d98:	f7ff f9f4 	bl	70007184 <__aeabi_uidivmod>
70007d9c:	9b03      	ldr	r3, [sp, #12]
70007d9e:	f8dd c008 	ldr.w	ip, [sp, #8]
70007da2:	fb03 f209 	mul.w	r2, r3, r9
70007da6:	ea4f 401c 	mov.w	r0, ip, lsr #16
70007daa:	fa14 f307 	lsls.w	r3, r4, r7
70007dae:	ea40 4401 	orr.w	r4, r0, r1, lsl #16
70007db2:	42a2      	cmp	r2, r4
70007db4:	d904      	bls.n	70007dc0 <__divdi3+0x2a4>
70007db6:	eb14 040b 	adds.w	r4, r4, fp
70007dba:	f109 39ff 	add.w	r9, r9, #4294967295
70007dbe:	d352      	bcc.n	70007e66 <__divdi3+0x34a>
70007dc0:	1aa4      	subs	r4, r4, r2
70007dc2:	4651      	mov	r1, sl
70007dc4:	4620      	mov	r0, r4
70007dc6:	9301      	str	r3, [sp, #4]
70007dc8:	f7ff f8ae 	bl	70006f28 <__aeabi_uidiv>
70007dcc:	4651      	mov	r1, sl
70007dce:	4680      	mov	r8, r0
70007dd0:	4620      	mov	r0, r4
70007dd2:	f7ff f9d7 	bl	70007184 <__aeabi_uidivmod>
70007dd6:	9803      	ldr	r0, [sp, #12]
70007dd8:	f8dd c008 	ldr.w	ip, [sp, #8]
70007ddc:	fb00 f208 	mul.w	r2, r0, r8
70007de0:	fa1f f38c 	uxth.w	r3, ip
70007de4:	ea43 4001 	orr.w	r0, r3, r1, lsl #16
70007de8:	9b01      	ldr	r3, [sp, #4]
70007dea:	4282      	cmp	r2, r0
70007dec:	d904      	bls.n	70007df8 <__divdi3+0x2dc>
70007dee:	eb10 000b 	adds.w	r0, r0, fp
70007df2:	f108 38ff 	add.w	r8, r8, #4294967295
70007df6:	d330      	bcc.n	70007e5a <__divdi3+0x33e>
70007df8:	ea48 4809 	orr.w	r8, r8, r9, lsl #16
70007dfc:	fa1f fc83 	uxth.w	ip, r3
70007e00:	0c1b      	lsrs	r3, r3, #16
70007e02:	1a80      	subs	r0, r0, r2
70007e04:	fa1f fe88 	uxth.w	lr, r8
70007e08:	ea4f 4a18 	mov.w	sl, r8, lsr #16
70007e0c:	fb0c f90e 	mul.w	r9, ip, lr
70007e10:	fb0c fc0a 	mul.w	ip, ip, sl
70007e14:	fb03 c10e 	mla	r1, r3, lr, ip
70007e18:	fb03 f20a 	mul.w	r2, r3, sl
70007e1c:	eb01 4119 	add.w	r1, r1, r9, lsr #16
70007e20:	458c      	cmp	ip, r1
70007e22:	bf88      	it	hi
70007e24:	f502 3280 	addhi.w	r2, r2, #65536	; 0x10000
70007e28:	eb02 4e11 	add.w	lr, r2, r1, lsr #16
70007e2c:	4570      	cmp	r0, lr
70007e2e:	d310      	bcc.n	70007e52 <__divdi3+0x336>
70007e30:	fa1f f989 	uxth.w	r9, r9
70007e34:	fa05 f707 	lsl.w	r7, r5, r7
70007e38:	eb09 4001 	add.w	r0, r9, r1, lsl #16
70007e3c:	bf14      	ite	ne
70007e3e:	2200      	movne	r2, #0
70007e40:	2201      	moveq	r2, #1
70007e42:	4287      	cmp	r7, r0
70007e44:	bf2c      	ite	cs
70007e46:	2700      	movcs	r7, #0
70007e48:	f002 0701 	andcc.w	r7, r2, #1
70007e4c:	2f00      	cmp	r7, #0
70007e4e:	f43f aec4 	beq.w	70007bda <__divdi3+0xbe>
70007e52:	f108 38ff 	add.w	r8, r8, #4294967295
70007e56:	2700      	movs	r7, #0
70007e58:	e6bf      	b.n	70007bda <__divdi3+0xbe>
70007e5a:	4282      	cmp	r2, r0
70007e5c:	bf84      	itt	hi
70007e5e:	4458      	addhi	r0, fp
70007e60:	f108 38ff 	addhi.w	r8, r8, #4294967295
70007e64:	e7c8      	b.n	70007df8 <__divdi3+0x2dc>
70007e66:	42a2      	cmp	r2, r4
70007e68:	bf84      	itt	hi
70007e6a:	f109 39ff 	addhi.w	r9, r9, #4294967295
70007e6e:	445c      	addhi	r4, fp
70007e70:	e7a6      	b.n	70007dc0 <__divdi3+0x2a4>
70007e72:	429a      	cmp	r2, r3
70007e74:	bf84      	itt	hi
70007e76:	f10b 3bff 	addhi.w	fp, fp, #4294967295
70007e7a:	191b      	addhi	r3, r3, r4
70007e7c:	e748      	b.n	70007d10 <__divdi3+0x1f4>
70007e7e:	bf00      	nop

70007e80 <__udivdi3>:
70007e80:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
70007e84:	460c      	mov	r4, r1
70007e86:	b083      	sub	sp, #12
70007e88:	4680      	mov	r8, r0
70007e8a:	4616      	mov	r6, r2
70007e8c:	4689      	mov	r9, r1
70007e8e:	461f      	mov	r7, r3
70007e90:	4615      	mov	r5, r2
70007e92:	468a      	mov	sl, r1
70007e94:	2b00      	cmp	r3, #0
70007e96:	d14b      	bne.n	70007f30 <__udivdi3+0xb0>
70007e98:	428a      	cmp	r2, r1
70007e9a:	d95c      	bls.n	70007f56 <__udivdi3+0xd6>
70007e9c:	fab2 f382 	clz	r3, r2
70007ea0:	b15b      	cbz	r3, 70007eba <__udivdi3+0x3a>
70007ea2:	f1c3 0020 	rsb	r0, r3, #32
70007ea6:	fa01 fa03 	lsl.w	sl, r1, r3
70007eaa:	fa28 f200 	lsr.w	r2, r8, r0
70007eae:	fa16 f503 	lsls.w	r5, r6, r3
70007eb2:	fa08 f803 	lsl.w	r8, r8, r3
70007eb6:	ea42 0a0a 	orr.w	sl, r2, sl
70007eba:	0c2e      	lsrs	r6, r5, #16
70007ebc:	4650      	mov	r0, sl
70007ebe:	4631      	mov	r1, r6
70007ec0:	b2af      	uxth	r7, r5
70007ec2:	f7ff f831 	bl	70006f28 <__aeabi_uidiv>
70007ec6:	4631      	mov	r1, r6
70007ec8:	ea4f 4418 	mov.w	r4, r8, lsr #16
70007ecc:	4681      	mov	r9, r0
70007ece:	4650      	mov	r0, sl
70007ed0:	f7ff f958 	bl	70007184 <__aeabi_uidivmod>
70007ed4:	fb07 f309 	mul.w	r3, r7, r9
70007ed8:	ea44 4a01 	orr.w	sl, r4, r1, lsl #16
70007edc:	4553      	cmp	r3, sl
70007ede:	d909      	bls.n	70007ef4 <__udivdi3+0x74>
70007ee0:	eb1a 0a05 	adds.w	sl, sl, r5
70007ee4:	f109 39ff 	add.w	r9, r9, #4294967295
70007ee8:	d204      	bcs.n	70007ef4 <__udivdi3+0x74>
70007eea:	4553      	cmp	r3, sl
70007eec:	bf84      	itt	hi
70007eee:	f109 39ff 	addhi.w	r9, r9, #4294967295
70007ef2:	44aa      	addhi	sl, r5
70007ef4:	ebc3 0a0a 	rsb	sl, r3, sl
70007ef8:	4631      	mov	r1, r6
70007efa:	4650      	mov	r0, sl
70007efc:	fa1f f888 	uxth.w	r8, r8
70007f00:	f7ff f812 	bl	70006f28 <__aeabi_uidiv>
70007f04:	4631      	mov	r1, r6
70007f06:	4604      	mov	r4, r0
70007f08:	4650      	mov	r0, sl
70007f0a:	f7ff f93b 	bl	70007184 <__aeabi_uidivmod>
70007f0e:	fb07 f704 	mul.w	r7, r7, r4
70007f12:	ea48 4801 	orr.w	r8, r8, r1, lsl #16
70007f16:	4547      	cmp	r7, r8
70007f18:	d906      	bls.n	70007f28 <__udivdi3+0xa8>
70007f1a:	3c01      	subs	r4, #1
70007f1c:	eb18 0805 	adds.w	r8, r8, r5
70007f20:	d202      	bcs.n	70007f28 <__udivdi3+0xa8>
70007f22:	4547      	cmp	r7, r8
70007f24:	bf88      	it	hi
70007f26:	3c01      	subhi	r4, #1
70007f28:	ea44 4409 	orr.w	r4, r4, r9, lsl #16
70007f2c:	2600      	movs	r6, #0
70007f2e:	e05c      	b.n	70007fea <__udivdi3+0x16a>
70007f30:	428b      	cmp	r3, r1
70007f32:	d858      	bhi.n	70007fe6 <__udivdi3+0x166>
70007f34:	fab3 f683 	clz	r6, r3
70007f38:	2e00      	cmp	r6, #0
70007f3a:	d15b      	bne.n	70007ff4 <__udivdi3+0x174>
70007f3c:	428b      	cmp	r3, r1
70007f3e:	bf2c      	ite	cs
70007f40:	2200      	movcs	r2, #0
70007f42:	2201      	movcc	r2, #1
70007f44:	4285      	cmp	r5, r0
70007f46:	bf8c      	ite	hi
70007f48:	4615      	movhi	r5, r2
70007f4a:	f042 0501 	orrls.w	r5, r2, #1
70007f4e:	2d00      	cmp	r5, #0
70007f50:	d049      	beq.n	70007fe6 <__udivdi3+0x166>
70007f52:	2401      	movs	r4, #1
70007f54:	e049      	b.n	70007fea <__udivdi3+0x16a>
70007f56:	b922      	cbnz	r2, 70007f62 <__udivdi3+0xe2>
70007f58:	4611      	mov	r1, r2
70007f5a:	2001      	movs	r0, #1
70007f5c:	f7fe ffe4 	bl	70006f28 <__aeabi_uidiv>
70007f60:	4605      	mov	r5, r0
70007f62:	fab5 f685 	clz	r6, r5
70007f66:	2e00      	cmp	r6, #0
70007f68:	f040 80ba 	bne.w	700080e0 <__udivdi3+0x260>
70007f6c:	1b64      	subs	r4, r4, r5
70007f6e:	0c2f      	lsrs	r7, r5, #16
70007f70:	fa1f fa85 	uxth.w	sl, r5
70007f74:	2601      	movs	r6, #1
70007f76:	4639      	mov	r1, r7
70007f78:	4620      	mov	r0, r4
70007f7a:	f7fe ffd5 	bl	70006f28 <__aeabi_uidiv>
70007f7e:	4639      	mov	r1, r7
70007f80:	ea4f 4b18 	mov.w	fp, r8, lsr #16
70007f84:	4681      	mov	r9, r0
70007f86:	4620      	mov	r0, r4
70007f88:	f7ff f8fc 	bl	70007184 <__aeabi_uidivmod>
70007f8c:	fb0a f309 	mul.w	r3, sl, r9
70007f90:	ea4b 4b01 	orr.w	fp, fp, r1, lsl #16
70007f94:	455b      	cmp	r3, fp
70007f96:	d909      	bls.n	70007fac <__udivdi3+0x12c>
70007f98:	eb1b 0b05 	adds.w	fp, fp, r5
70007f9c:	f109 39ff 	add.w	r9, r9, #4294967295
70007fa0:	d204      	bcs.n	70007fac <__udivdi3+0x12c>
70007fa2:	455b      	cmp	r3, fp
70007fa4:	bf84      	itt	hi
70007fa6:	f109 39ff 	addhi.w	r9, r9, #4294967295
70007faa:	44ab      	addhi	fp, r5
70007fac:	ebc3 0b0b 	rsb	fp, r3, fp
70007fb0:	4639      	mov	r1, r7
70007fb2:	4658      	mov	r0, fp
70007fb4:	fa1f f888 	uxth.w	r8, r8
70007fb8:	f7fe ffb6 	bl	70006f28 <__aeabi_uidiv>
70007fbc:	4639      	mov	r1, r7
70007fbe:	4604      	mov	r4, r0
70007fc0:	4658      	mov	r0, fp
70007fc2:	f7ff f8df 	bl	70007184 <__aeabi_uidivmod>
70007fc6:	fb0a fa04 	mul.w	sl, sl, r4
70007fca:	ea48 4801 	orr.w	r8, r8, r1, lsl #16
70007fce:	45c2      	cmp	sl, r8
70007fd0:	d906      	bls.n	70007fe0 <__udivdi3+0x160>
70007fd2:	3c01      	subs	r4, #1
70007fd4:	eb18 0805 	adds.w	r8, r8, r5
70007fd8:	d202      	bcs.n	70007fe0 <__udivdi3+0x160>
70007fda:	45c2      	cmp	sl, r8
70007fdc:	bf88      	it	hi
70007fde:	3c01      	subhi	r4, #1
70007fe0:	ea44 4409 	orr.w	r4, r4, r9, lsl #16
70007fe4:	e001      	b.n	70007fea <__udivdi3+0x16a>
70007fe6:	2600      	movs	r6, #0
70007fe8:	4634      	mov	r4, r6
70007fea:	4631      	mov	r1, r6
70007fec:	4620      	mov	r0, r4
70007fee:	b003      	add	sp, #12
70007ff0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
70007ff4:	f1c6 0020 	rsb	r0, r6, #32
70007ff8:	40b3      	lsls	r3, r6
70007ffa:	fa32 f700 	lsrs.w	r7, r2, r0
70007ffe:	fa21 fb00 	lsr.w	fp, r1, r0
70008002:	431f      	orrs	r7, r3
70008004:	fa14 f206 	lsls.w	r2, r4, r6
70008008:	fa28 f100 	lsr.w	r1, r8, r0
7000800c:	4658      	mov	r0, fp
7000800e:	ea4f 4a17 	mov.w	sl, r7, lsr #16
70008012:	4311      	orrs	r1, r2
70008014:	9100      	str	r1, [sp, #0]
70008016:	4651      	mov	r1, sl
70008018:	b2bb      	uxth	r3, r7
7000801a:	9301      	str	r3, [sp, #4]
7000801c:	f7fe ff84 	bl	70006f28 <__aeabi_uidiv>
70008020:	4651      	mov	r1, sl
70008022:	40b5      	lsls	r5, r6
70008024:	4681      	mov	r9, r0
70008026:	4658      	mov	r0, fp
70008028:	f7ff f8ac 	bl	70007184 <__aeabi_uidivmod>
7000802c:	9c01      	ldr	r4, [sp, #4]
7000802e:	9800      	ldr	r0, [sp, #0]
70008030:	fb04 f309 	mul.w	r3, r4, r9
70008034:	ea4f 4c10 	mov.w	ip, r0, lsr #16
70008038:	ea4c 4b01 	orr.w	fp, ip, r1, lsl #16
7000803c:	455b      	cmp	r3, fp
7000803e:	d905      	bls.n	7000804c <__udivdi3+0x1cc>
70008040:	eb1b 0b07 	adds.w	fp, fp, r7
70008044:	f109 39ff 	add.w	r9, r9, #4294967295
70008048:	f0c0 808e 	bcc.w	70008168 <__udivdi3+0x2e8>
7000804c:	ebc3 0b0b 	rsb	fp, r3, fp
70008050:	4651      	mov	r1, sl
70008052:	4658      	mov	r0, fp
70008054:	f7fe ff68 	bl	70006f28 <__aeabi_uidiv>
70008058:	4651      	mov	r1, sl
7000805a:	4604      	mov	r4, r0
7000805c:	4658      	mov	r0, fp
7000805e:	f7ff f891 	bl	70007184 <__aeabi_uidivmod>
70008062:	9801      	ldr	r0, [sp, #4]
70008064:	9a00      	ldr	r2, [sp, #0]
70008066:	fb00 f304 	mul.w	r3, r0, r4
7000806a:	fa1f fc82 	uxth.w	ip, r2
7000806e:	ea4c 4201 	orr.w	r2, ip, r1, lsl #16
70008072:	4293      	cmp	r3, r2
70008074:	d906      	bls.n	70008084 <__udivdi3+0x204>
70008076:	3c01      	subs	r4, #1
70008078:	19d2      	adds	r2, r2, r7
7000807a:	d203      	bcs.n	70008084 <__udivdi3+0x204>
7000807c:	4293      	cmp	r3, r2
7000807e:	d901      	bls.n	70008084 <__udivdi3+0x204>
70008080:	19d2      	adds	r2, r2, r7
70008082:	3c01      	subs	r4, #1
70008084:	ea44 4409 	orr.w	r4, r4, r9, lsl #16
70008088:	b2a8      	uxth	r0, r5
7000808a:	1ad2      	subs	r2, r2, r3
7000808c:	0c2d      	lsrs	r5, r5, #16
7000808e:	fa1f fc84 	uxth.w	ip, r4
70008092:	0c23      	lsrs	r3, r4, #16
70008094:	fb00 f70c 	mul.w	r7, r0, ip
70008098:	fb00 fe03 	mul.w	lr, r0, r3
7000809c:	fb05 e10c 	mla	r1, r5, ip, lr
700080a0:	fb05 f503 	mul.w	r5, r5, r3
700080a4:	eb01 4117 	add.w	r1, r1, r7, lsr #16
700080a8:	458e      	cmp	lr, r1
700080aa:	bf88      	it	hi
700080ac:	f505 3580 	addhi.w	r5, r5, #65536	; 0x10000
700080b0:	eb05 4511 	add.w	r5, r5, r1, lsr #16
700080b4:	42aa      	cmp	r2, r5
700080b6:	d310      	bcc.n	700080da <__udivdi3+0x25a>
700080b8:	b2bf      	uxth	r7, r7
700080ba:	fa08 f606 	lsl.w	r6, r8, r6
700080be:	eb07 4201 	add.w	r2, r7, r1, lsl #16
700080c2:	bf14      	ite	ne
700080c4:	f04f 0e00 	movne.w	lr, #0
700080c8:	f04f 0e01 	moveq.w	lr, #1
700080cc:	4296      	cmp	r6, r2
700080ce:	bf2c      	ite	cs
700080d0:	2600      	movcs	r6, #0
700080d2:	f00e 0601 	andcc.w	r6, lr, #1
700080d6:	2e00      	cmp	r6, #0
700080d8:	d087      	beq.n	70007fea <__udivdi3+0x16a>
700080da:	3c01      	subs	r4, #1
700080dc:	2600      	movs	r6, #0
700080de:	e784      	b.n	70007fea <__udivdi3+0x16a>
700080e0:	40b5      	lsls	r5, r6
700080e2:	f1c6 0120 	rsb	r1, r6, #32
700080e6:	fa24 f901 	lsr.w	r9, r4, r1
700080ea:	fa28 f201 	lsr.w	r2, r8, r1
700080ee:	0c2f      	lsrs	r7, r5, #16
700080f0:	40b4      	lsls	r4, r6
700080f2:	4639      	mov	r1, r7
700080f4:	4648      	mov	r0, r9
700080f6:	4322      	orrs	r2, r4
700080f8:	9200      	str	r2, [sp, #0]
700080fa:	f7fe ff15 	bl	70006f28 <__aeabi_uidiv>
700080fe:	4639      	mov	r1, r7
70008100:	fa1f fa85 	uxth.w	sl, r5
70008104:	4683      	mov	fp, r0
70008106:	4648      	mov	r0, r9
70008108:	f7ff f83c 	bl	70007184 <__aeabi_uidivmod>
7000810c:	9b00      	ldr	r3, [sp, #0]
7000810e:	0c1a      	lsrs	r2, r3, #16
70008110:	fb0a f30b 	mul.w	r3, sl, fp
70008114:	ea42 4401 	orr.w	r4, r2, r1, lsl #16
70008118:	42a3      	cmp	r3, r4
7000811a:	d903      	bls.n	70008124 <__udivdi3+0x2a4>
7000811c:	1964      	adds	r4, r4, r5
7000811e:	f10b 3bff 	add.w	fp, fp, #4294967295
70008122:	d327      	bcc.n	70008174 <__udivdi3+0x2f4>
70008124:	1ae4      	subs	r4, r4, r3
70008126:	4639      	mov	r1, r7
70008128:	4620      	mov	r0, r4
7000812a:	f7fe fefd 	bl	70006f28 <__aeabi_uidiv>
7000812e:	4639      	mov	r1, r7
70008130:	4681      	mov	r9, r0
70008132:	4620      	mov	r0, r4
70008134:	f7ff f826 	bl	70007184 <__aeabi_uidivmod>
70008138:	9800      	ldr	r0, [sp, #0]
7000813a:	fb0a f309 	mul.w	r3, sl, r9
7000813e:	fa1f fc80 	uxth.w	ip, r0
70008142:	ea4c 4401 	orr.w	r4, ip, r1, lsl #16
70008146:	42a3      	cmp	r3, r4
70008148:	d908      	bls.n	7000815c <__udivdi3+0x2dc>
7000814a:	1964      	adds	r4, r4, r5
7000814c:	f109 39ff 	add.w	r9, r9, #4294967295
70008150:	d204      	bcs.n	7000815c <__udivdi3+0x2dc>
70008152:	42a3      	cmp	r3, r4
70008154:	bf84      	itt	hi
70008156:	f109 39ff 	addhi.w	r9, r9, #4294967295
7000815a:	1964      	addhi	r4, r4, r5
7000815c:	fa08 f806 	lsl.w	r8, r8, r6
70008160:	1ae4      	subs	r4, r4, r3
70008162:	ea49 460b 	orr.w	r6, r9, fp, lsl #16
70008166:	e706      	b.n	70007f76 <__udivdi3+0xf6>
70008168:	455b      	cmp	r3, fp
7000816a:	bf84      	itt	hi
7000816c:	f109 39ff 	addhi.w	r9, r9, #4294967295
70008170:	44bb      	addhi	fp, r7
70008172:	e76b      	b.n	7000804c <__udivdi3+0x1cc>
70008174:	42a3      	cmp	r3, r4
70008176:	bf84      	itt	hi
70008178:	f10b 3bff 	addhi.w	fp, fp, #4294967295
7000817c:	1964      	addhi	r4, r4, r5
7000817e:	e7d1      	b.n	70008124 <__udivdi3+0x2a4>
70008180:	54207325 	.word	0x54207325
70008184:	20736968 	.word	0x20736968
70008188:	69727473 	.word	0x69727473
7000818c:	6920676e 	.word	0x6920676e
70008190:	74732073 	.word	0x74732073
70008194:	6465726f 	.word	0x6465726f
70008198:	20746120 	.word	0x20746120
7000819c:	0a0d7025 	.word	0x0a0d7025
700081a0:	00000000 	.word	0x00000000
700081a4:	70616548 	.word	0x70616548
700081a8:	646e6120 	.word	0x646e6120
700081ac:	61747320 	.word	0x61747320
700081b0:	63206b63 	.word	0x63206b63
700081b4:	696c6c6f 	.word	0x696c6c6f
700081b8:	6e6f6973 	.word	0x6e6f6973
700081bc:	0000000a 	.word	0x0000000a

700081c0 <g_config_reg_lut>:
700081c0:	40013000 40013004 40013008 4001300c     .0.@.0.@.0.@.0.@
700081d0:	40013010 40013014 40013018 4001301c     .0.@.0.@.0.@.0.@
700081e0:	40013020 40013024 40013028 4001302c      0.@$0.@(0.@,0.@
700081f0:	40013030 40013034 40013038 4001303c     00.@40.@80.@<0.@
70008200:	40013040 40013044 40013048 4001304c     @0.@D0.@H0.@L0.@
70008210:	40013050 40013054 40013058 4001305c     P0.@T0.@X0.@\0.@
70008220:	40013060 40013064 40013068 4001306c     `0.@d0.@h0.@l0.@
70008230:	40013070 40013074 40013078 4001307c     p0.@t0.@x0.@|0.@

70008240 <g_gpio_irqn_lut>:
70008240:	00210020 00230022 00250024 00270026      .!.".#.$.%.&.'.
70008250:	00290028 002b002a 002d002c 002f002e     (.).*.+.,.-.../.
70008260:	00310030 00330032 00350034 00370036     0.1.2.3.4.5.6.7.
70008270:	00390038 003b003a 003d003c 003f003e     8.9.:.;.<.=.>.?.

70008280 <C.18.2576>:
70008280:	00000001 00000002 00000004 00000001     ................

70008290 <_global_impure_ptr>:
70008290:	70008548 00000043                       H..pC...

70008298 <blanks.3577>:
70008298:	20202020 20202020 20202020 20202020                     

700082a8 <zeroes.3578>:
700082a8:	30303030 30303030 30303030 30303030     0000000000000000
700082b8:	33323130 37363534 42413938 46454443     0123456789ABCDEF
700082c8:	00000000 00464e49 00666e69 004e414e     ....INF.inf.NAN.
700082d8:	006e616e 33323130 37363534 62613938     nan.0123456789ab
700082e8:	66656463 00000000 6c756e28 0000296c     cdef....(null)..
700082f8:	00000030 69666e49 7974696e 00000000     0...Infinity....
70008308:	004e614e                                NaN.

7000830c <__sf_fake_stdin>:
	...

7000832c <__sf_fake_stdout>:
	...

7000834c <__sf_fake_stderr>:
	...

7000836c <charset>:
7000836c:	700083a4                                ...p

70008370 <lconv>:
70008370:	700083a0 700082c8 700082c8 700082c8     ...p...p...p...p
70008380:	700082c8 700082c8 700082c8 700082c8     ...p...p...p...p
70008390:	700082c8 700082c8 ffffffff ffffffff     ...p...p........
700083a0:	0000002e 2d4f5349 39353838 0000312d     ....ISO-8859-1..

700083b0 <__mprec_tens>:
700083b0:	00000000 3ff00000 00000000 40240000     .......?......$@
700083c0:	00000000 40590000 00000000 408f4000     ......Y@.....@.@
700083d0:	00000000 40c38800 00000000 40f86a00     .......@.....j.@
700083e0:	00000000 412e8480 00000000 416312d0     .......A......cA
700083f0:	00000000 4197d784 00000000 41cdcd65     .......A....e..A
70008400:	20000000 4202a05f e8000000 42374876     ... _..B....vH7B
70008410:	a2000000 426d1a94 e5400000 42a2309c     ......mB..@..0.B
70008420:	1e900000 42d6bcc4 26340000 430c6bf5     .......B..4&.k.C
70008430:	37e08000 4341c379 85d8a000 43763457     ...7y.AC....W4vC
70008440:	674ec800 43abc16d 60913d00 43e158e4     ..Ngm..C.=.`.X.C
70008450:	78b58c40 4415af1d d6e2ef50 444b1ae4     @..x...DP.....KD
70008460:	064dd592 4480f0cf c7e14af6 44b52d02     ..M....D.J...-.D
70008470:	79d99db4 44ea7843                       ...yCx.D

70008478 <p05.2463>:
70008478:	00000005 00000019 0000007d 00000000     ........}.......

70008488 <__mprec_bigtens>:
70008488:	37e08000 4341c379 b5056e17 4693b8b5     ...7y.AC.n.....F
70008498:	e93ff9f5 4d384f03 f9301d32 5a827748     ..?..O8M2.0.Hw.Z
700084a8:	7f73bf3c 75154fdd                       <.s..O.u

700084b0 <__mprec_tinytens>:
700084b0:	97d889bc 3c9cd2b2 d5a8a733 3949f623     .......<3...#.I9
700084c0:	44f4a73d 32a50ffd cf8c979d 255bba08     =..D...2......[%
700084d0:	64ac6f43 0ac80628                       Co.d(...

700084d8 <_init>:
700084d8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
700084da:	bf00      	nop
700084dc:	bcf8      	pop	{r3, r4, r5, r6, r7}
700084de:	bc08      	pop	{r3}
700084e0:	469e      	mov	lr, r3
700084e2:	4770      	bx	lr

700084e4 <_fini>:
700084e4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
700084e6:	bf00      	nop
700084e8:	bcf8      	pop	{r3, r4, r5, r6, r7}
700084ea:	bc08      	pop	{r3}
700084ec:	469e      	mov	lr, r3
700084ee:	4770      	bx	lr

700084f0 <__frame_dummy_init_array_entry>:
700084f0:	047d 7000                                   }..p

700084f4 <__do_global_dtors_aux_fini_array_entry>:
700084f4:	0469 7000                                   i..p
