
emcFlashImage_MSS_CM3_0_app:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .reset        00000464  74000000  74000000  00008000  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00008090  74000468  74000468  00008468  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .ARM.exidx    00000008  740084f8  740084f8  000104f8  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .data         00000550  70000000  74008500  00018000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .bss          000000a8  70000550  74008a50  00018550  2**2
                  ALLOC
  5 .comment      000000d7  00000000  00000000  00018550  2**0
                  CONTENTS, READONLY
  6 .debug_aranges 000000a0  00000000  00000000  00018627  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_pubnames 0000049c  00000000  00000000  000186c7  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_info   000041c5  00000000  00000000  00018b63  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_abbrev 00000807  00000000  00000000  0001cd28  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_line   00001423  00000000  00000000  0001d52f  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_frame  00001304  00000000  00000000  0001e954  2**2
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_str    00001d12  00000000  00000000  0001fc58  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_loc    00000c22  00000000  00000000  0002196a  2**0
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_macinfo 00023975  00000000  00000000  0002258c  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .ARM.attributes 00000025  00000000  00000000  00045f01  2**0
                  CONTENTS, READONLY

Disassembly of section .text:

74000468 <__do_global_dtors_aux>:
74000468:	f240 5350 	movw	r3, #1360	; 0x550
7400046c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000470:	781a      	ldrb	r2, [r3, #0]
74000472:	b90a      	cbnz	r2, 74000478 <__do_global_dtors_aux+0x10>
74000474:	2001      	movs	r0, #1
74000476:	7018      	strb	r0, [r3, #0]
74000478:	4770      	bx	lr
7400047a:	bf00      	nop

7400047c <frame_dummy>:
7400047c:	f240 0000 	movw	r0, #0
74000480:	f2c7 0000 	movt	r0, #28672	; 0x7000
74000484:	b508      	push	{r3, lr}
74000486:	6803      	ldr	r3, [r0, #0]
74000488:	b12b      	cbz	r3, 74000496 <frame_dummy+0x1a>
7400048a:	f240 0300 	movw	r3, #0
7400048e:	f2c0 0300 	movt	r3, #0
74000492:	b103      	cbz	r3, 74000496 <frame_dummy+0x1a>
74000494:	4798      	blx	r3
74000496:	bd08      	pop	{r3, pc}

74000498 <MSS_GPIO_set_outputs>:
static __INLINE void
MSS_GPIO_set_outputs
(
   uint32_t value
)
{
74000498:	b480      	push	{r7}
7400049a:	b083      	sub	sp, #12
7400049c:	af00      	add	r7, sp, #0
7400049e:	6078      	str	r0, [r7, #4]
    GPIO->GPIO_OUT = value;
740004a0:	f243 0300 	movw	r3, #12288	; 0x3000
740004a4:	f2c4 0301 	movt	r3, #16385	; 0x4001
740004a8:	687a      	ldr	r2, [r7, #4]
740004aa:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
}
740004ae:	f107 070c 	add.w	r7, r7, #12
740004b2:	46bd      	mov	sp, r7
740004b4:	bc80      	pop	{r7}
740004b6:	4770      	bx	lr

740004b8 <MSS_GPIO_get_outputs>:
        gpio_outputs = MSS_GPIO_get_outputs();
    @endcode
 */
static __INLINE uint32_t
MSS_GPIO_get_outputs( void )
{
740004b8:	b480      	push	{r7}
740004ba:	af00      	add	r7, sp, #0
    return GPIO->GPIO_OUT;
740004bc:	f243 0300 	movw	r3, #12288	; 0x3000
740004c0:	f2c4 0301 	movt	r3, #16385	; 0x4001
740004c4:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
}
740004c8:	4618      	mov	r0, r3
740004ca:	46bd      	mov	sp, r7
740004cc:	bc80      	pop	{r7}
740004ce:	4770      	bx	lr

740004d0 <MSS_WD_disable>:
 
  @return
    This function does not return a value.
 */
static __INLINE void MSS_WD_disable( void )
{
740004d0:	b480      	push	{r7}
740004d2:	af00      	add	r7, sp, #0
    WATCHDOG->WDOGENABLE = MSS_WDOG_DISABLE_KEY;
740004d4:	f246 0300 	movw	r3, #24576	; 0x6000
740004d8:	f2c4 0300 	movt	r3, #16384	; 0x4000
740004dc:	f245 52fa 	movw	r2, #22010	; 0x55fa
740004e0:	f6c4 426e 	movt	r2, #19566	; 0x4c6e
740004e4:	611a      	str	r2, [r3, #16]
}
740004e6:	46bd      	mov	sp, r7
740004e8:	bc80      	pop	{r7}
740004ea:	4770      	bx	lr

740004ec <main>:
char testString[] = "Fusion Says Hello\r\n";
/*-------------------------------------------------------------------------*//**
 * main() function.
 */
int main()
{
740004ec:	b580      	push	{r7, lr}
740004ee:	b082      	sub	sp, #8
740004f0:	af00      	add	r7, sp, #0


	volatile int32_t delay_count = 0;
740004f2:	f04f 0300 	mov.w	r3, #0
740004f6:	603b      	str	r3, [r7, #0]

   /*--------------------------------------------------------------------------
    * Disable watchdog.
    */
	MSS_WD_disable();
740004f8:	f7ff ffea 	bl	740004d0 <MSS_WD_disable>
    /*
     * Initialize MSS GPIOs.
     */
    MSS_GPIO_init();
740004fc:	f001 f950 	bl	740017a0 <MSS_GPIO_init>

    /*
     * Configure MSS GPIOs.
     */
    MSS_GPIO_config( MSS_GPIO_0 , MSS_GPIO_OUTPUT_MODE );
74000500:	f04f 0000 	mov.w	r0, #0
74000504:	f04f 0105 	mov.w	r1, #5
74000508:	f001 f980 	bl	7400180c <MSS_GPIO_config>
    MSS_GPIO_config( MSS_GPIO_1 , MSS_GPIO_OUTPUT_MODE );
7400050c:	f04f 0001 	mov.w	r0, #1
74000510:	f04f 0105 	mov.w	r1, #5
74000514:	f001 f97a 	bl	7400180c <MSS_GPIO_config>
    MSS_GPIO_config( MSS_GPIO_2 , MSS_GPIO_OUTPUT_MODE );
74000518:	f04f 0002 	mov.w	r0, #2
7400051c:	f04f 0105 	mov.w	r1, #5
74000520:	f001 f974 	bl	7400180c <MSS_GPIO_config>

    /*
     * Set initial delay used to blink the LED.
     */
    delay_count = DELAY_LOAD_VALUE;
74000524:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
74000528:	603b      	str	r3, [r7, #0]

    while (x != 0x55)
7400052a:	f240 0308 	movw	r3, #8
7400052e:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000532:	781b      	ldrb	r3, [r3, #0]
74000534:	2b55      	cmp	r3, #85	; 0x55
74000536:	d1f8      	bne.n	7400052a <main+0x3e>
74000538:	e000      	b.n	7400053c <main+0x50>
            gpio_pattern ^= 0xFFFFFFFF;
            MSS_GPIO_set_outputs( gpio_pattern );

            printf("%s This string is stored at %p\r\n",testString, &testString);
        }
    }
7400053a:	bf00      	nop
    {
        uint32_t gpio_pattern;
        /*
         * Decrement delay counter.
         */
        --delay_count;
7400053c:	683b      	ldr	r3, [r7, #0]
7400053e:	f103 33ff 	add.w	r3, r3, #4294967295
74000542:	603b      	str	r3, [r7, #0]

        /*
         * Check if delay expired.
         */
        if ( delay_count <= 0 )
74000544:	683b      	ldr	r3, [r7, #0]
74000546:	2b00      	cmp	r3, #0
74000548:	dcf7      	bgt.n	7400053a <main+0x4e>
        {
            /*
             * Reload delay counter.
             */
            delay_count = DELAY_LOAD_VALUE;
7400054a:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
7400054e:	603b      	str	r3, [r7, #0]

            /*
             * Toggle GPIO output pattern by doing an exclusive OR of all
             * pattern bits with ones.
             */
            gpio_pattern = MSS_GPIO_get_outputs();
74000550:	f7ff ffb2 	bl	740004b8 <MSS_GPIO_get_outputs>
74000554:	4603      	mov	r3, r0
74000556:	607b      	str	r3, [r7, #4]
            gpio_pattern ^= 0xFFFFFFFF;
74000558:	687b      	ldr	r3, [r7, #4]
7400055a:	ea6f 0303 	mvn.w	r3, r3
7400055e:	607b      	str	r3, [r7, #4]
            MSS_GPIO_set_outputs( gpio_pattern );
74000560:	6878      	ldr	r0, [r7, #4]
74000562:	f7ff ff99 	bl	74000498 <MSS_GPIO_set_outputs>

            printf("%s This string is stored at %p\r\n",testString, &testString);
74000566:	f248 1080 	movw	r0, #33152	; 0x8180
7400056a:	f2c7 4000 	movt	r0, #29696	; 0x7400
7400056e:	f240 010c 	movw	r1, #12
74000572:	f2c7 0100 	movt	r1, #28672	; 0x7000
74000576:	f240 020c 	movw	r2, #12
7400057a:	f2c7 0200 	movt	r2, #28672	; 0x7000
7400057e:	f001 fbe9 	bl	74001d54 <printf>
        }
    }
74000582:	e7db      	b.n	7400053c <main+0x50>

74000584 <_close>:

/*==============================================================================
 * Close a file.
 */
int _close(int file)
{
74000584:	b480      	push	{r7}
74000586:	b083      	sub	sp, #12
74000588:	af00      	add	r7, sp, #0
7400058a:	6078      	str	r0, [r7, #4]
    return -1;
7400058c:	f04f 33ff 	mov.w	r3, #4294967295
}
74000590:	4618      	mov	r0, r3
74000592:	f107 070c 	add.w	r7, r7, #12
74000596:	46bd      	mov	sp, r7
74000598:	bc80      	pop	{r7}
7400059a:	4770      	bx	lr

7400059c <_execve>:

/*==============================================================================
 * Transfer control to a new process.
 */
int _execve(char *name, char **argv, char **env)
{
7400059c:	b580      	push	{r7, lr}
7400059e:	b084      	sub	sp, #16
740005a0:	af00      	add	r7, sp, #0
740005a2:	60f8      	str	r0, [r7, #12]
740005a4:	60b9      	str	r1, [r7, #8]
740005a6:	607a      	str	r2, [r7, #4]
    errno = ENOMEM;
740005a8:	f001 fba6 	bl	74001cf8 <__errno>
740005ac:	4603      	mov	r3, r0
740005ae:	f04f 020c 	mov.w	r2, #12
740005b2:	601a      	str	r2, [r3, #0]
    return -1;
740005b4:	f04f 33ff 	mov.w	r3, #4294967295
}
740005b8:	4618      	mov	r0, r3
740005ba:	f107 0710 	add.w	r7, r7, #16
740005be:	46bd      	mov	sp, r7
740005c0:	bd80      	pop	{r7, pc}
740005c2:	bf00      	nop

740005c4 <_exit>:
{
	/* Should we force a system reset? */
	while( 1 )
	{
		;
	}
740005c4:	b480      	push	{r7}
740005c6:	b083      	sub	sp, #12
740005c8:	af00      	add	r7, sp, #0
740005ca:	6078      	str	r0, [r7, #4]
740005cc:	e7fe      	b.n	740005cc <_exit+0x8>
740005ce:	bf00      	nop

740005d0 <_fork>:

/*==============================================================================
 * Create a new process.
 */
int _fork(void)
{
740005d0:	b580      	push	{r7, lr}
740005d2:	af00      	add	r7, sp, #0
    errno = EAGAIN;
740005d4:	f001 fb90 	bl	74001cf8 <__errno>
740005d8:	4603      	mov	r3, r0
740005da:	f04f 020b 	mov.w	r2, #11
740005de:	601a      	str	r2, [r3, #0]
    return -1;
740005e0:	f04f 33ff 	mov.w	r3, #4294967295
}
740005e4:	4618      	mov	r0, r3
740005e6:	bd80      	pop	{r7, pc}

740005e8 <_fstat>:

/*==============================================================================
 * Status of an open file.
 */
int _fstat(int file, struct stat *st)
{
740005e8:	b480      	push	{r7}
740005ea:	b083      	sub	sp, #12
740005ec:	af00      	add	r7, sp, #0
740005ee:	6078      	str	r0, [r7, #4]
740005f0:	6039      	str	r1, [r7, #0]
    st->st_mode = S_IFCHR;
740005f2:	683b      	ldr	r3, [r7, #0]
740005f4:	f44f 5200 	mov.w	r2, #8192	; 0x2000
740005f8:	605a      	str	r2, [r3, #4]
    return 0;
740005fa:	f04f 0300 	mov.w	r3, #0
}
740005fe:	4618      	mov	r0, r3
74000600:	f107 070c 	add.w	r7, r7, #12
74000604:	46bd      	mov	sp, r7
74000606:	bc80      	pop	{r7}
74000608:	4770      	bx	lr
7400060a:	bf00      	nop

7400060c <_getpid>:

/*==============================================================================
 * Process-ID
 */
int _getpid(void)
{
7400060c:	b480      	push	{r7}
7400060e:	af00      	add	r7, sp, #0
    return 1;
74000610:	f04f 0301 	mov.w	r3, #1
}
74000614:	4618      	mov	r0, r3
74000616:	46bd      	mov	sp, r7
74000618:	bc80      	pop	{r7}
7400061a:	4770      	bx	lr

7400061c <_isatty>:

/*==============================================================================
 * Query whether output stream is a terminal.
 */
int _isatty(int file)
{
7400061c:	b480      	push	{r7}
7400061e:	b083      	sub	sp, #12
74000620:	af00      	add	r7, sp, #0
74000622:	6078      	str	r0, [r7, #4]
    return 1;
74000624:	f04f 0301 	mov.w	r3, #1
}
74000628:	4618      	mov	r0, r3
7400062a:	f107 070c 	add.w	r7, r7, #12
7400062e:	46bd      	mov	sp, r7
74000630:	bc80      	pop	{r7}
74000632:	4770      	bx	lr

74000634 <_kill>:

/*==============================================================================
 * Send a signal.
 */
int _kill(int pid, int sig)
{
74000634:	b580      	push	{r7, lr}
74000636:	b082      	sub	sp, #8
74000638:	af00      	add	r7, sp, #0
7400063a:	6078      	str	r0, [r7, #4]
7400063c:	6039      	str	r1, [r7, #0]
    errno = EINVAL;
7400063e:	f001 fb5b 	bl	74001cf8 <__errno>
74000642:	4603      	mov	r3, r0
74000644:	f04f 0216 	mov.w	r2, #22
74000648:	601a      	str	r2, [r3, #0]
    return -1;
7400064a:	f04f 33ff 	mov.w	r3, #4294967295
}
7400064e:	4618      	mov	r0, r3
74000650:	f107 0708 	add.w	r7, r7, #8
74000654:	46bd      	mov	sp, r7
74000656:	bd80      	pop	{r7, pc}

74000658 <_link>:

/*==============================================================================
 * Establish a new name for an existing file.
 */
int _link(char *old, char *new)
{
74000658:	b580      	push	{r7, lr}
7400065a:	b082      	sub	sp, #8
7400065c:	af00      	add	r7, sp, #0
7400065e:	6078      	str	r0, [r7, #4]
74000660:	6039      	str	r1, [r7, #0]
    errno = EMLINK;
74000662:	f001 fb49 	bl	74001cf8 <__errno>
74000666:	4603      	mov	r3, r0
74000668:	f04f 021f 	mov.w	r2, #31
7400066c:	601a      	str	r2, [r3, #0]
    return -1;
7400066e:	f04f 33ff 	mov.w	r3, #4294967295
}
74000672:	4618      	mov	r0, r3
74000674:	f107 0708 	add.w	r7, r7, #8
74000678:	46bd      	mov	sp, r7
7400067a:	bd80      	pop	{r7, pc}

7400067c <_lseek>:

/*==============================================================================
 * Set position in a file.
 */
int _lseek(int file, int ptr, int dir)
{
7400067c:	b480      	push	{r7}
7400067e:	b085      	sub	sp, #20
74000680:	af00      	add	r7, sp, #0
74000682:	60f8      	str	r0, [r7, #12]
74000684:	60b9      	str	r1, [r7, #8]
74000686:	607a      	str	r2, [r7, #4]
    return 0;
74000688:	f04f 0300 	mov.w	r3, #0
}
7400068c:	4618      	mov	r0, r3
7400068e:	f107 0714 	add.w	r7, r7, #20
74000692:	46bd      	mov	sp, r7
74000694:	bc80      	pop	{r7}
74000696:	4770      	bx	lr

74000698 <_open>:

/*==============================================================================
 * Open a file.
 */
int _open(const char *name, int flags, int mode)
{
74000698:	b480      	push	{r7}
7400069a:	b085      	sub	sp, #20
7400069c:	af00      	add	r7, sp, #0
7400069e:	60f8      	str	r0, [r7, #12]
740006a0:	60b9      	str	r1, [r7, #8]
740006a2:	607a      	str	r2, [r7, #4]
    return -1;
740006a4:	f04f 33ff 	mov.w	r3, #4294967295
}
740006a8:	4618      	mov	r0, r3
740006aa:	f107 0714 	add.w	r7, r7, #20
740006ae:	46bd      	mov	sp, r7
740006b0:	bc80      	pop	{r7}
740006b2:	4770      	bx	lr

740006b4 <_read>:

/*==============================================================================
 * Read from a file.
 */
int _read(int file, char *ptr, int len)
{
740006b4:	b480      	push	{r7}
740006b6:	b085      	sub	sp, #20
740006b8:	af00      	add	r7, sp, #0
740006ba:	60f8      	str	r0, [r7, #12]
740006bc:	60b9      	str	r1, [r7, #8]
740006be:	607a      	str	r2, [r7, #4]
    return 0;
740006c0:	f04f 0300 	mov.w	r3, #0
}
740006c4:	4618      	mov	r0, r3
740006c6:	f107 0714 	add.w	r7, r7, #20
740006ca:	46bd      	mov	sp, r7
740006cc:	bc80      	pop	{r7}
740006ce:	4770      	bx	lr

740006d0 <_write_r>:
 * all files, including stdoutso if you need to generate any output, for
 * example to a serial port for debugging, you should make your minimal write
 * capable of doing this.
 */
int _write_r( void * reent, int file, char * ptr, int len )
{
740006d0:	b580      	push	{r7, lr}
740006d2:	b084      	sub	sp, #16
740006d4:	af00      	add	r7, sp, #0
740006d6:	60f8      	str	r0, [r7, #12]
740006d8:	60b9      	str	r1, [r7, #8]
740006da:	607a      	str	r2, [r7, #4]
740006dc:	603b      	str	r3, [r7, #0]
#ifdef ACTEL_STDIO_THRU_UART
    /*--------------------------------------------------------------------------
     * Initialize the UART driver if it is the first time this function is
     * called.
     */
    if ( !g_stdio_uart_init_done )
740006de:	f240 5354 	movw	r3, #1364	; 0x554
740006e2:	f2c7 0300 	movt	r3, #28672	; 0x7000
740006e6:	681b      	ldr	r3, [r3, #0]
740006e8:	2b00      	cmp	r3, #0
740006ea:	d110      	bne.n	7400070e <_write_r+0x3e>
    {
        MSS_UART_init( &g_mss_uart0, ACTEL_STDIO_BAUD_RATE, (MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY));
740006ec:	f240 50c8 	movw	r0, #1480	; 0x5c8
740006f0:	f2c7 0000 	movt	r0, #28672	; 0x7000
740006f4:	f44f 4161 	mov.w	r1, #57600	; 0xe100
740006f8:	f04f 0203 	mov.w	r2, #3
740006fc:	f000 f8fa 	bl	740008f4 <MSS_UART_init>
        g_stdio_uart_init_done = 1;
74000700:	f240 5354 	movw	r3, #1364	; 0x554
74000704:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000708:	f04f 0201 	mov.w	r2, #1
7400070c:	601a      	str	r2, [r3, #0]
    }
    
    /*--------------------------------------------------------------------------
     * Output text to the UART.
     */
    MSS_UART_polled_tx( &g_mss_uart0, (uint8_t *)ptr, len );
7400070e:	683b      	ldr	r3, [r7, #0]
74000710:	f240 50c8 	movw	r0, #1480	; 0x5c8
74000714:	f2c7 0000 	movt	r0, #28672	; 0x7000
74000718:	6879      	ldr	r1, [r7, #4]
7400071a:	461a      	mov	r2, r3
7400071c:	f000 f9e6 	bl	74000aec <MSS_UART_polled_tx>
    
    return len;
74000720:	683b      	ldr	r3, [r7, #0]
#else   /* ACTEL_STDIO_THRU_UART */
    return 0;
#endif  /* ACTEL_STDIO_THRU_UART */
}
74000722:	4618      	mov	r0, r3
74000724:	f107 0710 	add.w	r7, r7, #16
74000728:	46bd      	mov	sp, r7
7400072a:	bd80      	pop	{r7, pc}

7400072c <_sbrk>:
 * it is useful to have a working implementation. The following suffices for a
 * standalone system; it exploits the symbol _end automatically defined by the
 * GNU linker. 
 */
caddr_t _sbrk(int incr)
{
7400072c:	b580      	push	{r7, lr}
7400072e:	b084      	sub	sp, #16
74000730:	af00      	add	r7, sp, #0
74000732:	6078      	str	r0, [r7, #4]
    extern char _end;		/* Defined by the linker */
    static char *heap_end;
    char *prev_heap_end;
    char * stack_ptr;
    
    if (heap_end == 0)
74000734:	f240 535c 	movw	r3, #1372	; 0x55c
74000738:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400073c:	681b      	ldr	r3, [r3, #0]
7400073e:	2b00      	cmp	r3, #0
74000740:	d108      	bne.n	74000754 <_sbrk+0x28>
    {
      heap_end = &_end;
74000742:	f240 535c 	movw	r3, #1372	; 0x55c
74000746:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400074a:	f240 52f8 	movw	r2, #1528	; 0x5f8
7400074e:	f2c7 0200 	movt	r2, #28672	; 0x7000
74000752:	601a      	str	r2, [r3, #0]
    }
    
    prev_heap_end = heap_end;
74000754:	f240 535c 	movw	r3, #1372	; 0x55c
74000758:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400075c:	681b      	ldr	r3, [r3, #0]
7400075e:	60bb      	str	r3, [r7, #8]
    asm volatile ("MRS %0, msp" : "=r" (stack_ptr) );
74000760:	f3ef 8308 	mrs	r3, MSP
74000764:	60fb      	str	r3, [r7, #12]
    if (heap_end + incr > stack_ptr)
74000766:	f240 535c 	movw	r3, #1372	; 0x55c
7400076a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400076e:	681a      	ldr	r2, [r3, #0]
74000770:	687b      	ldr	r3, [r7, #4]
74000772:	441a      	add	r2, r3
74000774:	68fb      	ldr	r3, [r7, #12]
74000776:	429a      	cmp	r2, r3
74000778:	d90f      	bls.n	7400079a <_sbrk+0x6e>
    {
      _write_r ((void *)0, 1, "Heap and stack collision\n", 25);
7400077a:	f04f 0000 	mov.w	r0, #0
7400077e:	f04f 0101 	mov.w	r1, #1
74000782:	f248 12a4 	movw	r2, #33188	; 0x81a4
74000786:	f2c7 4200 	movt	r2, #29696	; 0x7400
7400078a:	f04f 0319 	mov.w	r3, #25
7400078e:	f7ff ff9f 	bl	740006d0 <_write_r>
      _exit (1);
74000792:	f04f 0001 	mov.w	r0, #1
74000796:	f7ff ff15 	bl	740005c4 <_exit>
    }
  
    heap_end += incr;
7400079a:	f240 535c 	movw	r3, #1372	; 0x55c
7400079e:	f2c7 0300 	movt	r3, #28672	; 0x7000
740007a2:	681a      	ldr	r2, [r3, #0]
740007a4:	687b      	ldr	r3, [r7, #4]
740007a6:	441a      	add	r2, r3
740007a8:	f240 535c 	movw	r3, #1372	; 0x55c
740007ac:	f2c7 0300 	movt	r3, #28672	; 0x7000
740007b0:	601a      	str	r2, [r3, #0]
    return (caddr_t) prev_heap_end;
740007b2:	68bb      	ldr	r3, [r7, #8]
}
740007b4:	4618      	mov	r0, r3
740007b6:	f107 0710 	add.w	r7, r7, #16
740007ba:	46bd      	mov	sp, r7
740007bc:	bd80      	pop	{r7, pc}
740007be:	bf00      	nop

740007c0 <_stat>:

/*==============================================================================
 * Status of a file (by name).
 */
int _stat(char *file, struct stat *st)
{
740007c0:	b480      	push	{r7}
740007c2:	b083      	sub	sp, #12
740007c4:	af00      	add	r7, sp, #0
740007c6:	6078      	str	r0, [r7, #4]
740007c8:	6039      	str	r1, [r7, #0]
    st->st_mode = S_IFCHR;
740007ca:	683b      	ldr	r3, [r7, #0]
740007cc:	f44f 5200 	mov.w	r2, #8192	; 0x2000
740007d0:	605a      	str	r2, [r3, #4]
    return 0;
740007d2:	f04f 0300 	mov.w	r3, #0
}
740007d6:	4618      	mov	r0, r3
740007d8:	f107 070c 	add.w	r7, r7, #12
740007dc:	46bd      	mov	sp, r7
740007de:	bc80      	pop	{r7}
740007e0:	4770      	bx	lr
740007e2:	bf00      	nop

740007e4 <_times>:

/*==============================================================================
 * Timing information for current process.
 */
int _times(struct tms *buf)
{
740007e4:	b480      	push	{r7}
740007e6:	b083      	sub	sp, #12
740007e8:	af00      	add	r7, sp, #0
740007ea:	6078      	str	r0, [r7, #4]
    return -1;
740007ec:	f04f 33ff 	mov.w	r3, #4294967295
}
740007f0:	4618      	mov	r0, r3
740007f2:	f107 070c 	add.w	r7, r7, #12
740007f6:	46bd      	mov	sp, r7
740007f8:	bc80      	pop	{r7}
740007fa:	4770      	bx	lr

740007fc <_unlink>:

/*==============================================================================
 * Remove a file's directory entry.
 */
int _unlink(char *name)
{
740007fc:	b580      	push	{r7, lr}
740007fe:	b082      	sub	sp, #8
74000800:	af00      	add	r7, sp, #0
74000802:	6078      	str	r0, [r7, #4]
    errno = ENOENT;
74000804:	f001 fa78 	bl	74001cf8 <__errno>
74000808:	4603      	mov	r3, r0
7400080a:	f04f 0202 	mov.w	r2, #2
7400080e:	601a      	str	r2, [r3, #0]
    return -1;
74000810:	f04f 33ff 	mov.w	r3, #4294967295
}
74000814:	4618      	mov	r0, r3
74000816:	f107 0708 	add.w	r7, r7, #8
7400081a:	46bd      	mov	sp, r7
7400081c:	bd80      	pop	{r7, pc}
7400081e:	bf00      	nop

74000820 <_wait>:

/*==============================================================================
 * Wait for a child process.
 */
int _wait(int *status)
{
74000820:	b580      	push	{r7, lr}
74000822:	b082      	sub	sp, #8
74000824:	af00      	add	r7, sp, #0
74000826:	6078      	str	r0, [r7, #4]
    errno = ECHILD;
74000828:	f001 fa66 	bl	74001cf8 <__errno>
7400082c:	4603      	mov	r3, r0
7400082e:	f04f 020a 	mov.w	r2, #10
74000832:	601a      	str	r2, [r3, #0]
    return -1;
74000834:	f04f 33ff 	mov.w	r3, #4294967295
}
74000838:	4618      	mov	r0, r3
7400083a:	f107 0708 	add.w	r7, r7, #8
7400083e:	46bd      	mov	sp, r7
74000840:	bd80      	pop	{r7, pc}
74000842:	bf00      	nop

74000844 <NVIC_EnableIRQ>:
 *
 * Enable a device specific interupt in the NVIC interrupt controller.
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
74000844:	b480      	push	{r7}
74000846:	b083      	sub	sp, #12
74000848:	af00      	add	r7, sp, #0
7400084a:	4603      	mov	r3, r0
7400084c:	80fb      	strh	r3, [r7, #6]
  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
7400084e:	f24e 1300 	movw	r3, #57600	; 0xe100
74000852:	f2ce 0300 	movt	r3, #57344	; 0xe000
74000856:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
7400085a:	ea4f 1252 	mov.w	r2, r2, lsr #5
7400085e:	88f9      	ldrh	r1, [r7, #6]
74000860:	f001 011f 	and.w	r1, r1, #31
74000864:	f04f 0001 	mov.w	r0, #1
74000868:	fa00 f101 	lsl.w	r1, r0, r1
7400086c:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
74000870:	f107 070c 	add.w	r7, r7, #12
74000874:	46bd      	mov	sp, r7
74000876:	bc80      	pop	{r7}
74000878:	4770      	bx	lr
7400087a:	bf00      	nop

7400087c <NVIC_DisableIRQ>:
 * 
 * Disable a device specific interupt in the NVIC interrupt controller.
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
7400087c:	b480      	push	{r7}
7400087e:	b083      	sub	sp, #12
74000880:	af00      	add	r7, sp, #0
74000882:	4603      	mov	r3, r0
74000884:	80fb      	strh	r3, [r7, #6]
  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
74000886:	f24e 1300 	movw	r3, #57600	; 0xe100
7400088a:	f2ce 0300 	movt	r3, #57344	; 0xe000
7400088e:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
74000892:	ea4f 1252 	mov.w	r2, r2, lsr #5
74000896:	88f9      	ldrh	r1, [r7, #6]
74000898:	f001 011f 	and.w	r1, r1, #31
7400089c:	f04f 0001 	mov.w	r0, #1
740008a0:	fa00 f101 	lsl.w	r1, r0, r1
740008a4:	f102 0220 	add.w	r2, r2, #32
740008a8:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
740008ac:	f107 070c 	add.w	r7, r7, #12
740008b0:	46bd      	mov	sp, r7
740008b2:	bc80      	pop	{r7}
740008b4:	4770      	bx	lr
740008b6:	bf00      	nop

740008b8 <NVIC_ClearPendingIRQ>:
 *
 * Clear the pending bit for the specified interrupt. 
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
740008b8:	b480      	push	{r7}
740008ba:	b083      	sub	sp, #12
740008bc:	af00      	add	r7, sp, #0
740008be:	4603      	mov	r3, r0
740008c0:	80fb      	strh	r3, [r7, #6]
  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
740008c2:	f24e 1300 	movw	r3, #57600	; 0xe100
740008c6:	f2ce 0300 	movt	r3, #57344	; 0xe000
740008ca:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
740008ce:	ea4f 1252 	mov.w	r2, r2, lsr #5
740008d2:	88f9      	ldrh	r1, [r7, #6]
740008d4:	f001 011f 	and.w	r1, r1, #31
740008d8:	f04f 0001 	mov.w	r0, #1
740008dc:	fa00 f101 	lsl.w	r1, r0, r1
740008e0:	f102 0260 	add.w	r2, r2, #96	; 0x60
740008e4:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
740008e8:	f107 070c 	add.w	r7, r7, #12
740008ec:	46bd      	mov	sp, r7
740008ee:	bc80      	pop	{r7}
740008f0:	4770      	bx	lr
740008f2:	bf00      	nop

740008f4 <MSS_UART_init>:
(
    mss_uart_instance_t* this_uart,
    uint32_t baud_rate,
    uint8_t line_config
)
{
740008f4:	b580      	push	{r7, lr}
740008f6:	b086      	sub	sp, #24
740008f8:	af00      	add	r7, sp, #0
740008fa:	60f8      	str	r0, [r7, #12]
740008fc:	60b9      	str	r1, [r7, #8]
740008fe:	4613      	mov	r3, r2
74000900:	71fb      	strb	r3, [r7, #7]
    uint16_t baud_value;
    uint32_t pclk_freq;

    /* The driver expects g_mss_uart0 and g_mss_uart1 to be the only
     * mss_uart_instance_t instances used to identify UART0 and UART1. */
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000902:	68fa      	ldr	r2, [r7, #12]
74000904:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000908:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400090c:	429a      	cmp	r2, r3
7400090e:	d007      	beq.n	74000920 <MSS_UART_init+0x2c>
74000910:	68fa      	ldr	r2, [r7, #12]
74000912:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000916:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400091a:	429a      	cmp	r2, r3
7400091c:	d000      	beq.n	74000920 <MSS_UART_init+0x2c>
7400091e:	be00      	bkpt	0x0000

    /* Force the value of the CMSIS global variables holding the various system
     * clock frequencies to be updated. */
    SystemCoreClockUpdate();
74000920:	f001 f8ce 	bl	74001ac0 <SystemCoreClockUpdate>

    if ( this_uart == &g_mss_uart0 )
74000924:	68fa      	ldr	r2, [r7, #12]
74000926:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400092a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400092e:	429a      	cmp	r2, r3
74000930:	d12e      	bne.n	74000990 <MSS_UART_init+0x9c>
    {
        this_uart->hw_reg = UART0;
74000932:	68fb      	ldr	r3, [r7, #12]
74000934:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
74000938:	601a      	str	r2, [r3, #0]
        this_uart->hw_reg_bit = UART0_BITBAND;
7400093a:	68fb      	ldr	r3, [r7, #12]
7400093c:	f04f 4284 	mov.w	r2, #1107296256	; 0x42000000
74000940:	605a      	str	r2, [r3, #4]
        this_uart->irqn = UART0_IRQn;
74000942:	68fb      	ldr	r3, [r7, #12]
74000944:	f04f 020a 	mov.w	r2, #10
74000948:	811a      	strh	r2, [r3, #8]

        pclk_freq = g_FrequencyPCLK0;
7400094a:	f240 032c 	movw	r3, #44	; 0x2c
7400094e:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000952:	681b      	ldr	r3, [r3, #0]
74000954:	617b      	str	r3, [r7, #20]

        /* reset UART0 */
        SYSREG->SOFT_RST_CR |= SYSREG_UART0_SOFTRESET_MASK;
74000956:	f242 0300 	movw	r3, #8192	; 0x2000
7400095a:	f2ce 0304 	movt	r3, #57348	; 0xe004
7400095e:	f242 0200 	movw	r2, #8192	; 0x2000
74000962:	f2ce 0204 	movt	r2, #57348	; 0xe004
74000966:	6b12      	ldr	r2, [r2, #48]	; 0x30
74000968:	f042 0280 	orr.w	r2, r2, #128	; 0x80
7400096c:	631a      	str	r2, [r3, #48]	; 0x30
        /* Clear any previously pended UART0 interrupt */
        NVIC_ClearPendingIRQ( UART0_IRQn );
7400096e:	f04f 000a 	mov.w	r0, #10
74000972:	f7ff ffa1 	bl	740008b8 <NVIC_ClearPendingIRQ>
        /* Take UART0 out of reset. */
        SYSREG->SOFT_RST_CR &= ~SYSREG_UART0_SOFTRESET_MASK;
74000976:	f242 0300 	movw	r3, #8192	; 0x2000
7400097a:	f2ce 0304 	movt	r3, #57348	; 0xe004
7400097e:	f242 0200 	movw	r2, #8192	; 0x2000
74000982:	f2ce 0204 	movt	r2, #57348	; 0xe004
74000986:	6b12      	ldr	r2, [r2, #48]	; 0x30
74000988:	f022 0280 	bic.w	r2, r2, #128	; 0x80
7400098c:	631a      	str	r2, [r3, #48]	; 0x30
7400098e:	e031      	b.n	740009f4 <MSS_UART_init+0x100>
    }
    else
    {
        this_uart->hw_reg = UART1;
74000990:	68fa      	ldr	r2, [r7, #12]
74000992:	f240 0300 	movw	r3, #0
74000996:	f2c4 0301 	movt	r3, #16385	; 0x4001
7400099a:	6013      	str	r3, [r2, #0]
        this_uart->hw_reg_bit = UART1_BITBAND;
7400099c:	68fa      	ldr	r2, [r7, #12]
7400099e:	f240 0300 	movw	r3, #0
740009a2:	f2c4 2320 	movt	r3, #16928	; 0x4220
740009a6:	6053      	str	r3, [r2, #4]
        this_uart->irqn = UART1_IRQn;
740009a8:	68fb      	ldr	r3, [r7, #12]
740009aa:	f04f 020b 	mov.w	r2, #11
740009ae:	811a      	strh	r2, [r3, #8]

        pclk_freq = g_FrequencyPCLK1;
740009b0:	f240 0330 	movw	r3, #48	; 0x30
740009b4:	f2c7 0300 	movt	r3, #28672	; 0x7000
740009b8:	681b      	ldr	r3, [r3, #0]
740009ba:	617b      	str	r3, [r7, #20]

        /* Reset UART1 */
        SYSREG->SOFT_RST_CR |= SYSREG_UART1_SOFTRESET_MASK;
740009bc:	f242 0300 	movw	r3, #8192	; 0x2000
740009c0:	f2ce 0304 	movt	r3, #57348	; 0xe004
740009c4:	f242 0200 	movw	r2, #8192	; 0x2000
740009c8:	f2ce 0204 	movt	r2, #57348	; 0xe004
740009cc:	6b12      	ldr	r2, [r2, #48]	; 0x30
740009ce:	f442 7280 	orr.w	r2, r2, #256	; 0x100
740009d2:	631a      	str	r2, [r3, #48]	; 0x30
        /* Clear any previously pended UART1 interrupt */
        NVIC_ClearPendingIRQ( UART1_IRQn );
740009d4:	f04f 000b 	mov.w	r0, #11
740009d8:	f7ff ff6e 	bl	740008b8 <NVIC_ClearPendingIRQ>
        /* Take UART1 out of reset. */
        SYSREG->SOFT_RST_CR &= ~SYSREG_UART1_SOFTRESET_MASK;
740009dc:	f242 0300 	movw	r3, #8192	; 0x2000
740009e0:	f2ce 0304 	movt	r3, #57348	; 0xe004
740009e4:	f242 0200 	movw	r2, #8192	; 0x2000
740009e8:	f2ce 0204 	movt	r2, #57348	; 0xe004
740009ec:	6b12      	ldr	r2, [r2, #48]	; 0x30
740009ee:	f422 7280 	bic.w	r2, r2, #256	; 0x100
740009f2:	631a      	str	r2, [r3, #48]	; 0x30
    }

    /* disable interrupts */
    this_uart->hw_reg->IER = 0U;
740009f4:	68fb      	ldr	r3, [r7, #12]
740009f6:	681b      	ldr	r3, [r3, #0]
740009f8:	f04f 0200 	mov.w	r2, #0
740009fc:	711a      	strb	r2, [r3, #4]
     * The baud value is computed using the following equation:
     *      baud_value = PCLK_Frequency / (baud_rate * 16)
     * The baud value is rounded up or down depending on what would be the remainder
     * of the divide by 16 operation.
     */
    baud_value = (uint16_t)(pclk_freq / baud_rate);
740009fe:	697a      	ldr	r2, [r7, #20]
74000a00:	68bb      	ldr	r3, [r7, #8]
74000a02:	fbb2 f3f3 	udiv	r3, r2, r3
74000a06:	827b      	strh	r3, [r7, #18]
    if ( baud_value & 0x00000008U )
74000a08:	8a7b      	ldrh	r3, [r7, #18]
74000a0a:	f003 0308 	and.w	r3, r3, #8
74000a0e:	2b00      	cmp	r3, #0
74000a10:	d007      	beq.n	74000a22 <MSS_UART_init+0x12e>
    {
        /* remainder above 0.5 */
        baud_value = (baud_value >> 4U) + 1U;
74000a12:	8a7b      	ldrh	r3, [r7, #18]
74000a14:	ea4f 1313 	mov.w	r3, r3, lsr #4
74000a18:	b29b      	uxth	r3, r3
74000a1a:	f103 0301 	add.w	r3, r3, #1
74000a1e:	827b      	strh	r3, [r7, #18]
74000a20:	e003      	b.n	74000a2a <MSS_UART_init+0x136>
    }
    else
    {
        /* remainder below 0.5 */
        baud_value = (baud_value >> 4U);
74000a22:	8a7b      	ldrh	r3, [r7, #18]
74000a24:	ea4f 1313 	mov.w	r3, r3, lsr #4
74000a28:	827b      	strh	r3, [r7, #18]
    }

    /* set divisor latch */
    this_uart->hw_reg_bit->LCR_DLAB = (uint32_t)1;
74000a2a:	68fb      	ldr	r3, [r7, #12]
74000a2c:	685b      	ldr	r3, [r3, #4]
74000a2e:	f04f 0201 	mov.w	r2, #1
74000a32:	f8c3 219c 	str.w	r2, [r3, #412]	; 0x19c

    /* msb of baud value */
    this_uart->hw_reg->DMR = (uint8_t)(baud_value >> 8);
74000a36:	68fb      	ldr	r3, [r7, #12]
74000a38:	681b      	ldr	r3, [r3, #0]
74000a3a:	8a7a      	ldrh	r2, [r7, #18]
74000a3c:	ea4f 2212 	mov.w	r2, r2, lsr #8
74000a40:	b292      	uxth	r2, r2
74000a42:	b2d2      	uxtb	r2, r2
74000a44:	711a      	strb	r2, [r3, #4]
    /* lsb of baud value */
    this_uart->hw_reg->DLR = (uint8_t)baud_value;
74000a46:	68fb      	ldr	r3, [r7, #12]
74000a48:	681b      	ldr	r3, [r3, #0]
74000a4a:	8a7a      	ldrh	r2, [r7, #18]
74000a4c:	b2d2      	uxtb	r2, r2
74000a4e:	701a      	strb	r2, [r3, #0]

    /* reset divisor latch */
    this_uart->hw_reg_bit->LCR_DLAB = (uint32_t)0;
74000a50:	68fb      	ldr	r3, [r7, #12]
74000a52:	685b      	ldr	r3, [r3, #4]
74000a54:	f04f 0200 	mov.w	r2, #0
74000a58:	f8c3 219c 	str.w	r2, [r3, #412]	; 0x19c

    /* set the line control register (bit length, stop bits, parity) */
    this_uart->hw_reg->LCR = line_config;
74000a5c:	68fb      	ldr	r3, [r7, #12]
74000a5e:	681b      	ldr	r3, [r3, #0]
74000a60:	79fa      	ldrb	r2, [r7, #7]
74000a62:	731a      	strb	r2, [r3, #12]

    /* FIFO configuration */
    this_uart->hw_reg->FCR = (uint8_t)MSS_UART_FIFO_SINGLE_BYTE;
74000a64:	68fb      	ldr	r3, [r7, #12]
74000a66:	681b      	ldr	r3, [r3, #0]
74000a68:	f04f 0200 	mov.w	r2, #0
74000a6c:	721a      	strb	r2, [r3, #8]
    /* clear receiver FIFO */
    this_uart->hw_reg_bit->FCR_CLEAR_RX_FIFO = (uint32_t)1;
74000a6e:	68fb      	ldr	r3, [r7, #12]
74000a70:	685b      	ldr	r3, [r3, #4]
74000a72:	f04f 0201 	mov.w	r2, #1
74000a76:	f8c3 2104 	str.w	r2, [r3, #260]	; 0x104
    /* clear transmitter FIFO */
    this_uart->hw_reg_bit->FCR_CLEAR_TX_FIFO = (uint32_t)1;
74000a7a:	68fb      	ldr	r3, [r7, #12]
74000a7c:	685b      	ldr	r3, [r3, #4]
74000a7e:	f04f 0201 	mov.w	r2, #1
74000a82:	f8c3 2108 	str.w	r2, [r3, #264]	; 0x108
    /* enable RXRDYN and TXRDYN pins. The earlier FCR write to set the TX FIFO
     * trigger level inadvertently disabled the FCR_RXRDY_TXRDYN_EN bit. */
    this_uart->hw_reg_bit->FCR_RXRDY_TXRDYN_EN = (uint32_t)1;
74000a86:	68fb      	ldr	r3, [r7, #12]
74000a88:	685b      	ldr	r3, [r3, #4]
74000a8a:	f04f 0201 	mov.w	r2, #1
74000a8e:	f8c3 210c 	str.w	r2, [r3, #268]	; 0x10c

    /* disable loopback */
    this_uart->hw_reg_bit->MCR_LOOP = (uint32_t)0;
74000a92:	68fb      	ldr	r3, [r7, #12]
74000a94:	685b      	ldr	r3, [r3, #4]
74000a96:	f04f 0200 	mov.w	r2, #0
74000a9a:	f8c3 2210 	str.w	r2, [r3, #528]	; 0x210

    /* Instance setup */
    this_uart->tx_buff_size = TX_COMPLETE;
74000a9e:	68fb      	ldr	r3, [r7, #12]
74000aa0:	f04f 0200 	mov.w	r2, #0
74000aa4:	611a      	str	r2, [r3, #16]
    this_uart->tx_buffer = (const uint8_t *)0;
74000aa6:	68fb      	ldr	r3, [r7, #12]
74000aa8:	f04f 0200 	mov.w	r2, #0
74000aac:	60da      	str	r2, [r3, #12]
    this_uart->tx_idx = 0U;
74000aae:	68fb      	ldr	r3, [r7, #12]
74000ab0:	f04f 0200 	mov.w	r2, #0
74000ab4:	615a      	str	r2, [r3, #20]

    /* Default handlers for MSS UART interrupts */
    this_uart->rx_handler       = NULL_HANDLER;
74000ab6:	68fb      	ldr	r3, [r7, #12]
74000ab8:	f04f 0200 	mov.w	r2, #0
74000abc:	61da      	str	r2, [r3, #28]
    this_uart->tx_handler       = default_tx_handler;
74000abe:	68fa      	ldr	r2, [r7, #12]
74000ac0:	f241 03dd 	movw	r3, #4317	; 0x10dd
74000ac4:	f2c7 4300 	movt	r3, #29696	; 0x7400
74000ac8:	6213      	str	r3, [r2, #32]
    this_uart->linests_handler  = NULL_HANDLER;
74000aca:	68fb      	ldr	r3, [r7, #12]
74000acc:	f04f 0200 	mov.w	r2, #0
74000ad0:	619a      	str	r2, [r3, #24]
    this_uart->modemsts_handler = NULL_HANDLER;
74000ad2:	68fb      	ldr	r3, [r7, #12]
74000ad4:	f04f 0200 	mov.w	r2, #0
74000ad8:	625a      	str	r2, [r3, #36]	; 0x24

    /* Initialize the sticky status */
    this_uart->status = 0U;
74000ada:	68fb      	ldr	r3, [r7, #12]
74000adc:	f04f 0200 	mov.w	r2, #0
74000ae0:	729a      	strb	r2, [r3, #10]
}
74000ae2:	f107 0718 	add.w	r7, r7, #24
74000ae6:	46bd      	mov	sp, r7
74000ae8:	bd80      	pop	{r7, pc}
74000aea:	bf00      	nop

74000aec <MSS_UART_polled_tx>:
(
    mss_uart_instance_t * this_uart,
    const uint8_t * pbuff,
    uint32_t tx_size
)
{
74000aec:	b480      	push	{r7}
74000aee:	b089      	sub	sp, #36	; 0x24
74000af0:	af00      	add	r7, sp, #0
74000af2:	60f8      	str	r0, [r7, #12]
74000af4:	60b9      	str	r1, [r7, #8]
74000af6:	607a      	str	r2, [r7, #4]
    uint32_t char_idx = 0U;
74000af8:	f04f 0300 	mov.w	r3, #0
74000afc:	613b      	str	r3, [r7, #16]
    uint32_t size_sent;
    uint8_t status;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000afe:	68fa      	ldr	r2, [r7, #12]
74000b00:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000b04:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000b08:	429a      	cmp	r2, r3
74000b0a:	d007      	beq.n	74000b1c <MSS_UART_polled_tx+0x30>
74000b0c:	68fa      	ldr	r2, [r7, #12]
74000b0e:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000b12:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000b16:	429a      	cmp	r2, r3
74000b18:	d000      	beq.n	74000b1c <MSS_UART_polled_tx+0x30>
74000b1a:	be00      	bkpt	0x0000
    ASSERT( pbuff != ( (uint8_t *)0 ) );
74000b1c:	68bb      	ldr	r3, [r7, #8]
74000b1e:	2b00      	cmp	r3, #0
74000b20:	d100      	bne.n	74000b24 <MSS_UART_polled_tx+0x38>
74000b22:	be00      	bkpt	0x0000
    ASSERT( tx_size > 0U );
74000b24:	687b      	ldr	r3, [r7, #4]
74000b26:	2b00      	cmp	r3, #0
74000b28:	d100      	bne.n	74000b2c <MSS_UART_polled_tx+0x40>
74000b2a:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74000b2c:	68fa      	ldr	r2, [r7, #12]
74000b2e:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000b32:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000b36:	429a      	cmp	r2, r3
74000b38:	d006      	beq.n	74000b48 <MSS_UART_polled_tx+0x5c>
74000b3a:	68fa      	ldr	r2, [r7, #12]
74000b3c:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000b40:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000b44:	429a      	cmp	r2, r3
74000b46:	d13d      	bne.n	74000bc4 <MSS_UART_polled_tx+0xd8>
74000b48:	68bb      	ldr	r3, [r7, #8]
74000b4a:	2b00      	cmp	r3, #0
74000b4c:	d03a      	beq.n	74000bc4 <MSS_UART_polled_tx+0xd8>
74000b4e:	687b      	ldr	r3, [r7, #4]
74000b50:	2b00      	cmp	r3, #0
74000b52:	d037      	beq.n	74000bc4 <MSS_UART_polled_tx+0xd8>
         /* Remain in this loop until the entire input buffer
          * has been transferred to the UART.
          */
        do {
            /* Read the Line Status Register and update the sticky record */
            status = this_uart->hw_reg->LSR;
74000b54:	68fb      	ldr	r3, [r7, #12]
74000b56:	681b      	ldr	r3, [r3, #0]
74000b58:	7d1b      	ldrb	r3, [r3, #20]
74000b5a:	76fb      	strb	r3, [r7, #27]
            this_uart->status |= status;
74000b5c:	68fb      	ldr	r3, [r7, #12]
74000b5e:	7a9a      	ldrb	r2, [r3, #10]
74000b60:	7efb      	ldrb	r3, [r7, #27]
74000b62:	ea42 0303 	orr.w	r3, r2, r3
74000b66:	b2da      	uxtb	r2, r3
74000b68:	68fb      	ldr	r3, [r7, #12]
74000b6a:	729a      	strb	r2, [r3, #10]

            /* Check if TX FIFO is empty. */
            if( status & MSS_UART_THRE )
74000b6c:	7efb      	ldrb	r3, [r7, #27]
74000b6e:	f003 0320 	and.w	r3, r3, #32
74000b72:	2b00      	cmp	r3, #0
74000b74:	d023      	beq.n	74000bbe <MSS_UART_polled_tx+0xd2>
            {
                uint32_t fill_size = TX_FIFO_SIZE;
74000b76:	f04f 0310 	mov.w	r3, #16
74000b7a:	61fb      	str	r3, [r7, #28]

                /* Calculate the number of bytes to transmit. */
                if ( tx_size < TX_FIFO_SIZE )
74000b7c:	687b      	ldr	r3, [r7, #4]
74000b7e:	2b0f      	cmp	r3, #15
74000b80:	d801      	bhi.n	74000b86 <MSS_UART_polled_tx+0x9a>
                {
                    fill_size = tx_size;
74000b82:	687b      	ldr	r3, [r7, #4]
74000b84:	61fb      	str	r3, [r7, #28]
                }

                /* Fill the TX FIFO with the calculated the number of bytes. */
                for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
74000b86:	f04f 0300 	mov.w	r3, #0
74000b8a:	617b      	str	r3, [r7, #20]
74000b8c:	e00e      	b.n	74000bac <MSS_UART_polled_tx+0xc0>
                {
                    /* Send next character in the buffer. */
                    this_uart->hw_reg->THR = pbuff[char_idx++];
74000b8e:	68fb      	ldr	r3, [r7, #12]
74000b90:	681b      	ldr	r3, [r3, #0]
74000b92:	68b9      	ldr	r1, [r7, #8]
74000b94:	693a      	ldr	r2, [r7, #16]
74000b96:	440a      	add	r2, r1
74000b98:	7812      	ldrb	r2, [r2, #0]
74000b9a:	701a      	strb	r2, [r3, #0]
74000b9c:	693b      	ldr	r3, [r7, #16]
74000b9e:	f103 0301 	add.w	r3, r3, #1
74000ba2:	613b      	str	r3, [r7, #16]
                {
                    fill_size = tx_size;
                }

                /* Fill the TX FIFO with the calculated the number of bytes. */
                for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
74000ba4:	697b      	ldr	r3, [r7, #20]
74000ba6:	f103 0301 	add.w	r3, r3, #1
74000baa:	617b      	str	r3, [r7, #20]
74000bac:	697a      	ldr	r2, [r7, #20]
74000bae:	69fb      	ldr	r3, [r7, #28]
74000bb0:	429a      	cmp	r2, r3
74000bb2:	d3ec      	bcc.n	74000b8e <MSS_UART_polled_tx+0xa2>
                    /* Send next character in the buffer. */
                    this_uart->hw_reg->THR = pbuff[char_idx++];
                }

                /* Calculate the number of untransmitted bytes remaining. */
                tx_size -= size_sent;
74000bb4:	687a      	ldr	r2, [r7, #4]
74000bb6:	697b      	ldr	r3, [r7, #20]
74000bb8:	ebc3 0302 	rsb	r3, r3, r2
74000bbc:	607b      	str	r3, [r7, #4]
            }
        }while( tx_size );
74000bbe:	687b      	ldr	r3, [r7, #4]
74000bc0:	2b00      	cmp	r3, #0
74000bc2:	d1c7      	bne.n	74000b54 <MSS_UART_polled_tx+0x68>
    }
}
74000bc4:	f107 0724 	add.w	r7, r7, #36	; 0x24
74000bc8:	46bd      	mov	sp, r7
74000bca:	bc80      	pop	{r7}
74000bcc:	4770      	bx	lr
74000bce:	bf00      	nop

74000bd0 <MSS_UART_polled_tx_string>:
MSS_UART_polled_tx_string
(
    mss_uart_instance_t * this_uart,
    const uint8_t * p_sz_string
)
{
74000bd0:	b480      	push	{r7}
74000bd2:	b087      	sub	sp, #28
74000bd4:	af00      	add	r7, sp, #0
74000bd6:	6078      	str	r0, [r7, #4]
74000bd8:	6039      	str	r1, [r7, #0]
    uint32_t char_idx = 0U;
74000bda:	f04f 0300 	mov.w	r3, #0
74000bde:	60bb      	str	r3, [r7, #8]
    uint32_t fill_size;
    uint_fast8_t data_byte;
    uint8_t status;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000be0:	687a      	ldr	r2, [r7, #4]
74000be2:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000be6:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000bea:	429a      	cmp	r2, r3
74000bec:	d007      	beq.n	74000bfe <MSS_UART_polled_tx_string+0x2e>
74000bee:	687a      	ldr	r2, [r7, #4]
74000bf0:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000bf4:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000bf8:	429a      	cmp	r2, r3
74000bfa:	d000      	beq.n	74000bfe <MSS_UART_polled_tx_string+0x2e>
74000bfc:	be00      	bkpt	0x0000
    ASSERT( p_sz_string != ( (uint8_t *)0 ) );
74000bfe:	683b      	ldr	r3, [r7, #0]
74000c00:	2b00      	cmp	r3, #0
74000c02:	d100      	bne.n	74000c06 <MSS_UART_polled_tx_string+0x36>
74000c04:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74000c06:	687a      	ldr	r2, [r7, #4]
74000c08:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000c0c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000c10:	429a      	cmp	r2, r3
74000c12:	d006      	beq.n	74000c22 <MSS_UART_polled_tx_string+0x52>
74000c14:	687a      	ldr	r2, [r7, #4]
74000c16:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000c1a:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000c1e:	429a      	cmp	r2, r3
74000c20:	d138      	bne.n	74000c94 <MSS_UART_polled_tx_string+0xc4>
74000c22:	683b      	ldr	r3, [r7, #0]
74000c24:	2b00      	cmp	r3, #0
74000c26:	d035      	beq.n	74000c94 <MSS_UART_polled_tx_string+0xc4>
          ( p_sz_string != ( (uint8_t *)0 ) ) )
    {
        /* Get the first data byte from the input buffer */
        data_byte = (uint_fast8_t)p_sz_string[char_idx];
74000c28:	683a      	ldr	r2, [r7, #0]
74000c2a:	68bb      	ldr	r3, [r7, #8]
74000c2c:	4413      	add	r3, r2
74000c2e:	781b      	ldrb	r3, [r3, #0]
74000c30:	613b      	str	r3, [r7, #16]

        /* First check for the NULL terminator byte.
         * Then remain in this loop until the entire string in the input buffer
         * has been transferred to the UART.
         */
        while ( 0U != data_byte )
74000c32:	e02c      	b.n	74000c8e <MSS_UART_polled_tx_string+0xbe>
        {
            /* Wait until TX FIFO is empty. */
            do {
                status = this_uart->hw_reg->LSR;
74000c34:	687b      	ldr	r3, [r7, #4]
74000c36:	681b      	ldr	r3, [r3, #0]
74000c38:	7d1b      	ldrb	r3, [r3, #20]
74000c3a:	75fb      	strb	r3, [r7, #23]
                this_uart->status |= status;
74000c3c:	687b      	ldr	r3, [r7, #4]
74000c3e:	7a9a      	ldrb	r2, [r3, #10]
74000c40:	7dfb      	ldrb	r3, [r7, #23]
74000c42:	ea42 0303 	orr.w	r3, r2, r3
74000c46:	b2da      	uxtb	r2, r3
74000c48:	687b      	ldr	r3, [r7, #4]
74000c4a:	729a      	strb	r2, [r3, #10]
            } while ( !( status & MSS_UART_THRE ) );
74000c4c:	7dfb      	ldrb	r3, [r7, #23]
74000c4e:	f003 0320 	and.w	r3, r3, #32
74000c52:	2b00      	cmp	r3, #0
74000c54:	d0ee      	beq.n	74000c34 <MSS_UART_polled_tx_string+0x64>

            /* Send bytes from the input buffer until the TX FIFO is full
             * or we reach the NULL terminator byte.
             */
            fill_size = 0U;
74000c56:	f04f 0300 	mov.w	r3, #0
74000c5a:	60fb      	str	r3, [r7, #12]
            while ( (0U != data_byte) && (fill_size < TX_FIFO_SIZE) )
74000c5c:	e011      	b.n	74000c82 <MSS_UART_polled_tx_string+0xb2>
            {
                /* Send the data byte */
                this_uart->hw_reg->THR = data_byte;
74000c5e:	687b      	ldr	r3, [r7, #4]
74000c60:	681b      	ldr	r3, [r3, #0]
74000c62:	693a      	ldr	r2, [r7, #16]
74000c64:	b2d2      	uxtb	r2, r2
74000c66:	701a      	strb	r2, [r3, #0]
                ++fill_size;
74000c68:	68fb      	ldr	r3, [r7, #12]
74000c6a:	f103 0301 	add.w	r3, r3, #1
74000c6e:	60fb      	str	r3, [r7, #12]
                char_idx++;
74000c70:	68bb      	ldr	r3, [r7, #8]
74000c72:	f103 0301 	add.w	r3, r3, #1
74000c76:	60bb      	str	r3, [r7, #8]
                /* Get the next data byte from the input buffer */
                data_byte = (uint_fast8_t)p_sz_string[char_idx];
74000c78:	683a      	ldr	r2, [r7, #0]
74000c7a:	68bb      	ldr	r3, [r7, #8]
74000c7c:	4413      	add	r3, r2
74000c7e:	781b      	ldrb	r3, [r3, #0]
74000c80:	613b      	str	r3, [r7, #16]

            /* Send bytes from the input buffer until the TX FIFO is full
             * or we reach the NULL terminator byte.
             */
            fill_size = 0U;
            while ( (0U != data_byte) && (fill_size < TX_FIFO_SIZE) )
74000c82:	693b      	ldr	r3, [r7, #16]
74000c84:	2b00      	cmp	r3, #0
74000c86:	d002      	beq.n	74000c8e <MSS_UART_polled_tx_string+0xbe>
74000c88:	68fb      	ldr	r3, [r7, #12]
74000c8a:	2b0f      	cmp	r3, #15
74000c8c:	d9e7      	bls.n	74000c5e <MSS_UART_polled_tx_string+0x8e>

        /* First check for the NULL terminator byte.
         * Then remain in this loop until the entire string in the input buffer
         * has been transferred to the UART.
         */
        while ( 0U != data_byte )
74000c8e:	693b      	ldr	r3, [r7, #16]
74000c90:	2b00      	cmp	r3, #0
74000c92:	d1cf      	bne.n	74000c34 <MSS_UART_polled_tx_string+0x64>
                /* Get the next data byte from the input buffer */
                data_byte = (uint_fast8_t)p_sz_string[char_idx];
            }
        }
    }
}
74000c94:	f107 071c 	add.w	r7, r7, #28
74000c98:	46bd      	mov	sp, r7
74000c9a:	bc80      	pop	{r7}
74000c9c:	4770      	bx	lr
74000c9e:	bf00      	nop

74000ca0 <MSS_UART_irq_tx>:
(
    mss_uart_instance_t * this_uart,
    const uint8_t * pbuff,
    uint32_t tx_size
)
{
74000ca0:	b580      	push	{r7, lr}
74000ca2:	b084      	sub	sp, #16
74000ca4:	af00      	add	r7, sp, #0
74000ca6:	60f8      	str	r0, [r7, #12]
74000ca8:	60b9      	str	r1, [r7, #8]
74000caa:	607a      	str	r2, [r7, #4]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000cac:	68fa      	ldr	r2, [r7, #12]
74000cae:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000cb2:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000cb6:	429a      	cmp	r2, r3
74000cb8:	d007      	beq.n	74000cca <MSS_UART_irq_tx+0x2a>
74000cba:	68fa      	ldr	r2, [r7, #12]
74000cbc:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000cc0:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000cc4:	429a      	cmp	r2, r3
74000cc6:	d000      	beq.n	74000cca <MSS_UART_irq_tx+0x2a>
74000cc8:	be00      	bkpt	0x0000
    ASSERT( pbuff != ((uint8_t *)0) );
74000cca:	68bb      	ldr	r3, [r7, #8]
74000ccc:	2b00      	cmp	r3, #0
74000cce:	d100      	bne.n	74000cd2 <MSS_UART_irq_tx+0x32>
74000cd0:	be00      	bkpt	0x0000
    ASSERT( tx_size > 0U );
74000cd2:	687b      	ldr	r3, [r7, #4]
74000cd4:	2b00      	cmp	r3, #0
74000cd6:	d100      	bne.n	74000cda <MSS_UART_irq_tx+0x3a>
74000cd8:	be00      	bkpt	0x0000

    if ( ( tx_size > 0U ) && ( pbuff != ((uint8_t *)0) ) &&
74000cda:	687b      	ldr	r3, [r7, #4]
74000cdc:	2b00      	cmp	r3, #0
74000cde:	d032      	beq.n	74000d46 <MSS_UART_irq_tx+0xa6>
74000ce0:	68bb      	ldr	r3, [r7, #8]
74000ce2:	2b00      	cmp	r3, #0
74000ce4:	d02f      	beq.n	74000d46 <MSS_UART_irq_tx+0xa6>
       ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) )
74000ce6:	68fa      	ldr	r2, [r7, #12]
74000ce8:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000cec:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000cf0:	429a      	cmp	r2, r3
74000cf2:	d006      	beq.n	74000d02 <MSS_UART_irq_tx+0x62>
74000cf4:	68fa      	ldr	r2, [r7, #12]
74000cf6:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000cfa:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000cfe:	429a      	cmp	r2, r3
74000d00:	d121      	bne.n	74000d46 <MSS_UART_irq_tx+0xa6>
    {
        /*Initialise the transmit info for the UART instance with the arguments.*/
        this_uart->tx_buffer = pbuff;
74000d02:	68fb      	ldr	r3, [r7, #12]
74000d04:	68ba      	ldr	r2, [r7, #8]
74000d06:	60da      	str	r2, [r3, #12]
        this_uart->tx_buff_size = tx_size;
74000d08:	68fb      	ldr	r3, [r7, #12]
74000d0a:	687a      	ldr	r2, [r7, #4]
74000d0c:	611a      	str	r2, [r3, #16]
        this_uart->tx_idx = (uint16_t)0;
74000d0e:	68fb      	ldr	r3, [r7, #12]
74000d10:	f04f 0200 	mov.w	r2, #0
74000d14:	615a      	str	r2, [r3, #20]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
74000d16:	68fb      	ldr	r3, [r7, #12]
74000d18:	891b      	ldrh	r3, [r3, #8]
74000d1a:	b21b      	sxth	r3, r3
74000d1c:	4618      	mov	r0, r3
74000d1e:	f7ff fdcb 	bl	740008b8 <NVIC_ClearPendingIRQ>

        /* assign default handler for data transfer */
        this_uart->tx_handler = default_tx_handler;
74000d22:	68fa      	ldr	r2, [r7, #12]
74000d24:	f241 03dd 	movw	r3, #4317	; 0x10dd
74000d28:	f2c7 4300 	movt	r3, #29696	; 0x7400
74000d2c:	6213      	str	r3, [r2, #32]

        /* enables TX interrupt */
        this_uart->hw_reg_bit->IER_ETBEI = (uint32_t)1;
74000d2e:	68fb      	ldr	r3, [r7, #12]
74000d30:	685b      	ldr	r3, [r3, #4]
74000d32:	f04f 0201 	mov.w	r2, #1
74000d36:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
74000d3a:	68fb      	ldr	r3, [r7, #12]
74000d3c:	891b      	ldrh	r3, [r3, #8]
74000d3e:	b21b      	sxth	r3, r3
74000d40:	4618      	mov	r0, r3
74000d42:	f7ff fd7f 	bl	74000844 <NVIC_EnableIRQ>
    }
}
74000d46:	f107 0710 	add.w	r7, r7, #16
74000d4a:	46bd      	mov	sp, r7
74000d4c:	bd80      	pop	{r7, pc}
74000d4e:	bf00      	nop

74000d50 <MSS_UART_tx_complete>:
int8_t
MSS_UART_tx_complete
(
    mss_uart_instance_t * this_uart
)
{
74000d50:	b480      	push	{r7}
74000d52:	b085      	sub	sp, #20
74000d54:	af00      	add	r7, sp, #0
74000d56:	6078      	str	r0, [r7, #4]
    int8_t ret_value = 0;
74000d58:	f04f 0300 	mov.w	r3, #0
74000d5c:	73bb      	strb	r3, [r7, #14]
    uint8_t status = 0U;
74000d5e:	f04f 0300 	mov.w	r3, #0
74000d62:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000d64:	687a      	ldr	r2, [r7, #4]
74000d66:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000d6a:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000d6e:	429a      	cmp	r2, r3
74000d70:	d007      	beq.n	74000d82 <MSS_UART_tx_complete+0x32>
74000d72:	687a      	ldr	r2, [r7, #4]
74000d74:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000d78:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000d7c:	429a      	cmp	r2, r3
74000d7e:	d000      	beq.n	74000d82 <MSS_UART_tx_complete+0x32>
74000d80:	be00      	bkpt	0x0000

    if ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
74000d82:	687a      	ldr	r2, [r7, #4]
74000d84:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000d88:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000d8c:	429a      	cmp	r2, r3
74000d8e:	d006      	beq.n	74000d9e <MSS_UART_tx_complete+0x4e>
74000d90:	687a      	ldr	r2, [r7, #4]
74000d92:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000d96:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000d9a:	429a      	cmp	r2, r3
74000d9c:	d117      	bne.n	74000dce <MSS_UART_tx_complete+0x7e>
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
74000d9e:	687b      	ldr	r3, [r7, #4]
74000da0:	681b      	ldr	r3, [r3, #0]
74000da2:	7d1b      	ldrb	r3, [r3, #20]
74000da4:	73fb      	strb	r3, [r7, #15]
        this_uart->status |= status;
74000da6:	687b      	ldr	r3, [r7, #4]
74000da8:	7a9a      	ldrb	r2, [r3, #10]
74000daa:	7bfb      	ldrb	r3, [r7, #15]
74000dac:	ea42 0303 	orr.w	r3, r2, r3
74000db0:	b2da      	uxtb	r2, r3
74000db2:	687b      	ldr	r3, [r7, #4]
74000db4:	729a      	strb	r2, [r3, #10]

        if ( ( TX_COMPLETE == this_uart->tx_buff_size ) &&
74000db6:	687b      	ldr	r3, [r7, #4]
74000db8:	691b      	ldr	r3, [r3, #16]
74000dba:	2b00      	cmp	r3, #0
74000dbc:	d107      	bne.n	74000dce <MSS_UART_tx_complete+0x7e>
             ( status & MSS_UART_TEMT ) )
74000dbe:	7bfb      	ldrb	r3, [r7, #15]
74000dc0:	f003 0340 	and.w	r3, r3, #64	; 0x40
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
        this_uart->status |= status;

        if ( ( TX_COMPLETE == this_uart->tx_buff_size ) &&
74000dc4:	2b00      	cmp	r3, #0
74000dc6:	d002      	beq.n	74000dce <MSS_UART_tx_complete+0x7e>
             ( status & MSS_UART_TEMT ) )
        {
            ret_value = (int8_t)1;
74000dc8:	f04f 0301 	mov.w	r3, #1
74000dcc:	73bb      	strb	r3, [r7, #14]
        }
    }
    return ret_value;
74000dce:	7bbb      	ldrb	r3, [r7, #14]
74000dd0:	b25b      	sxtb	r3, r3
}
74000dd2:	4618      	mov	r0, r3
74000dd4:	f107 0714 	add.w	r7, r7, #20
74000dd8:	46bd      	mov	sp, r7
74000dda:	bc80      	pop	{r7}
74000ddc:	4770      	bx	lr
74000dde:	bf00      	nop

74000de0 <MSS_UART_get_rx>:
(
    mss_uart_instance_t * this_uart,
    uint8_t * rx_buff,
    size_t buff_size
)
{
74000de0:	b480      	push	{r7}
74000de2:	b087      	sub	sp, #28
74000de4:	af00      	add	r7, sp, #0
74000de6:	60f8      	str	r0, [r7, #12]
74000de8:	60b9      	str	r1, [r7, #8]
74000dea:	607a      	str	r2, [r7, #4]
    size_t rx_size = 0U;
74000dec:	f04f 0300 	mov.w	r3, #0
74000df0:	613b      	str	r3, [r7, #16]
    uint8_t status = 0U;
74000df2:	f04f 0300 	mov.w	r3, #0
74000df6:	75fb      	strb	r3, [r7, #23]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000df8:	68fa      	ldr	r2, [r7, #12]
74000dfa:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000dfe:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000e02:	429a      	cmp	r2, r3
74000e04:	d007      	beq.n	74000e16 <MSS_UART_get_rx+0x36>
74000e06:	68fa      	ldr	r2, [r7, #12]
74000e08:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000e0c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000e10:	429a      	cmp	r2, r3
74000e12:	d000      	beq.n	74000e16 <MSS_UART_get_rx+0x36>
74000e14:	be00      	bkpt	0x0000
    ASSERT( rx_buff != ((uint8_t *)0) );
74000e16:	68bb      	ldr	r3, [r7, #8]
74000e18:	2b00      	cmp	r3, #0
74000e1a:	d100      	bne.n	74000e1e <MSS_UART_get_rx+0x3e>
74000e1c:	be00      	bkpt	0x0000
    ASSERT( buff_size > 0U );
74000e1e:	687b      	ldr	r3, [r7, #4]
74000e20:	2b00      	cmp	r3, #0
74000e22:	d100      	bne.n	74000e26 <MSS_UART_get_rx+0x46>
74000e24:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74000e26:	68fa      	ldr	r2, [r7, #12]
74000e28:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000e2c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000e30:	429a      	cmp	r2, r3
74000e32:	d006      	beq.n	74000e42 <MSS_UART_get_rx+0x62>
74000e34:	68fa      	ldr	r2, [r7, #12]
74000e36:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000e3a:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000e3e:	429a      	cmp	r2, r3
74000e40:	d134      	bne.n	74000eac <MSS_UART_get_rx+0xcc>
74000e42:	68bb      	ldr	r3, [r7, #8]
74000e44:	2b00      	cmp	r3, #0
74000e46:	d031      	beq.n	74000eac <MSS_UART_get_rx+0xcc>
74000e48:	687b      	ldr	r3, [r7, #4]
74000e4a:	2b00      	cmp	r3, #0
74000e4c:	d02e      	beq.n	74000eac <MSS_UART_get_rx+0xcc>
          ( rx_buff != ((uint8_t *)0) ) && ( buff_size > 0U ) )
    {
        status = this_uart->hw_reg->LSR;
74000e4e:	68fb      	ldr	r3, [r7, #12]
74000e50:	681b      	ldr	r3, [r3, #0]
74000e52:	7d1b      	ldrb	r3, [r3, #20]
74000e54:	75fb      	strb	r3, [r7, #23]
        this_uart->status |= status;
74000e56:	68fb      	ldr	r3, [r7, #12]
74000e58:	7a9a      	ldrb	r2, [r3, #10]
74000e5a:	7dfb      	ldrb	r3, [r7, #23]
74000e5c:	ea42 0303 	orr.w	r3, r2, r3
74000e60:	b2da      	uxtb	r2, r3
74000e62:	68fb      	ldr	r3, [r7, #12]
74000e64:	729a      	strb	r2, [r3, #10]

        while (( (status & MSS_UART_DATA_READY) != 0U) &&
74000e66:	e017      	b.n	74000e98 <MSS_UART_get_rx+0xb8>
               ( rx_size < buff_size ) )
        {
            rx_buff[rx_size] = this_uart->hw_reg->RBR;
74000e68:	68ba      	ldr	r2, [r7, #8]
74000e6a:	693b      	ldr	r3, [r7, #16]
74000e6c:	4413      	add	r3, r2
74000e6e:	68fa      	ldr	r2, [r7, #12]
74000e70:	6812      	ldr	r2, [r2, #0]
74000e72:	7812      	ldrb	r2, [r2, #0]
74000e74:	b2d2      	uxtb	r2, r2
74000e76:	701a      	strb	r2, [r3, #0]
            ++rx_size;
74000e78:	693b      	ldr	r3, [r7, #16]
74000e7a:	f103 0301 	add.w	r3, r3, #1
74000e7e:	613b      	str	r3, [r7, #16]
            status = this_uart->hw_reg->LSR;
74000e80:	68fb      	ldr	r3, [r7, #12]
74000e82:	681b      	ldr	r3, [r3, #0]
74000e84:	7d1b      	ldrb	r3, [r3, #20]
74000e86:	75fb      	strb	r3, [r7, #23]
            this_uart->status |= status;
74000e88:	68fb      	ldr	r3, [r7, #12]
74000e8a:	7a9a      	ldrb	r2, [r3, #10]
74000e8c:	7dfb      	ldrb	r3, [r7, #23]
74000e8e:	ea42 0303 	orr.w	r3, r2, r3
74000e92:	b2da      	uxtb	r2, r3
74000e94:	68fb      	ldr	r3, [r7, #12]
74000e96:	729a      	strb	r2, [r3, #10]
          ( rx_buff != ((uint8_t *)0) ) && ( buff_size > 0U ) )
    {
        status = this_uart->hw_reg->LSR;
        this_uart->status |= status;

        while (( (status & MSS_UART_DATA_READY) != 0U) &&
74000e98:	7dfb      	ldrb	r3, [r7, #23]
74000e9a:	f003 0301 	and.w	r3, r3, #1
74000e9e:	b2db      	uxtb	r3, r3
74000ea0:	2b00      	cmp	r3, #0
74000ea2:	d003      	beq.n	74000eac <MSS_UART_get_rx+0xcc>
74000ea4:	693a      	ldr	r2, [r7, #16]
74000ea6:	687b      	ldr	r3, [r7, #4]
74000ea8:	429a      	cmp	r2, r3
74000eaa:	d3dd      	bcc.n	74000e68 <MSS_UART_get_rx+0x88>
            ++rx_size;
            status = this_uart->hw_reg->LSR;
            this_uart->status |= status;
        }
    }
    return rx_size;
74000eac:	693b      	ldr	r3, [r7, #16]
}
74000eae:	4618      	mov	r0, r3
74000eb0:	f107 071c 	add.w	r7, r7, #28
74000eb4:	46bd      	mov	sp, r7
74000eb6:	bc80      	pop	{r7}
74000eb8:	4770      	bx	lr
74000eba:	bf00      	nop

74000ebc <MSS_UART_enable_irq>:
MSS_UART_enable_irq
(
    mss_uart_instance_t * this_uart,
    uint8_t irq_mask
)
{
74000ebc:	b580      	push	{r7, lr}
74000ebe:	b082      	sub	sp, #8
74000ec0:	af00      	add	r7, sp, #0
74000ec2:	6078      	str	r0, [r7, #4]
74000ec4:	460b      	mov	r3, r1
74000ec6:	70fb      	strb	r3, [r7, #3]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000ec8:	687a      	ldr	r2, [r7, #4]
74000eca:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000ece:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000ed2:	429a      	cmp	r2, r3
74000ed4:	d007      	beq.n	74000ee6 <MSS_UART_enable_irq+0x2a>
74000ed6:	687a      	ldr	r2, [r7, #4]
74000ed8:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000edc:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000ee0:	429a      	cmp	r2, r3
74000ee2:	d000      	beq.n	74000ee6 <MSS_UART_enable_irq+0x2a>
74000ee4:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
74000ee6:	687a      	ldr	r2, [r7, #4]
74000ee8:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000eec:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000ef0:	429a      	cmp	r2, r3
74000ef2:	d006      	beq.n	74000f02 <MSS_UART_enable_irq+0x46>
74000ef4:	687a      	ldr	r2, [r7, #4]
74000ef6:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000efa:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000efe:	429a      	cmp	r2, r3
74000f00:	d116      	bne.n	74000f30 <MSS_UART_enable_irq+0x74>
    {
        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
74000f02:	687b      	ldr	r3, [r7, #4]
74000f04:	891b      	ldrh	r3, [r3, #8]
74000f06:	b21b      	sxth	r3, r3
74000f08:	4618      	mov	r0, r3
74000f0a:	f7ff fcd5 	bl	740008b8 <NVIC_ClearPendingIRQ>
         * bit 0 - Receive Data Available Interrupt
         * bit 1 - Transmitter Holding  Register Empty Interrupt
         * bit 2 - Receiver Line Status Interrupt
         * bit 3 - Modem Status Interrupt
         */
        this_uart->hw_reg->IER |= irq_mask;
74000f0e:	687b      	ldr	r3, [r7, #4]
74000f10:	681b      	ldr	r3, [r3, #0]
74000f12:	687a      	ldr	r2, [r7, #4]
74000f14:	6812      	ldr	r2, [r2, #0]
74000f16:	7912      	ldrb	r2, [r2, #4]
74000f18:	b2d1      	uxtb	r1, r2
74000f1a:	78fa      	ldrb	r2, [r7, #3]
74000f1c:	ea41 0202 	orr.w	r2, r1, r2
74000f20:	b2d2      	uxtb	r2, r2
74000f22:	711a      	strb	r2, [r3, #4]

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
74000f24:	687b      	ldr	r3, [r7, #4]
74000f26:	891b      	ldrh	r3, [r3, #8]
74000f28:	b21b      	sxth	r3, r3
74000f2a:	4618      	mov	r0, r3
74000f2c:	f7ff fc8a 	bl	74000844 <NVIC_EnableIRQ>
    }
}
74000f30:	f107 0708 	add.w	r7, r7, #8
74000f34:	46bd      	mov	sp, r7
74000f36:	bd80      	pop	{r7, pc}

74000f38 <MSS_UART_disable_irq>:
MSS_UART_disable_irq
(
    mss_uart_instance_t * this_uart,
    uint8_t irq_mask
)
{
74000f38:	b580      	push	{r7, lr}
74000f3a:	b082      	sub	sp, #8
74000f3c:	af00      	add	r7, sp, #0
74000f3e:	6078      	str	r0, [r7, #4]
74000f40:	460b      	mov	r3, r1
74000f42:	70fb      	strb	r3, [r7, #3]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000f44:	687a      	ldr	r2, [r7, #4]
74000f46:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000f4a:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000f4e:	429a      	cmp	r2, r3
74000f50:	d007      	beq.n	74000f62 <MSS_UART_disable_irq+0x2a>
74000f52:	687a      	ldr	r2, [r7, #4]
74000f54:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000f58:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000f5c:	429a      	cmp	r2, r3
74000f5e:	d000      	beq.n	74000f62 <MSS_UART_disable_irq+0x2a>
74000f60:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
74000f62:	687a      	ldr	r2, [r7, #4]
74000f64:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000f68:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000f6c:	429a      	cmp	r2, r3
74000f6e:	d006      	beq.n	74000f7e <MSS_UART_disable_irq+0x46>
74000f70:	687a      	ldr	r2, [r7, #4]
74000f72:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000f76:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000f7a:	429a      	cmp	r2, r3
74000f7c:	d11c      	bne.n	74000fb8 <MSS_UART_disable_irq+0x80>
         * bit 0 - Receive Data Available Interrupt
         * bit 1 - Transmitter Holding  Register Empty Interrupt
         * bit 2 - Receiver Line Status Interrupt
         * bit 3 - Modem Status Interrupt
         */
        this_uart->hw_reg->IER &= ( (uint8_t)~irq_mask );
74000f7e:	687b      	ldr	r3, [r7, #4]
74000f80:	681b      	ldr	r3, [r3, #0]
74000f82:	687a      	ldr	r2, [r7, #4]
74000f84:	6812      	ldr	r2, [r2, #0]
74000f86:	7912      	ldrb	r2, [r2, #4]
74000f88:	b2d1      	uxtb	r1, r2
74000f8a:	78fa      	ldrb	r2, [r7, #3]
74000f8c:	ea6f 0202 	mvn.w	r2, r2
74000f90:	b2d2      	uxtb	r2, r2
74000f92:	ea01 0202 	and.w	r2, r1, r2
74000f96:	b2d2      	uxtb	r2, r2
74000f98:	711a      	strb	r2, [r3, #4]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
74000f9a:	687b      	ldr	r3, [r7, #4]
74000f9c:	891b      	ldrh	r3, [r3, #8]
74000f9e:	b21b      	sxth	r3, r3
74000fa0:	4618      	mov	r0, r3
74000fa2:	f7ff fc89 	bl	740008b8 <NVIC_ClearPendingIRQ>

        if( irq_mask == IIRF_MASK )
74000fa6:	78fb      	ldrb	r3, [r7, #3]
74000fa8:	2b0f      	cmp	r3, #15
74000faa:	d105      	bne.n	74000fb8 <MSS_UART_disable_irq+0x80>
        {
            /* Disable UART instance interrupt in Cortex-M3 NVIC. */
            NVIC_DisableIRQ( this_uart->irqn );
74000fac:	687b      	ldr	r3, [r7, #4]
74000fae:	891b      	ldrh	r3, [r3, #8]
74000fb0:	b21b      	sxth	r3, r3
74000fb2:	4618      	mov	r0, r3
74000fb4:	f7ff fc62 	bl	7400087c <NVIC_DisableIRQ>

        }
    }
}
74000fb8:	f107 0708 	add.w	r7, r7, #8
74000fbc:	46bd      	mov	sp, r7
74000fbe:	bd80      	pop	{r7, pc}

74000fc0 <MSS_UART_isr>:
static void
MSS_UART_isr
(
    mss_uart_instance_t * this_uart
)
{
74000fc0:	b580      	push	{r7, lr}
74000fc2:	b084      	sub	sp, #16
74000fc4:	af00      	add	r7, sp, #0
74000fc6:	6078      	str	r0, [r7, #4]
    uint8_t iirf;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74000fc8:	687a      	ldr	r2, [r7, #4]
74000fca:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000fce:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000fd2:	429a      	cmp	r2, r3
74000fd4:	d007      	beq.n	74000fe6 <MSS_UART_isr+0x26>
74000fd6:	687a      	ldr	r2, [r7, #4]
74000fd8:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000fdc:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000fe0:	429a      	cmp	r2, r3
74000fe2:	d000      	beq.n	74000fe6 <MSS_UART_isr+0x26>
74000fe4:	be00      	bkpt	0x0000

    if ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
74000fe6:	687a      	ldr	r2, [r7, #4]
74000fe8:	f240 53c8 	movw	r3, #1480	; 0x5c8
74000fec:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000ff0:	429a      	cmp	r2, r3
74000ff2:	d006      	beq.n	74001002 <MSS_UART_isr+0x42>
74000ff4:	687a      	ldr	r2, [r7, #4]
74000ff6:	f240 53a0 	movw	r3, #1440	; 0x5a0
74000ffa:	f2c7 0300 	movt	r3, #28672	; 0x7000
74000ffe:	429a      	cmp	r2, r3
74001000:	d167      	bne.n	740010d2 <MSS_UART_isr+0x112>
    {
        iirf = this_uart->hw_reg->IIR & IIRF_MASK;
74001002:	687b      	ldr	r3, [r7, #4]
74001004:	681b      	ldr	r3, [r3, #0]
74001006:	7a1b      	ldrb	r3, [r3, #8]
74001008:	b2db      	uxtb	r3, r3
7400100a:	f003 030f 	and.w	r3, r3, #15
7400100e:	73fb      	strb	r3, [r7, #15]

        switch ( iirf )
74001010:	7bfb      	ldrb	r3, [r7, #15]
74001012:	2b0c      	cmp	r3, #12
74001014:	d854      	bhi.n	740010c0 <MSS_UART_isr+0x100>
74001016:	a201      	add	r2, pc, #4	; (adr r2, 7400101c <MSS_UART_isr+0x5c>)
74001018:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
7400101c:	74001051 	.word	0x74001051
74001020:	740010c1 	.word	0x740010c1
74001024:	7400106d 	.word	0x7400106d
74001028:	740010c1 	.word	0x740010c1
7400102c:	74001089 	.word	0x74001089
74001030:	740010c1 	.word	0x740010c1
74001034:	740010a5 	.word	0x740010a5
74001038:	740010c1 	.word	0x740010c1
7400103c:	740010c1 	.word	0x740010c1
74001040:	740010c1 	.word	0x740010c1
74001044:	740010c1 	.word	0x740010c1
74001048:	740010c1 	.word	0x740010c1
7400104c:	74001089 	.word	0x74001089
        {
            case IIRF_MODEM_STATUS:  /* Modem status interrupt */
            {
                ASSERT( NULL_HANDLER != this_uart->modemsts_handler );
74001050:	687b      	ldr	r3, [r7, #4]
74001052:	6a5b      	ldr	r3, [r3, #36]	; 0x24
74001054:	2b00      	cmp	r3, #0
74001056:	d100      	bne.n	7400105a <MSS_UART_isr+0x9a>
74001058:	be00      	bkpt	0x0000
                if( NULL_HANDLER != this_uart->modemsts_handler )
7400105a:	687b      	ldr	r3, [r7, #4]
7400105c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
7400105e:	2b00      	cmp	r3, #0
74001060:	d030      	beq.n	740010c4 <MSS_UART_isr+0x104>
                {
                   (*(this_uart->modemsts_handler))( this_uart );
74001062:	687b      	ldr	r3, [r7, #4]
74001064:	6a5b      	ldr	r3, [r3, #36]	; 0x24
74001066:	6878      	ldr	r0, [r7, #4]
74001068:	4798      	blx	r3
                }
            }
            break;
7400106a:	e032      	b.n	740010d2 <MSS_UART_isr+0x112>

            case IIRF_THRE: /* Transmitter Holding Register Empty */
            {
                ASSERT( NULL_HANDLER != this_uart->tx_handler );
7400106c:	687b      	ldr	r3, [r7, #4]
7400106e:	6a1b      	ldr	r3, [r3, #32]
74001070:	2b00      	cmp	r3, #0
74001072:	d100      	bne.n	74001076 <MSS_UART_isr+0xb6>
74001074:	be00      	bkpt	0x0000
                if ( NULL_HANDLER != this_uart->tx_handler )
74001076:	687b      	ldr	r3, [r7, #4]
74001078:	6a1b      	ldr	r3, [r3, #32]
7400107a:	2b00      	cmp	r3, #0
7400107c:	d024      	beq.n	740010c8 <MSS_UART_isr+0x108>
                {
                    (*(this_uart->tx_handler))( this_uart );
7400107e:	687b      	ldr	r3, [r7, #4]
74001080:	6a1b      	ldr	r3, [r3, #32]
74001082:	6878      	ldr	r0, [r7, #4]
74001084:	4798      	blx	r3
                }
            }
            break;
74001086:	e024      	b.n	740010d2 <MSS_UART_isr+0x112>

            case IIRF_RX_DATA:      /* Received Data Available */
            case IIRF_DATA_TIMEOUT: /* Received Data Timed-out */
            {
                ASSERT( NULL_HANDLER != this_uart->rx_handler );
74001088:	687b      	ldr	r3, [r7, #4]
7400108a:	69db      	ldr	r3, [r3, #28]
7400108c:	2b00      	cmp	r3, #0
7400108e:	d100      	bne.n	74001092 <MSS_UART_isr+0xd2>
74001090:	be00      	bkpt	0x0000
                if ( NULL_HANDLER != this_uart->rx_handler )
74001092:	687b      	ldr	r3, [r7, #4]
74001094:	69db      	ldr	r3, [r3, #28]
74001096:	2b00      	cmp	r3, #0
74001098:	d018      	beq.n	740010cc <MSS_UART_isr+0x10c>
                {
                    (*(this_uart->rx_handler))( this_uart );
7400109a:	687b      	ldr	r3, [r7, #4]
7400109c:	69db      	ldr	r3, [r3, #28]
7400109e:	6878      	ldr	r0, [r7, #4]
740010a0:	4798      	blx	r3
                }
            }
            break;
740010a2:	e016      	b.n	740010d2 <MSS_UART_isr+0x112>

            case IIRF_RX_LINE_STATUS:  /* Line Status Interrupt */
            {
                ASSERT( NULL_HANDLER != this_uart->linests_handler );
740010a4:	687b      	ldr	r3, [r7, #4]
740010a6:	699b      	ldr	r3, [r3, #24]
740010a8:	2b00      	cmp	r3, #0
740010aa:	d100      	bne.n	740010ae <MSS_UART_isr+0xee>
740010ac:	be00      	bkpt	0x0000
                if ( NULL_HANDLER != this_uart->linests_handler )
740010ae:	687b      	ldr	r3, [r7, #4]
740010b0:	699b      	ldr	r3, [r3, #24]
740010b2:	2b00      	cmp	r3, #0
740010b4:	d00c      	beq.n	740010d0 <MSS_UART_isr+0x110>
                {
                   (*(this_uart->linests_handler))( this_uart );
740010b6:	687b      	ldr	r3, [r7, #4]
740010b8:	699b      	ldr	r3, [r3, #24]
740010ba:	6878      	ldr	r0, [r7, #4]
740010bc:	4798      	blx	r3
                }
            }
            break;
740010be:	e008      	b.n	740010d2 <MSS_UART_isr+0x112>

            default:
            {
                ASSERT( INVALID_INTERRUPT );
740010c0:	be00      	bkpt	0x0000
740010c2:	e006      	b.n	740010d2 <MSS_UART_isr+0x112>
                if( NULL_HANDLER != this_uart->modemsts_handler )
                {
                   (*(this_uart->modemsts_handler))( this_uart );
                }
            }
            break;
740010c4:	bf00      	nop
740010c6:	e004      	b.n	740010d2 <MSS_UART_isr+0x112>
                if ( NULL_HANDLER != this_uart->tx_handler )
                {
                    (*(this_uart->tx_handler))( this_uart );
                }
            }
            break;
740010c8:	bf00      	nop
740010ca:	e002      	b.n	740010d2 <MSS_UART_isr+0x112>
                if ( NULL_HANDLER != this_uart->rx_handler )
                {
                    (*(this_uart->rx_handler))( this_uart );
                }
            }
            break;
740010cc:	bf00      	nop
740010ce:	e000      	b.n	740010d2 <MSS_UART_isr+0x112>
                if ( NULL_HANDLER != this_uart->linests_handler )
                {
                   (*(this_uart->linests_handler))( this_uart );
                }
            }
            break;
740010d0:	bf00      	nop
                ASSERT( INVALID_INTERRUPT );
            }
            break;
        }
    }
}
740010d2:	f107 0710 	add.w	r7, r7, #16
740010d6:	46bd      	mov	sp, r7
740010d8:	bd80      	pop	{r7, pc}
740010da:	bf00      	nop

740010dc <default_tx_handler>:
static void
default_tx_handler
(
    mss_uart_instance_t * this_uart
)
{
740010dc:	b480      	push	{r7}
740010de:	b087      	sub	sp, #28
740010e0:	af00      	add	r7, sp, #0
740010e2:	6078      	str	r0, [r7, #4]
    uint8_t status;

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
740010e4:	687a      	ldr	r2, [r7, #4]
740010e6:	f240 53c8 	movw	r3, #1480	; 0x5c8
740010ea:	f2c7 0300 	movt	r3, #28672	; 0x7000
740010ee:	429a      	cmp	r2, r3
740010f0:	d007      	beq.n	74001102 <default_tx_handler+0x26>
740010f2:	687a      	ldr	r2, [r7, #4]
740010f4:	f240 53a0 	movw	r3, #1440	; 0x5a0
740010f8:	f2c7 0300 	movt	r3, #28672	; 0x7000
740010fc:	429a      	cmp	r2, r3
740010fe:	d000      	beq.n	74001102 <default_tx_handler+0x26>
74001100:	be00      	bkpt	0x0000
    ASSERT( ( (uint8_t *)0 ) != this_uart->tx_buffer );
74001102:	687b      	ldr	r3, [r7, #4]
74001104:	68db      	ldr	r3, [r3, #12]
74001106:	2b00      	cmp	r3, #0
74001108:	d100      	bne.n	7400110c <default_tx_handler+0x30>
7400110a:	be00      	bkpt	0x0000
    ASSERT( 0U < this_uart->tx_buff_size );
7400110c:	687b      	ldr	r3, [r7, #4]
7400110e:	691b      	ldr	r3, [r3, #16]
74001110:	2b00      	cmp	r3, #0
74001112:	d100      	bne.n	74001116 <default_tx_handler+0x3a>
74001114:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74001116:	687a      	ldr	r2, [r7, #4]
74001118:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400111c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001120:	429a      	cmp	r2, r3
74001122:	d006      	beq.n	74001132 <default_tx_handler+0x56>
74001124:	687a      	ldr	r2, [r7, #4]
74001126:	f240 53a0 	movw	r3, #1440	; 0x5a0
7400112a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400112e:	429a      	cmp	r2, r3
74001130:	d152      	bne.n	740011d8 <default_tx_handler+0xfc>
        ( ( (uint8_t *)0 ) != this_uart->tx_buffer ) &&
74001132:	687b      	ldr	r3, [r7, #4]
74001134:	68db      	ldr	r3, [r3, #12]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
    ASSERT( ( (uint8_t *)0 ) != this_uart->tx_buffer );
    ASSERT( 0U < this_uart->tx_buff_size );

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74001136:	2b00      	cmp	r3, #0
74001138:	d04e      	beq.n	740011d8 <default_tx_handler+0xfc>
        ( ( (uint8_t *)0 ) != this_uart->tx_buffer ) &&
        ( 0U < this_uart->tx_buff_size ) )
7400113a:	687b      	ldr	r3, [r7, #4]
7400113c:	691b      	ldr	r3, [r3, #16]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
    ASSERT( ( (uint8_t *)0 ) != this_uart->tx_buffer );
    ASSERT( 0U < this_uart->tx_buff_size );

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
7400113e:	2b00      	cmp	r3, #0
74001140:	d04a      	beq.n	740011d8 <default_tx_handler+0xfc>
        ( ( (uint8_t *)0 ) != this_uart->tx_buffer ) &&
        ( 0U < this_uart->tx_buff_size ) )
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
74001142:	687b      	ldr	r3, [r7, #4]
74001144:	681b      	ldr	r3, [r3, #0]
74001146:	7d1b      	ldrb	r3, [r3, #20]
74001148:	72fb      	strb	r3, [r7, #11]
        this_uart->status |= status;
7400114a:	687b      	ldr	r3, [r7, #4]
7400114c:	7a9a      	ldrb	r2, [r3, #10]
7400114e:	7afb      	ldrb	r3, [r7, #11]
74001150:	ea42 0303 	orr.w	r3, r2, r3
74001154:	b2da      	uxtb	r2, r3
74001156:	687b      	ldr	r3, [r7, #4]
74001158:	729a      	strb	r2, [r3, #10]

        /*
         * This function should only be called as a result of a THRE interrupt.
         * Verify that this is true before proceeding to transmit data.
         */
        if ( status & MSS_UART_THRE )
7400115a:	7afb      	ldrb	r3, [r7, #11]
7400115c:	f003 0320 	and.w	r3, r3, #32
74001160:	2b00      	cmp	r3, #0
74001162:	d029      	beq.n	740011b8 <default_tx_handler+0xdc>
        {
            uint32_t i;
            uint32_t fill_size = TX_FIFO_SIZE;
74001164:	f04f 0310 	mov.w	r3, #16
74001168:	613b      	str	r3, [r7, #16]
            uint32_t tx_remain = this_uart->tx_buff_size - this_uart->tx_idx;
7400116a:	687b      	ldr	r3, [r7, #4]
7400116c:	691a      	ldr	r2, [r3, #16]
7400116e:	687b      	ldr	r3, [r7, #4]
74001170:	695b      	ldr	r3, [r3, #20]
74001172:	ebc3 0302 	rsb	r3, r3, r2
74001176:	617b      	str	r3, [r7, #20]

            /* Calculate the number of bytes to transmit. */
            if ( tx_remain < TX_FIFO_SIZE )
74001178:	697b      	ldr	r3, [r7, #20]
7400117a:	2b0f      	cmp	r3, #15
7400117c:	d801      	bhi.n	74001182 <default_tx_handler+0xa6>
            {
                fill_size = tx_remain;
7400117e:	697b      	ldr	r3, [r7, #20]
74001180:	613b      	str	r3, [r7, #16]
            }

            /* Fill the TX FIFO with the calculated the number of bytes. */
            for ( i = 0U; i < fill_size; ++i )
74001182:	f04f 0300 	mov.w	r3, #0
74001186:	60fb      	str	r3, [r7, #12]
74001188:	e012      	b.n	740011b0 <default_tx_handler+0xd4>
            {
                /* Send next character in the buffer. */
                this_uart->hw_reg->THR = this_uart->tx_buffer[this_uart->tx_idx];
7400118a:	687b      	ldr	r3, [r7, #4]
7400118c:	681b      	ldr	r3, [r3, #0]
7400118e:	687a      	ldr	r2, [r7, #4]
74001190:	68d1      	ldr	r1, [r2, #12]
74001192:	687a      	ldr	r2, [r7, #4]
74001194:	6952      	ldr	r2, [r2, #20]
74001196:	440a      	add	r2, r1
74001198:	7812      	ldrb	r2, [r2, #0]
7400119a:	701a      	strb	r2, [r3, #0]
                ++this_uart->tx_idx;
7400119c:	687b      	ldr	r3, [r7, #4]
7400119e:	695b      	ldr	r3, [r3, #20]
740011a0:	f103 0201 	add.w	r2, r3, #1
740011a4:	687b      	ldr	r3, [r7, #4]
740011a6:	615a      	str	r2, [r3, #20]
            {
                fill_size = tx_remain;
            }

            /* Fill the TX FIFO with the calculated the number of bytes. */
            for ( i = 0U; i < fill_size; ++i )
740011a8:	68fb      	ldr	r3, [r7, #12]
740011aa:	f103 0301 	add.w	r3, r3, #1
740011ae:	60fb      	str	r3, [r7, #12]
740011b0:	68fa      	ldr	r2, [r7, #12]
740011b2:	693b      	ldr	r3, [r7, #16]
740011b4:	429a      	cmp	r2, r3
740011b6:	d3e8      	bcc.n	7400118a <default_tx_handler+0xae>
                ++this_uart->tx_idx;
            }
        }

        /* Flag Tx as complete if all data has been pushed into the Tx FIFO. */
        if ( this_uart->tx_idx == this_uart->tx_buff_size )
740011b8:	687b      	ldr	r3, [r7, #4]
740011ba:	695a      	ldr	r2, [r3, #20]
740011bc:	687b      	ldr	r3, [r7, #4]
740011be:	691b      	ldr	r3, [r3, #16]
740011c0:	429a      	cmp	r2, r3
740011c2:	d109      	bne.n	740011d8 <default_tx_handler+0xfc>
        {
            this_uart->tx_buff_size = TX_COMPLETE;
740011c4:	687b      	ldr	r3, [r7, #4]
740011c6:	f04f 0200 	mov.w	r2, #0
740011ca:	611a      	str	r2, [r3, #16]
            /* disables TX interrupt */
            this_uart->hw_reg_bit->IER_ETBEI = 0U;
740011cc:	687b      	ldr	r3, [r7, #4]
740011ce:	685b      	ldr	r3, [r3, #4]
740011d0:	f04f 0200 	mov.w	r2, #0
740011d4:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84
        }
    }
}
740011d8:	f107 071c 	add.w	r7, r7, #28
740011dc:	46bd      	mov	sp, r7
740011de:	bc80      	pop	{r7}
740011e0:	4770      	bx	lr
740011e2:	bf00      	nop

740011e4 <MSS_UART_set_rx_handler>:
(
    mss_uart_instance_t *       this_uart,
    mss_uart_irq_handler_t      handler,
    mss_uart_rx_trig_level_t    trigger_level
)
{
740011e4:	b580      	push	{r7, lr}
740011e6:	b084      	sub	sp, #16
740011e8:	af00      	add	r7, sp, #0
740011ea:	60f8      	str	r0, [r7, #12]
740011ec:	60b9      	str	r1, [r7, #8]
740011ee:	4613      	mov	r3, r2
740011f0:	71fb      	strb	r3, [r7, #7]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
740011f2:	68fa      	ldr	r2, [r7, #12]
740011f4:	f240 53c8 	movw	r3, #1480	; 0x5c8
740011f8:	f2c7 0300 	movt	r3, #28672	; 0x7000
740011fc:	429a      	cmp	r2, r3
740011fe:	d007      	beq.n	74001210 <MSS_UART_set_rx_handler+0x2c>
74001200:	68fa      	ldr	r2, [r7, #12]
74001202:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001206:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400120a:	429a      	cmp	r2, r3
7400120c:	d000      	beq.n	74001210 <MSS_UART_set_rx_handler+0x2c>
7400120e:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER );
74001210:	68bb      	ldr	r3, [r7, #8]
74001212:	2b00      	cmp	r3, #0
74001214:	d100      	bne.n	74001218 <MSS_UART_set_rx_handler+0x34>
74001216:	be00      	bkpt	0x0000
    ASSERT( trigger_level < MSS_UART_FIFO_INVALID_TRIG_LEVEL );
74001218:	79fb      	ldrb	r3, [r7, #7]
7400121a:	2bc0      	cmp	r3, #192	; 0xc0
7400121c:	d900      	bls.n	74001220 <MSS_UART_set_rx_handler+0x3c>
7400121e:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74001220:	68fa      	ldr	r2, [r7, #12]
74001222:	f240 53c8 	movw	r3, #1480	; 0x5c8
74001226:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400122a:	429a      	cmp	r2, r3
7400122c:	d006      	beq.n	7400123c <MSS_UART_set_rx_handler+0x58>
7400122e:	68fa      	ldr	r2, [r7, #12]
74001230:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001234:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001238:	429a      	cmp	r2, r3
7400123a:	d12b      	bne.n	74001294 <MSS_UART_set_rx_handler+0xb0>
7400123c:	68bb      	ldr	r3, [r7, #8]
7400123e:	2b00      	cmp	r3, #0
74001240:	d028      	beq.n	74001294 <MSS_UART_set_rx_handler+0xb0>
74001242:	79fb      	ldrb	r3, [r7, #7]
74001244:	2bc0      	cmp	r3, #192	; 0xc0
74001246:	d825      	bhi.n	74001294 <MSS_UART_set_rx_handler+0xb0>
        ( handler != INVALID_IRQ_HANDLER) &&
        ( trigger_level < MSS_UART_FIFO_INVALID_TRIG_LEVEL) )
    {
        this_uart->rx_handler = handler;
74001248:	68fb      	ldr	r3, [r7, #12]
7400124a:	68ba      	ldr	r2, [r7, #8]
7400124c:	61da      	str	r2, [r3, #28]

        /* Set the receive interrupt trigger level. */
        this_uart->hw_reg->FCR = (this_uart->hw_reg->FCR &
7400124e:	68fb      	ldr	r3, [r7, #12]
74001250:	681a      	ldr	r2, [r3, #0]
74001252:	68fb      	ldr	r3, [r7, #12]
74001254:	681b      	ldr	r3, [r3, #0]
74001256:	7a1b      	ldrb	r3, [r3, #8]
74001258:	b2db      	uxtb	r3, r3
7400125a:	b2db      	uxtb	r3, r3
7400125c:	f003 033f 	and.w	r3, r3, #63	; 0x3f
74001260:	79f8      	ldrb	r0, [r7, #7]
74001262:	4619      	mov	r1, r3
74001264:	4603      	mov	r3, r0
74001266:	ea41 0303 	orr.w	r3, r1, r3
7400126a:	b2db      	uxtb	r3, r3
7400126c:	b2db      	uxtb	r3, r3
7400126e:	7213      	strb	r3, [r2, #8]
                              (uint8_t)(~((uint8_t)FCR_TRIG_LEVEL_MASK))) |
                              (uint8_t)trigger_level;
        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
74001270:	68fb      	ldr	r3, [r7, #12]
74001272:	891b      	ldrh	r3, [r3, #8]
74001274:	b21b      	sxth	r3, r3
74001276:	4618      	mov	r0, r3
74001278:	f7ff fb1e 	bl	740008b8 <NVIC_ClearPendingIRQ>

        /* Enable receive interrupt. */
        this_uart->hw_reg_bit->IER_ERBFI = 1U;
7400127c:	68fb      	ldr	r3, [r7, #12]
7400127e:	685b      	ldr	r3, [r3, #4]
74001280:	f04f 0201 	mov.w	r2, #1
74001284:	f8c3 2080 	str.w	r2, [r3, #128]	; 0x80

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
74001288:	68fb      	ldr	r3, [r7, #12]
7400128a:	891b      	ldrh	r3, [r3, #8]
7400128c:	b21b      	sxth	r3, r3
7400128e:	4618      	mov	r0, r3
74001290:	f7ff fad8 	bl	74000844 <NVIC_EnableIRQ>
    }
}
74001294:	f107 0710 	add.w	r7, r7, #16
74001298:	46bd      	mov	sp, r7
7400129a:	bd80      	pop	{r7, pc}

7400129c <MSS_UART_set_loopback>:
MSS_UART_set_loopback
(
    mss_uart_instance_t *   this_uart,
    mss_uart_loopback_t     loopback
)
{
7400129c:	b480      	push	{r7}
7400129e:	b083      	sub	sp, #12
740012a0:	af00      	add	r7, sp, #0
740012a2:	6078      	str	r0, [r7, #4]
740012a4:	460b      	mov	r3, r1
740012a6:	70fb      	strb	r3, [r7, #3]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
740012a8:	687a      	ldr	r2, [r7, #4]
740012aa:	f240 53c8 	movw	r3, #1480	; 0x5c8
740012ae:	f2c7 0300 	movt	r3, #28672	; 0x7000
740012b2:	429a      	cmp	r2, r3
740012b4:	d007      	beq.n	740012c6 <MSS_UART_set_loopback+0x2a>
740012b6:	687a      	ldr	r2, [r7, #4]
740012b8:	f240 53a0 	movw	r3, #1440	; 0x5a0
740012bc:	f2c7 0300 	movt	r3, #28672	; 0x7000
740012c0:	429a      	cmp	r2, r3
740012c2:	d000      	beq.n	740012c6 <MSS_UART_set_loopback+0x2a>
740012c4:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
740012c6:	687a      	ldr	r2, [r7, #4]
740012c8:	f240 53c8 	movw	r3, #1480	; 0x5c8
740012cc:	f2c7 0300 	movt	r3, #28672	; 0x7000
740012d0:	429a      	cmp	r2, r3
740012d2:	d006      	beq.n	740012e2 <MSS_UART_set_loopback+0x46>
740012d4:	687a      	ldr	r2, [r7, #4]
740012d6:	f240 53a0 	movw	r3, #1440	; 0x5a0
740012da:	f2c7 0300 	movt	r3, #28672	; 0x7000
740012de:	429a      	cmp	r2, r3
740012e0:	d10f      	bne.n	74001302 <MSS_UART_set_loopback+0x66>
    {
        if ( loopback == MSS_UART_LOOPBACK_OFF )
740012e2:	78fb      	ldrb	r3, [r7, #3]
740012e4:	2b00      	cmp	r3, #0
740012e6:	d106      	bne.n	740012f6 <MSS_UART_set_loopback+0x5a>
        {
            this_uart->hw_reg_bit->MCR_LOOP = 0U;
740012e8:	687b      	ldr	r3, [r7, #4]
740012ea:	685b      	ldr	r3, [r3, #4]
740012ec:	f04f 0200 	mov.w	r2, #0
740012f0:	f8c3 2210 	str.w	r2, [r3, #528]	; 0x210
740012f4:	e005      	b.n	74001302 <MSS_UART_set_loopback+0x66>
        }
        else
        {
            this_uart->hw_reg_bit->MCR_LOOP = 1U;
740012f6:	687b      	ldr	r3, [r7, #4]
740012f8:	685b      	ldr	r3, [r3, #4]
740012fa:	f04f 0201 	mov.w	r2, #1
740012fe:	f8c3 2210 	str.w	r2, [r3, #528]	; 0x210
        }
    }
}
74001302:	f107 070c 	add.w	r7, r7, #12
74001306:	46bd      	mov	sp, r7
74001308:	bc80      	pop	{r7}
7400130a:	4770      	bx	lr

7400130c <UART0_IRQHandler>:
#if defined(__GNUC__)
__attribute__((__interrupt__)) void UART0_IRQHandler( void )
#else
void UART0_IRQHandler( void )
#endif
{
7400130c:	4668      	mov	r0, sp
7400130e:	f020 0107 	bic.w	r1, r0, #7
74001312:	468d      	mov	sp, r1
74001314:	b589      	push	{r0, r3, r7, lr}
74001316:	af00      	add	r7, sp, #0
    MSS_UART_isr( &g_mss_uart0 );
74001318:	f240 50c8 	movw	r0, #1480	; 0x5c8
7400131c:	f2c7 0000 	movt	r0, #28672	; 0x7000
74001320:	f7ff fe4e 	bl	74000fc0 <MSS_UART_isr>
    NVIC_ClearPendingIRQ( UART0_IRQn );
74001324:	f04f 000a 	mov.w	r0, #10
74001328:	f7ff fac6 	bl	740008b8 <NVIC_ClearPendingIRQ>
}
7400132c:	46bd      	mov	sp, r7
7400132e:	e8bd 4089 	ldmia.w	sp!, {r0, r3, r7, lr}
74001332:	4685      	mov	sp, r0
74001334:	4770      	bx	lr
74001336:	bf00      	nop

74001338 <UART1_IRQHandler>:
#if defined(__GNUC__)
__attribute__((__interrupt__)) void UART1_IRQHandler( void )
#else
void UART1_IRQHandler( void )
#endif
{
74001338:	4668      	mov	r0, sp
7400133a:	f020 0107 	bic.w	r1, r0, #7
7400133e:	468d      	mov	sp, r1
74001340:	b589      	push	{r0, r3, r7, lr}
74001342:	af00      	add	r7, sp, #0
    MSS_UART_isr( &g_mss_uart1 );
74001344:	f240 50a0 	movw	r0, #1440	; 0x5a0
74001348:	f2c7 0000 	movt	r0, #28672	; 0x7000
7400134c:	f7ff fe38 	bl	74000fc0 <MSS_UART_isr>
    NVIC_ClearPendingIRQ( UART1_IRQn );
74001350:	f04f 000b 	mov.w	r0, #11
74001354:	f7ff fab0 	bl	740008b8 <NVIC_ClearPendingIRQ>
}
74001358:	46bd      	mov	sp, r7
7400135a:	e8bd 4089 	ldmia.w	sp!, {r0, r3, r7, lr}
7400135e:	4685      	mov	sp, r0
74001360:	4770      	bx	lr
74001362:	bf00      	nop

74001364 <MSS_UART_set_rxstatus_handler>:
MSS_UART_set_rxstatus_handler
(
    mss_uart_instance_t * this_uart,
    mss_uart_irq_handler_t handler
)
{
74001364:	b580      	push	{r7, lr}
74001366:	b082      	sub	sp, #8
74001368:	af00      	add	r7, sp, #0
7400136a:	6078      	str	r0, [r7, #4]
7400136c:	6039      	str	r1, [r7, #0]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
7400136e:	687a      	ldr	r2, [r7, #4]
74001370:	f240 53c8 	movw	r3, #1480	; 0x5c8
74001374:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001378:	429a      	cmp	r2, r3
7400137a:	d007      	beq.n	7400138c <MSS_UART_set_rxstatus_handler+0x28>
7400137c:	687a      	ldr	r2, [r7, #4]
7400137e:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001382:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001386:	429a      	cmp	r2, r3
74001388:	d000      	beq.n	7400138c <MSS_UART_set_rxstatus_handler+0x28>
7400138a:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER);
7400138c:	683b      	ldr	r3, [r7, #0]
7400138e:	2b00      	cmp	r3, #0
74001390:	d100      	bne.n	74001394 <MSS_UART_set_rxstatus_handler+0x30>
74001392:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74001394:	687a      	ldr	r2, [r7, #4]
74001396:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400139a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400139e:	429a      	cmp	r2, r3
740013a0:	d006      	beq.n	740013b0 <MSS_UART_set_rxstatus_handler+0x4c>
740013a2:	687a      	ldr	r2, [r7, #4]
740013a4:	f240 53a0 	movw	r3, #1440	; 0x5a0
740013a8:	f2c7 0300 	movt	r3, #28672	; 0x7000
740013ac:	429a      	cmp	r2, r3
740013ae:	d117      	bne.n	740013e0 <MSS_UART_set_rxstatus_handler+0x7c>
740013b0:	683b      	ldr	r3, [r7, #0]
740013b2:	2b00      	cmp	r3, #0
740013b4:	d014      	beq.n	740013e0 <MSS_UART_set_rxstatus_handler+0x7c>
        ( handler != INVALID_IRQ_HANDLER) )
    {
        this_uart->linests_handler = handler;
740013b6:	687b      	ldr	r3, [r7, #4]
740013b8:	683a      	ldr	r2, [r7, #0]
740013ba:	619a      	str	r2, [r3, #24]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
740013bc:	687b      	ldr	r3, [r7, #4]
740013be:	891b      	ldrh	r3, [r3, #8]
740013c0:	b21b      	sxth	r3, r3
740013c2:	4618      	mov	r0, r3
740013c4:	f7ff fa78 	bl	740008b8 <NVIC_ClearPendingIRQ>

        /* Enable receiver line status interrupt. */
        this_uart->hw_reg_bit->IER_ELSI = 1U;
740013c8:	687b      	ldr	r3, [r7, #4]
740013ca:	685b      	ldr	r3, [r3, #4]
740013cc:	f04f 0201 	mov.w	r2, #1
740013d0:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
740013d4:	687b      	ldr	r3, [r7, #4]
740013d6:	891b      	ldrh	r3, [r3, #8]
740013d8:	b21b      	sxth	r3, r3
740013da:	4618      	mov	r0, r3
740013dc:	f7ff fa32 	bl	74000844 <NVIC_EnableIRQ>
    }
}
740013e0:	f107 0708 	add.w	r7, r7, #8
740013e4:	46bd      	mov	sp, r7
740013e6:	bd80      	pop	{r7, pc}

740013e8 <MSS_UART_set_tx_handler>:
MSS_UART_set_tx_handler
(
    mss_uart_instance_t * this_uart,
    mss_uart_irq_handler_t handler
)
{
740013e8:	b580      	push	{r7, lr}
740013ea:	b082      	sub	sp, #8
740013ec:	af00      	add	r7, sp, #0
740013ee:	6078      	str	r0, [r7, #4]
740013f0:	6039      	str	r1, [r7, #0]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
740013f2:	687a      	ldr	r2, [r7, #4]
740013f4:	f240 53c8 	movw	r3, #1480	; 0x5c8
740013f8:	f2c7 0300 	movt	r3, #28672	; 0x7000
740013fc:	429a      	cmp	r2, r3
740013fe:	d007      	beq.n	74001410 <MSS_UART_set_tx_handler+0x28>
74001400:	687a      	ldr	r2, [r7, #4]
74001402:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001406:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400140a:	429a      	cmp	r2, r3
7400140c:	d000      	beq.n	74001410 <MSS_UART_set_tx_handler+0x28>
7400140e:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER);
74001410:	683b      	ldr	r3, [r7, #0]
74001412:	2b00      	cmp	r3, #0
74001414:	d100      	bne.n	74001418 <MSS_UART_set_tx_handler+0x30>
74001416:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
74001418:	687a      	ldr	r2, [r7, #4]
7400141a:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400141e:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001422:	429a      	cmp	r2, r3
74001424:	d006      	beq.n	74001434 <MSS_UART_set_tx_handler+0x4c>
74001426:	687a      	ldr	r2, [r7, #4]
74001428:	f240 53a0 	movw	r3, #1440	; 0x5a0
7400142c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001430:	429a      	cmp	r2, r3
74001432:	d11f      	bne.n	74001474 <MSS_UART_set_tx_handler+0x8c>
74001434:	683b      	ldr	r3, [r7, #0]
74001436:	2b00      	cmp	r3, #0
74001438:	d01c      	beq.n	74001474 <MSS_UART_set_tx_handler+0x8c>
        ( handler != INVALID_IRQ_HANDLER) )
    {
        this_uart->tx_handler = handler;
7400143a:	687b      	ldr	r3, [r7, #4]
7400143c:	683a      	ldr	r2, [r7, #0]
7400143e:	621a      	str	r2, [r3, #32]

        /* Make TX buffer info invalid */
        this_uart->tx_buffer = (const uint8_t *)0;
74001440:	687b      	ldr	r3, [r7, #4]
74001442:	f04f 0200 	mov.w	r2, #0
74001446:	60da      	str	r2, [r3, #12]
        this_uart->tx_buff_size = 0U;
74001448:	687b      	ldr	r3, [r7, #4]
7400144a:	f04f 0200 	mov.w	r2, #0
7400144e:	611a      	str	r2, [r3, #16]

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
74001450:	687b      	ldr	r3, [r7, #4]
74001452:	891b      	ldrh	r3, [r3, #8]
74001454:	b21b      	sxth	r3, r3
74001456:	4618      	mov	r0, r3
74001458:	f7ff fa2e 	bl	740008b8 <NVIC_ClearPendingIRQ>

        /* Enable transmitter holding register Empty interrupt. */
        this_uart->hw_reg_bit->IER_ETBEI = 1U;
7400145c:	687b      	ldr	r3, [r7, #4]
7400145e:	685b      	ldr	r3, [r3, #4]
74001460:	f04f 0201 	mov.w	r2, #1
74001464:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
74001468:	687b      	ldr	r3, [r7, #4]
7400146a:	891b      	ldrh	r3, [r3, #8]
7400146c:	b21b      	sxth	r3, r3
7400146e:	4618      	mov	r0, r3
74001470:	f7ff f9e8 	bl	74000844 <NVIC_EnableIRQ>
    }
}
74001474:	f107 0708 	add.w	r7, r7, #8
74001478:	46bd      	mov	sp, r7
7400147a:	bd80      	pop	{r7, pc}

7400147c <MSS_UART_set_modemstatus_handler>:
MSS_UART_set_modemstatus_handler
(
    mss_uart_instance_t * this_uart,
    mss_uart_irq_handler_t handler
)
{
7400147c:	b580      	push	{r7, lr}
7400147e:	b082      	sub	sp, #8
74001480:	af00      	add	r7, sp, #0
74001482:	6078      	str	r0, [r7, #4]
74001484:	6039      	str	r1, [r7, #0]
    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74001486:	687a      	ldr	r2, [r7, #4]
74001488:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400148c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001490:	429a      	cmp	r2, r3
74001492:	d007      	beq.n	740014a4 <MSS_UART_set_modemstatus_handler+0x28>
74001494:	687a      	ldr	r2, [r7, #4]
74001496:	f240 53a0 	movw	r3, #1440	; 0x5a0
7400149a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400149e:	429a      	cmp	r2, r3
740014a0:	d000      	beq.n	740014a4 <MSS_UART_set_modemstatus_handler+0x28>
740014a2:	be00      	bkpt	0x0000
    ASSERT( handler != INVALID_IRQ_HANDLER );
740014a4:	683b      	ldr	r3, [r7, #0]
740014a6:	2b00      	cmp	r3, #0
740014a8:	d100      	bne.n	740014ac <MSS_UART_set_modemstatus_handler+0x30>
740014aa:	be00      	bkpt	0x0000

    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) ) &&
740014ac:	687a      	ldr	r2, [r7, #4]
740014ae:	f240 53c8 	movw	r3, #1480	; 0x5c8
740014b2:	f2c7 0300 	movt	r3, #28672	; 0x7000
740014b6:	429a      	cmp	r2, r3
740014b8:	d006      	beq.n	740014c8 <MSS_UART_set_modemstatus_handler+0x4c>
740014ba:	687a      	ldr	r2, [r7, #4]
740014bc:	f240 53a0 	movw	r3, #1440	; 0x5a0
740014c0:	f2c7 0300 	movt	r3, #28672	; 0x7000
740014c4:	429a      	cmp	r2, r3
740014c6:	d117      	bne.n	740014f8 <MSS_UART_set_modemstatus_handler+0x7c>
740014c8:	683b      	ldr	r3, [r7, #0]
740014ca:	2b00      	cmp	r3, #0
740014cc:	d014      	beq.n	740014f8 <MSS_UART_set_modemstatus_handler+0x7c>
        ( handler != INVALID_IRQ_HANDLER) )
    {
        this_uart->modemsts_handler = handler;
740014ce:	687b      	ldr	r3, [r7, #4]
740014d0:	683a      	ldr	r2, [r7, #0]
740014d2:	625a      	str	r2, [r3, #36]	; 0x24

        /* Clear any previously pended interrupts */
        NVIC_ClearPendingIRQ( this_uart->irqn );
740014d4:	687b      	ldr	r3, [r7, #4]
740014d6:	891b      	ldrh	r3, [r3, #8]
740014d8:	b21b      	sxth	r3, r3
740014da:	4618      	mov	r0, r3
740014dc:	f7ff f9ec 	bl	740008b8 <NVIC_ClearPendingIRQ>

        /* Enable modem status interrupt. */
        this_uart->hw_reg_bit->IER_EDSSI = 1U;
740014e0:	687b      	ldr	r3, [r7, #4]
740014e2:	685b      	ldr	r3, [r3, #4]
740014e4:	f04f 0201 	mov.w	r2, #1
740014e8:	f8c3 208c 	str.w	r2, [r3, #140]	; 0x8c

        /* Enable UART instance interrupt in Cortex-M3 NVIC. */
        NVIC_EnableIRQ( this_uart->irqn );
740014ec:	687b      	ldr	r3, [r7, #4]
740014ee:	891b      	ldrh	r3, [r3, #8]
740014f0:	b21b      	sxth	r3, r3
740014f2:	4618      	mov	r0, r3
740014f4:	f7ff f9a6 	bl	74000844 <NVIC_EnableIRQ>
    }
}
740014f8:	f107 0708 	add.w	r7, r7, #8
740014fc:	46bd      	mov	sp, r7
740014fe:	bd80      	pop	{r7, pc}

74001500 <MSS_UART_fill_tx_fifo>:
(
    mss_uart_instance_t * this_uart,
    const uint8_t * tx_buffer,
    size_t tx_size
)
{
74001500:	b480      	push	{r7}
74001502:	b089      	sub	sp, #36	; 0x24
74001504:	af00      	add	r7, sp, #0
74001506:	60f8      	str	r0, [r7, #12]
74001508:	60b9      	str	r1, [r7, #8]
7400150a:	607a      	str	r2, [r7, #4]
    uint8_t status = 0U;
7400150c:	f04f 0300 	mov.w	r3, #0
74001510:	75fb      	strb	r3, [r7, #23]
    size_t size_sent = 0U;
74001512:	f04f 0300 	mov.w	r3, #0
74001516:	61bb      	str	r3, [r7, #24]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74001518:	68fa      	ldr	r2, [r7, #12]
7400151a:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400151e:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001522:	429a      	cmp	r2, r3
74001524:	d007      	beq.n	74001536 <MSS_UART_fill_tx_fifo+0x36>
74001526:	68fa      	ldr	r2, [r7, #12]
74001528:	f240 53a0 	movw	r3, #1440	; 0x5a0
7400152c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001530:	429a      	cmp	r2, r3
74001532:	d000      	beq.n	74001536 <MSS_UART_fill_tx_fifo+0x36>
74001534:	be00      	bkpt	0x0000
    ASSERT( tx_buffer != ( (uint8_t *)0 ) );
74001536:	68bb      	ldr	r3, [r7, #8]
74001538:	2b00      	cmp	r3, #0
7400153a:	d100      	bne.n	7400153e <MSS_UART_fill_tx_fifo+0x3e>
7400153c:	be00      	bkpt	0x0000
    ASSERT( tx_size > 0 );
7400153e:	687b      	ldr	r3, [r7, #4]
74001540:	2b00      	cmp	r3, #0
74001542:	d100      	bne.n	74001546 <MSS_UART_fill_tx_fifo+0x46>
74001544:	be00      	bkpt	0x0000

    /* Fill the UART's Tx FIFO until the FIFO is full or the complete input
     * buffer has been written. */
    if( ( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1 ) ) &&
74001546:	68fa      	ldr	r2, [r7, #12]
74001548:	f240 53c8 	movw	r3, #1480	; 0x5c8
7400154c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001550:	429a      	cmp	r2, r3
74001552:	d006      	beq.n	74001562 <MSS_UART_fill_tx_fifo+0x62>
74001554:	68fa      	ldr	r2, [r7, #12]
74001556:	f240 53a0 	movw	r3, #1440	; 0x5a0
7400155a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400155e:	429a      	cmp	r2, r3
74001560:	d131      	bne.n	740015c6 <MSS_UART_fill_tx_fifo+0xc6>
74001562:	68bb      	ldr	r3, [r7, #8]
74001564:	2b00      	cmp	r3, #0
74001566:	d02e      	beq.n	740015c6 <MSS_UART_fill_tx_fifo+0xc6>
74001568:	687b      	ldr	r3, [r7, #4]
7400156a:	2b00      	cmp	r3, #0
7400156c:	d02b      	beq.n	740015c6 <MSS_UART_fill_tx_fifo+0xc6>
        (tx_buffer != ( (uint8_t *)0 ))   &&
        (tx_size > 0u) )
    {
        status = this_uart->hw_reg->LSR;
7400156e:	68fb      	ldr	r3, [r7, #12]
74001570:	681b      	ldr	r3, [r3, #0]
74001572:	7d1b      	ldrb	r3, [r3, #20]
74001574:	75fb      	strb	r3, [r7, #23]
        this_uart->status |= status;
74001576:	68fb      	ldr	r3, [r7, #12]
74001578:	7a9a      	ldrb	r2, [r3, #10]
7400157a:	7dfb      	ldrb	r3, [r7, #23]
7400157c:	ea42 0303 	orr.w	r3, r2, r3
74001580:	b2da      	uxtb	r2, r3
74001582:	68fb      	ldr	r3, [r7, #12]
74001584:	729a      	strb	r2, [r3, #10]

        if( status & MSS_UART_THRE )
74001586:	7dfb      	ldrb	r3, [r7, #23]
74001588:	f003 0320 	and.w	r3, r3, #32
7400158c:	2b00      	cmp	r3, #0
7400158e:	d01a      	beq.n	740015c6 <MSS_UART_fill_tx_fifo+0xc6>
        {
            uint32_t fill_size = TX_FIFO_SIZE;
74001590:	f04f 0310 	mov.w	r3, #16
74001594:	61fb      	str	r3, [r7, #28]

            if ( tx_size < TX_FIFO_SIZE )
74001596:	687b      	ldr	r3, [r7, #4]
74001598:	2b0f      	cmp	r3, #15
7400159a:	d801      	bhi.n	740015a0 <MSS_UART_fill_tx_fifo+0xa0>
            {
                fill_size = tx_size;
7400159c:	687b      	ldr	r3, [r7, #4]
7400159e:	61fb      	str	r3, [r7, #28]
            }
            /* Fill up FIFO */
            for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
740015a0:	f04f 0300 	mov.w	r3, #0
740015a4:	61bb      	str	r3, [r7, #24]
740015a6:	e00a      	b.n	740015be <MSS_UART_fill_tx_fifo+0xbe>
            {

                /* Send next character in the buffer. */
                this_uart->hw_reg->THR = tx_buffer[size_sent];
740015a8:	68fb      	ldr	r3, [r7, #12]
740015aa:	681b      	ldr	r3, [r3, #0]
740015ac:	68b9      	ldr	r1, [r7, #8]
740015ae:	69ba      	ldr	r2, [r7, #24]
740015b0:	440a      	add	r2, r1
740015b2:	7812      	ldrb	r2, [r2, #0]
740015b4:	701a      	strb	r2, [r3, #0]
            if ( tx_size < TX_FIFO_SIZE )
            {
                fill_size = tx_size;
            }
            /* Fill up FIFO */
            for ( size_sent = 0U; size_sent < fill_size; ++size_sent )
740015b6:	69bb      	ldr	r3, [r7, #24]
740015b8:	f103 0301 	add.w	r3, r3, #1
740015bc:	61bb      	str	r3, [r7, #24]
740015be:	69ba      	ldr	r2, [r7, #24]
740015c0:	69fb      	ldr	r3, [r7, #28]
740015c2:	429a      	cmp	r2, r3
740015c4:	d3f0      	bcc.n	740015a8 <MSS_UART_fill_tx_fifo+0xa8>
                /* Send next character in the buffer. */
                this_uart->hw_reg->THR = tx_buffer[size_sent];
            }
        }
    }
    return size_sent;
740015c6:	69bb      	ldr	r3, [r7, #24]
}
740015c8:	4618      	mov	r0, r3
740015ca:	f107 0724 	add.w	r7, r7, #36	; 0x24
740015ce:	46bd      	mov	sp, r7
740015d0:	bc80      	pop	{r7}
740015d2:	4770      	bx	lr

740015d4 <MSS_UART_get_rx_status>:
uint8_t
MSS_UART_get_rx_status
(
    mss_uart_instance_t * this_uart
)
{
740015d4:	b480      	push	{r7}
740015d6:	b085      	sub	sp, #20
740015d8:	af00      	add	r7, sp, #0
740015da:	6078      	str	r0, [r7, #4]
    uint8_t status = MSS_UART_INVALID_PARAM;
740015dc:	f04f 33ff 	mov.w	r3, #4294967295
740015e0:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
740015e2:	687a      	ldr	r2, [r7, #4]
740015e4:	f240 53c8 	movw	r3, #1480	; 0x5c8
740015e8:	f2c7 0300 	movt	r3, #28672	; 0x7000
740015ec:	429a      	cmp	r2, r3
740015ee:	d007      	beq.n	74001600 <MSS_UART_get_rx_status+0x2c>
740015f0:	687a      	ldr	r2, [r7, #4]
740015f2:	f240 53a0 	movw	r3, #1440	; 0x5a0
740015f6:	f2c7 0300 	movt	r3, #28672	; 0x7000
740015fa:	429a      	cmp	r2, r3
740015fc:	d000      	beq.n	74001600 <MSS_UART_get_rx_status+0x2c>
740015fe:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
74001600:	687a      	ldr	r2, [r7, #4]
74001602:	f240 53c8 	movw	r3, #1480	; 0x5c8
74001606:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400160a:	429a      	cmp	r2, r3
7400160c:	d006      	beq.n	7400161c <MSS_UART_get_rx_status+0x48>
7400160e:	687a      	ldr	r2, [r7, #4]
74001610:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001614:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001618:	429a      	cmp	r2, r3
7400161a:	d113      	bne.n	74001644 <MSS_UART_get_rx_status+0x70>
         * Bit 2 - Parity error status
         * Bit 3 - Frame error status
         * Bit 4 - Break interrupt indicator
         * Bit 7 - FIFO data error status
         */
        this_uart->status |= (this_uart->hw_reg->LSR);
7400161c:	687b      	ldr	r3, [r7, #4]
7400161e:	7a9a      	ldrb	r2, [r3, #10]
74001620:	687b      	ldr	r3, [r7, #4]
74001622:	681b      	ldr	r3, [r3, #0]
74001624:	7d1b      	ldrb	r3, [r3, #20]
74001626:	b2db      	uxtb	r3, r3
74001628:	ea42 0303 	orr.w	r3, r2, r3
7400162c:	b2da      	uxtb	r2, r3
7400162e:	687b      	ldr	r3, [r7, #4]
74001630:	729a      	strb	r2, [r3, #10]
        status = (this_uart->status & STATUS_ERROR_MASK );
74001632:	687b      	ldr	r3, [r7, #4]
74001634:	7a9b      	ldrb	r3, [r3, #10]
74001636:	f023 0361 	bic.w	r3, r3, #97	; 0x61
7400163a:	73fb      	strb	r3, [r7, #15]
        /* Clear the sticky status after reading */
        this_uart->status = 0U;
7400163c:	687b      	ldr	r3, [r7, #4]
7400163e:	f04f 0200 	mov.w	r2, #0
74001642:	729a      	strb	r2, [r3, #10]
    }
    return status;
74001644:	7bfb      	ldrb	r3, [r7, #15]
}
74001646:	4618      	mov	r0, r3
74001648:	f107 0714 	add.w	r7, r7, #20
7400164c:	46bd      	mov	sp, r7
7400164e:	bc80      	pop	{r7}
74001650:	4770      	bx	lr
74001652:	bf00      	nop

74001654 <MSS_UART_get_modem_status>:
uint8_t
MSS_UART_get_modem_status
(
    mss_uart_instance_t * this_uart
)
{
74001654:	b480      	push	{r7}
74001656:	b085      	sub	sp, #20
74001658:	af00      	add	r7, sp, #0
7400165a:	6078      	str	r0, [r7, #4]
    uint8_t status = MSS_UART_INVALID_PARAM;
7400165c:	f04f 33ff 	mov.w	r3, #4294967295
74001660:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
74001662:	687a      	ldr	r2, [r7, #4]
74001664:	f240 53c8 	movw	r3, #1480	; 0x5c8
74001668:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400166c:	429a      	cmp	r2, r3
7400166e:	d007      	beq.n	74001680 <MSS_UART_get_modem_status+0x2c>
74001670:	687a      	ldr	r2, [r7, #4]
74001672:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001676:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400167a:	429a      	cmp	r2, r3
7400167c:	d000      	beq.n	74001680 <MSS_UART_get_modem_status+0x2c>
7400167e:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
74001680:	687a      	ldr	r2, [r7, #4]
74001682:	f240 53c8 	movw	r3, #1480	; 0x5c8
74001686:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400168a:	429a      	cmp	r2, r3
7400168c:	d006      	beq.n	7400169c <MSS_UART_get_modem_status+0x48>
7400168e:	687a      	ldr	r2, [r7, #4]
74001690:	f240 53a0 	movw	r3, #1440	; 0x5a0
74001694:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001698:	429a      	cmp	r2, r3
7400169a:	d103      	bne.n	740016a4 <MSS_UART_get_modem_status+0x50>
         * Bit 4 - Clear To Send
         * Bit 5 - Data Set Ready
         * Bit 6 - Ring Indicator
         * Bit 7 - Data Carrier Detect
         */
        status = this_uart->hw_reg->MSR;
7400169c:	687b      	ldr	r3, [r7, #4]
7400169e:	681b      	ldr	r3, [r3, #0]
740016a0:	7e1b      	ldrb	r3, [r3, #24]
740016a2:	73fb      	strb	r3, [r7, #15]
    }
    return status;
740016a4:	7bfb      	ldrb	r3, [r7, #15]
}
740016a6:	4618      	mov	r0, r3
740016a8:	f107 0714 	add.w	r7, r7, #20
740016ac:	46bd      	mov	sp, r7
740016ae:	bc80      	pop	{r7}
740016b0:	4770      	bx	lr
740016b2:	bf00      	nop

740016b4 <MSS_UART_get_tx_status>:
uint8_t
MSS_UART_get_tx_status
(
    mss_uart_instance_t * this_uart
)
{
740016b4:	b480      	push	{r7}
740016b6:	b085      	sub	sp, #20
740016b8:	af00      	add	r7, sp, #0
740016ba:	6078      	str	r0, [r7, #4]
    uint8_t status = MSS_UART_TX_BUSY;
740016bc:	f04f 0300 	mov.w	r3, #0
740016c0:	73fb      	strb	r3, [r7, #15]

    ASSERT( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) );
740016c2:	687a      	ldr	r2, [r7, #4]
740016c4:	f240 53c8 	movw	r3, #1480	; 0x5c8
740016c8:	f2c7 0300 	movt	r3, #28672	; 0x7000
740016cc:	429a      	cmp	r2, r3
740016ce:	d007      	beq.n	740016e0 <MSS_UART_get_tx_status+0x2c>
740016d0:	687a      	ldr	r2, [r7, #4]
740016d2:	f240 53a0 	movw	r3, #1440	; 0x5a0
740016d6:	f2c7 0300 	movt	r3, #28672	; 0x7000
740016da:	429a      	cmp	r2, r3
740016dc:	d000      	beq.n	740016e0 <MSS_UART_get_tx_status+0x2c>
740016de:	be00      	bkpt	0x0000

    if( (this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1) )
740016e0:	687a      	ldr	r2, [r7, #4]
740016e2:	f240 53c8 	movw	r3, #1480	; 0x5c8
740016e6:	f2c7 0300 	movt	r3, #28672	; 0x7000
740016ea:	429a      	cmp	r2, r3
740016ec:	d006      	beq.n	740016fc <MSS_UART_get_tx_status+0x48>
740016ee:	687a      	ldr	r2, [r7, #4]
740016f0:	f240 53a0 	movw	r3, #1440	; 0x5a0
740016f4:	f2c7 0300 	movt	r3, #28672	; 0x7000
740016f8:	429a      	cmp	r2, r3
740016fa:	d10f      	bne.n	7400171c <MSS_UART_get_tx_status+0x68>
    {
        /* Read the Line Status Register and update the sticky record. */
        status = this_uart->hw_reg->LSR;
740016fc:	687b      	ldr	r3, [r7, #4]
740016fe:	681b      	ldr	r3, [r3, #0]
74001700:	7d1b      	ldrb	r3, [r3, #20]
74001702:	73fb      	strb	r3, [r7, #15]
        this_uart->status |= status;
74001704:	687b      	ldr	r3, [r7, #4]
74001706:	7a9a      	ldrb	r2, [r3, #10]
74001708:	7bfb      	ldrb	r3, [r7, #15]
7400170a:	ea42 0303 	orr.w	r3, r2, r3
7400170e:	b2da      	uxtb	r2, r3
74001710:	687b      	ldr	r3, [r7, #4]
74001712:	729a      	strb	r2, [r3, #10]
        /*
         * Extract the transmit status bits from the UART's Line Status Register.
         * Bit 5 - Transmitter Holding Register/FIFO Empty (THRE) status. (If = 1, TX FIFO is empty)
         * Bit 6 - Transmitter Empty (TEMT) status. (If = 1, both TX FIFO and shift register are empty)
         */
        status &= ( MSS_UART_THRE | MSS_UART_TEMT );
74001714:	7bfb      	ldrb	r3, [r7, #15]
74001716:	f003 0360 	and.w	r3, r3, #96	; 0x60
7400171a:	73fb      	strb	r3, [r7, #15]
    }
    return status;
7400171c:	7bfb      	ldrb	r3, [r7, #15]
}
7400171e:	4618      	mov	r0, r3
74001720:	f107 0714 	add.w	r7, r7, #20
74001724:	46bd      	mov	sp, r7
74001726:	bc80      	pop	{r7}
74001728:	4770      	bx	lr
7400172a:	bf00      	nop

7400172c <NVIC_EnableIRQ>:
 *
 * Enable a device specific interupt in the NVIC interrupt controller.
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
7400172c:	b480      	push	{r7}
7400172e:	b083      	sub	sp, #12
74001730:	af00      	add	r7, sp, #0
74001732:	4603      	mov	r3, r0
74001734:	80fb      	strh	r3, [r7, #6]
  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
74001736:	f24e 1300 	movw	r3, #57600	; 0xe100
7400173a:	f2ce 0300 	movt	r3, #57344	; 0xe000
7400173e:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
74001742:	ea4f 1252 	mov.w	r2, r2, lsr #5
74001746:	88f9      	ldrh	r1, [r7, #6]
74001748:	f001 011f 	and.w	r1, r1, #31
7400174c:	f04f 0001 	mov.w	r0, #1
74001750:	fa00 f101 	lsl.w	r1, r0, r1
74001754:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
74001758:	f107 070c 	add.w	r7, r7, #12
7400175c:	46bd      	mov	sp, r7
7400175e:	bc80      	pop	{r7}
74001760:	4770      	bx	lr
74001762:	bf00      	nop

74001764 <NVIC_ClearPendingIRQ>:
 *
 * Clear the pending bit for the specified interrupt. 
 * The interrupt number cannot be a negative value.
 */
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
74001764:	b480      	push	{r7}
74001766:	b083      	sub	sp, #12
74001768:	af00      	add	r7, sp, #0
7400176a:	4603      	mov	r3, r0
7400176c:	80fb      	strh	r3, [r7, #6]
  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
7400176e:	f24e 1300 	movw	r3, #57600	; 0xe100
74001772:	f2ce 0300 	movt	r3, #57344	; 0xe000
74001776:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
7400177a:	ea4f 1252 	mov.w	r2, r2, lsr #5
7400177e:	88f9      	ldrh	r1, [r7, #6]
74001780:	f001 011f 	and.w	r1, r1, #31
74001784:	f04f 0001 	mov.w	r0, #1
74001788:	fa00 f101 	lsl.w	r1, r0, r1
7400178c:	f102 0260 	add.w	r2, r2, #96	; 0x60
74001790:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
74001794:	f107 070c 	add.w	r7, r7, #12
74001798:	46bd      	mov	sp, r7
7400179a:	bc80      	pop	{r7}
7400179c:	4770      	bx	lr
7400179e:	bf00      	nop

740017a0 <MSS_GPIO_init>:
/*-------------------------------------------------------------------------*//**
 * MSS_GPIO_init
 * See "mss_gpio.h" for details of how to use this function.
 */
void MSS_GPIO_init( void )
{
740017a0:	b580      	push	{r7, lr}
740017a2:	b082      	sub	sp, #8
740017a4:	af00      	add	r7, sp, #0
    uint32_t i;
    
    /* reset MSS GPIO hardware */
    SYSREG->SOFT_RST_CR |= SYSREG_GPIO_SOFTRESET_MASK;
740017a6:	f242 0300 	movw	r3, #8192	; 0x2000
740017aa:	f2ce 0304 	movt	r3, #57348	; 0xe004
740017ae:	f242 0200 	movw	r2, #8192	; 0x2000
740017b2:	f2ce 0204 	movt	r2, #57348	; 0xe004
740017b6:	6b12      	ldr	r2, [r2, #48]	; 0x30
740017b8:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
740017bc:	631a      	str	r2, [r3, #48]	; 0x30
    /* Clear any previously pended MSS GPIO interrupt */
    for ( i = 0U; i < NB_OF_GPIO; ++i )
740017be:	f04f 0300 	mov.w	r3, #0
740017c2:	607b      	str	r3, [r7, #4]
740017c4:	e00e      	b.n	740017e4 <MSS_GPIO_init+0x44>
    {
        NVIC_ClearPendingIRQ( g_gpio_irqn_lut[i] );
740017c6:	687a      	ldr	r2, [r7, #4]
740017c8:	f248 2340 	movw	r3, #33344	; 0x8240
740017cc:	f2c7 4300 	movt	r3, #29696	; 0x7400
740017d0:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
740017d4:	b21b      	sxth	r3, r3
740017d6:	4618      	mov	r0, r3
740017d8:	f7ff ffc4 	bl	74001764 <NVIC_ClearPendingIRQ>
    uint32_t i;
    
    /* reset MSS GPIO hardware */
    SYSREG->SOFT_RST_CR |= SYSREG_GPIO_SOFTRESET_MASK;
    /* Clear any previously pended MSS GPIO interrupt */
    for ( i = 0U; i < NB_OF_GPIO; ++i )
740017dc:	687b      	ldr	r3, [r7, #4]
740017de:	f103 0301 	add.w	r3, r3, #1
740017e2:	607b      	str	r3, [r7, #4]
740017e4:	687b      	ldr	r3, [r7, #4]
740017e6:	2b1f      	cmp	r3, #31
740017e8:	d9ed      	bls.n	740017c6 <MSS_GPIO_init+0x26>
    {
        NVIC_ClearPendingIRQ( g_gpio_irqn_lut[i] );
    }
    /* Take MSS GPIO hardware out of reset. */
    SYSREG->SOFT_RST_CR &= ~SYSREG_GPIO_SOFTRESET_MASK;
740017ea:	f242 0300 	movw	r3, #8192	; 0x2000
740017ee:	f2ce 0304 	movt	r3, #57348	; 0xe004
740017f2:	f242 0200 	movw	r2, #8192	; 0x2000
740017f6:	f2ce 0204 	movt	r2, #57348	; 0xe004
740017fa:	6b12      	ldr	r2, [r2, #48]	; 0x30
740017fc:	f422 4280 	bic.w	r2, r2, #16384	; 0x4000
74001800:	631a      	str	r2, [r3, #48]	; 0x30
}
74001802:	f107 0708 	add.w	r7, r7, #8
74001806:	46bd      	mov	sp, r7
74001808:	bd80      	pop	{r7, pc}
7400180a:	bf00      	nop

7400180c <MSS_GPIO_config>:
void MSS_GPIO_config
(
    mss_gpio_id_t port_id,
    uint32_t config
)
{
7400180c:	b480      	push	{r7}
7400180e:	b085      	sub	sp, #20
74001810:	af00      	add	r7, sp, #0
74001812:	4603      	mov	r3, r0
74001814:	6039      	str	r1, [r7, #0]
74001816:	71fb      	strb	r3, [r7, #7]
    uint32_t gpio_idx = (uint32_t)port_id;
74001818:	79fb      	ldrb	r3, [r7, #7]
7400181a:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
7400181c:	68fb      	ldr	r3, [r7, #12]
7400181e:	2b1f      	cmp	r3, #31
74001820:	d900      	bls.n	74001824 <MSS_GPIO_config+0x18>
74001822:	be00      	bkpt	0x0000

    if ( gpio_idx < NB_OF_GPIO )
74001824:	68fb      	ldr	r3, [r7, #12]
74001826:	2b1f      	cmp	r3, #31
74001828:	d808      	bhi.n	7400183c <MSS_GPIO_config+0x30>
    {
        *(g_config_reg_lut[gpio_idx]) = config;
7400182a:	68fa      	ldr	r2, [r7, #12]
7400182c:	f248 13c0 	movw	r3, #33216	; 0x81c0
74001830:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001834:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
74001838:	683a      	ldr	r2, [r7, #0]
7400183a:	601a      	str	r2, [r3, #0]
    }
}
7400183c:	f107 0714 	add.w	r7, r7, #20
74001840:	46bd      	mov	sp, r7
74001842:	bc80      	pop	{r7}
74001844:	4770      	bx	lr
74001846:	bf00      	nop

74001848 <MSS_GPIO_set_output>:
void MSS_GPIO_set_output
(
    mss_gpio_id_t       port_id,
    uint8_t             value
)
{
74001848:	b480      	push	{r7}
7400184a:	b085      	sub	sp, #20
7400184c:	af00      	add	r7, sp, #0
7400184e:	4602      	mov	r2, r0
74001850:	460b      	mov	r3, r1
74001852:	71fa      	strb	r2, [r7, #7]
74001854:	71bb      	strb	r3, [r7, #6]
    uint32_t gpio_idx = (uint32_t)port_id;
74001856:	79fb      	ldrb	r3, [r7, #7]
74001858:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
7400185a:	68fb      	ldr	r3, [r7, #12]
7400185c:	2b1f      	cmp	r3, #31
7400185e:	d900      	bls.n	74001862 <MSS_GPIO_set_output+0x1a>
74001860:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
74001862:	68fb      	ldr	r3, [r7, #12]
74001864:	2b1f      	cmp	r3, #31
74001866:	d809      	bhi.n	7400187c <MSS_GPIO_set_output+0x34>
    {
        GPIO_BITBAND->GPIO_OUT[gpio_idx] = (uint32_t)value;
74001868:	f240 0300 	movw	r3, #0
7400186c:	f2c4 2326 	movt	r3, #16934	; 0x4226
74001870:	68fa      	ldr	r2, [r7, #12]
74001872:	79b9      	ldrb	r1, [r7, #6]
74001874:	f502 6288 	add.w	r2, r2, #1088	; 0x440
74001878:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
    }
}
7400187c:	f107 0714 	add.w	r7, r7, #20
74001880:	46bd      	mov	sp, r7
74001882:	bc80      	pop	{r7}
74001884:	4770      	bx	lr
74001886:	bf00      	nop

74001888 <MSS_GPIO_drive_inout>:
void MSS_GPIO_drive_inout
(
    mss_gpio_id_t port_id,
    mss_gpio_inout_state_t inout_state
)
{
74001888:	b480      	push	{r7}
7400188a:	b087      	sub	sp, #28
7400188c:	af00      	add	r7, sp, #0
7400188e:	4602      	mov	r2, r0
74001890:	460b      	mov	r3, r1
74001892:	71fa      	strb	r2, [r7, #7]
74001894:	71bb      	strb	r3, [r7, #6]
    uint32_t outputs_state;
    uint32_t config;
    uint32_t gpio_idx = (uint32_t)port_id;
74001896:	79fb      	ldrb	r3, [r7, #7]
74001898:	617b      	str	r3, [r7, #20]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
7400189a:	697b      	ldr	r3, [r7, #20]
7400189c:	2b1f      	cmp	r3, #31
7400189e:	d900      	bls.n	740018a2 <MSS_GPIO_drive_inout+0x1a>
740018a0:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
740018a2:	697b      	ldr	r3, [r7, #20]
740018a4:	2b1f      	cmp	r3, #31
740018a6:	d87d      	bhi.n	740019a4 <MSS_GPIO_drive_inout+0x11c>
    {
        switch( inout_state )
740018a8:	79bb      	ldrb	r3, [r7, #6]
740018aa:	2b01      	cmp	r3, #1
740018ac:	d004      	beq.n	740018b8 <MSS_GPIO_drive_inout+0x30>
740018ae:	2b02      	cmp	r3, #2
740018b0:	d060      	beq.n	74001974 <MSS_GPIO_drive_inout+0xec>
740018b2:	2b00      	cmp	r3, #0
740018b4:	d02e      	beq.n	74001914 <MSS_GPIO_drive_inout+0x8c>
740018b6:	e074      	b.n	740019a2 <MSS_GPIO_drive_inout+0x11a>
        {
        case MSS_GPIO_DRIVE_HIGH:
            /* Set output high */
            outputs_state = GPIO->GPIO_OUT;
740018b8:	f243 0300 	movw	r3, #12288	; 0x3000
740018bc:	f2c4 0301 	movt	r3, #16385	; 0x4001
740018c0:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
740018c4:	60fb      	str	r3, [r7, #12]
            outputs_state |= (uint32_t)1 << gpio_idx;
740018c6:	697b      	ldr	r3, [r7, #20]
740018c8:	f04f 0201 	mov.w	r2, #1
740018cc:	fa02 f303 	lsl.w	r3, r2, r3
740018d0:	68fa      	ldr	r2, [r7, #12]
740018d2:	ea42 0303 	orr.w	r3, r2, r3
740018d6:	60fb      	str	r3, [r7, #12]
            GPIO->GPIO_OUT = outputs_state;
740018d8:	f243 0300 	movw	r3, #12288	; 0x3000
740018dc:	f2c4 0301 	movt	r3, #16385	; 0x4001
740018e0:	68fa      	ldr	r2, [r7, #12]
740018e2:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
            /* Enable output buffer */
            config = *(g_config_reg_lut[gpio_idx]);
740018e6:	697a      	ldr	r2, [r7, #20]
740018e8:	f248 13c0 	movw	r3, #33216	; 0x81c0
740018ec:	f2c7 4300 	movt	r3, #29696	; 0x7400
740018f0:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
740018f4:	681b      	ldr	r3, [r3, #0]
740018f6:	613b      	str	r3, [r7, #16]
            config |= OUTPUT_BUFFER_ENABLE_MASK;
740018f8:	693b      	ldr	r3, [r7, #16]
740018fa:	f043 0304 	orr.w	r3, r3, #4
740018fe:	613b      	str	r3, [r7, #16]
            *(g_config_reg_lut[gpio_idx]) = config;
74001900:	697a      	ldr	r2, [r7, #20]
74001902:	f248 13c0 	movw	r3, #33216	; 0x81c0
74001906:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400190a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
7400190e:	693a      	ldr	r2, [r7, #16]
74001910:	601a      	str	r2, [r3, #0]
            break;
74001912:	e047      	b.n	740019a4 <MSS_GPIO_drive_inout+0x11c>
            
        case MSS_GPIO_DRIVE_LOW:
            /* Set output low */
            outputs_state = GPIO->GPIO_OUT;
74001914:	f243 0300 	movw	r3, #12288	; 0x3000
74001918:	f2c4 0301 	movt	r3, #16385	; 0x4001
7400191c:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
74001920:	60fb      	str	r3, [r7, #12]
            outputs_state &= ~((uint32_t)((uint32_t)1 << gpio_idx));
74001922:	697b      	ldr	r3, [r7, #20]
74001924:	f04f 0201 	mov.w	r2, #1
74001928:	fa02 f303 	lsl.w	r3, r2, r3
7400192c:	ea6f 0303 	mvn.w	r3, r3
74001930:	68fa      	ldr	r2, [r7, #12]
74001932:	ea02 0303 	and.w	r3, r2, r3
74001936:	60fb      	str	r3, [r7, #12]
            GPIO->GPIO_OUT = outputs_state;
74001938:	f243 0300 	movw	r3, #12288	; 0x3000
7400193c:	f2c4 0301 	movt	r3, #16385	; 0x4001
74001940:	68fa      	ldr	r2, [r7, #12]
74001942:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
            /* Enable output buffer */
            config = *(g_config_reg_lut[gpio_idx]);
74001946:	697a      	ldr	r2, [r7, #20]
74001948:	f248 13c0 	movw	r3, #33216	; 0x81c0
7400194c:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001950:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
74001954:	681b      	ldr	r3, [r3, #0]
74001956:	613b      	str	r3, [r7, #16]
            config |= OUTPUT_BUFFER_ENABLE_MASK;
74001958:	693b      	ldr	r3, [r7, #16]
7400195a:	f043 0304 	orr.w	r3, r3, #4
7400195e:	613b      	str	r3, [r7, #16]
            *(g_config_reg_lut[gpio_idx]) = config;
74001960:	697a      	ldr	r2, [r7, #20]
74001962:	f248 13c0 	movw	r3, #33216	; 0x81c0
74001966:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400196a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
7400196e:	693a      	ldr	r2, [r7, #16]
74001970:	601a      	str	r2, [r3, #0]
            break;
74001972:	e017      	b.n	740019a4 <MSS_GPIO_drive_inout+0x11c>
            
        case MSS_GPIO_HIGH_Z:
            /* Disable output buffer */
            config = *(g_config_reg_lut[gpio_idx]);
74001974:	697a      	ldr	r2, [r7, #20]
74001976:	f248 13c0 	movw	r3, #33216	; 0x81c0
7400197a:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400197e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
74001982:	681b      	ldr	r3, [r3, #0]
74001984:	613b      	str	r3, [r7, #16]
            config &= ~OUTPUT_BUFFER_ENABLE_MASK;
74001986:	693b      	ldr	r3, [r7, #16]
74001988:	f023 0304 	bic.w	r3, r3, #4
7400198c:	613b      	str	r3, [r7, #16]
            *(g_config_reg_lut[gpio_idx]) = config;
7400198e:	697a      	ldr	r2, [r7, #20]
74001990:	f248 13c0 	movw	r3, #33216	; 0x81c0
74001994:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001998:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
7400199c:	693a      	ldr	r2, [r7, #16]
7400199e:	601a      	str	r2, [r3, #0]
            break;
740019a0:	e000      	b.n	740019a4 <MSS_GPIO_drive_inout+0x11c>
            
        default:
            ASSERT(0);
740019a2:	be00      	bkpt	0x0000
            break;
        }
    }
}
740019a4:	f107 071c 	add.w	r7, r7, #28
740019a8:	46bd      	mov	sp, r7
740019aa:	bc80      	pop	{r7}
740019ac:	4770      	bx	lr
740019ae:	bf00      	nop

740019b0 <MSS_GPIO_enable_irq>:
 */
void MSS_GPIO_enable_irq
(
    mss_gpio_id_t port_id
)
{
740019b0:	b580      	push	{r7, lr}
740019b2:	b084      	sub	sp, #16
740019b4:	af00      	add	r7, sp, #0
740019b6:	4603      	mov	r3, r0
740019b8:	71fb      	strb	r3, [r7, #7]
    uint32_t cfg_value;
    uint32_t gpio_idx = (uint32_t)port_id;
740019ba:	79fb      	ldrb	r3, [r7, #7]
740019bc:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
740019be:	68fb      	ldr	r3, [r7, #12]
740019c0:	2b1f      	cmp	r3, #31
740019c2:	d900      	bls.n	740019c6 <MSS_GPIO_enable_irq+0x16>
740019c4:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
740019c6:	68fb      	ldr	r3, [r7, #12]
740019c8:	2b1f      	cmp	r3, #31
740019ca:	d81e      	bhi.n	74001a0a <MSS_GPIO_enable_irq+0x5a>
    {
        cfg_value = *(g_config_reg_lut[gpio_idx]);
740019cc:	68fa      	ldr	r2, [r7, #12]
740019ce:	f248 13c0 	movw	r3, #33216	; 0x81c0
740019d2:	f2c7 4300 	movt	r3, #29696	; 0x7400
740019d6:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
740019da:	681b      	ldr	r3, [r3, #0]
740019dc:	60bb      	str	r3, [r7, #8]
        *(g_config_reg_lut[gpio_idx]) = (cfg_value | GPIO_INT_ENABLE_MASK);
740019de:	68fa      	ldr	r2, [r7, #12]
740019e0:	f248 13c0 	movw	r3, #33216	; 0x81c0
740019e4:	f2c7 4300 	movt	r3, #29696	; 0x7400
740019e8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
740019ec:	68ba      	ldr	r2, [r7, #8]
740019ee:	f042 0208 	orr.w	r2, r2, #8
740019f2:	601a      	str	r2, [r3, #0]
        NVIC_EnableIRQ( g_gpio_irqn_lut[gpio_idx] );
740019f4:	68fa      	ldr	r2, [r7, #12]
740019f6:	f248 2340 	movw	r3, #33344	; 0x8240
740019fa:	f2c7 4300 	movt	r3, #29696	; 0x7400
740019fe:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
74001a02:	b21b      	sxth	r3, r3
74001a04:	4618      	mov	r0, r3
74001a06:	f7ff fe91 	bl	7400172c <NVIC_EnableIRQ>
    }
}
74001a0a:	f107 0710 	add.w	r7, r7, #16
74001a0e:	46bd      	mov	sp, r7
74001a10:	bd80      	pop	{r7, pc}
74001a12:	bf00      	nop

74001a14 <MSS_GPIO_disable_irq>:
 */
void MSS_GPIO_disable_irq
(
    mss_gpio_id_t port_id
)
{
74001a14:	b480      	push	{r7}
74001a16:	b085      	sub	sp, #20
74001a18:	af00      	add	r7, sp, #0
74001a1a:	4603      	mov	r3, r0
74001a1c:	71fb      	strb	r3, [r7, #7]
    uint32_t cfg_value;
    uint32_t gpio_idx = (uint32_t)port_id;
74001a1e:	79fb      	ldrb	r3, [r7, #7]
74001a20:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
74001a22:	68fb      	ldr	r3, [r7, #12]
74001a24:	2b1f      	cmp	r3, #31
74001a26:	d900      	bls.n	74001a2a <MSS_GPIO_disable_irq+0x16>
74001a28:	be00      	bkpt	0x0000

    if ( gpio_idx < NB_OF_GPIO )
74001a2a:	68fb      	ldr	r3, [r7, #12]
74001a2c:	2b1f      	cmp	r3, #31
74001a2e:	d813      	bhi.n	74001a58 <MSS_GPIO_disable_irq+0x44>
    {
        cfg_value = *(g_config_reg_lut[gpio_idx]);
74001a30:	68fa      	ldr	r2, [r7, #12]
74001a32:	f248 13c0 	movw	r3, #33216	; 0x81c0
74001a36:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001a3a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
74001a3e:	681b      	ldr	r3, [r3, #0]
74001a40:	60bb      	str	r3, [r7, #8]
        *(g_config_reg_lut[gpio_idx]) = (cfg_value & ~GPIO_INT_ENABLE_MASK);
74001a42:	68fa      	ldr	r2, [r7, #12]
74001a44:	f248 13c0 	movw	r3, #33216	; 0x81c0
74001a48:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001a4c:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
74001a50:	68ba      	ldr	r2, [r7, #8]
74001a52:	f022 0208 	bic.w	r2, r2, #8
74001a56:	601a      	str	r2, [r3, #0]
    }
}
74001a58:	f107 0714 	add.w	r7, r7, #20
74001a5c:	46bd      	mov	sp, r7
74001a5e:	bc80      	pop	{r7}
74001a60:	4770      	bx	lr
74001a62:	bf00      	nop

74001a64 <MSS_GPIO_clear_irq>:
 */
void MSS_GPIO_clear_irq
(
    mss_gpio_id_t port_id
)
{
74001a64:	b580      	push	{r7, lr}
74001a66:	b084      	sub	sp, #16
74001a68:	af00      	add	r7, sp, #0
74001a6a:	4603      	mov	r3, r0
74001a6c:	71fb      	strb	r3, [r7, #7]
    uint32_t gpio_idx = (uint32_t)port_id;
74001a6e:	79fb      	ldrb	r3, [r7, #7]
74001a70:	60fb      	str	r3, [r7, #12]
    
    ASSERT( gpio_idx < NB_OF_GPIO );
74001a72:	68fb      	ldr	r3, [r7, #12]
74001a74:	2b1f      	cmp	r3, #31
74001a76:	d900      	bls.n	74001a7a <MSS_GPIO_clear_irq+0x16>
74001a78:	be00      	bkpt	0x0000
    
    if ( gpio_idx < NB_OF_GPIO )
74001a7a:	68fb      	ldr	r3, [r7, #12]
74001a7c:	2b1f      	cmp	r3, #31
74001a7e:	d815      	bhi.n	74001aac <MSS_GPIO_clear_irq+0x48>
    {
        GPIO->GPIO_IRQ = ((uint32_t)1) << gpio_idx;
74001a80:	f243 0300 	movw	r3, #12288	; 0x3000
74001a84:	f2c4 0301 	movt	r3, #16385	; 0x4001
74001a88:	68fa      	ldr	r2, [r7, #12]
74001a8a:	f04f 0101 	mov.w	r1, #1
74001a8e:	fa01 f202 	lsl.w	r2, r1, r2
74001a92:	f8c3 2080 	str.w	r2, [r3, #128]	; 0x80
        NVIC_ClearPendingIRQ( g_gpio_irqn_lut[gpio_idx] );
74001a96:	68fa      	ldr	r2, [r7, #12]
74001a98:	f248 2340 	movw	r3, #33344	; 0x8240
74001a9c:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001aa0:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
74001aa4:	b21b      	sxth	r3, r3
74001aa6:	4618      	mov	r0, r3
74001aa8:	f7ff fe5c 	bl	74001764 <NVIC_ClearPendingIRQ>
    }
}
74001aac:	f107 0710 	add.w	r7, r7, #16
74001ab0:	46bd      	mov	sp, r7
74001ab2:	bd80      	pop	{r7, pc}

74001ab4 <SystemInit>:

/***************************************************************************//**
 * See system_a2fxxxm3f.h for details.
 */
void SystemInit(void)
{
74001ab4:	b480      	push	{r7}
74001ab6:	af00      	add	r7, sp, #0
    /*
     * Do not make use of global variables or make any asumptions regarding
     * memory content if modifying this function. The memory content has not been
     * initialised by the time this function is called by the start-up code.
     */
}
74001ab8:	46bd      	mov	sp, r7
74001aba:	bc80      	pop	{r7}
74001abc:	4770      	bx	lr
74001abe:	bf00      	nop

74001ac0 <SystemCoreClockUpdate>:

/***************************************************************************//**
 *
 */
void SystemCoreClockUpdate (void)
{
74001ac0:	b580      	push	{r7, lr}
74001ac2:	b08a      	sub	sp, #40	; 0x28
74001ac4:	af00      	add	r7, sp, #0
    uint32_t PclkDiv0;
    uint32_t PclkDiv1;
    uint32_t AceDiv;
    uint32_t FabDiv;

    const uint32_t pclk_div_lut[4] = { 1uL, 2uL, 4uL, 1uL };
74001ac6:	f248 2380 	movw	r3, #33408	; 0x8280
74001aca:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001ace:	46bc      	mov	ip, r7
74001ad0:	cb0f      	ldmia	r3!, {r0, r1, r2, r3}
74001ad2:	e88c 000f 	stmia.w	ip, {r0, r1, r2, r3}

    /* Read PCLK dividers from system registers. Multiply the value read from
     * system register by two to get actual divider value. */
    PclkDiv0 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK0_DIV_SHIFT) & PCLK_DIV_MASK)];
74001ad6:	f242 0300 	movw	r3, #8192	; 0x2000
74001ada:	f2ce 0304 	movt	r3, #57348	; 0xe004
74001ade:	6c9b      	ldr	r3, [r3, #72]	; 0x48
74001ae0:	ea4f 0393 	mov.w	r3, r3, lsr #2
74001ae4:	f003 0303 	and.w	r3, r3, #3
74001ae8:	ea4f 0383 	mov.w	r3, r3, lsl #2
74001aec:	f107 0228 	add.w	r2, r7, #40	; 0x28
74001af0:	4413      	add	r3, r2
74001af2:	f853 3c28 	ldr.w	r3, [r3, #-40]
74001af6:	613b      	str	r3, [r7, #16]
    PclkDiv1 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK1_DIV_SHIFT) & PCLK_DIV_MASK)];
74001af8:	f242 0300 	movw	r3, #8192	; 0x2000
74001afc:	f2ce 0304 	movt	r3, #57348	; 0xe004
74001b00:	6c9b      	ldr	r3, [r3, #72]	; 0x48
74001b02:	ea4f 1313 	mov.w	r3, r3, lsr #4
74001b06:	f003 0303 	and.w	r3, r3, #3
74001b0a:	ea4f 0383 	mov.w	r3, r3, lsl #2
74001b0e:	f107 0228 	add.w	r2, r7, #40	; 0x28
74001b12:	4413      	add	r3, r2
74001b14:	f853 3c28 	ldr.w	r3, [r3, #-40]
74001b18:	617b      	str	r3, [r7, #20]
    AceDiv = pclk_div_lut[((SYSREG->MSS_CLK_CR >> ACE_DIV_SHIFT) & PCLK_DIV_MASK)];
74001b1a:	f242 0300 	movw	r3, #8192	; 0x2000
74001b1e:	f2ce 0304 	movt	r3, #57348	; 0xe004
74001b22:	6c9b      	ldr	r3, [r3, #72]	; 0x48
74001b24:	ea4f 1393 	mov.w	r3, r3, lsr #6
74001b28:	f003 0303 	and.w	r3, r3, #3
74001b2c:	ea4f 0383 	mov.w	r3, r3, lsl #2
74001b30:	f107 0228 	add.w	r2, r7, #40	; 0x28
74001b34:	4413      	add	r3, r2
74001b36:	f853 3c28 	ldr.w	r3, [r3, #-40]
74001b3a:	61bb      	str	r3, [r7, #24]
    {
        /* Compute the FPGA fabric frequency divider. */
        uint32_t obdiv;
        uint32_t obdivhalf;
        
        obdiv = (SYSREG->MSS_CCC_DIV_CR >> OBDIV_SHIFT) & OBDIV_MASK;
74001b3c:	f242 0300 	movw	r3, #8192	; 0x2000
74001b40:	f2ce 0304 	movt	r3, #57348	; 0xe004
74001b44:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
74001b46:	ea4f 2313 	mov.w	r3, r3, lsr #8
74001b4a:	f003 031f 	and.w	r3, r3, #31
74001b4e:	623b      	str	r3, [r7, #32]
        obdivhalf = (SYSREG->MSS_CCC_DIV_CR >> OBDIVHALF_SHIFT) & OBDIVHALF_MASK;
74001b50:	f242 0300 	movw	r3, #8192	; 0x2000
74001b54:	f2ce 0304 	movt	r3, #57348	; 0xe004
74001b58:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
74001b5a:	ea4f 3353 	mov.w	r3, r3, lsr #13
74001b5e:	f003 0301 	and.w	r3, r3, #1
74001b62:	627b      	str	r3, [r7, #36]	; 0x24
        FabDiv = obdiv + 1uL;
74001b64:	6a3b      	ldr	r3, [r7, #32]
74001b66:	f103 0301 	add.w	r3, r3, #1
74001b6a:	61fb      	str	r3, [r7, #28]
        if ( obdivhalf != 0uL )
74001b6c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
74001b6e:	2b00      	cmp	r3, #0
74001b70:	d003      	beq.n	74001b7a <SystemCoreClockUpdate+0xba>
        {
            FabDiv = FabDiv * 2uL;
74001b72:	69fb      	ldr	r3, [r7, #28]
74001b74:	ea4f 0343 	mov.w	r3, r3, lsl #1
74001b78:	61fb      	str	r3, [r7, #28]
    }
    
    /* Retrieve FCLK from eNVM spare pages if Actel system boot programmed as part of the system. */
    
    /* Read system clock from eNVM spare pages. */
    SystemCoreClock = GetSystemClock();
74001b7a:	f000 f849 	bl	74001c10 <GetSystemClock>
74001b7e:	4602      	mov	r2, r0
74001b80:	f240 0328 	movw	r3, #40	; 0x28
74001b84:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001b88:	601a      	str	r2, [r3, #0]
    g_FrequencyPCLK0 = SystemCoreClock / PclkDiv0;
74001b8a:	f240 0328 	movw	r3, #40	; 0x28
74001b8e:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001b92:	681a      	ldr	r2, [r3, #0]
74001b94:	693b      	ldr	r3, [r7, #16]
74001b96:	fbb2 f2f3 	udiv	r2, r2, r3
74001b9a:	f240 032c 	movw	r3, #44	; 0x2c
74001b9e:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001ba2:	601a      	str	r2, [r3, #0]
    g_FrequencyPCLK1 = SystemCoreClock / PclkDiv1;
74001ba4:	f240 0328 	movw	r3, #40	; 0x28
74001ba8:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001bac:	681a      	ldr	r2, [r3, #0]
74001bae:	697b      	ldr	r3, [r7, #20]
74001bb0:	fbb2 f2f3 	udiv	r2, r2, r3
74001bb4:	f240 0330 	movw	r3, #48	; 0x30
74001bb8:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001bbc:	601a      	str	r2, [r3, #0]
    g_FrequencyACE = SystemCoreClock / AceDiv;
74001bbe:	f240 0328 	movw	r3, #40	; 0x28
74001bc2:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001bc6:	681a      	ldr	r2, [r3, #0]
74001bc8:	69bb      	ldr	r3, [r7, #24]
74001bca:	fbb2 f2f3 	udiv	r2, r2, r3
74001bce:	f240 0334 	movw	r3, #52	; 0x34
74001bd2:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001bd6:	601a      	str	r2, [r3, #0]
    g_FrequencyFPGA = SystemCoreClock / FabDiv;
74001bd8:	f240 0328 	movw	r3, #40	; 0x28
74001bdc:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001be0:	681a      	ldr	r2, [r3, #0]
74001be2:	69fb      	ldr	r3, [r7, #28]
74001be4:	fbb2 f2f3 	udiv	r2, r2, r3
74001be8:	f240 0338 	movw	r3, #56	; 0x38
74001bec:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001bf0:	601a      	str	r2, [r3, #0]
    
    /* Keep SystemFrequency as well as SystemCoreClock for legacy reasons. */
    SystemFrequency = SystemCoreClock;
74001bf2:	f240 0328 	movw	r3, #40	; 0x28
74001bf6:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001bfa:	681a      	ldr	r2, [r3, #0]
74001bfc:	f240 0324 	movw	r3, #36	; 0x24
74001c00:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001c04:	601a      	str	r2, [r3, #0]
}
74001c06:	f107 0728 	add.w	r7, r7, #40	; 0x28
74001c0a:	46bd      	mov	sp, r7
74001c0c:	bd80      	pop	{r7, pc}
74001c0e:	bf00      	nop

74001c10 <GetSystemClock>:
 * retrieved from eNVM spare pages.
 * The FCLK frequency value selected in the MSS Configurator software tool is
 * stored in eNVM spare pages as part of the Actel system boot configuration data.
 */
uint32_t GetSystemClock( void )
{
74001c10:	b480      	push	{r7}
74001c12:	b08b      	sub	sp, #44	; 0x2c
74001c14:	af00      	add	r7, sp, #0
    uint32_t fclk = 0uL;
74001c16:	f04f 0300 	mov.w	r3, #0
74001c1a:	607b      	str	r3, [r7, #4]
    
    uint32_t * p_sysboot_key = SYSBOOT_KEY_ADDR;
74001c1c:	f640 031c 	movw	r3, #2076	; 0x81c
74001c20:	f2c6 0308 	movt	r3, #24584	; 0x6008
74001c24:	60bb      	str	r3, [r7, #8]
    uint32_t * p_idcode = IDCODE_LOCATION;
74001c26:	f240 2330 	movw	r3, #560	; 0x230
74001c2a:	f2c6 0308 	movt	r3, #24584	; 0x6008
74001c2e:	60fb      	str	r3, [r7, #12]
    uint32_t idcode;
	
    idcode = *p_idcode & ~IDCODE_DEV_REV_MASK;
74001c30:	68fb      	ldr	r3, [r7, #12]
74001c32:	681b      	ldr	r3, [r3, #0]
74001c34:	f023 4370 	bic.w	r3, r3, #4026531840	; 0xf0000000
74001c38:	613b      	str	r3, [r7, #16]
	
    if ( A2F060IFX_ID == idcode )
74001c3a:	693a      	ldr	r2, [r7, #16]
74001c3c:	f241 13cf 	movw	r3, #4559	; 0x11cf
74001c40:	f2c0 53a1 	movt	r3, #1441	; 0x5a1
74001c44:	429a      	cmp	r2, r3
74001c46:	d108      	bne.n	74001c5a <GetSystemClock+0x4a>
    {
        uint32_t *p_fclk = SYSBOOT_A2F060_FCLK_ADDR;
74001c48:	f64e 732c 	movw	r3, #61228	; 0xef2c
74001c4c:	f2c6 0301 	movt	r3, #24577	; 0x6001
74001c50:	617b      	str	r3, [r7, #20]
        fclk = *p_fclk;
74001c52:	697b      	ldr	r3, [r7, #20]
74001c54:	681b      	ldr	r3, [r3, #0]
74001c56:	607b      	str	r3, [r7, #4]
74001c58:	e03d      	b.n	74001cd6 <GetSystemClock+0xc6>
    }
    else if ( SYSBOOT_KEY_VALUE == *p_sysboot_key )
74001c5a:	68bb      	ldr	r3, [r7, #8]
74001c5c:	681a      	ldr	r2, [r3, #0]
74001c5e:	f244 3341 	movw	r3, #17217	; 0x4341
74001c62:	f6c4 4354 	movt	r3, #19540	; 0x4c54
74001c66:	429a      	cmp	r2, r3
74001c68:	d135      	bne.n	74001cd6 <GetSystemClock+0xc6>
    {
        /* Actel system boot programmed, check if it has the FCLK value stored. */
        uint32_t *p_sysboot_version = SYSBOOT_VERSION_ADDR;
74001c6a:	f640 0340 	movw	r3, #2112	; 0x840
74001c6e:	f2c6 0308 	movt	r3, #24584	; 0x6008
74001c72:	61bb      	str	r3, [r7, #24]
        uint32_t sysboot_version = *p_sysboot_version;
74001c74:	69bb      	ldr	r3, [r7, #24]
74001c76:	681b      	ldr	r3, [r3, #0]
74001c78:	61fb      	str	r3, [r7, #28]
        
        sysboot_version &= SYSBOOT_VERSION_MASK;
74001c7a:	69fb      	ldr	r3, [r7, #28]
74001c7c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
74001c80:	61fb      	str	r3, [r7, #28]
        
        if ( sysboot_version >= MIN_SYSBOOT_VERSION )
74001c82:	69fa      	ldr	r2, [r7, #28]
74001c84:	f240 3300 	movw	r3, #768	; 0x300
74001c88:	f2c0 0301 	movt	r3, #1
74001c8c:	429a      	cmp	r2, r3
74001c8e:	d922      	bls.n	74001cd6 <GetSystemClock+0xc6>
        {
            /* Handle change of eNVM location of FCLK between 1.3.x and 2.x.x versions of the system boot. */
            if ( sysboot_version < SYSBOOT_VERSION_2_X )
74001c90:	69fa      	ldr	r2, [r7, #28]
74001c92:	f64f 73ff 	movw	r3, #65535	; 0xffff
74001c96:	f2c0 0301 	movt	r3, #1
74001c9a:	429a      	cmp	r2, r3
74001c9c:	d808      	bhi.n	74001cb0 <GetSystemClock+0xa0>
            {
                /* Read FCLK value from MSS configurator generated configuration
                 * data stored in eNVM spare pages as part of system boot version 1.3.x
                 * configuration tables. */
                uint32_t *p_fclk = SYSBOOT_1_3_FCLK_ADDR;
74001c9e:	f241 632c 	movw	r3, #5676	; 0x162c
74001ca2:	f2c6 0308 	movt	r3, #24584	; 0x6008
74001ca6:	623b      	str	r3, [r7, #32]
                fclk = *p_fclk;
74001ca8:	6a3b      	ldr	r3, [r7, #32]
74001caa:	681b      	ldr	r3, [r3, #0]
74001cac:	607b      	str	r3, [r7, #4]
74001cae:	e012      	b.n	74001cd6 <GetSystemClock+0xc6>
            }
            else if ( sysboot_version < MAX_SYSBOOT_VERSION )
74001cb0:	69fa      	ldr	r2, [r7, #28]
74001cb2:	f64f 73ff 	movw	r3, #65535	; 0xffff
74001cb6:	f2c0 0302 	movt	r3, #2
74001cba:	429a      	cmp	r2, r3
74001cbc:	d808      	bhi.n	74001cd0 <GetSystemClock+0xc0>
            {
                /* Read FCLK value from MSS configurator generated configuration
                 * data stored in eNVM spare pages as part of system boot version 2.x.x
                 * configuration tables. */
                uint32_t *p_fclk = SYSBOOT_2_x_FCLK_ADDR;
74001cbe:	f641 63ac 	movw	r3, #7852	; 0x1eac
74001cc2:	f2c6 0308 	movt	r3, #24584	; 0x6008
74001cc6:	627b      	str	r3, [r7, #36]	; 0x24
                fclk = *p_fclk;
74001cc8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
74001cca:	681b      	ldr	r3, [r3, #0]
74001ccc:	607b      	str	r3, [r7, #4]
74001cce:	e002      	b.n	74001cd6 <GetSystemClock+0xc6>
            }
            else
            {
                fclk = 0uL;
74001cd0:	f04f 0300 	mov.w	r3, #0
74001cd4:	607b      	str	r3, [r7, #4]
            }
        }
    }
    
    if ( 0uL == fclk )
74001cd6:	687b      	ldr	r3, [r7, #4]
74001cd8:	2b00      	cmp	r3, #0
74001cda:	d105      	bne.n	74001ce8 <GetSystemClock+0xd8>
        /* 
         * Could not retrieve FCLK from system boot configuration data. Fall back
         * to using SMARTFUSION_FCLK_FREQ which must then be defined as part of
         * project settings.
         */
        ASSERT( SMARTFUSION_FCLK_FREQ_DEFINED );
74001cdc:	be00      	bkpt	0x0000
        fclk = SMARTFUSION_FCLK_FREQ;
74001cde:	f647 0340 	movw	r3, #30784	; 0x7840
74001ce2:	f2c0 137d 	movt	r3, #381	; 0x17d
74001ce6:	607b      	str	r3, [r7, #4]
    }
    
    return fclk;
74001ce8:	687b      	ldr	r3, [r7, #4]
}
74001cea:	4618      	mov	r0, r3
74001cec:	f107 072c 	add.w	r7, r7, #44	; 0x2c
74001cf0:	46bd      	mov	sp, r7
74001cf2:	bc80      	pop	{r7}
74001cf4:	4770      	bx	lr
74001cf6:	bf00      	nop

74001cf8 <__errno>:
74001cf8:	f240 033c 	movw	r3, #60	; 0x3c
74001cfc:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001d00:	6818      	ldr	r0, [r3, #0]
74001d02:	4770      	bx	lr

74001d04 <__libc_init_array>:
74001d04:	b570      	push	{r4, r5, r6, lr}
74001d06:	f248 46f0 	movw	r6, #34032	; 0x84f0
74001d0a:	f248 45f0 	movw	r5, #34032	; 0x84f0
74001d0e:	f2c7 4600 	movt	r6, #29696	; 0x7400
74001d12:	f2c7 4500 	movt	r5, #29696	; 0x7400
74001d16:	1b76      	subs	r6, r6, r5
74001d18:	10b6      	asrs	r6, r6, #2
74001d1a:	d006      	beq.n	74001d2a <__libc_init_array+0x26>
74001d1c:	2400      	movs	r4, #0
74001d1e:	f855 3024 	ldr.w	r3, [r5, r4, lsl #2]
74001d22:	3401      	adds	r4, #1
74001d24:	4798      	blx	r3
74001d26:	42a6      	cmp	r6, r4
74001d28:	d8f9      	bhi.n	74001d1e <__libc_init_array+0x1a>
74001d2a:	f248 45f0 	movw	r5, #34032	; 0x84f0
74001d2e:	f248 46f4 	movw	r6, #34036	; 0x84f4
74001d32:	f2c7 4500 	movt	r5, #29696	; 0x7400
74001d36:	f2c7 4600 	movt	r6, #29696	; 0x7400
74001d3a:	1b76      	subs	r6, r6, r5
74001d3c:	f006 fbcc 	bl	740084d8 <_init>
74001d40:	10b6      	asrs	r6, r6, #2
74001d42:	d006      	beq.n	74001d52 <__libc_init_array+0x4e>
74001d44:	2400      	movs	r4, #0
74001d46:	f855 3024 	ldr.w	r3, [r5, r4, lsl #2]
74001d4a:	3401      	adds	r4, #1
74001d4c:	4798      	blx	r3
74001d4e:	42a6      	cmp	r6, r4
74001d50:	d8f9      	bhi.n	74001d46 <__libc_init_array+0x42>
74001d52:	bd70      	pop	{r4, r5, r6, pc}

74001d54 <printf>:
74001d54:	b40f      	push	{r0, r1, r2, r3}
74001d56:	f240 033c 	movw	r3, #60	; 0x3c
74001d5a:	f2c7 0300 	movt	r3, #28672	; 0x7000
74001d5e:	b510      	push	{r4, lr}
74001d60:	681c      	ldr	r4, [r3, #0]
74001d62:	b082      	sub	sp, #8
74001d64:	b124      	cbz	r4, 74001d70 <printf+0x1c>
74001d66:	69a3      	ldr	r3, [r4, #24]
74001d68:	b913      	cbnz	r3, 74001d70 <printf+0x1c>
74001d6a:	4620      	mov	r0, r4
74001d6c:	f002 fe94 	bl	74004a98 <__sinit>
74001d70:	4620      	mov	r0, r4
74001d72:	ac05      	add	r4, sp, #20
74001d74:	9a04      	ldr	r2, [sp, #16]
74001d76:	4623      	mov	r3, r4
74001d78:	6881      	ldr	r1, [r0, #8]
74001d7a:	9401      	str	r4, [sp, #4]
74001d7c:	f000 f82a 	bl	74001dd4 <_vfprintf_r>
74001d80:	b002      	add	sp, #8
74001d82:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
74001d86:	b004      	add	sp, #16
74001d88:	4770      	bx	lr
74001d8a:	bf00      	nop

74001d8c <_printf_r>:
74001d8c:	b40e      	push	{r1, r2, r3}
74001d8e:	b510      	push	{r4, lr}
74001d90:	4604      	mov	r4, r0
74001d92:	b083      	sub	sp, #12
74001d94:	b118      	cbz	r0, 74001d9e <_printf_r+0x12>
74001d96:	6983      	ldr	r3, [r0, #24]
74001d98:	b90b      	cbnz	r3, 74001d9e <_printf_r+0x12>
74001d9a:	f002 fe7d 	bl	74004a98 <__sinit>
74001d9e:	4620      	mov	r0, r4
74001da0:	ac06      	add	r4, sp, #24
74001da2:	9a05      	ldr	r2, [sp, #20]
74001da4:	4623      	mov	r3, r4
74001da6:	6881      	ldr	r1, [r0, #8]
74001da8:	9401      	str	r4, [sp, #4]
74001daa:	f000 f813 	bl	74001dd4 <_vfprintf_r>
74001dae:	b003      	add	sp, #12
74001db0:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
74001db4:	b003      	add	sp, #12
74001db6:	4770      	bx	lr

74001db8 <__sprint_r>:
74001db8:	6893      	ldr	r3, [r2, #8]
74001dba:	b510      	push	{r4, lr}
74001dbc:	4614      	mov	r4, r2
74001dbe:	b913      	cbnz	r3, 74001dc6 <__sprint_r+0xe>
74001dc0:	6053      	str	r3, [r2, #4]
74001dc2:	4618      	mov	r0, r3
74001dc4:	bd10      	pop	{r4, pc}
74001dc6:	f002 ffcb 	bl	74004d60 <__sfvwrite_r>
74001dca:	2300      	movs	r3, #0
74001dcc:	6063      	str	r3, [r4, #4]
74001dce:	60a3      	str	r3, [r4, #8]
74001dd0:	bd10      	pop	{r4, pc}
74001dd2:	bf00      	nop

74001dd4 <_vfprintf_r>:
74001dd4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
74001dd8:	f5ad 6dae 	sub.w	sp, sp, #1392	; 0x570
74001ddc:	b083      	sub	sp, #12
74001dde:	460e      	mov	r6, r1
74001de0:	4615      	mov	r5, r2
74001de2:	469a      	mov	sl, r3
74001de4:	4681      	mov	r9, r0
74001de6:	f003 f9ab 	bl	74005140 <_localeconv_r>
74001dea:	6800      	ldr	r0, [r0, #0]
74001dec:	901d      	str	r0, [sp, #116]	; 0x74
74001dee:	f1b9 0f00 	cmp.w	r9, #0
74001df2:	d004      	beq.n	74001dfe <_vfprintf_r+0x2a>
74001df4:	f8d9 3018 	ldr.w	r3, [r9, #24]
74001df8:	2b00      	cmp	r3, #0
74001dfa:	f000 815a 	beq.w	740020b2 <_vfprintf_r+0x2de>
74001dfe:	f248 330c 	movw	r3, #33548	; 0x830c
74001e02:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001e06:	429e      	cmp	r6, r3
74001e08:	bf08      	it	eq
74001e0a:	f8d9 6004 	ldreq.w	r6, [r9, #4]
74001e0e:	d010      	beq.n	74001e32 <_vfprintf_r+0x5e>
74001e10:	f248 332c 	movw	r3, #33580	; 0x832c
74001e14:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001e18:	429e      	cmp	r6, r3
74001e1a:	bf08      	it	eq
74001e1c:	f8d9 6008 	ldreq.w	r6, [r9, #8]
74001e20:	d007      	beq.n	74001e32 <_vfprintf_r+0x5e>
74001e22:	f248 334c 	movw	r3, #33612	; 0x834c
74001e26:	f2c7 4300 	movt	r3, #29696	; 0x7400
74001e2a:	429e      	cmp	r6, r3
74001e2c:	bf08      	it	eq
74001e2e:	f8d9 600c 	ldreq.w	r6, [r9, #12]
74001e32:	f8b6 c00c 	ldrh.w	ip, [r6, #12]
74001e36:	fa1f f38c 	uxth.w	r3, ip
74001e3a:	f413 5f00 	tst.w	r3, #8192	; 0x2000
74001e3e:	d109      	bne.n	74001e54 <_vfprintf_r+0x80>
74001e40:	f44c 5c00 	orr.w	ip, ip, #8192	; 0x2000
74001e44:	6e72      	ldr	r2, [r6, #100]	; 0x64
74001e46:	f8a6 c00c 	strh.w	ip, [r6, #12]
74001e4a:	fa1f f38c 	uxth.w	r3, ip
74001e4e:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
74001e52:	6672      	str	r2, [r6, #100]	; 0x64
74001e54:	f013 0f08 	tst.w	r3, #8
74001e58:	f001 8301 	beq.w	7400345e <_vfprintf_r+0x168a>
74001e5c:	6932      	ldr	r2, [r6, #16]
74001e5e:	2a00      	cmp	r2, #0
74001e60:	f001 82fd 	beq.w	7400345e <_vfprintf_r+0x168a>
74001e64:	f003 031a 	and.w	r3, r3, #26
74001e68:	2b0a      	cmp	r3, #10
74001e6a:	f000 80e0 	beq.w	7400202e <_vfprintf_r+0x25a>
74001e6e:	2200      	movs	r2, #0
74001e70:	9212      	str	r2, [sp, #72]	; 0x48
74001e72:	921a      	str	r2, [sp, #104]	; 0x68
74001e74:	2300      	movs	r3, #0
74001e76:	921c      	str	r2, [sp, #112]	; 0x70
74001e78:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74001e7c:	9211      	str	r2, [sp, #68]	; 0x44
74001e7e:	3404      	adds	r4, #4
74001e80:	9219      	str	r2, [sp, #100]	; 0x64
74001e82:	f50d 62a4 	add.w	r2, sp, #1312	; 0x520
74001e86:	931b      	str	r3, [sp, #108]	; 0x6c
74001e88:	3204      	adds	r2, #4
74001e8a:	f50d 6390 	add.w	r3, sp, #1152	; 0x480
74001e8e:	3228      	adds	r2, #40	; 0x28
74001e90:	3303      	adds	r3, #3
74001e92:	9218      	str	r2, [sp, #96]	; 0x60
74001e94:	9307      	str	r3, [sp, #28]
74001e96:	2300      	movs	r3, #0
74001e98:	f8cd 454c 	str.w	r4, [sp, #1356]	; 0x54c
74001e9c:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74001ea0:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
74001ea4:	782b      	ldrb	r3, [r5, #0]
74001ea6:	1e1a      	subs	r2, r3, #0
74001ea8:	bf18      	it	ne
74001eaa:	2201      	movne	r2, #1
74001eac:	2b25      	cmp	r3, #37	; 0x25
74001eae:	bf0c      	ite	eq
74001eb0:	2200      	moveq	r2, #0
74001eb2:	f002 0201 	andne.w	r2, r2, #1
74001eb6:	b332      	cbz	r2, 74001f06 <_vfprintf_r+0x132>
74001eb8:	462f      	mov	r7, r5
74001eba:	f817 3f01 	ldrb.w	r3, [r7, #1]!
74001ebe:	1e1a      	subs	r2, r3, #0
74001ec0:	bf18      	it	ne
74001ec2:	2201      	movne	r2, #1
74001ec4:	2b25      	cmp	r3, #37	; 0x25
74001ec6:	bf0c      	ite	eq
74001ec8:	2200      	moveq	r2, #0
74001eca:	f002 0201 	andne.w	r2, r2, #1
74001ece:	2a00      	cmp	r2, #0
74001ed0:	d1f3      	bne.n	74001eba <_vfprintf_r+0xe6>
74001ed2:	ebb7 0805 	subs.w	r8, r7, r5
74001ed6:	bf08      	it	eq
74001ed8:	463d      	moveq	r5, r7
74001eda:	d014      	beq.n	74001f06 <_vfprintf_r+0x132>
74001edc:	f8c4 8004 	str.w	r8, [r4, #4]
74001ee0:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74001ee4:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74001ee8:	3301      	adds	r3, #1
74001eea:	6025      	str	r5, [r4, #0]
74001eec:	2b07      	cmp	r3, #7
74001eee:	4442      	add	r2, r8
74001ef0:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74001ef4:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74001ef8:	dc78      	bgt.n	74001fec <_vfprintf_r+0x218>
74001efa:	3408      	adds	r4, #8
74001efc:	9811      	ldr	r0, [sp, #68]	; 0x44
74001efe:	463d      	mov	r5, r7
74001f00:	4440      	add	r0, r8
74001f02:	9011      	str	r0, [sp, #68]	; 0x44
74001f04:	783b      	ldrb	r3, [r7, #0]
74001f06:	2b00      	cmp	r3, #0
74001f08:	d07c      	beq.n	74002004 <_vfprintf_r+0x230>
74001f0a:	1c6b      	adds	r3, r5, #1
74001f0c:	f04f 37ff 	mov.w	r7, #4294967295
74001f10:	202b      	movs	r0, #43	; 0x2b
74001f12:	f04f 0c20 	mov.w	ip, #32
74001f16:	2100      	movs	r1, #0
74001f18:	f04f 0200 	mov.w	r2, #0
74001f1c:	910f      	str	r1, [sp, #60]	; 0x3c
74001f1e:	f88d 2577 	strb.w	r2, [sp, #1399]	; 0x577
74001f22:	f8cd a02c 	str.w	sl, [sp, #44]	; 0x2c
74001f26:	786a      	ldrb	r2, [r5, #1]
74001f28:	910a      	str	r1, [sp, #40]	; 0x28
74001f2a:	1c5d      	adds	r5, r3, #1
74001f2c:	f1a2 0320 	sub.w	r3, r2, #32
74001f30:	2b58      	cmp	r3, #88	; 0x58
74001f32:	f200 8286 	bhi.w	74002442 <_vfprintf_r+0x66e>
74001f36:	e8df f013 	tbh	[pc, r3, lsl #1]
74001f3a:	0298      	.short	0x0298
74001f3c:	02840284 	.word	0x02840284
74001f40:	028402a4 	.word	0x028402a4
74001f44:	02840284 	.word	0x02840284
74001f48:	02840284 	.word	0x02840284
74001f4c:	02ad0284 	.word	0x02ad0284
74001f50:	028402ba 	.word	0x028402ba
74001f54:	02ca02c1 	.word	0x02ca02c1
74001f58:	02e70284 	.word	0x02e70284
74001f5c:	02f002f0 	.word	0x02f002f0
74001f60:	02f002f0 	.word	0x02f002f0
74001f64:	02f002f0 	.word	0x02f002f0
74001f68:	02f002f0 	.word	0x02f002f0
74001f6c:	028402f0 	.word	0x028402f0
74001f70:	02840284 	.word	0x02840284
74001f74:	02840284 	.word	0x02840284
74001f78:	02840284 	.word	0x02840284
74001f7c:	02840284 	.word	0x02840284
74001f80:	03040284 	.word	0x03040284
74001f84:	02840326 	.word	0x02840326
74001f88:	02840326 	.word	0x02840326
74001f8c:	02840284 	.word	0x02840284
74001f90:	036a0284 	.word	0x036a0284
74001f94:	02840284 	.word	0x02840284
74001f98:	02840481 	.word	0x02840481
74001f9c:	02840284 	.word	0x02840284
74001fa0:	02840284 	.word	0x02840284
74001fa4:	02840414 	.word	0x02840414
74001fa8:	042f0284 	.word	0x042f0284
74001fac:	02840284 	.word	0x02840284
74001fb0:	02840284 	.word	0x02840284
74001fb4:	02840284 	.word	0x02840284
74001fb8:	02840284 	.word	0x02840284
74001fbc:	02840284 	.word	0x02840284
74001fc0:	0465044f 	.word	0x0465044f
74001fc4:	03260326 	.word	0x03260326
74001fc8:	03730326 	.word	0x03730326
74001fcc:	02840465 	.word	0x02840465
74001fd0:	03790284 	.word	0x03790284
74001fd4:	03850284 	.word	0x03850284
74001fd8:	03ad0396 	.word	0x03ad0396
74001fdc:	0284040a 	.word	0x0284040a
74001fe0:	028403cc 	.word	0x028403cc
74001fe4:	028403f4 	.word	0x028403f4
74001fe8:	00c00284 	.word	0x00c00284
74001fec:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74001ff0:	4648      	mov	r0, r9
74001ff2:	4631      	mov	r1, r6
74001ff4:	320c      	adds	r2, #12
74001ff6:	f7ff fedf 	bl	74001db8 <__sprint_r>
74001ffa:	b958      	cbnz	r0, 74002014 <_vfprintf_r+0x240>
74001ffc:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002000:	3404      	adds	r4, #4
74002002:	e77b      	b.n	74001efc <_vfprintf_r+0x128>
74002004:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
74002008:	2b00      	cmp	r3, #0
7400200a:	f041 8192 	bne.w	74003332 <_vfprintf_r+0x155e>
7400200e:	2300      	movs	r3, #0
74002010:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002014:	89b3      	ldrh	r3, [r6, #12]
74002016:	f013 0f40 	tst.w	r3, #64	; 0x40
7400201a:	d002      	beq.n	74002022 <_vfprintf_r+0x24e>
7400201c:	f04f 30ff 	mov.w	r0, #4294967295
74002020:	9011      	str	r0, [sp, #68]	; 0x44
74002022:	9811      	ldr	r0, [sp, #68]	; 0x44
74002024:	b05f      	add	sp, #380	; 0x17c
74002026:	f50d 6d80 	add.w	sp, sp, #1024	; 0x400
7400202a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
7400202e:	f9b6 300e 	ldrsh.w	r3, [r6, #14]
74002032:	2b00      	cmp	r3, #0
74002034:	f6ff af1b 	blt.w	74001e6e <_vfprintf_r+0x9a>
74002038:	6a37      	ldr	r7, [r6, #32]
7400203a:	f02c 0c02 	bic.w	ip, ip, #2
7400203e:	f8d6 e028 	ldr.w	lr, [r6, #40]	; 0x28
74002042:	f50d 648e 	add.w	r4, sp, #1136	; 0x470
74002046:	f8ad c488 	strh.w	ip, [sp, #1160]	; 0x488
7400204a:	340c      	adds	r4, #12
7400204c:	f8b6 c00e 	ldrh.w	ip, [r6, #14]
74002050:	462a      	mov	r2, r5
74002052:	4653      	mov	r3, sl
74002054:	4648      	mov	r0, r9
74002056:	4621      	mov	r1, r4
74002058:	ad1f      	add	r5, sp, #124	; 0x7c
7400205a:	f8cd 749c 	str.w	r7, [sp, #1180]	; 0x49c
7400205e:	2700      	movs	r7, #0
74002060:	f8cd 548c 	str.w	r5, [sp, #1164]	; 0x48c
74002064:	f8cd 547c 	str.w	r5, [sp, #1148]	; 0x47c
74002068:	f44f 6580 	mov.w	r5, #1024	; 0x400
7400206c:	f8cd e4a4 	str.w	lr, [sp, #1188]	; 0x4a4
74002070:	f8ad c48a 	strh.w	ip, [sp, #1162]	; 0x48a
74002074:	f8cd 5490 	str.w	r5, [sp, #1168]	; 0x490
74002078:	f8cd 7494 	str.w	r7, [sp, #1172]	; 0x494
7400207c:	f8cd 5484 	str.w	r5, [sp, #1156]	; 0x484
74002080:	f7ff fea8 	bl	74001dd4 <_vfprintf_r>
74002084:	2800      	cmp	r0, #0
74002086:	9011      	str	r0, [sp, #68]	; 0x44
74002088:	db09      	blt.n	7400209e <_vfprintf_r+0x2ca>
7400208a:	4621      	mov	r1, r4
7400208c:	4648      	mov	r0, r9
7400208e:	f002 fb93 	bl	740047b8 <_fflush_r>
74002092:	9911      	ldr	r1, [sp, #68]	; 0x44
74002094:	42b8      	cmp	r0, r7
74002096:	bf18      	it	ne
74002098:	f04f 31ff 	movne.w	r1, #4294967295
7400209c:	9111      	str	r1, [sp, #68]	; 0x44
7400209e:	f8bd 3488 	ldrh.w	r3, [sp, #1160]	; 0x488
740020a2:	f013 0f40 	tst.w	r3, #64	; 0x40
740020a6:	d0bc      	beq.n	74002022 <_vfprintf_r+0x24e>
740020a8:	89b3      	ldrh	r3, [r6, #12]
740020aa:	f043 0340 	orr.w	r3, r3, #64	; 0x40
740020ae:	81b3      	strh	r3, [r6, #12]
740020b0:	e7b7      	b.n	74002022 <_vfprintf_r+0x24e>
740020b2:	4648      	mov	r0, r9
740020b4:	f002 fcf0 	bl	74004a98 <__sinit>
740020b8:	e6a1      	b.n	74001dfe <_vfprintf_r+0x2a>
740020ba:	980a      	ldr	r0, [sp, #40]	; 0x28
740020bc:	f248 2cdc 	movw	ip, #33500	; 0x82dc
740020c0:	f2c7 4c00 	movt	ip, #29696	; 0x7400
740020c4:	9216      	str	r2, [sp, #88]	; 0x58
740020c6:	f010 0f20 	tst.w	r0, #32
740020ca:	f8cd c064 	str.w	ip, [sp, #100]	; 0x64
740020ce:	f000 836e 	beq.w	740027ae <_vfprintf_r+0x9da>
740020d2:	990b      	ldr	r1, [sp, #44]	; 0x2c
740020d4:	1dcb      	adds	r3, r1, #7
740020d6:	f023 0307 	bic.w	r3, r3, #7
740020da:	f103 0208 	add.w	r2, r3, #8
740020de:	920b      	str	r2, [sp, #44]	; 0x2c
740020e0:	e9d3 ab00 	ldrd	sl, fp, [r3]
740020e4:	ea5a 020b 	orrs.w	r2, sl, fp
740020e8:	9b0a      	ldr	r3, [sp, #40]	; 0x28
740020ea:	bf0c      	ite	eq
740020ec:	2200      	moveq	r2, #0
740020ee:	2201      	movne	r2, #1
740020f0:	4213      	tst	r3, r2
740020f2:	f040 866b 	bne.w	74002dcc <_vfprintf_r+0xff8>
740020f6:	2302      	movs	r3, #2
740020f8:	f04f 0100 	mov.w	r1, #0
740020fc:	f88d 1577 	strb.w	r1, [sp, #1399]	; 0x577
74002100:	2f00      	cmp	r7, #0
74002102:	bfa2      	ittt	ge
74002104:	f8dd c028 	ldrge.w	ip, [sp, #40]	; 0x28
74002108:	f02c 0c80 	bicge.w	ip, ip, #128	; 0x80
7400210c:	f8cd c028 	strge.w	ip, [sp, #40]	; 0x28
74002110:	2f00      	cmp	r7, #0
74002112:	bf18      	it	ne
74002114:	f042 0201 	orrne.w	r2, r2, #1
74002118:	2a00      	cmp	r2, #0
7400211a:	f000 841e 	beq.w	7400295a <_vfprintf_r+0xb86>
7400211e:	2b01      	cmp	r3, #1
74002120:	f000 85de 	beq.w	74002ce0 <_vfprintf_r+0xf0c>
74002124:	2b02      	cmp	r3, #2
74002126:	f000 85c1 	beq.w	74002cac <_vfprintf_r+0xed8>
7400212a:	9918      	ldr	r1, [sp, #96]	; 0x60
7400212c:	9113      	str	r1, [sp, #76]	; 0x4c
7400212e:	ea4f 08da 	mov.w	r8, sl, lsr #3
74002132:	ea4f 0cdb 	mov.w	ip, fp, lsr #3
74002136:	ea48 784b 	orr.w	r8, r8, fp, lsl #29
7400213a:	f00a 0007 	and.w	r0, sl, #7
7400213e:	46e3      	mov	fp, ip
74002140:	46c2      	mov	sl, r8
74002142:	3030      	adds	r0, #48	; 0x30
74002144:	ea5a 020b 	orrs.w	r2, sl, fp
74002148:	f801 0d01 	strb.w	r0, [r1, #-1]!
7400214c:	d1ef      	bne.n	7400212e <_vfprintf_r+0x35a>
7400214e:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002152:	9113      	str	r1, [sp, #76]	; 0x4c
74002154:	f01c 0f01 	tst.w	ip, #1
74002158:	f040 868c 	bne.w	74002e74 <_vfprintf_r+0x10a0>
7400215c:	9818      	ldr	r0, [sp, #96]	; 0x60
7400215e:	1a40      	subs	r0, r0, r1
74002160:	9010      	str	r0, [sp, #64]	; 0x40
74002162:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
74002166:	9a10      	ldr	r2, [sp, #64]	; 0x40
74002168:	9717      	str	r7, [sp, #92]	; 0x5c
7400216a:	42ba      	cmp	r2, r7
7400216c:	bfb8      	it	lt
7400216e:	463a      	movlt	r2, r7
74002170:	920c      	str	r2, [sp, #48]	; 0x30
74002172:	b113      	cbz	r3, 7400217a <_vfprintf_r+0x3a6>
74002174:	9a0c      	ldr	r2, [sp, #48]	; 0x30
74002176:	3201      	adds	r2, #1
74002178:	920c      	str	r2, [sp, #48]	; 0x30
7400217a:	9b0a      	ldr	r3, [sp, #40]	; 0x28
7400217c:	980a      	ldr	r0, [sp, #40]	; 0x28
7400217e:	f013 0302 	ands.w	r3, r3, #2
74002182:	9315      	str	r3, [sp, #84]	; 0x54
74002184:	bf1e      	ittt	ne
74002186:	f8dd c030 	ldrne.w	ip, [sp, #48]	; 0x30
7400218a:	f10c 0c02 	addne.w	ip, ip, #2
7400218e:	f8cd c030 	strne.w	ip, [sp, #48]	; 0x30
74002192:	f010 0084 	ands.w	r0, r0, #132	; 0x84
74002196:	9014      	str	r0, [sp, #80]	; 0x50
74002198:	d14d      	bne.n	74002236 <_vfprintf_r+0x462>
7400219a:	990f      	ldr	r1, [sp, #60]	; 0x3c
7400219c:	9a0c      	ldr	r2, [sp, #48]	; 0x30
7400219e:	1a8f      	subs	r7, r1, r2
740021a0:	2f00      	cmp	r7, #0
740021a2:	dd48      	ble.n	74002236 <_vfprintf_r+0x462>
740021a4:	2f10      	cmp	r7, #16
740021a6:	f248 2898 	movw	r8, #33432	; 0x8298
740021aa:	bfd8      	it	le
740021ac:	f2c7 4800 	movtle	r8, #29696	; 0x7400
740021b0:	dd30      	ble.n	74002214 <_vfprintf_r+0x440>
740021b2:	f2c7 4800 	movt	r8, #29696	; 0x7400
740021b6:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
740021ba:	4643      	mov	r3, r8
740021bc:	f04f 0a10 	mov.w	sl, #16
740021c0:	46a8      	mov	r8, r5
740021c2:	f10b 0b0c 	add.w	fp, fp, #12
740021c6:	461d      	mov	r5, r3
740021c8:	e002      	b.n	740021d0 <_vfprintf_r+0x3fc>
740021ca:	3f10      	subs	r7, #16
740021cc:	2f10      	cmp	r7, #16
740021ce:	dd1e      	ble.n	7400220e <_vfprintf_r+0x43a>
740021d0:	f8c4 a004 	str.w	sl, [r4, #4]
740021d4:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
740021d8:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
740021dc:	3301      	adds	r3, #1
740021de:	6025      	str	r5, [r4, #0]
740021e0:	3210      	adds	r2, #16
740021e2:	2b07      	cmp	r3, #7
740021e4:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
740021e8:	f104 0408 	add.w	r4, r4, #8
740021ec:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
740021f0:	ddeb      	ble.n	740021ca <_vfprintf_r+0x3f6>
740021f2:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
740021f6:	4648      	mov	r0, r9
740021f8:	4631      	mov	r1, r6
740021fa:	465a      	mov	r2, fp
740021fc:	3404      	adds	r4, #4
740021fe:	f7ff fddb 	bl	74001db8 <__sprint_r>
74002202:	2800      	cmp	r0, #0
74002204:	f47f af06 	bne.w	74002014 <_vfprintf_r+0x240>
74002208:	3f10      	subs	r7, #16
7400220a:	2f10      	cmp	r7, #16
7400220c:	dce0      	bgt.n	740021d0 <_vfprintf_r+0x3fc>
7400220e:	462b      	mov	r3, r5
74002210:	4645      	mov	r5, r8
74002212:	4698      	mov	r8, r3
74002214:	6067      	str	r7, [r4, #4]
74002216:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
7400221a:	f8c4 8000 	str.w	r8, [r4]
7400221e:	1c5a      	adds	r2, r3, #1
74002220:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
74002224:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002228:	19db      	adds	r3, r3, r7
7400222a:	2a07      	cmp	r2, #7
7400222c:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
74002230:	f300 858a 	bgt.w	74002d48 <_vfprintf_r+0xf74>
74002234:	3408      	adds	r4, #8
74002236:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7400223a:	b19b      	cbz	r3, 74002264 <_vfprintf_r+0x490>
7400223c:	2301      	movs	r3, #1
7400223e:	6063      	str	r3, [r4, #4]
74002240:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002244:	f50d 62ae 	add.w	r2, sp, #1392	; 0x570
74002248:	3207      	adds	r2, #7
7400224a:	6022      	str	r2, [r4, #0]
7400224c:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002250:	3301      	adds	r3, #1
74002252:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002256:	3201      	adds	r2, #1
74002258:	2b07      	cmp	r3, #7
7400225a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
7400225e:	f300 84b6 	bgt.w	74002bce <_vfprintf_r+0xdfa>
74002262:	3408      	adds	r4, #8
74002264:	9b15      	ldr	r3, [sp, #84]	; 0x54
74002266:	b19b      	cbz	r3, 74002290 <_vfprintf_r+0x4bc>
74002268:	2302      	movs	r3, #2
7400226a:	6063      	str	r3, [r4, #4]
7400226c:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002270:	f50d 62ae 	add.w	r2, sp, #1392	; 0x570
74002274:	3204      	adds	r2, #4
74002276:	6022      	str	r2, [r4, #0]
74002278:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
7400227c:	3301      	adds	r3, #1
7400227e:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002282:	3202      	adds	r2, #2
74002284:	2b07      	cmp	r3, #7
74002286:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
7400228a:	f300 84af 	bgt.w	74002bec <_vfprintf_r+0xe18>
7400228e:	3408      	adds	r4, #8
74002290:	f8dd c050 	ldr.w	ip, [sp, #80]	; 0x50
74002294:	f1bc 0f80 	cmp.w	ip, #128	; 0x80
74002298:	f000 8376 	beq.w	74002988 <_vfprintf_r+0xbb4>
7400229c:	9b17      	ldr	r3, [sp, #92]	; 0x5c
7400229e:	9a10      	ldr	r2, [sp, #64]	; 0x40
740022a0:	1a9f      	subs	r7, r3, r2
740022a2:	2f00      	cmp	r7, #0
740022a4:	dd43      	ble.n	7400232e <_vfprintf_r+0x55a>
740022a6:	2f10      	cmp	r7, #16
740022a8:	f8df 8b8c 	ldr.w	r8, [pc, #2956]	; 74002e38 <_vfprintf_r+0x1064>
740022ac:	dd2e      	ble.n	7400230c <_vfprintf_r+0x538>
740022ae:	4643      	mov	r3, r8
740022b0:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
740022b4:	46a8      	mov	r8, r5
740022b6:	f04f 0a10 	mov.w	sl, #16
740022ba:	f10b 0b0c 	add.w	fp, fp, #12
740022be:	461d      	mov	r5, r3
740022c0:	e002      	b.n	740022c8 <_vfprintf_r+0x4f4>
740022c2:	3f10      	subs	r7, #16
740022c4:	2f10      	cmp	r7, #16
740022c6:	dd1e      	ble.n	74002306 <_vfprintf_r+0x532>
740022c8:	f8c4 a004 	str.w	sl, [r4, #4]
740022cc:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
740022d0:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
740022d4:	3301      	adds	r3, #1
740022d6:	6025      	str	r5, [r4, #0]
740022d8:	3210      	adds	r2, #16
740022da:	2b07      	cmp	r3, #7
740022dc:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
740022e0:	f104 0408 	add.w	r4, r4, #8
740022e4:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
740022e8:	ddeb      	ble.n	740022c2 <_vfprintf_r+0x4ee>
740022ea:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
740022ee:	4648      	mov	r0, r9
740022f0:	4631      	mov	r1, r6
740022f2:	465a      	mov	r2, fp
740022f4:	3404      	adds	r4, #4
740022f6:	f7ff fd5f 	bl	74001db8 <__sprint_r>
740022fa:	2800      	cmp	r0, #0
740022fc:	f47f ae8a 	bne.w	74002014 <_vfprintf_r+0x240>
74002300:	3f10      	subs	r7, #16
74002302:	2f10      	cmp	r7, #16
74002304:	dce0      	bgt.n	740022c8 <_vfprintf_r+0x4f4>
74002306:	462b      	mov	r3, r5
74002308:	4645      	mov	r5, r8
7400230a:	4698      	mov	r8, r3
7400230c:	6067      	str	r7, [r4, #4]
7400230e:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002312:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002316:	3301      	adds	r3, #1
74002318:	f8c4 8000 	str.w	r8, [r4]
7400231c:	19d2      	adds	r2, r2, r7
7400231e:	2b07      	cmp	r3, #7
74002320:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002324:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002328:	f300 8442 	bgt.w	74002bb0 <_vfprintf_r+0xddc>
7400232c:	3408      	adds	r4, #8
7400232e:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002332:	f41c 7f80 	tst.w	ip, #256	; 0x100
74002336:	f040 829d 	bne.w	74002874 <_vfprintf_r+0xaa0>
7400233a:	9810      	ldr	r0, [sp, #64]	; 0x40
7400233c:	9913      	ldr	r1, [sp, #76]	; 0x4c
7400233e:	6060      	str	r0, [r4, #4]
74002340:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002344:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002348:	3301      	adds	r3, #1
7400234a:	6021      	str	r1, [r4, #0]
7400234c:	1812      	adds	r2, r2, r0
7400234e:	2b07      	cmp	r3, #7
74002350:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002354:	bfd8      	it	le
74002356:	f104 0308 	addle.w	r3, r4, #8
7400235a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
7400235e:	f300 839b 	bgt.w	74002a98 <_vfprintf_r+0xcc4>
74002362:	990a      	ldr	r1, [sp, #40]	; 0x28
74002364:	f011 0f04 	tst.w	r1, #4
74002368:	d055      	beq.n	74002416 <_vfprintf_r+0x642>
7400236a:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
7400236c:	f8dd c030 	ldr.w	ip, [sp, #48]	; 0x30
74002370:	ebcc 0702 	rsb	r7, ip, r2
74002374:	2f00      	cmp	r7, #0
74002376:	dd4e      	ble.n	74002416 <_vfprintf_r+0x642>
74002378:	2f10      	cmp	r7, #16
7400237a:	f248 2898 	movw	r8, #33432	; 0x8298
7400237e:	bfd8      	it	le
74002380:	f2c7 4800 	movtle	r8, #29696	; 0x7400
74002384:	dd2e      	ble.n	740023e4 <_vfprintf_r+0x610>
74002386:	f2c7 4800 	movt	r8, #29696	; 0x7400
7400238a:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
7400238e:	4642      	mov	r2, r8
74002390:	2410      	movs	r4, #16
74002392:	46a8      	mov	r8, r5
74002394:	f10a 0a0c 	add.w	sl, sl, #12
74002398:	4615      	mov	r5, r2
7400239a:	e002      	b.n	740023a2 <_vfprintf_r+0x5ce>
7400239c:	3f10      	subs	r7, #16
7400239e:	2f10      	cmp	r7, #16
740023a0:	dd1d      	ble.n	740023de <_vfprintf_r+0x60a>
740023a2:	605c      	str	r4, [r3, #4]
740023a4:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
740023a8:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
740023ac:	3201      	adds	r2, #1
740023ae:	601d      	str	r5, [r3, #0]
740023b0:	3110      	adds	r1, #16
740023b2:	2a07      	cmp	r2, #7
740023b4:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
740023b8:	f103 0308 	add.w	r3, r3, #8
740023bc:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
740023c0:	ddec      	ble.n	7400239c <_vfprintf_r+0x5c8>
740023c2:	4648      	mov	r0, r9
740023c4:	4631      	mov	r1, r6
740023c6:	4652      	mov	r2, sl
740023c8:	f7ff fcf6 	bl	74001db8 <__sprint_r>
740023cc:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740023d0:	3304      	adds	r3, #4
740023d2:	2800      	cmp	r0, #0
740023d4:	f47f ae1e 	bne.w	74002014 <_vfprintf_r+0x240>
740023d8:	3f10      	subs	r7, #16
740023da:	2f10      	cmp	r7, #16
740023dc:	dce1      	bgt.n	740023a2 <_vfprintf_r+0x5ce>
740023de:	462a      	mov	r2, r5
740023e0:	4645      	mov	r5, r8
740023e2:	4690      	mov	r8, r2
740023e4:	605f      	str	r7, [r3, #4]
740023e6:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
740023ea:	f8c3 8000 	str.w	r8, [r3]
740023ee:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
740023f2:	3201      	adds	r2, #1
740023f4:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
740023f8:	18fb      	adds	r3, r7, r3
740023fa:	2a07      	cmp	r2, #7
740023fc:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
74002400:	dd0b      	ble.n	7400241a <_vfprintf_r+0x646>
74002402:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002406:	4648      	mov	r0, r9
74002408:	4631      	mov	r1, r6
7400240a:	320c      	adds	r2, #12
7400240c:	f7ff fcd4 	bl	74001db8 <__sprint_r>
74002410:	2800      	cmp	r0, #0
74002412:	f47f adff 	bne.w	74002014 <_vfprintf_r+0x240>
74002416:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
7400241a:	9811      	ldr	r0, [sp, #68]	; 0x44
7400241c:	9a0c      	ldr	r2, [sp, #48]	; 0x30
7400241e:	990f      	ldr	r1, [sp, #60]	; 0x3c
74002420:	428a      	cmp	r2, r1
74002422:	bfac      	ite	ge
74002424:	1880      	addge	r0, r0, r2
74002426:	1840      	addlt	r0, r0, r1
74002428:	9011      	str	r0, [sp, #68]	; 0x44
7400242a:	2b00      	cmp	r3, #0
7400242c:	f040 8342 	bne.w	74002ab4 <_vfprintf_r+0xce0>
74002430:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002434:	2300      	movs	r3, #0
74002436:	f8dd a02c 	ldr.w	sl, [sp, #44]	; 0x2c
7400243a:	3404      	adds	r4, #4
7400243c:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002440:	e530      	b.n	74001ea4 <_vfprintf_r+0xd0>
74002442:	9216      	str	r2, [sp, #88]	; 0x58
74002444:	2a00      	cmp	r2, #0
74002446:	f43f addd 	beq.w	74002004 <_vfprintf_r+0x230>
7400244a:	f50d 60a4 	add.w	r0, sp, #1312	; 0x520
7400244e:	2301      	movs	r3, #1
74002450:	f04f 0c00 	mov.w	ip, #0
74002454:	3004      	adds	r0, #4
74002456:	930c      	str	r3, [sp, #48]	; 0x30
74002458:	f88d 2524 	strb.w	r2, [sp, #1316]	; 0x524
7400245c:	f88d c577 	strb.w	ip, [sp, #1399]	; 0x577
74002460:	9013      	str	r0, [sp, #76]	; 0x4c
74002462:	9310      	str	r3, [sp, #64]	; 0x40
74002464:	2100      	movs	r1, #0
74002466:	9117      	str	r1, [sp, #92]	; 0x5c
74002468:	e687      	b.n	7400217a <_vfprintf_r+0x3a6>
7400246a:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7400246e:	2b00      	cmp	r3, #0
74002470:	f040 852b 	bne.w	74002eca <_vfprintf_r+0x10f6>
74002474:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002476:	462b      	mov	r3, r5
74002478:	f88d c577 	strb.w	ip, [sp, #1399]	; 0x577
7400247c:	782a      	ldrb	r2, [r5, #0]
7400247e:	910b      	str	r1, [sp, #44]	; 0x2c
74002480:	e553      	b.n	74001f2a <_vfprintf_r+0x156>
74002482:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002484:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002486:	f043 0301 	orr.w	r3, r3, #1
7400248a:	930a      	str	r3, [sp, #40]	; 0x28
7400248c:	462b      	mov	r3, r5
7400248e:	782a      	ldrb	r2, [r5, #0]
74002490:	910b      	str	r1, [sp, #44]	; 0x2c
74002492:	e54a      	b.n	74001f2a <_vfprintf_r+0x156>
74002494:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002496:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
74002498:	6809      	ldr	r1, [r1, #0]
7400249a:	910f      	str	r1, [sp, #60]	; 0x3c
7400249c:	1d11      	adds	r1, r2, #4
7400249e:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
740024a0:	2b00      	cmp	r3, #0
740024a2:	f2c0 8780 	blt.w	740033a6 <_vfprintf_r+0x15d2>
740024a6:	782a      	ldrb	r2, [r5, #0]
740024a8:	462b      	mov	r3, r5
740024aa:	910b      	str	r1, [sp, #44]	; 0x2c
740024ac:	e53d      	b.n	74001f2a <_vfprintf_r+0x156>
740024ae:	990b      	ldr	r1, [sp, #44]	; 0x2c
740024b0:	462b      	mov	r3, r5
740024b2:	f88d 0577 	strb.w	r0, [sp, #1399]	; 0x577
740024b6:	782a      	ldrb	r2, [r5, #0]
740024b8:	910b      	str	r1, [sp, #44]	; 0x2c
740024ba:	e536      	b.n	74001f2a <_vfprintf_r+0x156>
740024bc:	990b      	ldr	r1, [sp, #44]	; 0x2c
740024be:	9b0a      	ldr	r3, [sp, #40]	; 0x28
740024c0:	f043 0304 	orr.w	r3, r3, #4
740024c4:	930a      	str	r3, [sp, #40]	; 0x28
740024c6:	462b      	mov	r3, r5
740024c8:	782a      	ldrb	r2, [r5, #0]
740024ca:	910b      	str	r1, [sp, #44]	; 0x2c
740024cc:	e52d      	b.n	74001f2a <_vfprintf_r+0x156>
740024ce:	462b      	mov	r3, r5
740024d0:	f813 2b01 	ldrb.w	r2, [r3], #1
740024d4:	2a2a      	cmp	r2, #42	; 0x2a
740024d6:	f001 80cd 	beq.w	74003674 <_vfprintf_r+0x18a0>
740024da:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
740024de:	2909      	cmp	r1, #9
740024e0:	f201 8037 	bhi.w	74003552 <_vfprintf_r+0x177e>
740024e4:	3502      	adds	r5, #2
740024e6:	2700      	movs	r7, #0
740024e8:	f815 2c01 	ldrb.w	r2, [r5, #-1]
740024ec:	eb07 0787 	add.w	r7, r7, r7, lsl #2
740024f0:	462b      	mov	r3, r5
740024f2:	3501      	adds	r5, #1
740024f4:	eb01 0747 	add.w	r7, r1, r7, lsl #1
740024f8:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
740024fc:	2909      	cmp	r1, #9
740024fe:	d9f3      	bls.n	740024e8 <_vfprintf_r+0x714>
74002500:	ea47 77e7 	orr.w	r7, r7, r7, asr #31
74002504:	461d      	mov	r5, r3
74002506:	e511      	b.n	74001f2c <_vfprintf_r+0x158>
74002508:	990b      	ldr	r1, [sp, #44]	; 0x2c
7400250a:	462b      	mov	r3, r5
7400250c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7400250e:	f042 0280 	orr.w	r2, r2, #128	; 0x80
74002512:	920a      	str	r2, [sp, #40]	; 0x28
74002514:	782a      	ldrb	r2, [r5, #0]
74002516:	910b      	str	r1, [sp, #44]	; 0x2c
74002518:	e507      	b.n	74001f2a <_vfprintf_r+0x156>
7400251a:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
7400251e:	f04f 0800 	mov.w	r8, #0
74002522:	462b      	mov	r3, r5
74002524:	eb08 0888 	add.w	r8, r8, r8, lsl #2
74002528:	f813 2b01 	ldrb.w	r2, [r3], #1
7400252c:	eb01 0848 	add.w	r8, r1, r8, lsl #1
74002530:	f1a2 0130 	sub.w	r1, r2, #48	; 0x30
74002534:	461d      	mov	r5, r3
74002536:	2909      	cmp	r1, #9
74002538:	d9f3      	bls.n	74002522 <_vfprintf_r+0x74e>
7400253a:	f8cd 803c 	str.w	r8, [sp, #60]	; 0x3c
7400253e:	461d      	mov	r5, r3
74002540:	e4f4      	b.n	74001f2c <_vfprintf_r+0x158>
74002542:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002544:	9216      	str	r2, [sp, #88]	; 0x58
74002546:	f043 0310 	orr.w	r3, r3, #16
7400254a:	930a      	str	r3, [sp, #40]	; 0x28
7400254c:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002550:	f01c 0f20 	tst.w	ip, #32
74002554:	f000 815d 	beq.w	74002812 <_vfprintf_r+0xa3e>
74002558:	980b      	ldr	r0, [sp, #44]	; 0x2c
7400255a:	1dc3      	adds	r3, r0, #7
7400255c:	f023 0307 	bic.w	r3, r3, #7
74002560:	f103 0108 	add.w	r1, r3, #8
74002564:	910b      	str	r1, [sp, #44]	; 0x2c
74002566:	e9d3 ab00 	ldrd	sl, fp, [r3]
7400256a:	f1ba 0f00 	cmp.w	sl, #0
7400256e:	f17b 0200 	sbcs.w	r2, fp, #0
74002572:	f2c0 849b 	blt.w	74002eac <_vfprintf_r+0x10d8>
74002576:	ea5a 030b 	orrs.w	r3, sl, fp
7400257a:	f04f 0301 	mov.w	r3, #1
7400257e:	bf0c      	ite	eq
74002580:	2200      	moveq	r2, #0
74002582:	2201      	movne	r2, #1
74002584:	e5bc      	b.n	74002100 <_vfprintf_r+0x32c>
74002586:	980a      	ldr	r0, [sp, #40]	; 0x28
74002588:	9216      	str	r2, [sp, #88]	; 0x58
7400258a:	f010 0f08 	tst.w	r0, #8
7400258e:	f000 84ed 	beq.w	74002f6c <_vfprintf_r+0x1198>
74002592:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002594:	1dcb      	adds	r3, r1, #7
74002596:	f023 0307 	bic.w	r3, r3, #7
7400259a:	f103 0208 	add.w	r2, r3, #8
7400259e:	920b      	str	r2, [sp, #44]	; 0x2c
740025a0:	f8d3 8004 	ldr.w	r8, [r3, #4]
740025a4:	f8d3 a000 	ldr.w	sl, [r3]
740025a8:	f8cd 806c 	str.w	r8, [sp, #108]	; 0x6c
740025ac:	f8cd a048 	str.w	sl, [sp, #72]	; 0x48
740025b0:	4650      	mov	r0, sl
740025b2:	4641      	mov	r1, r8
740025b4:	f004 f99a 	bl	740068ec <__isinfd>
740025b8:	4683      	mov	fp, r0
740025ba:	2800      	cmp	r0, #0
740025bc:	f000 8599 	beq.w	740030f2 <_vfprintf_r+0x131e>
740025c0:	4650      	mov	r0, sl
740025c2:	2200      	movs	r2, #0
740025c4:	2300      	movs	r3, #0
740025c6:	4641      	mov	r1, r8
740025c8:	f005 fa16 	bl	740079f8 <__aeabi_dcmplt>
740025cc:	2800      	cmp	r0, #0
740025ce:	f040 850b 	bne.w	74002fe8 <_vfprintf_r+0x1214>
740025d2:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
740025d6:	f248 21d0 	movw	r1, #33488	; 0x82d0
740025da:	f248 22cc 	movw	r2, #33484	; 0x82cc
740025de:	9816      	ldr	r0, [sp, #88]	; 0x58
740025e0:	f2c7 4100 	movt	r1, #29696	; 0x7400
740025e4:	f2c7 4200 	movt	r2, #29696	; 0x7400
740025e8:	f04f 0c03 	mov.w	ip, #3
740025ec:	2847      	cmp	r0, #71	; 0x47
740025ee:	bfd8      	it	le
740025f0:	4611      	movle	r1, r2
740025f2:	9113      	str	r1, [sp, #76]	; 0x4c
740025f4:	990a      	ldr	r1, [sp, #40]	; 0x28
740025f6:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
740025fa:	f021 0180 	bic.w	r1, r1, #128	; 0x80
740025fe:	f8cd c040 	str.w	ip, [sp, #64]	; 0x40
74002602:	910a      	str	r1, [sp, #40]	; 0x28
74002604:	f04f 0c00 	mov.w	ip, #0
74002608:	f8cd c05c 	str.w	ip, [sp, #92]	; 0x5c
7400260c:	e5b1      	b.n	74002172 <_vfprintf_r+0x39e>
7400260e:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002610:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002612:	f043 0308 	orr.w	r3, r3, #8
74002616:	930a      	str	r3, [sp, #40]	; 0x28
74002618:	462b      	mov	r3, r5
7400261a:	782a      	ldrb	r2, [r5, #0]
7400261c:	910b      	str	r1, [sp, #44]	; 0x2c
7400261e:	e484      	b.n	74001f2a <_vfprintf_r+0x156>
74002620:	990a      	ldr	r1, [sp, #40]	; 0x28
74002622:	f041 0140 	orr.w	r1, r1, #64	; 0x40
74002626:	910a      	str	r1, [sp, #40]	; 0x28
74002628:	990b      	ldr	r1, [sp, #44]	; 0x2c
7400262a:	e73c      	b.n	740024a6 <_vfprintf_r+0x6d2>
7400262c:	782a      	ldrb	r2, [r5, #0]
7400262e:	2a6c      	cmp	r2, #108	; 0x6c
74002630:	f000 8555 	beq.w	740030de <_vfprintf_r+0x130a>
74002634:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002636:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002638:	910b      	str	r1, [sp, #44]	; 0x2c
7400263a:	f043 0310 	orr.w	r3, r3, #16
7400263e:	930a      	str	r3, [sp, #40]	; 0x28
74002640:	462b      	mov	r3, r5
74002642:	e472      	b.n	74001f2a <_vfprintf_r+0x156>
74002644:	9a0a      	ldr	r2, [sp, #40]	; 0x28
74002646:	f012 0f20 	tst.w	r2, #32
7400264a:	f000 8482 	beq.w	74002f52 <_vfprintf_r+0x117e>
7400264e:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002650:	9a11      	ldr	r2, [sp, #68]	; 0x44
74002652:	6803      	ldr	r3, [r0, #0]
74002654:	4610      	mov	r0, r2
74002656:	ea4f 71e0 	mov.w	r1, r0, asr #31
7400265a:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
7400265c:	e9c3 0100 	strd	r0, r1, [r3]
74002660:	f102 0a04 	add.w	sl, r2, #4
74002664:	e41e      	b.n	74001ea4 <_vfprintf_r+0xd0>
74002666:	9216      	str	r2, [sp, #88]	; 0x58
74002668:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7400266a:	f012 0320 	ands.w	r3, r2, #32
7400266e:	f000 80ef 	beq.w	74002850 <_vfprintf_r+0xa7c>
74002672:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
74002674:	1dda      	adds	r2, r3, #7
74002676:	2300      	movs	r3, #0
74002678:	f022 0207 	bic.w	r2, r2, #7
7400267c:	f102 0c08 	add.w	ip, r2, #8
74002680:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
74002684:	e9d2 ab00 	ldrd	sl, fp, [r2]
74002688:	ea5a 000b 	orrs.w	r0, sl, fp
7400268c:	bf0c      	ite	eq
7400268e:	2200      	moveq	r2, #0
74002690:	2201      	movne	r2, #1
74002692:	e531      	b.n	740020f8 <_vfprintf_r+0x324>
74002694:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002696:	2178      	movs	r1, #120	; 0x78
74002698:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
7400269c:	9116      	str	r1, [sp, #88]	; 0x58
7400269e:	6803      	ldr	r3, [r0, #0]
740026a0:	f248 20dc 	movw	r0, #33500	; 0x82dc
740026a4:	f88d 1575 	strb.w	r1, [sp, #1397]	; 0x575
740026a8:	2130      	movs	r1, #48	; 0x30
740026aa:	f88d 1574 	strb.w	r1, [sp, #1396]	; 0x574
740026ae:	f04c 0c02 	orr.w	ip, ip, #2
740026b2:	990b      	ldr	r1, [sp, #44]	; 0x2c
740026b4:	1e1a      	subs	r2, r3, #0
740026b6:	bf18      	it	ne
740026b8:	2201      	movne	r2, #1
740026ba:	f2c7 4000 	movt	r0, #29696	; 0x7400
740026be:	469a      	mov	sl, r3
740026c0:	f04f 0b00 	mov.w	fp, #0
740026c4:	3104      	adds	r1, #4
740026c6:	f8cd c028 	str.w	ip, [sp, #40]	; 0x28
740026ca:	9019      	str	r0, [sp, #100]	; 0x64
740026cc:	2302      	movs	r3, #2
740026ce:	910b      	str	r1, [sp, #44]	; 0x2c
740026d0:	e512      	b.n	740020f8 <_vfprintf_r+0x324>
740026d2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
740026d4:	9216      	str	r2, [sp, #88]	; 0x58
740026d6:	f04f 0200 	mov.w	r2, #0
740026da:	1d18      	adds	r0, r3, #4
740026dc:	f88d 2577 	strb.w	r2, [sp, #1399]	; 0x577
740026e0:	681b      	ldr	r3, [r3, #0]
740026e2:	900b      	str	r0, [sp, #44]	; 0x2c
740026e4:	9313      	str	r3, [sp, #76]	; 0x4c
740026e6:	2b00      	cmp	r3, #0
740026e8:	f000 86c6 	beq.w	74003478 <_vfprintf_r+0x16a4>
740026ec:	2f00      	cmp	r7, #0
740026ee:	9813      	ldr	r0, [sp, #76]	; 0x4c
740026f0:	f2c0 868f 	blt.w	74003412 <_vfprintf_r+0x163e>
740026f4:	2100      	movs	r1, #0
740026f6:	463a      	mov	r2, r7
740026f8:	f003 f8a6 	bl	74005848 <memchr>
740026fc:	4603      	mov	r3, r0
740026fe:	2800      	cmp	r0, #0
74002700:	f000 86f5 	beq.w	740034ee <_vfprintf_r+0x171a>
74002704:	9813      	ldr	r0, [sp, #76]	; 0x4c
74002706:	1a1b      	subs	r3, r3, r0
74002708:	9310      	str	r3, [sp, #64]	; 0x40
7400270a:	42bb      	cmp	r3, r7
7400270c:	f340 85be 	ble.w	7400328c <_vfprintf_r+0x14b8>
74002710:	9710      	str	r7, [sp, #64]	; 0x40
74002712:	2100      	movs	r1, #0
74002714:	ea27 77e7 	bic.w	r7, r7, r7, asr #31
74002718:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7400271c:	970c      	str	r7, [sp, #48]	; 0x30
7400271e:	9117      	str	r1, [sp, #92]	; 0x5c
74002720:	e527      	b.n	74002172 <_vfprintf_r+0x39e>
74002722:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002726:	9216      	str	r2, [sp, #88]	; 0x58
74002728:	f01c 0f20 	tst.w	ip, #32
7400272c:	d023      	beq.n	74002776 <_vfprintf_r+0x9a2>
7400272e:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002730:	2301      	movs	r3, #1
74002732:	1dc2      	adds	r2, r0, #7
74002734:	f022 0207 	bic.w	r2, r2, #7
74002738:	f102 0108 	add.w	r1, r2, #8
7400273c:	910b      	str	r1, [sp, #44]	; 0x2c
7400273e:	e9d2 ab00 	ldrd	sl, fp, [r2]
74002742:	ea5a 020b 	orrs.w	r2, sl, fp
74002746:	bf0c      	ite	eq
74002748:	2200      	moveq	r2, #0
7400274a:	2201      	movne	r2, #1
7400274c:	e4d4      	b.n	740020f8 <_vfprintf_r+0x324>
7400274e:	990a      	ldr	r1, [sp, #40]	; 0x28
74002750:	462b      	mov	r3, r5
74002752:	f041 0120 	orr.w	r1, r1, #32
74002756:	910a      	str	r1, [sp, #40]	; 0x28
74002758:	990b      	ldr	r1, [sp, #44]	; 0x2c
7400275a:	782a      	ldrb	r2, [r5, #0]
7400275c:	910b      	str	r1, [sp, #44]	; 0x2c
7400275e:	f7ff bbe4 	b.w	74001f2a <_vfprintf_r+0x156>
74002762:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002764:	9216      	str	r2, [sp, #88]	; 0x58
74002766:	f043 0310 	orr.w	r3, r3, #16
7400276a:	930a      	str	r3, [sp, #40]	; 0x28
7400276c:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002770:	f01c 0f20 	tst.w	ip, #32
74002774:	d1db      	bne.n	7400272e <_vfprintf_r+0x95a>
74002776:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002778:	f013 0f10 	tst.w	r3, #16
7400277c:	f000 83d5 	beq.w	74002f2a <_vfprintf_r+0x1156>
74002780:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002782:	2301      	movs	r3, #1
74002784:	1d02      	adds	r2, r0, #4
74002786:	920b      	str	r2, [sp, #44]	; 0x2c
74002788:	6801      	ldr	r1, [r0, #0]
7400278a:	1e0a      	subs	r2, r1, #0
7400278c:	bf18      	it	ne
7400278e:	2201      	movne	r2, #1
74002790:	468a      	mov	sl, r1
74002792:	f04f 0b00 	mov.w	fp, #0
74002796:	e4af      	b.n	740020f8 <_vfprintf_r+0x324>
74002798:	980a      	ldr	r0, [sp, #40]	; 0x28
7400279a:	9216      	str	r2, [sp, #88]	; 0x58
7400279c:	f248 22b8 	movw	r2, #33464	; 0x82b8
740027a0:	f010 0f20 	tst.w	r0, #32
740027a4:	f2c7 4200 	movt	r2, #29696	; 0x7400
740027a8:	9219      	str	r2, [sp, #100]	; 0x64
740027aa:	f47f ac92 	bne.w	740020d2 <_vfprintf_r+0x2fe>
740027ae:	9b0a      	ldr	r3, [sp, #40]	; 0x28
740027b0:	f013 0f10 	tst.w	r3, #16
740027b4:	f040 831a 	bne.w	74002dec <_vfprintf_r+0x1018>
740027b8:	9a0a      	ldr	r2, [sp, #40]	; 0x28
740027ba:	f012 0f40 	tst.w	r2, #64	; 0x40
740027be:	f000 8315 	beq.w	74002dec <_vfprintf_r+0x1018>
740027c2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
740027c4:	f103 0c04 	add.w	ip, r3, #4
740027c8:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
740027cc:	f8b3 a000 	ldrh.w	sl, [r3]
740027d0:	46d2      	mov	sl, sl
740027d2:	f04f 0b00 	mov.w	fp, #0
740027d6:	e485      	b.n	740020e4 <_vfprintf_r+0x310>
740027d8:	9216      	str	r2, [sp, #88]	; 0x58
740027da:	f50d 61a4 	add.w	r1, sp, #1312	; 0x520
740027de:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
740027e0:	f04f 0c01 	mov.w	ip, #1
740027e4:	f04f 0000 	mov.w	r0, #0
740027e8:	3104      	adds	r1, #4
740027ea:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
740027ee:	6813      	ldr	r3, [r2, #0]
740027f0:	3204      	adds	r2, #4
740027f2:	f88d 0577 	strb.w	r0, [sp, #1399]	; 0x577
740027f6:	920b      	str	r2, [sp, #44]	; 0x2c
740027f8:	9113      	str	r1, [sp, #76]	; 0x4c
740027fa:	f8cd c040 	str.w	ip, [sp, #64]	; 0x40
740027fe:	f88d 3524 	strb.w	r3, [sp, #1316]	; 0x524
74002802:	e62f      	b.n	74002464 <_vfprintf_r+0x690>
74002804:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002808:	9216      	str	r2, [sp, #88]	; 0x58
7400280a:	f01c 0f20 	tst.w	ip, #32
7400280e:	f47f aea3 	bne.w	74002558 <_vfprintf_r+0x784>
74002812:	9a0a      	ldr	r2, [sp, #40]	; 0x28
74002814:	f012 0f10 	tst.w	r2, #16
74002818:	f040 82f1 	bne.w	74002dfe <_vfprintf_r+0x102a>
7400281c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7400281e:	f012 0f40 	tst.w	r2, #64	; 0x40
74002822:	f000 82ec 	beq.w	74002dfe <_vfprintf_r+0x102a>
74002826:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
74002828:	f103 0c04 	add.w	ip, r3, #4
7400282c:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
74002830:	f9b3 a000 	ldrsh.w	sl, [r3]
74002834:	46d2      	mov	sl, sl
74002836:	ea4f 7bea 	mov.w	fp, sl, asr #31
7400283a:	e696      	b.n	7400256a <_vfprintf_r+0x796>
7400283c:	990a      	ldr	r1, [sp, #40]	; 0x28
7400283e:	9216      	str	r2, [sp, #88]	; 0x58
74002840:	f041 0110 	orr.w	r1, r1, #16
74002844:	910a      	str	r1, [sp, #40]	; 0x28
74002846:	9a0a      	ldr	r2, [sp, #40]	; 0x28
74002848:	f012 0320 	ands.w	r3, r2, #32
7400284c:	f47f af11 	bne.w	74002672 <_vfprintf_r+0x89e>
74002850:	990a      	ldr	r1, [sp, #40]	; 0x28
74002852:	f011 0210 	ands.w	r2, r1, #16
74002856:	f000 8354 	beq.w	74002f02 <_vfprintf_r+0x112e>
7400285a:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
7400285c:	f102 0c04 	add.w	ip, r2, #4
74002860:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
74002864:	6811      	ldr	r1, [r2, #0]
74002866:	1e0a      	subs	r2, r1, #0
74002868:	bf18      	it	ne
7400286a:	2201      	movne	r2, #1
7400286c:	468a      	mov	sl, r1
7400286e:	f04f 0b00 	mov.w	fp, #0
74002872:	e441      	b.n	740020f8 <_vfprintf_r+0x324>
74002874:	9a16      	ldr	r2, [sp, #88]	; 0x58
74002876:	2a65      	cmp	r2, #101	; 0x65
74002878:	f340 8128 	ble.w	74002acc <_vfprintf_r+0xcf8>
7400287c:	9812      	ldr	r0, [sp, #72]	; 0x48
7400287e:	2200      	movs	r2, #0
74002880:	2300      	movs	r3, #0
74002882:	991b      	ldr	r1, [sp, #108]	; 0x6c
74002884:	f005 f8ae 	bl	740079e4 <__aeabi_dcmpeq>
74002888:	2800      	cmp	r0, #0
7400288a:	f000 81be 	beq.w	74002c0a <_vfprintf_r+0xe36>
7400288e:	2301      	movs	r3, #1
74002890:	6063      	str	r3, [r4, #4]
74002892:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002896:	f248 23f8 	movw	r3, #33528	; 0x82f8
7400289a:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400289e:	6023      	str	r3, [r4, #0]
740028a0:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
740028a4:	3201      	adds	r2, #1
740028a6:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
740028aa:	3301      	adds	r3, #1
740028ac:	2a07      	cmp	r2, #7
740028ae:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
740028b2:	bfd8      	it	le
740028b4:	f104 0308 	addle.w	r3, r4, #8
740028b8:	f300 839b 	bgt.w	74002ff2 <_vfprintf_r+0x121e>
740028bc:	f8dd 2570 	ldr.w	r2, [sp, #1392]	; 0x570
740028c0:	981a      	ldr	r0, [sp, #104]	; 0x68
740028c2:	4282      	cmp	r2, r0
740028c4:	db04      	blt.n	740028d0 <_vfprintf_r+0xafc>
740028c6:	990a      	ldr	r1, [sp, #40]	; 0x28
740028c8:	f011 0f01 	tst.w	r1, #1
740028cc:	f43f ad49 	beq.w	74002362 <_vfprintf_r+0x58e>
740028d0:	2201      	movs	r2, #1
740028d2:	605a      	str	r2, [r3, #4]
740028d4:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
740028d8:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
740028dc:	3201      	adds	r2, #1
740028de:	981d      	ldr	r0, [sp, #116]	; 0x74
740028e0:	3101      	adds	r1, #1
740028e2:	2a07      	cmp	r2, #7
740028e4:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
740028e8:	6018      	str	r0, [r3, #0]
740028ea:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
740028ee:	f300 855f 	bgt.w	740033b0 <_vfprintf_r+0x15dc>
740028f2:	3308      	adds	r3, #8
740028f4:	991a      	ldr	r1, [sp, #104]	; 0x68
740028f6:	1e4f      	subs	r7, r1, #1
740028f8:	2f00      	cmp	r7, #0
740028fa:	f77f ad32 	ble.w	74002362 <_vfprintf_r+0x58e>
740028fe:	2f10      	cmp	r7, #16
74002900:	f8df 8534 	ldr.w	r8, [pc, #1332]	; 74002e38 <_vfprintf_r+0x1064>
74002904:	f340 82ea 	ble.w	74002edc <_vfprintf_r+0x1108>
74002908:	4642      	mov	r2, r8
7400290a:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
7400290e:	46a8      	mov	r8, r5
74002910:	2410      	movs	r4, #16
74002912:	f10a 0a0c 	add.w	sl, sl, #12
74002916:	4615      	mov	r5, r2
74002918:	e003      	b.n	74002922 <_vfprintf_r+0xb4e>
7400291a:	3f10      	subs	r7, #16
7400291c:	2f10      	cmp	r7, #16
7400291e:	f340 82da 	ble.w	74002ed6 <_vfprintf_r+0x1102>
74002922:	605c      	str	r4, [r3, #4]
74002924:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002928:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
7400292c:	3201      	adds	r2, #1
7400292e:	601d      	str	r5, [r3, #0]
74002930:	3110      	adds	r1, #16
74002932:	2a07      	cmp	r2, #7
74002934:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74002938:	f103 0308 	add.w	r3, r3, #8
7400293c:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002940:	ddeb      	ble.n	7400291a <_vfprintf_r+0xb46>
74002942:	4648      	mov	r0, r9
74002944:	4631      	mov	r1, r6
74002946:	4652      	mov	r2, sl
74002948:	f7ff fa36 	bl	74001db8 <__sprint_r>
7400294c:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
74002950:	3304      	adds	r3, #4
74002952:	2800      	cmp	r0, #0
74002954:	d0e1      	beq.n	7400291a <_vfprintf_r+0xb46>
74002956:	f7ff bb5d 	b.w	74002014 <_vfprintf_r+0x240>
7400295a:	b97b      	cbnz	r3, 7400297c <_vfprintf_r+0xba8>
7400295c:	990a      	ldr	r1, [sp, #40]	; 0x28
7400295e:	f011 0f01 	tst.w	r1, #1
74002962:	d00b      	beq.n	7400297c <_vfprintf_r+0xba8>
74002964:	f50d 62a4 	add.w	r2, sp, #1312	; 0x520
74002968:	2330      	movs	r3, #48	; 0x30
7400296a:	3204      	adds	r2, #4
7400296c:	f88d 354b 	strb.w	r3, [sp, #1355]	; 0x54b
74002970:	3227      	adds	r2, #39	; 0x27
74002972:	2301      	movs	r3, #1
74002974:	9213      	str	r2, [sp, #76]	; 0x4c
74002976:	9310      	str	r3, [sp, #64]	; 0x40
74002978:	f7ff bbf3 	b.w	74002162 <_vfprintf_r+0x38e>
7400297c:	9818      	ldr	r0, [sp, #96]	; 0x60
7400297e:	2100      	movs	r1, #0
74002980:	9110      	str	r1, [sp, #64]	; 0x40
74002982:	9013      	str	r0, [sp, #76]	; 0x4c
74002984:	f7ff bbed 	b.w	74002162 <_vfprintf_r+0x38e>
74002988:	980f      	ldr	r0, [sp, #60]	; 0x3c
7400298a:	990c      	ldr	r1, [sp, #48]	; 0x30
7400298c:	1a47      	subs	r7, r0, r1
7400298e:	2f00      	cmp	r7, #0
74002990:	f77f ac84 	ble.w	7400229c <_vfprintf_r+0x4c8>
74002994:	2f10      	cmp	r7, #16
74002996:	f8df 84a0 	ldr.w	r8, [pc, #1184]	; 74002e38 <_vfprintf_r+0x1064>
7400299a:	dd2e      	ble.n	740029fa <_vfprintf_r+0xc26>
7400299c:	4643      	mov	r3, r8
7400299e:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
740029a2:	46a8      	mov	r8, r5
740029a4:	f04f 0a10 	mov.w	sl, #16
740029a8:	f10b 0b0c 	add.w	fp, fp, #12
740029ac:	461d      	mov	r5, r3
740029ae:	e002      	b.n	740029b6 <_vfprintf_r+0xbe2>
740029b0:	3f10      	subs	r7, #16
740029b2:	2f10      	cmp	r7, #16
740029b4:	dd1e      	ble.n	740029f4 <_vfprintf_r+0xc20>
740029b6:	f8c4 a004 	str.w	sl, [r4, #4]
740029ba:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
740029be:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
740029c2:	3301      	adds	r3, #1
740029c4:	6025      	str	r5, [r4, #0]
740029c6:	3210      	adds	r2, #16
740029c8:	2b07      	cmp	r3, #7
740029ca:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
740029ce:	f104 0408 	add.w	r4, r4, #8
740029d2:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
740029d6:	ddeb      	ble.n	740029b0 <_vfprintf_r+0xbdc>
740029d8:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
740029dc:	4648      	mov	r0, r9
740029de:	4631      	mov	r1, r6
740029e0:	465a      	mov	r2, fp
740029e2:	3404      	adds	r4, #4
740029e4:	f7ff f9e8 	bl	74001db8 <__sprint_r>
740029e8:	2800      	cmp	r0, #0
740029ea:	f47f ab13 	bne.w	74002014 <_vfprintf_r+0x240>
740029ee:	3f10      	subs	r7, #16
740029f0:	2f10      	cmp	r7, #16
740029f2:	dce0      	bgt.n	740029b6 <_vfprintf_r+0xbe2>
740029f4:	462b      	mov	r3, r5
740029f6:	4645      	mov	r5, r8
740029f8:	4698      	mov	r8, r3
740029fa:	6067      	str	r7, [r4, #4]
740029fc:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002a00:	f8c4 8000 	str.w	r8, [r4]
74002a04:	1c5a      	adds	r2, r3, #1
74002a06:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
74002a0a:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002a0e:	19db      	adds	r3, r3, r7
74002a10:	2a07      	cmp	r2, #7
74002a12:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
74002a16:	f300 823a 	bgt.w	74002e8e <_vfprintf_r+0x10ba>
74002a1a:	3408      	adds	r4, #8
74002a1c:	e43e      	b.n	7400229c <_vfprintf_r+0x4c8>
74002a1e:	9913      	ldr	r1, [sp, #76]	; 0x4c
74002a20:	6063      	str	r3, [r4, #4]
74002a22:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002a26:	6021      	str	r1, [r4, #0]
74002a28:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002a2c:	3201      	adds	r2, #1
74002a2e:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002a32:	18cb      	adds	r3, r1, r3
74002a34:	2a07      	cmp	r2, #7
74002a36:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
74002a3a:	f300 8549 	bgt.w	740034d0 <_vfprintf_r+0x16fc>
74002a3e:	3408      	adds	r4, #8
74002a40:	9a1d      	ldr	r2, [sp, #116]	; 0x74
74002a42:	2301      	movs	r3, #1
74002a44:	f8dd 7570 	ldr.w	r7, [sp, #1392]	; 0x570
74002a48:	6063      	str	r3, [r4, #4]
74002a4a:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002a4e:	6022      	str	r2, [r4, #0]
74002a50:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002a54:	3301      	adds	r3, #1
74002a56:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002a5a:	3201      	adds	r2, #1
74002a5c:	2b07      	cmp	r3, #7
74002a5e:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002a62:	bfd8      	it	le
74002a64:	f104 0308 	addle.w	r3, r4, #8
74002a68:	f300 8523 	bgt.w	740034b2 <_vfprintf_r+0x16de>
74002a6c:	9813      	ldr	r0, [sp, #76]	; 0x4c
74002a6e:	f8dd 2570 	ldr.w	r2, [sp, #1392]	; 0x570
74002a72:	19c7      	adds	r7, r0, r7
74002a74:	981a      	ldr	r0, [sp, #104]	; 0x68
74002a76:	601f      	str	r7, [r3, #0]
74002a78:	1a81      	subs	r1, r0, r2
74002a7a:	6059      	str	r1, [r3, #4]
74002a7c:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002a80:	1a8a      	subs	r2, r1, r2
74002a82:	f8dd 1550 	ldr.w	r1, [sp, #1360]	; 0x550
74002a86:	1812      	adds	r2, r2, r0
74002a88:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002a8c:	3101      	adds	r1, #1
74002a8e:	f8cd 1550 	str.w	r1, [sp, #1360]	; 0x550
74002a92:	2907      	cmp	r1, #7
74002a94:	f340 8232 	ble.w	74002efc <_vfprintf_r+0x1128>
74002a98:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002a9c:	4648      	mov	r0, r9
74002a9e:	4631      	mov	r1, r6
74002aa0:	320c      	adds	r2, #12
74002aa2:	f7ff f989 	bl	74001db8 <__sprint_r>
74002aa6:	2800      	cmp	r0, #0
74002aa8:	f47f aab4 	bne.w	74002014 <_vfprintf_r+0x240>
74002aac:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
74002ab0:	3304      	adds	r3, #4
74002ab2:	e456      	b.n	74002362 <_vfprintf_r+0x58e>
74002ab4:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002ab8:	4648      	mov	r0, r9
74002aba:	4631      	mov	r1, r6
74002abc:	320c      	adds	r2, #12
74002abe:	f7ff f97b 	bl	74001db8 <__sprint_r>
74002ac2:	2800      	cmp	r0, #0
74002ac4:	f43f acb4 	beq.w	74002430 <_vfprintf_r+0x65c>
74002ac8:	f7ff baa4 	b.w	74002014 <_vfprintf_r+0x240>
74002acc:	991a      	ldr	r1, [sp, #104]	; 0x68
74002ace:	2901      	cmp	r1, #1
74002ad0:	dd4c      	ble.n	74002b6c <_vfprintf_r+0xd98>
74002ad2:	2301      	movs	r3, #1
74002ad4:	6063      	str	r3, [r4, #4]
74002ad6:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002ada:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002ade:	3301      	adds	r3, #1
74002ae0:	9813      	ldr	r0, [sp, #76]	; 0x4c
74002ae2:	3201      	adds	r2, #1
74002ae4:	2b07      	cmp	r3, #7
74002ae6:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002aea:	6020      	str	r0, [r4, #0]
74002aec:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002af0:	f300 81b2 	bgt.w	74002e58 <_vfprintf_r+0x1084>
74002af4:	3408      	adds	r4, #8
74002af6:	2301      	movs	r3, #1
74002af8:	6063      	str	r3, [r4, #4]
74002afa:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002afe:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002b02:	3301      	adds	r3, #1
74002b04:	991d      	ldr	r1, [sp, #116]	; 0x74
74002b06:	3201      	adds	r2, #1
74002b08:	2b07      	cmp	r3, #7
74002b0a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002b0e:	6021      	str	r1, [r4, #0]
74002b10:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002b14:	f300 8192 	bgt.w	74002e3c <_vfprintf_r+0x1068>
74002b18:	3408      	adds	r4, #8
74002b1a:	9812      	ldr	r0, [sp, #72]	; 0x48
74002b1c:	2200      	movs	r2, #0
74002b1e:	2300      	movs	r3, #0
74002b20:	991b      	ldr	r1, [sp, #108]	; 0x6c
74002b22:	f004 ff5f 	bl	740079e4 <__aeabi_dcmpeq>
74002b26:	2800      	cmp	r0, #0
74002b28:	f040 811d 	bne.w	74002d66 <_vfprintf_r+0xf92>
74002b2c:	9b1a      	ldr	r3, [sp, #104]	; 0x68
74002b2e:	9813      	ldr	r0, [sp, #76]	; 0x4c
74002b30:	1e5a      	subs	r2, r3, #1
74002b32:	6062      	str	r2, [r4, #4]
74002b34:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002b38:	1c41      	adds	r1, r0, #1
74002b3a:	6021      	str	r1, [r4, #0]
74002b3c:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002b40:	3301      	adds	r3, #1
74002b42:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002b46:	188a      	adds	r2, r1, r2
74002b48:	2b07      	cmp	r3, #7
74002b4a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002b4e:	dc21      	bgt.n	74002b94 <_vfprintf_r+0xdc0>
74002b50:	3408      	adds	r4, #8
74002b52:	9b1c      	ldr	r3, [sp, #112]	; 0x70
74002b54:	f50d 62ac 	add.w	r2, sp, #1376	; 0x560
74002b58:	981c      	ldr	r0, [sp, #112]	; 0x70
74002b5a:	6022      	str	r2, [r4, #0]
74002b5c:	6063      	str	r3, [r4, #4]
74002b5e:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002b62:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002b66:	3301      	adds	r3, #1
74002b68:	f7ff bbf0 	b.w	7400234c <_vfprintf_r+0x578>
74002b6c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
74002b6e:	f012 0f01 	tst.w	r2, #1
74002b72:	d1ae      	bne.n	74002ad2 <_vfprintf_r+0xcfe>
74002b74:	9a13      	ldr	r2, [sp, #76]	; 0x4c
74002b76:	2301      	movs	r3, #1
74002b78:	6063      	str	r3, [r4, #4]
74002b7a:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002b7e:	6022      	str	r2, [r4, #0]
74002b80:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002b84:	3301      	adds	r3, #1
74002b86:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002b8a:	3201      	adds	r2, #1
74002b8c:	2b07      	cmp	r3, #7
74002b8e:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002b92:	dddd      	ble.n	74002b50 <_vfprintf_r+0xd7c>
74002b94:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002b98:	4648      	mov	r0, r9
74002b9a:	4631      	mov	r1, r6
74002b9c:	320c      	adds	r2, #12
74002b9e:	f7ff f90b 	bl	74001db8 <__sprint_r>
74002ba2:	2800      	cmp	r0, #0
74002ba4:	f47f aa36 	bne.w	74002014 <_vfprintf_r+0x240>
74002ba8:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002bac:	3404      	adds	r4, #4
74002bae:	e7d0      	b.n	74002b52 <_vfprintf_r+0xd7e>
74002bb0:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002bb4:	4648      	mov	r0, r9
74002bb6:	4631      	mov	r1, r6
74002bb8:	320c      	adds	r2, #12
74002bba:	f7ff f8fd 	bl	74001db8 <__sprint_r>
74002bbe:	2800      	cmp	r0, #0
74002bc0:	f47f aa28 	bne.w	74002014 <_vfprintf_r+0x240>
74002bc4:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002bc8:	3404      	adds	r4, #4
74002bca:	f7ff bbb0 	b.w	7400232e <_vfprintf_r+0x55a>
74002bce:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002bd2:	4648      	mov	r0, r9
74002bd4:	4631      	mov	r1, r6
74002bd6:	320c      	adds	r2, #12
74002bd8:	f7ff f8ee 	bl	74001db8 <__sprint_r>
74002bdc:	2800      	cmp	r0, #0
74002bde:	f47f aa19 	bne.w	74002014 <_vfprintf_r+0x240>
74002be2:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002be6:	3404      	adds	r4, #4
74002be8:	f7ff bb3c 	b.w	74002264 <_vfprintf_r+0x490>
74002bec:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002bf0:	4648      	mov	r0, r9
74002bf2:	4631      	mov	r1, r6
74002bf4:	320c      	adds	r2, #12
74002bf6:	f7ff f8df 	bl	74001db8 <__sprint_r>
74002bfa:	2800      	cmp	r0, #0
74002bfc:	f47f aa0a 	bne.w	74002014 <_vfprintf_r+0x240>
74002c00:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002c04:	3404      	adds	r4, #4
74002c06:	f7ff bb43 	b.w	74002290 <_vfprintf_r+0x4bc>
74002c0a:	f8dd 3570 	ldr.w	r3, [sp, #1392]	; 0x570
74002c0e:	2b00      	cmp	r3, #0
74002c10:	f340 81fd 	ble.w	7400300e <_vfprintf_r+0x123a>
74002c14:	991a      	ldr	r1, [sp, #104]	; 0x68
74002c16:	428b      	cmp	r3, r1
74002c18:	f6ff af01 	blt.w	74002a1e <_vfprintf_r+0xc4a>
74002c1c:	9a13      	ldr	r2, [sp, #76]	; 0x4c
74002c1e:	6061      	str	r1, [r4, #4]
74002c20:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002c24:	6022      	str	r2, [r4, #0]
74002c26:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002c2a:	3301      	adds	r3, #1
74002c2c:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002c30:	1852      	adds	r2, r2, r1
74002c32:	2b07      	cmp	r3, #7
74002c34:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002c38:	bfd8      	it	le
74002c3a:	f104 0308 	addle.w	r3, r4, #8
74002c3e:	f300 8429 	bgt.w	74003494 <_vfprintf_r+0x16c0>
74002c42:	f8dd 4570 	ldr.w	r4, [sp, #1392]	; 0x570
74002c46:	981a      	ldr	r0, [sp, #104]	; 0x68
74002c48:	1a24      	subs	r4, r4, r0
74002c4a:	2c00      	cmp	r4, #0
74002c4c:	f340 81b3 	ble.w	74002fb6 <_vfprintf_r+0x11e2>
74002c50:	2c10      	cmp	r4, #16
74002c52:	f8df 81e4 	ldr.w	r8, [pc, #484]	; 74002e38 <_vfprintf_r+0x1064>
74002c56:	f340 819d 	ble.w	74002f94 <_vfprintf_r+0x11c0>
74002c5a:	4642      	mov	r2, r8
74002c5c:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
74002c60:	46a8      	mov	r8, r5
74002c62:	2710      	movs	r7, #16
74002c64:	f10a 0a0c 	add.w	sl, sl, #12
74002c68:	4615      	mov	r5, r2
74002c6a:	e003      	b.n	74002c74 <_vfprintf_r+0xea0>
74002c6c:	3c10      	subs	r4, #16
74002c6e:	2c10      	cmp	r4, #16
74002c70:	f340 818d 	ble.w	74002f8e <_vfprintf_r+0x11ba>
74002c74:	605f      	str	r7, [r3, #4]
74002c76:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002c7a:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002c7e:	3201      	adds	r2, #1
74002c80:	601d      	str	r5, [r3, #0]
74002c82:	3110      	adds	r1, #16
74002c84:	2a07      	cmp	r2, #7
74002c86:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74002c8a:	f103 0308 	add.w	r3, r3, #8
74002c8e:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002c92:	ddeb      	ble.n	74002c6c <_vfprintf_r+0xe98>
74002c94:	4648      	mov	r0, r9
74002c96:	4631      	mov	r1, r6
74002c98:	4652      	mov	r2, sl
74002c9a:	f7ff f88d 	bl	74001db8 <__sprint_r>
74002c9e:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
74002ca2:	3304      	adds	r3, #4
74002ca4:	2800      	cmp	r0, #0
74002ca6:	d0e1      	beq.n	74002c6c <_vfprintf_r+0xe98>
74002ca8:	f7ff b9b4 	b.w	74002014 <_vfprintf_r+0x240>
74002cac:	9a18      	ldr	r2, [sp, #96]	; 0x60
74002cae:	9819      	ldr	r0, [sp, #100]	; 0x64
74002cb0:	4613      	mov	r3, r2
74002cb2:	9213      	str	r2, [sp, #76]	; 0x4c
74002cb4:	f00a 020f 	and.w	r2, sl, #15
74002cb8:	ea4f 111a 	mov.w	r1, sl, lsr #4
74002cbc:	ea41 710b 	orr.w	r1, r1, fp, lsl #28
74002cc0:	ea4f 1c1b 	mov.w	ip, fp, lsr #4
74002cc4:	5c82      	ldrb	r2, [r0, r2]
74002cc6:	468a      	mov	sl, r1
74002cc8:	46e3      	mov	fp, ip
74002cca:	ea5a 0c0b 	orrs.w	ip, sl, fp
74002cce:	f803 2d01 	strb.w	r2, [r3, #-1]!
74002cd2:	d1ef      	bne.n	74002cb4 <_vfprintf_r+0xee0>
74002cd4:	9818      	ldr	r0, [sp, #96]	; 0x60
74002cd6:	9313      	str	r3, [sp, #76]	; 0x4c
74002cd8:	1ac0      	subs	r0, r0, r3
74002cda:	9010      	str	r0, [sp, #64]	; 0x40
74002cdc:	f7ff ba41 	b.w	74002162 <_vfprintf_r+0x38e>
74002ce0:	2209      	movs	r2, #9
74002ce2:	2300      	movs	r3, #0
74002ce4:	4552      	cmp	r2, sl
74002ce6:	eb73 000b 	sbcs.w	r0, r3, fp
74002cea:	f8dd 8060 	ldr.w	r8, [sp, #96]	; 0x60
74002cee:	d21f      	bcs.n	74002d30 <_vfprintf_r+0xf5c>
74002cf0:	4623      	mov	r3, r4
74002cf2:	4644      	mov	r4, r8
74002cf4:	46b8      	mov	r8, r7
74002cf6:	461f      	mov	r7, r3
74002cf8:	4650      	mov	r0, sl
74002cfa:	4659      	mov	r1, fp
74002cfc:	220a      	movs	r2, #10
74002cfe:	2300      	movs	r3, #0
74002d00:	f004 feca 	bl	74007a98 <__aeabi_uldivmod>
74002d04:	2300      	movs	r3, #0
74002d06:	4650      	mov	r0, sl
74002d08:	4659      	mov	r1, fp
74002d0a:	f102 0c30 	add.w	ip, r2, #48	; 0x30
74002d0e:	220a      	movs	r2, #10
74002d10:	f804 cd01 	strb.w	ip, [r4, #-1]!
74002d14:	f004 fec0 	bl	74007a98 <__aeabi_uldivmod>
74002d18:	2209      	movs	r2, #9
74002d1a:	2300      	movs	r3, #0
74002d1c:	4682      	mov	sl, r0
74002d1e:	468b      	mov	fp, r1
74002d20:	4552      	cmp	r2, sl
74002d22:	eb73 030b 	sbcs.w	r3, r3, fp
74002d26:	d3e7      	bcc.n	74002cf8 <_vfprintf_r+0xf24>
74002d28:	463b      	mov	r3, r7
74002d2a:	4647      	mov	r7, r8
74002d2c:	46a0      	mov	r8, r4
74002d2e:	461c      	mov	r4, r3
74002d30:	f108 30ff 	add.w	r0, r8, #4294967295
74002d34:	f10a 0a30 	add.w	sl, sl, #48	; 0x30
74002d38:	9013      	str	r0, [sp, #76]	; 0x4c
74002d3a:	f808 ac01 	strb.w	sl, [r8, #-1]
74002d3e:	9918      	ldr	r1, [sp, #96]	; 0x60
74002d40:	1a09      	subs	r1, r1, r0
74002d42:	9110      	str	r1, [sp, #64]	; 0x40
74002d44:	f7ff ba0d 	b.w	74002162 <_vfprintf_r+0x38e>
74002d48:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002d4c:	4648      	mov	r0, r9
74002d4e:	4631      	mov	r1, r6
74002d50:	320c      	adds	r2, #12
74002d52:	f7ff f831 	bl	74001db8 <__sprint_r>
74002d56:	2800      	cmp	r0, #0
74002d58:	f47f a95c 	bne.w	74002014 <_vfprintf_r+0x240>
74002d5c:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002d60:	3404      	adds	r4, #4
74002d62:	f7ff ba68 	b.w	74002236 <_vfprintf_r+0x462>
74002d66:	991a      	ldr	r1, [sp, #104]	; 0x68
74002d68:	1e4f      	subs	r7, r1, #1
74002d6a:	2f00      	cmp	r7, #0
74002d6c:	f77f aef1 	ble.w	74002b52 <_vfprintf_r+0xd7e>
74002d70:	2f10      	cmp	r7, #16
74002d72:	f8df 80c4 	ldr.w	r8, [pc, #196]	; 74002e38 <_vfprintf_r+0x1064>
74002d76:	dd4e      	ble.n	74002e16 <_vfprintf_r+0x1042>
74002d78:	4643      	mov	r3, r8
74002d7a:	f50d 6ba8 	add.w	fp, sp, #1344	; 0x540
74002d7e:	46a8      	mov	r8, r5
74002d80:	f04f 0a10 	mov.w	sl, #16
74002d84:	f10b 0b0c 	add.w	fp, fp, #12
74002d88:	461d      	mov	r5, r3
74002d8a:	e002      	b.n	74002d92 <_vfprintf_r+0xfbe>
74002d8c:	3f10      	subs	r7, #16
74002d8e:	2f10      	cmp	r7, #16
74002d90:	dd3e      	ble.n	74002e10 <_vfprintf_r+0x103c>
74002d92:	f8c4 a004 	str.w	sl, [r4, #4]
74002d96:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002d9a:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002d9e:	3301      	adds	r3, #1
74002da0:	6025      	str	r5, [r4, #0]
74002da2:	3210      	adds	r2, #16
74002da4:	2b07      	cmp	r3, #7
74002da6:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002daa:	f104 0408 	add.w	r4, r4, #8
74002dae:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002db2:	ddeb      	ble.n	74002d8c <_vfprintf_r+0xfb8>
74002db4:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002db8:	4648      	mov	r0, r9
74002dba:	4631      	mov	r1, r6
74002dbc:	465a      	mov	r2, fp
74002dbe:	3404      	adds	r4, #4
74002dc0:	f7fe fffa 	bl	74001db8 <__sprint_r>
74002dc4:	2800      	cmp	r0, #0
74002dc6:	d0e1      	beq.n	74002d8c <_vfprintf_r+0xfb8>
74002dc8:	f7ff b924 	b.w	74002014 <_vfprintf_r+0x240>
74002dcc:	9816      	ldr	r0, [sp, #88]	; 0x58
74002dce:	2130      	movs	r1, #48	; 0x30
74002dd0:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
74002dd4:	2201      	movs	r2, #1
74002dd6:	2302      	movs	r3, #2
74002dd8:	f88d 1574 	strb.w	r1, [sp, #1396]	; 0x574
74002ddc:	f04c 0c02 	orr.w	ip, ip, #2
74002de0:	f88d 0575 	strb.w	r0, [sp, #1397]	; 0x575
74002de4:	f8cd c028 	str.w	ip, [sp, #40]	; 0x28
74002de8:	f7ff b986 	b.w	740020f8 <_vfprintf_r+0x324>
74002dec:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002dee:	1d01      	adds	r1, r0, #4
74002df0:	6803      	ldr	r3, [r0, #0]
74002df2:	910b      	str	r1, [sp, #44]	; 0x2c
74002df4:	469a      	mov	sl, r3
74002df6:	f04f 0b00 	mov.w	fp, #0
74002dfa:	f7ff b973 	b.w	740020e4 <_vfprintf_r+0x310>
74002dfe:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002e00:	1d01      	adds	r1, r0, #4
74002e02:	6803      	ldr	r3, [r0, #0]
74002e04:	910b      	str	r1, [sp, #44]	; 0x2c
74002e06:	469a      	mov	sl, r3
74002e08:	ea4f 7bea 	mov.w	fp, sl, asr #31
74002e0c:	f7ff bbad 	b.w	7400256a <_vfprintf_r+0x796>
74002e10:	462b      	mov	r3, r5
74002e12:	4645      	mov	r5, r8
74002e14:	4698      	mov	r8, r3
74002e16:	6067      	str	r7, [r4, #4]
74002e18:	f8dd 3550 	ldr.w	r3, [sp, #1360]	; 0x550
74002e1c:	f8dd 2554 	ldr.w	r2, [sp, #1364]	; 0x554
74002e20:	3301      	adds	r3, #1
74002e22:	f8c4 8000 	str.w	r8, [r4]
74002e26:	19d2      	adds	r2, r2, r7
74002e28:	2b07      	cmp	r3, #7
74002e2a:	f8cd 2554 	str.w	r2, [sp, #1364]	; 0x554
74002e2e:	f8cd 3550 	str.w	r3, [sp, #1360]	; 0x550
74002e32:	f77f ae8d 	ble.w	74002b50 <_vfprintf_r+0xd7c>
74002e36:	e6ad      	b.n	74002b94 <_vfprintf_r+0xdc0>
74002e38:	740082a8 	.word	0x740082a8
74002e3c:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002e40:	4648      	mov	r0, r9
74002e42:	4631      	mov	r1, r6
74002e44:	320c      	adds	r2, #12
74002e46:	f7fe ffb7 	bl	74001db8 <__sprint_r>
74002e4a:	2800      	cmp	r0, #0
74002e4c:	f47f a8e2 	bne.w	74002014 <_vfprintf_r+0x240>
74002e50:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002e54:	3404      	adds	r4, #4
74002e56:	e660      	b.n	74002b1a <_vfprintf_r+0xd46>
74002e58:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002e5c:	4648      	mov	r0, r9
74002e5e:	4631      	mov	r1, r6
74002e60:	320c      	adds	r2, #12
74002e62:	f7fe ffa9 	bl	74001db8 <__sprint_r>
74002e66:	2800      	cmp	r0, #0
74002e68:	f47f a8d4 	bne.w	74002014 <_vfprintf_r+0x240>
74002e6c:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002e70:	3404      	adds	r4, #4
74002e72:	e640      	b.n	74002af6 <_vfprintf_r+0xd22>
74002e74:	2830      	cmp	r0, #48	; 0x30
74002e76:	f000 82ec 	beq.w	74003452 <_vfprintf_r+0x167e>
74002e7a:	9813      	ldr	r0, [sp, #76]	; 0x4c
74002e7c:	2330      	movs	r3, #48	; 0x30
74002e7e:	f800 3d01 	strb.w	r3, [r0, #-1]!
74002e82:	9918      	ldr	r1, [sp, #96]	; 0x60
74002e84:	9013      	str	r0, [sp, #76]	; 0x4c
74002e86:	1a09      	subs	r1, r1, r0
74002e88:	9110      	str	r1, [sp, #64]	; 0x40
74002e8a:	f7ff b96a 	b.w	74002162 <_vfprintf_r+0x38e>
74002e8e:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002e92:	4648      	mov	r0, r9
74002e94:	4631      	mov	r1, r6
74002e96:	320c      	adds	r2, #12
74002e98:	f7fe ff8e 	bl	74001db8 <__sprint_r>
74002e9c:	2800      	cmp	r0, #0
74002e9e:	f47f a8b9 	bne.w	74002014 <_vfprintf_r+0x240>
74002ea2:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
74002ea6:	3404      	adds	r4, #4
74002ea8:	f7ff b9f8 	b.w	7400229c <_vfprintf_r+0x4c8>
74002eac:	f1da 0a00 	rsbs	sl, sl, #0
74002eb0:	eb6b 0b4b 	sbc.w	fp, fp, fp, lsl #1
74002eb4:	232d      	movs	r3, #45	; 0x2d
74002eb6:	ea5a 0c0b 	orrs.w	ip, sl, fp
74002eba:	f88d 3577 	strb.w	r3, [sp, #1399]	; 0x577
74002ebe:	bf0c      	ite	eq
74002ec0:	2200      	moveq	r2, #0
74002ec2:	2201      	movne	r2, #1
74002ec4:	2301      	movs	r3, #1
74002ec6:	f7ff b91b 	b.w	74002100 <_vfprintf_r+0x32c>
74002eca:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002ecc:	462b      	mov	r3, r5
74002ece:	782a      	ldrb	r2, [r5, #0]
74002ed0:	910b      	str	r1, [sp, #44]	; 0x2c
74002ed2:	f7ff b82a 	b.w	74001f2a <_vfprintf_r+0x156>
74002ed6:	462a      	mov	r2, r5
74002ed8:	4645      	mov	r5, r8
74002eda:	4690      	mov	r8, r2
74002edc:	605f      	str	r7, [r3, #4]
74002ede:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002ee2:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002ee6:	3201      	adds	r2, #1
74002ee8:	f8c3 8000 	str.w	r8, [r3]
74002eec:	19c9      	adds	r1, r1, r7
74002eee:	2a07      	cmp	r2, #7
74002ef0:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74002ef4:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002ef8:	f73f adce 	bgt.w	74002a98 <_vfprintf_r+0xcc4>
74002efc:	3308      	adds	r3, #8
74002efe:	f7ff ba30 	b.w	74002362 <_vfprintf_r+0x58e>
74002f02:	980a      	ldr	r0, [sp, #40]	; 0x28
74002f04:	f010 0340 	ands.w	r3, r0, #64	; 0x40
74002f08:	f000 81ed 	beq.w	740032e6 <_vfprintf_r+0x1512>
74002f0c:	990b      	ldr	r1, [sp, #44]	; 0x2c
74002f0e:	4613      	mov	r3, r2
74002f10:	1d0a      	adds	r2, r1, #4
74002f12:	920b      	str	r2, [sp, #44]	; 0x2c
74002f14:	f8b1 a000 	ldrh.w	sl, [r1]
74002f18:	f1ba 0200 	subs.w	r2, sl, #0
74002f1c:	bf18      	it	ne
74002f1e:	2201      	movne	r2, #1
74002f20:	46d2      	mov	sl, sl
74002f22:	f04f 0b00 	mov.w	fp, #0
74002f26:	f7ff b8e7 	b.w	740020f8 <_vfprintf_r+0x324>
74002f2a:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002f2c:	f013 0f40 	tst.w	r3, #64	; 0x40
74002f30:	f000 81cc 	beq.w	740032cc <_vfprintf_r+0x14f8>
74002f34:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002f36:	2301      	movs	r3, #1
74002f38:	1d01      	adds	r1, r0, #4
74002f3a:	910b      	str	r1, [sp, #44]	; 0x2c
74002f3c:	f8b0 a000 	ldrh.w	sl, [r0]
74002f40:	f1ba 0200 	subs.w	r2, sl, #0
74002f44:	bf18      	it	ne
74002f46:	2201      	movne	r2, #1
74002f48:	46d2      	mov	sl, sl
74002f4a:	f04f 0b00 	mov.w	fp, #0
74002f4e:	f7ff b8d3 	b.w	740020f8 <_vfprintf_r+0x324>
74002f52:	9b0a      	ldr	r3, [sp, #40]	; 0x28
74002f54:	f013 0f10 	tst.w	r3, #16
74002f58:	f000 81a4 	beq.w	740032a4 <_vfprintf_r+0x14d0>
74002f5c:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002f5e:	9911      	ldr	r1, [sp, #68]	; 0x44
74002f60:	f100 0a04 	add.w	sl, r0, #4
74002f64:	6803      	ldr	r3, [r0, #0]
74002f66:	6019      	str	r1, [r3, #0]
74002f68:	f7fe bf9c 	b.w	74001ea4 <_vfprintf_r+0xd0>
74002f6c:	980b      	ldr	r0, [sp, #44]	; 0x2c
74002f6e:	1dc3      	adds	r3, r0, #7
74002f70:	f023 0307 	bic.w	r3, r3, #7
74002f74:	f103 0108 	add.w	r1, r3, #8
74002f78:	910b      	str	r1, [sp, #44]	; 0x2c
74002f7a:	f8d3 8004 	ldr.w	r8, [r3, #4]
74002f7e:	f8d3 a000 	ldr.w	sl, [r3]
74002f82:	f8cd 806c 	str.w	r8, [sp, #108]	; 0x6c
74002f86:	f8cd a048 	str.w	sl, [sp, #72]	; 0x48
74002f8a:	f7ff bb11 	b.w	740025b0 <_vfprintf_r+0x7dc>
74002f8e:	462a      	mov	r2, r5
74002f90:	4645      	mov	r5, r8
74002f92:	4690      	mov	r8, r2
74002f94:	605c      	str	r4, [r3, #4]
74002f96:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002f9a:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002f9e:	3201      	adds	r2, #1
74002fa0:	f8c3 8000 	str.w	r8, [r3]
74002fa4:	1909      	adds	r1, r1, r4
74002fa6:	2a07      	cmp	r2, #7
74002fa8:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74002fac:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002fb0:	f300 82ea 	bgt.w	74003588 <_vfprintf_r+0x17b4>
74002fb4:	3308      	adds	r3, #8
74002fb6:	990a      	ldr	r1, [sp, #40]	; 0x28
74002fb8:	f011 0f01 	tst.w	r1, #1
74002fbc:	f43f a9d1 	beq.w	74002362 <_vfprintf_r+0x58e>
74002fc0:	2201      	movs	r2, #1
74002fc2:	605a      	str	r2, [r3, #4]
74002fc4:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74002fc8:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
74002fcc:	3201      	adds	r2, #1
74002fce:	981d      	ldr	r0, [sp, #116]	; 0x74
74002fd0:	3101      	adds	r1, #1
74002fd2:	2a07      	cmp	r2, #7
74002fd4:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74002fd8:	6018      	str	r0, [r3, #0]
74002fda:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74002fde:	f73f ad5b 	bgt.w	74002a98 <_vfprintf_r+0xcc4>
74002fe2:	3308      	adds	r3, #8
74002fe4:	f7ff b9bd 	b.w	74002362 <_vfprintf_r+0x58e>
74002fe8:	232d      	movs	r3, #45	; 0x2d
74002fea:	f88d 3577 	strb.w	r3, [sp, #1399]	; 0x577
74002fee:	f7ff baf2 	b.w	740025d6 <_vfprintf_r+0x802>
74002ff2:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74002ff6:	4648      	mov	r0, r9
74002ff8:	4631      	mov	r1, r6
74002ffa:	320c      	adds	r2, #12
74002ffc:	f7fe fedc 	bl	74001db8 <__sprint_r>
74003000:	2800      	cmp	r0, #0
74003002:	f47f a807 	bne.w	74002014 <_vfprintf_r+0x240>
74003006:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
7400300a:	3304      	adds	r3, #4
7400300c:	e456      	b.n	740028bc <_vfprintf_r+0xae8>
7400300e:	2301      	movs	r3, #1
74003010:	6063      	str	r3, [r4, #4]
74003012:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74003016:	f248 23f8 	movw	r3, #33528	; 0x82f8
7400301a:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400301e:	6023      	str	r3, [r4, #0]
74003020:	f8dd 3554 	ldr.w	r3, [sp, #1364]	; 0x554
74003024:	3201      	adds	r2, #1
74003026:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
7400302a:	3301      	adds	r3, #1
7400302c:	2a07      	cmp	r2, #7
7400302e:	f8cd 3554 	str.w	r3, [sp, #1364]	; 0x554
74003032:	bfd8      	it	le
74003034:	f104 0308 	addle.w	r3, r4, #8
74003038:	f300 8187 	bgt.w	7400334a <_vfprintf_r+0x1576>
7400303c:	f8dd 2570 	ldr.w	r2, [sp, #1392]	; 0x570
74003040:	b93a      	cbnz	r2, 74003052 <_vfprintf_r+0x127e>
74003042:	9a1a      	ldr	r2, [sp, #104]	; 0x68
74003044:	b92a      	cbnz	r2, 74003052 <_vfprintf_r+0x127e>
74003046:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
7400304a:	f01c 0f01 	tst.w	ip, #1
7400304e:	f43f a988 	beq.w	74002362 <_vfprintf_r+0x58e>
74003052:	2201      	movs	r2, #1
74003054:	605a      	str	r2, [r3, #4]
74003056:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
7400305a:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
7400305e:	3201      	adds	r2, #1
74003060:	981d      	ldr	r0, [sp, #116]	; 0x74
74003062:	3101      	adds	r1, #1
74003064:	2a07      	cmp	r2, #7
74003066:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
7400306a:	6018      	str	r0, [r3, #0]
7400306c:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74003070:	f300 8179 	bgt.w	74003366 <_vfprintf_r+0x1592>
74003074:	3308      	adds	r3, #8
74003076:	f8dd 7570 	ldr.w	r7, [sp, #1392]	; 0x570
7400307a:	427f      	negs	r7, r7
7400307c:	2f00      	cmp	r7, #0
7400307e:	f340 81b3 	ble.w	740033e8 <_vfprintf_r+0x1614>
74003082:	2f10      	cmp	r7, #16
74003084:	f8df 8650 	ldr.w	r8, [pc, #1616]	; 740036d8 <_vfprintf_r+0x1904>
74003088:	f340 81d2 	ble.w	74003430 <_vfprintf_r+0x165c>
7400308c:	4642      	mov	r2, r8
7400308e:	f50d 6aa8 	add.w	sl, sp, #1344	; 0x540
74003092:	46a8      	mov	r8, r5
74003094:	2410      	movs	r4, #16
74003096:	f10a 0a0c 	add.w	sl, sl, #12
7400309a:	4615      	mov	r5, r2
7400309c:	e003      	b.n	740030a6 <_vfprintf_r+0x12d2>
7400309e:	3f10      	subs	r7, #16
740030a0:	2f10      	cmp	r7, #16
740030a2:	f340 81c2 	ble.w	7400342a <_vfprintf_r+0x1656>
740030a6:	605c      	str	r4, [r3, #4]
740030a8:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
740030ac:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
740030b0:	3201      	adds	r2, #1
740030b2:	601d      	str	r5, [r3, #0]
740030b4:	3110      	adds	r1, #16
740030b6:	2a07      	cmp	r2, #7
740030b8:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
740030bc:	f103 0308 	add.w	r3, r3, #8
740030c0:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
740030c4:	ddeb      	ble.n	7400309e <_vfprintf_r+0x12ca>
740030c6:	4648      	mov	r0, r9
740030c8:	4631      	mov	r1, r6
740030ca:	4652      	mov	r2, sl
740030cc:	f7fe fe74 	bl	74001db8 <__sprint_r>
740030d0:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740030d4:	3304      	adds	r3, #4
740030d6:	2800      	cmp	r0, #0
740030d8:	d0e1      	beq.n	7400309e <_vfprintf_r+0x12ca>
740030da:	f7fe bf9b 	b.w	74002014 <_vfprintf_r+0x240>
740030de:	990b      	ldr	r1, [sp, #44]	; 0x2c
740030e0:	1c6b      	adds	r3, r5, #1
740030e2:	9a0a      	ldr	r2, [sp, #40]	; 0x28
740030e4:	f042 0220 	orr.w	r2, r2, #32
740030e8:	920a      	str	r2, [sp, #40]	; 0x28
740030ea:	786a      	ldrb	r2, [r5, #1]
740030ec:	910b      	str	r1, [sp, #44]	; 0x2c
740030ee:	f7fe bf1c 	b.w	74001f2a <_vfprintf_r+0x156>
740030f2:	4650      	mov	r0, sl
740030f4:	4641      	mov	r1, r8
740030f6:	f003 fc0b 	bl	74006910 <__isnand>
740030fa:	2800      	cmp	r0, #0
740030fc:	f040 80ff 	bne.w	740032fe <_vfprintf_r+0x152a>
74003100:	f1b7 3fff 	cmp.w	r7, #4294967295
74003104:	f000 8251 	beq.w	740035aa <_vfprintf_r+0x17d6>
74003108:	9816      	ldr	r0, [sp, #88]	; 0x58
7400310a:	2867      	cmp	r0, #103	; 0x67
7400310c:	bf14      	ite	ne
7400310e:	2300      	movne	r3, #0
74003110:	2301      	moveq	r3, #1
74003112:	2847      	cmp	r0, #71	; 0x47
74003114:	bf08      	it	eq
74003116:	f043 0301 	orreq.w	r3, r3, #1
7400311a:	b113      	cbz	r3, 74003122 <_vfprintf_r+0x134e>
7400311c:	2f00      	cmp	r7, #0
7400311e:	bf08      	it	eq
74003120:	2701      	moveq	r7, #1
74003122:	f50d 60ab 	add.w	r0, sp, #1368	; 0x558
74003126:	4643      	mov	r3, r8
74003128:	4652      	mov	r2, sl
7400312a:	990a      	ldr	r1, [sp, #40]	; 0x28
7400312c:	e9c0 2300 	strd	r2, r3, [r0]
74003130:	f8dd 355c 	ldr.w	r3, [sp, #1372]	; 0x55c
74003134:	f441 7180 	orr.w	r1, r1, #256	; 0x100
74003138:	910a      	str	r1, [sp, #40]	; 0x28
7400313a:	2b00      	cmp	r3, #0
7400313c:	f2c0 8264 	blt.w	74003608 <_vfprintf_r+0x1834>
74003140:	2100      	movs	r1, #0
74003142:	9117      	str	r1, [sp, #92]	; 0x5c
74003144:	9816      	ldr	r0, [sp, #88]	; 0x58
74003146:	2866      	cmp	r0, #102	; 0x66
74003148:	bf14      	ite	ne
7400314a:	2300      	movne	r3, #0
7400314c:	2301      	moveq	r3, #1
7400314e:	2846      	cmp	r0, #70	; 0x46
74003150:	bf08      	it	eq
74003152:	f043 0301 	orreq.w	r3, r3, #1
74003156:	9310      	str	r3, [sp, #64]	; 0x40
74003158:	2b00      	cmp	r3, #0
7400315a:	f000 81d1 	beq.w	74003500 <_vfprintf_r+0x172c>
7400315e:	46bc      	mov	ip, r7
74003160:	2303      	movs	r3, #3
74003162:	f8cd a030 	str.w	sl, [sp, #48]	; 0x30
74003166:	f50d 61ae 	add.w	r1, sp, #1392	; 0x570
7400316a:	f8cd 8034 	str.w	r8, [sp, #52]	; 0x34
7400316e:	4648      	mov	r0, r9
74003170:	9300      	str	r3, [sp, #0]
74003172:	9102      	str	r1, [sp, #8]
74003174:	f50d 61ac 	add.w	r1, sp, #1376	; 0x560
74003178:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
7400317c:	310c      	adds	r1, #12
7400317e:	f8cd c004 	str.w	ip, [sp, #4]
74003182:	9103      	str	r1, [sp, #12]
74003184:	f50d 61ad 	add.w	r1, sp, #1384	; 0x568
74003188:	f8cd c024 	str.w	ip, [sp, #36]	; 0x24
7400318c:	9104      	str	r1, [sp, #16]
7400318e:	f000 fbc7 	bl	74003920 <_dtoa_r>
74003192:	9a16      	ldr	r2, [sp, #88]	; 0x58
74003194:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
74003198:	f1b2 0367 	subs.w	r3, r2, #103	; 0x67
7400319c:	bf18      	it	ne
7400319e:	2301      	movne	r3, #1
740031a0:	2a47      	cmp	r2, #71	; 0x47
740031a2:	bf0c      	ite	eq
740031a4:	2300      	moveq	r3, #0
740031a6:	f003 0301 	andne.w	r3, r3, #1
740031aa:	9013      	str	r0, [sp, #76]	; 0x4c
740031ac:	b933      	cbnz	r3, 740031bc <_vfprintf_r+0x13e8>
740031ae:	9b0a      	ldr	r3, [sp, #40]	; 0x28
740031b0:	f013 0f01 	tst.w	r3, #1
740031b4:	bf08      	it	eq
740031b6:	f8dd b568 	ldreq.w	fp, [sp, #1384]	; 0x568
740031ba:	d016      	beq.n	740031ea <_vfprintf_r+0x1416>
740031bc:	9813      	ldr	r0, [sp, #76]	; 0x4c
740031be:	9910      	ldr	r1, [sp, #64]	; 0x40
740031c0:	eb00 0b0c 	add.w	fp, r0, ip
740031c4:	b131      	cbz	r1, 740031d4 <_vfprintf_r+0x1400>
740031c6:	7803      	ldrb	r3, [r0, #0]
740031c8:	2b30      	cmp	r3, #48	; 0x30
740031ca:	f000 80da 	beq.w	74003382 <_vfprintf_r+0x15ae>
740031ce:	f8dd 3570 	ldr.w	r3, [sp, #1392]	; 0x570
740031d2:	449b      	add	fp, r3
740031d4:	4650      	mov	r0, sl
740031d6:	2200      	movs	r2, #0
740031d8:	2300      	movs	r3, #0
740031da:	4641      	mov	r1, r8
740031dc:	f004 fc02 	bl	740079e4 <__aeabi_dcmpeq>
740031e0:	2800      	cmp	r0, #0
740031e2:	f000 81c2 	beq.w	7400356a <_vfprintf_r+0x1796>
740031e6:	f8cd b568 	str.w	fp, [sp, #1384]	; 0x568
740031ea:	9a16      	ldr	r2, [sp, #88]	; 0x58
740031ec:	9813      	ldr	r0, [sp, #76]	; 0x4c
740031ee:	2a67      	cmp	r2, #103	; 0x67
740031f0:	bf14      	ite	ne
740031f2:	2300      	movne	r3, #0
740031f4:	2301      	moveq	r3, #1
740031f6:	2a47      	cmp	r2, #71	; 0x47
740031f8:	bf08      	it	eq
740031fa:	f043 0301 	orreq.w	r3, r3, #1
740031fe:	ebc0 000b 	rsb	r0, r0, fp
74003202:	901a      	str	r0, [sp, #104]	; 0x68
74003204:	2b00      	cmp	r3, #0
74003206:	f000 818a 	beq.w	7400351e <_vfprintf_r+0x174a>
7400320a:	f8dd 1570 	ldr.w	r1, [sp, #1392]	; 0x570
7400320e:	f111 0f03 	cmn.w	r1, #3
74003212:	9110      	str	r1, [sp, #64]	; 0x40
74003214:	db02      	blt.n	7400321c <_vfprintf_r+0x1448>
74003216:	428f      	cmp	r7, r1
74003218:	f280 818c 	bge.w	74003534 <_vfprintf_r+0x1760>
7400321c:	9a16      	ldr	r2, [sp, #88]	; 0x58
7400321e:	3a02      	subs	r2, #2
74003220:	9216      	str	r2, [sp, #88]	; 0x58
74003222:	9910      	ldr	r1, [sp, #64]	; 0x40
74003224:	9a16      	ldr	r2, [sp, #88]	; 0x58
74003226:	1e4b      	subs	r3, r1, #1
74003228:	f8cd 3570 	str.w	r3, [sp, #1392]	; 0x570
7400322c:	2b00      	cmp	r3, #0
7400322e:	f88d 2560 	strb.w	r2, [sp, #1376]	; 0x560
74003232:	f2c0 8234 	blt.w	7400369e <_vfprintf_r+0x18ca>
74003236:	222b      	movs	r2, #43	; 0x2b
74003238:	f88d 2561 	strb.w	r2, [sp, #1377]	; 0x561
7400323c:	2b09      	cmp	r3, #9
7400323e:	f300 81b6 	bgt.w	740035ae <_vfprintf_r+0x17da>
74003242:	f50d 62ac 	add.w	r2, sp, #1376	; 0x560
74003246:	3330      	adds	r3, #48	; 0x30
74003248:	3204      	adds	r2, #4
7400324a:	f88d 3563 	strb.w	r3, [sp, #1379]	; 0x563
7400324e:	2330      	movs	r3, #48	; 0x30
74003250:	f88d 3562 	strb.w	r3, [sp, #1378]	; 0x562
74003254:	f50d 63ac 	add.w	r3, sp, #1376	; 0x560
74003258:	981a      	ldr	r0, [sp, #104]	; 0x68
7400325a:	991a      	ldr	r1, [sp, #104]	; 0x68
7400325c:	1ad3      	subs	r3, r2, r3
7400325e:	1818      	adds	r0, r3, r0
74003260:	931c      	str	r3, [sp, #112]	; 0x70
74003262:	2901      	cmp	r1, #1
74003264:	9010      	str	r0, [sp, #64]	; 0x40
74003266:	f340 8210 	ble.w	7400368a <_vfprintf_r+0x18b6>
7400326a:	9810      	ldr	r0, [sp, #64]	; 0x40
7400326c:	3001      	adds	r0, #1
7400326e:	9010      	str	r0, [sp, #64]	; 0x40
74003270:	ea20 71e0 	bic.w	r1, r0, r0, asr #31
74003274:	910c      	str	r1, [sp, #48]	; 0x30
74003276:	9817      	ldr	r0, [sp, #92]	; 0x5c
74003278:	2800      	cmp	r0, #0
7400327a:	f000 816e 	beq.w	7400355a <_vfprintf_r+0x1786>
7400327e:	232d      	movs	r3, #45	; 0x2d
74003280:	2100      	movs	r1, #0
74003282:	f88d 3577 	strb.w	r3, [sp, #1399]	; 0x577
74003286:	9117      	str	r1, [sp, #92]	; 0x5c
74003288:	f7fe bf74 	b.w	74002174 <_vfprintf_r+0x3a0>
7400328c:	9a10      	ldr	r2, [sp, #64]	; 0x40
7400328e:	f04f 0c00 	mov.w	ip, #0
74003292:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
74003296:	ea22 72e2 	bic.w	r2, r2, r2, asr #31
7400329a:	f8cd c05c 	str.w	ip, [sp, #92]	; 0x5c
7400329e:	920c      	str	r2, [sp, #48]	; 0x30
740032a0:	f7fe bf67 	b.w	74002172 <_vfprintf_r+0x39e>
740032a4:	9a0a      	ldr	r2, [sp, #40]	; 0x28
740032a6:	f012 0f40 	tst.w	r2, #64	; 0x40
740032aa:	bf17      	itett	ne
740032ac:	980b      	ldrne	r0, [sp, #44]	; 0x2c
740032ae:	9a0b      	ldreq	r2, [sp, #44]	; 0x2c
740032b0:	9911      	ldrne	r1, [sp, #68]	; 0x44
740032b2:	f100 0a04 	addne.w	sl, r0, #4
740032b6:	bf11      	iteee	ne
740032b8:	6803      	ldrne	r3, [r0, #0]
740032ba:	f102 0a04 	addeq.w	sl, r2, #4
740032be:	6813      	ldreq	r3, [r2, #0]
740032c0:	9811      	ldreq	r0, [sp, #68]	; 0x44
740032c2:	bf14      	ite	ne
740032c4:	8019      	strhne	r1, [r3, #0]
740032c6:	6018      	streq	r0, [r3, #0]
740032c8:	f7fe bdec 	b.w	74001ea4 <_vfprintf_r+0xd0>
740032cc:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
740032ce:	1d13      	adds	r3, r2, #4
740032d0:	930b      	str	r3, [sp, #44]	; 0x2c
740032d2:	6811      	ldr	r1, [r2, #0]
740032d4:	2301      	movs	r3, #1
740032d6:	1e0a      	subs	r2, r1, #0
740032d8:	bf18      	it	ne
740032da:	2201      	movne	r2, #1
740032dc:	468a      	mov	sl, r1
740032de:	f04f 0b00 	mov.w	fp, #0
740032e2:	f7fe bf09 	b.w	740020f8 <_vfprintf_r+0x324>
740032e6:	980b      	ldr	r0, [sp, #44]	; 0x2c
740032e8:	1d02      	adds	r2, r0, #4
740032ea:	920b      	str	r2, [sp, #44]	; 0x2c
740032ec:	6801      	ldr	r1, [r0, #0]
740032ee:	1e0a      	subs	r2, r1, #0
740032f0:	bf18      	it	ne
740032f2:	2201      	movne	r2, #1
740032f4:	468a      	mov	sl, r1
740032f6:	f04f 0b00 	mov.w	fp, #0
740032fa:	f7fe befd 	b.w	740020f8 <_vfprintf_r+0x324>
740032fe:	f248 22d8 	movw	r2, #33496	; 0x82d8
74003302:	f248 23d4 	movw	r3, #33492	; 0x82d4
74003306:	9916      	ldr	r1, [sp, #88]	; 0x58
74003308:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400330c:	f2c7 4200 	movt	r2, #29696	; 0x7400
74003310:	2003      	movs	r0, #3
74003312:	2947      	cmp	r1, #71	; 0x47
74003314:	bfd8      	it	le
74003316:	461a      	movle	r2, r3
74003318:	9213      	str	r2, [sp, #76]	; 0x4c
7400331a:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7400331c:	900c      	str	r0, [sp, #48]	; 0x30
7400331e:	f022 0280 	bic.w	r2, r2, #128	; 0x80
74003322:	f8cd b05c 	str.w	fp, [sp, #92]	; 0x5c
74003326:	920a      	str	r2, [sp, #40]	; 0x28
74003328:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7400332c:	9010      	str	r0, [sp, #64]	; 0x40
7400332e:	f7fe bf20 	b.w	74002172 <_vfprintf_r+0x39e>
74003332:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74003336:	4648      	mov	r0, r9
74003338:	4631      	mov	r1, r6
7400333a:	320c      	adds	r2, #12
7400333c:	f7fe fd3c 	bl	74001db8 <__sprint_r>
74003340:	2800      	cmp	r0, #0
74003342:	f47e ae67 	bne.w	74002014 <_vfprintf_r+0x240>
74003346:	f7fe be62 	b.w	7400200e <_vfprintf_r+0x23a>
7400334a:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
7400334e:	4648      	mov	r0, r9
74003350:	4631      	mov	r1, r6
74003352:	320c      	adds	r2, #12
74003354:	f7fe fd30 	bl	74001db8 <__sprint_r>
74003358:	2800      	cmp	r0, #0
7400335a:	f47e ae5b 	bne.w	74002014 <_vfprintf_r+0x240>
7400335e:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
74003362:	3304      	adds	r3, #4
74003364:	e66a      	b.n	7400303c <_vfprintf_r+0x1268>
74003366:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
7400336a:	4648      	mov	r0, r9
7400336c:	4631      	mov	r1, r6
7400336e:	320c      	adds	r2, #12
74003370:	f7fe fd22 	bl	74001db8 <__sprint_r>
74003374:	2800      	cmp	r0, #0
74003376:	f47e ae4d 	bne.w	74002014 <_vfprintf_r+0x240>
7400337a:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
7400337e:	3304      	adds	r3, #4
74003380:	e679      	b.n	74003076 <_vfprintf_r+0x12a2>
74003382:	4650      	mov	r0, sl
74003384:	2200      	movs	r2, #0
74003386:	2300      	movs	r3, #0
74003388:	4641      	mov	r1, r8
7400338a:	f8cd c024 	str.w	ip, [sp, #36]	; 0x24
7400338e:	f004 fb29 	bl	740079e4 <__aeabi_dcmpeq>
74003392:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
74003396:	2800      	cmp	r0, #0
74003398:	f47f af19 	bne.w	740031ce <_vfprintf_r+0x13fa>
7400339c:	f1cc 0301 	rsb	r3, ip, #1
740033a0:	f8cd 3570 	str.w	r3, [sp, #1392]	; 0x570
740033a4:	e715      	b.n	740031d2 <_vfprintf_r+0x13fe>
740033a6:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
740033a8:	4252      	negs	r2, r2
740033aa:	920f      	str	r2, [sp, #60]	; 0x3c
740033ac:	f7ff b887 	b.w	740024be <_vfprintf_r+0x6ea>
740033b0:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
740033b4:	4648      	mov	r0, r9
740033b6:	4631      	mov	r1, r6
740033b8:	320c      	adds	r2, #12
740033ba:	f7fe fcfd 	bl	74001db8 <__sprint_r>
740033be:	2800      	cmp	r0, #0
740033c0:	f47e ae28 	bne.w	74002014 <_vfprintf_r+0x240>
740033c4:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740033c8:	3304      	adds	r3, #4
740033ca:	f7ff ba93 	b.w	740028f4 <_vfprintf_r+0xb20>
740033ce:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
740033d2:	4648      	mov	r0, r9
740033d4:	4631      	mov	r1, r6
740033d6:	320c      	adds	r2, #12
740033d8:	f7fe fcee 	bl	74001db8 <__sprint_r>
740033dc:	2800      	cmp	r0, #0
740033de:	f47e ae19 	bne.w	74002014 <_vfprintf_r+0x240>
740033e2:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740033e6:	3304      	adds	r3, #4
740033e8:	991a      	ldr	r1, [sp, #104]	; 0x68
740033ea:	9813      	ldr	r0, [sp, #76]	; 0x4c
740033ec:	6059      	str	r1, [r3, #4]
740033ee:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
740033f2:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
740033f6:	6018      	str	r0, [r3, #0]
740033f8:	3201      	adds	r2, #1
740033fa:	981a      	ldr	r0, [sp, #104]	; 0x68
740033fc:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
74003400:	1809      	adds	r1, r1, r0
74003402:	2a07      	cmp	r2, #7
74003404:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74003408:	f73f ab46 	bgt.w	74002a98 <_vfprintf_r+0xcc4>
7400340c:	3308      	adds	r3, #8
7400340e:	f7fe bfa8 	b.w	74002362 <_vfprintf_r+0x58e>
74003412:	2100      	movs	r1, #0
74003414:	9117      	str	r1, [sp, #92]	; 0x5c
74003416:	f003 fbd3 	bl	74006bc0 <strlen>
7400341a:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
7400341e:	ea20 72e0 	bic.w	r2, r0, r0, asr #31
74003422:	9010      	str	r0, [sp, #64]	; 0x40
74003424:	920c      	str	r2, [sp, #48]	; 0x30
74003426:	f7fe bea4 	b.w	74002172 <_vfprintf_r+0x39e>
7400342a:	462a      	mov	r2, r5
7400342c:	4645      	mov	r5, r8
7400342e:	4690      	mov	r8, r2
74003430:	605f      	str	r7, [r3, #4]
74003432:	f8dd 2550 	ldr.w	r2, [sp, #1360]	; 0x550
74003436:	f8dd 1554 	ldr.w	r1, [sp, #1364]	; 0x554
7400343a:	3201      	adds	r2, #1
7400343c:	f8c3 8000 	str.w	r8, [r3]
74003440:	19c9      	adds	r1, r1, r7
74003442:	2a07      	cmp	r2, #7
74003444:	f8cd 1554 	str.w	r1, [sp, #1364]	; 0x554
74003448:	f8cd 2550 	str.w	r2, [sp, #1360]	; 0x550
7400344c:	dcbf      	bgt.n	740033ce <_vfprintf_r+0x15fa>
7400344e:	3308      	adds	r3, #8
74003450:	e7ca      	b.n	740033e8 <_vfprintf_r+0x1614>
74003452:	9a18      	ldr	r2, [sp, #96]	; 0x60
74003454:	9913      	ldr	r1, [sp, #76]	; 0x4c
74003456:	1a51      	subs	r1, r2, r1
74003458:	9110      	str	r1, [sp, #64]	; 0x40
7400345a:	f7fe be82 	b.w	74002162 <_vfprintf_r+0x38e>
7400345e:	4648      	mov	r0, r9
74003460:	4631      	mov	r1, r6
74003462:	f000 f949 	bl	740036f8 <__swsetup_r>
74003466:	2800      	cmp	r0, #0
74003468:	f47e add8 	bne.w	7400201c <_vfprintf_r+0x248>
7400346c:	f8b6 c00c 	ldrh.w	ip, [r6, #12]
74003470:	fa1f f38c 	uxth.w	r3, ip
74003474:	f7fe bcf6 	b.w	74001e64 <_vfprintf_r+0x90>
74003478:	2f06      	cmp	r7, #6
7400347a:	bf28      	it	cs
7400347c:	2706      	movcs	r7, #6
7400347e:	f248 21f0 	movw	r1, #33520	; 0x82f0
74003482:	f2c7 4100 	movt	r1, #29696	; 0x7400
74003486:	ea27 72e7 	bic.w	r2, r7, r7, asr #31
7400348a:	9710      	str	r7, [sp, #64]	; 0x40
7400348c:	9113      	str	r1, [sp, #76]	; 0x4c
7400348e:	920c      	str	r2, [sp, #48]	; 0x30
74003490:	f7fe bfe8 	b.w	74002464 <_vfprintf_r+0x690>
74003494:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
74003498:	4648      	mov	r0, r9
7400349a:	4631      	mov	r1, r6
7400349c:	320c      	adds	r2, #12
7400349e:	f7fe fc8b 	bl	74001db8 <__sprint_r>
740034a2:	2800      	cmp	r0, #0
740034a4:	f47e adb6 	bne.w	74002014 <_vfprintf_r+0x240>
740034a8:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740034ac:	3304      	adds	r3, #4
740034ae:	f7ff bbc8 	b.w	74002c42 <_vfprintf_r+0xe6e>
740034b2:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
740034b6:	4648      	mov	r0, r9
740034b8:	4631      	mov	r1, r6
740034ba:	320c      	adds	r2, #12
740034bc:	f7fe fc7c 	bl	74001db8 <__sprint_r>
740034c0:	2800      	cmp	r0, #0
740034c2:	f47e ada7 	bne.w	74002014 <_vfprintf_r+0x240>
740034c6:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740034ca:	3304      	adds	r3, #4
740034cc:	f7ff bace 	b.w	74002a6c <_vfprintf_r+0xc98>
740034d0:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
740034d4:	4648      	mov	r0, r9
740034d6:	4631      	mov	r1, r6
740034d8:	320c      	adds	r2, #12
740034da:	f7fe fc6d 	bl	74001db8 <__sprint_r>
740034de:	2800      	cmp	r0, #0
740034e0:	f47e ad98 	bne.w	74002014 <_vfprintf_r+0x240>
740034e4:	f50d 649c 	add.w	r4, sp, #1248	; 0x4e0
740034e8:	3404      	adds	r4, #4
740034ea:	f7ff baa9 	b.w	74002a40 <_vfprintf_r+0xc6c>
740034ee:	9710      	str	r7, [sp, #64]	; 0x40
740034f0:	ea27 77e7 	bic.w	r7, r7, r7, asr #31
740034f4:	9017      	str	r0, [sp, #92]	; 0x5c
740034f6:	970c      	str	r7, [sp, #48]	; 0x30
740034f8:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
740034fc:	f7fe be39 	b.w	74002172 <_vfprintf_r+0x39e>
74003500:	9916      	ldr	r1, [sp, #88]	; 0x58
74003502:	2965      	cmp	r1, #101	; 0x65
74003504:	bf14      	ite	ne
74003506:	2300      	movne	r3, #0
74003508:	2301      	moveq	r3, #1
7400350a:	2945      	cmp	r1, #69	; 0x45
7400350c:	bf08      	it	eq
7400350e:	f043 0301 	orreq.w	r3, r3, #1
74003512:	2b00      	cmp	r3, #0
74003514:	d046      	beq.n	740035a4 <_vfprintf_r+0x17d0>
74003516:	f107 0c01 	add.w	ip, r7, #1
7400351a:	2302      	movs	r3, #2
7400351c:	e621      	b.n	74003162 <_vfprintf_r+0x138e>
7400351e:	9b16      	ldr	r3, [sp, #88]	; 0x58
74003520:	2b65      	cmp	r3, #101	; 0x65
74003522:	dd76      	ble.n	74003612 <_vfprintf_r+0x183e>
74003524:	9a16      	ldr	r2, [sp, #88]	; 0x58
74003526:	2a66      	cmp	r2, #102	; 0x66
74003528:	bf1c      	itt	ne
7400352a:	f8dd 3570 	ldrne.w	r3, [sp, #1392]	; 0x570
7400352e:	9310      	strne	r3, [sp, #64]	; 0x40
74003530:	f000 8083 	beq.w	7400363a <_vfprintf_r+0x1866>
74003534:	9b1a      	ldr	r3, [sp, #104]	; 0x68
74003536:	9810      	ldr	r0, [sp, #64]	; 0x40
74003538:	4283      	cmp	r3, r0
7400353a:	dc6e      	bgt.n	7400361a <_vfprintf_r+0x1846>
7400353c:	990a      	ldr	r1, [sp, #40]	; 0x28
7400353e:	f011 0f01 	tst.w	r1, #1
74003542:	f040 808e 	bne.w	74003662 <_vfprintf_r+0x188e>
74003546:	ea20 72e0 	bic.w	r2, r0, r0, asr #31
7400354a:	2367      	movs	r3, #103	; 0x67
7400354c:	920c      	str	r2, [sp, #48]	; 0x30
7400354e:	9316      	str	r3, [sp, #88]	; 0x58
74003550:	e691      	b.n	74003276 <_vfprintf_r+0x14a2>
74003552:	2700      	movs	r7, #0
74003554:	461d      	mov	r5, r3
74003556:	f7fe bce9 	b.w	74001f2c <_vfprintf_r+0x158>
7400355a:	9910      	ldr	r1, [sp, #64]	; 0x40
7400355c:	f89d 3577 	ldrb.w	r3, [sp, #1399]	; 0x577
74003560:	ea21 71e1 	bic.w	r1, r1, r1, asr #31
74003564:	910c      	str	r1, [sp, #48]	; 0x30
74003566:	f7fe be04 	b.w	74002172 <_vfprintf_r+0x39e>
7400356a:	f8dd 3568 	ldr.w	r3, [sp, #1384]	; 0x568
7400356e:	459b      	cmp	fp, r3
74003570:	bf98      	it	ls
74003572:	469b      	movls	fp, r3
74003574:	f67f ae39 	bls.w	740031ea <_vfprintf_r+0x1416>
74003578:	2230      	movs	r2, #48	; 0x30
7400357a:	f803 2b01 	strb.w	r2, [r3], #1
7400357e:	459b      	cmp	fp, r3
74003580:	f8cd 3568 	str.w	r3, [sp, #1384]	; 0x568
74003584:	d8f9      	bhi.n	7400357a <_vfprintf_r+0x17a6>
74003586:	e630      	b.n	740031ea <_vfprintf_r+0x1416>
74003588:	f50d 62a8 	add.w	r2, sp, #1344	; 0x540
7400358c:	4648      	mov	r0, r9
7400358e:	4631      	mov	r1, r6
74003590:	320c      	adds	r2, #12
74003592:	f7fe fc11 	bl	74001db8 <__sprint_r>
74003596:	2800      	cmp	r0, #0
74003598:	f47e ad3c 	bne.w	74002014 <_vfprintf_r+0x240>
7400359c:	f50d 639c 	add.w	r3, sp, #1248	; 0x4e0
740035a0:	3304      	adds	r3, #4
740035a2:	e508      	b.n	74002fb6 <_vfprintf_r+0x11e2>
740035a4:	46bc      	mov	ip, r7
740035a6:	3302      	adds	r3, #2
740035a8:	e5db      	b.n	74003162 <_vfprintf_r+0x138e>
740035aa:	3707      	adds	r7, #7
740035ac:	e5b9      	b.n	74003122 <_vfprintf_r+0x134e>
740035ae:	f246 6c67 	movw	ip, #26215	; 0x6667
740035b2:	f50d 6190 	add.w	r1, sp, #1152	; 0x480
740035b6:	3103      	adds	r1, #3
740035b8:	f2c6 6c66 	movt	ip, #26214	; 0x6666
740035bc:	fb8c 2003 	smull	r2, r0, ip, r3
740035c0:	17da      	asrs	r2, r3, #31
740035c2:	ebc2 02a0 	rsb	r2, r2, r0, asr #2
740035c6:	eb02 0082 	add.w	r0, r2, r2, lsl #2
740035ca:	eba3 0040 	sub.w	r0, r3, r0, lsl #1
740035ce:	4613      	mov	r3, r2
740035d0:	3030      	adds	r0, #48	; 0x30
740035d2:	2a09      	cmp	r2, #9
740035d4:	f801 0d01 	strb.w	r0, [r1, #-1]!
740035d8:	dcf0      	bgt.n	740035bc <_vfprintf_r+0x17e8>
740035da:	3330      	adds	r3, #48	; 0x30
740035dc:	1e48      	subs	r0, r1, #1
740035de:	b2da      	uxtb	r2, r3
740035e0:	f801 2c01 	strb.w	r2, [r1, #-1]
740035e4:	9b07      	ldr	r3, [sp, #28]
740035e6:	4283      	cmp	r3, r0
740035e8:	d96a      	bls.n	740036c0 <_vfprintf_r+0x18ec>
740035ea:	f50d 63ac 	add.w	r3, sp, #1376	; 0x560
740035ee:	3303      	adds	r3, #3
740035f0:	e001      	b.n	740035f6 <_vfprintf_r+0x1822>
740035f2:	f811 2b01 	ldrb.w	r2, [r1], #1
740035f6:	f803 2c01 	strb.w	r2, [r3, #-1]
740035fa:	461a      	mov	r2, r3
740035fc:	f8dd c01c 	ldr.w	ip, [sp, #28]
74003600:	3301      	adds	r3, #1
74003602:	458c      	cmp	ip, r1
74003604:	d8f5      	bhi.n	740035f2 <_vfprintf_r+0x181e>
74003606:	e625      	b.n	74003254 <_vfprintf_r+0x1480>
74003608:	222d      	movs	r2, #45	; 0x2d
7400360a:	f108 4800 	add.w	r8, r8, #2147483648	; 0x80000000
7400360e:	9217      	str	r2, [sp, #92]	; 0x5c
74003610:	e598      	b.n	74003144 <_vfprintf_r+0x1370>
74003612:	f8dd 0570 	ldr.w	r0, [sp, #1392]	; 0x570
74003616:	9010      	str	r0, [sp, #64]	; 0x40
74003618:	e603      	b.n	74003222 <_vfprintf_r+0x144e>
7400361a:	9b10      	ldr	r3, [sp, #64]	; 0x40
7400361c:	991a      	ldr	r1, [sp, #104]	; 0x68
7400361e:	2b00      	cmp	r3, #0
74003620:	bfda      	itte	le
74003622:	9810      	ldrle	r0, [sp, #64]	; 0x40
74003624:	f1c0 0302 	rsble	r3, r0, #2
74003628:	2301      	movgt	r3, #1
7400362a:	185b      	adds	r3, r3, r1
7400362c:	2267      	movs	r2, #103	; 0x67
7400362e:	9310      	str	r3, [sp, #64]	; 0x40
74003630:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
74003634:	9216      	str	r2, [sp, #88]	; 0x58
74003636:	930c      	str	r3, [sp, #48]	; 0x30
74003638:	e61d      	b.n	74003276 <_vfprintf_r+0x14a2>
7400363a:	f8dd 0570 	ldr.w	r0, [sp, #1392]	; 0x570
7400363e:	2800      	cmp	r0, #0
74003640:	9010      	str	r0, [sp, #64]	; 0x40
74003642:	dd31      	ble.n	740036a8 <_vfprintf_r+0x18d4>
74003644:	b91f      	cbnz	r7, 7400364e <_vfprintf_r+0x187a>
74003646:	990a      	ldr	r1, [sp, #40]	; 0x28
74003648:	f011 0f01 	tst.w	r1, #1
7400364c:	d00e      	beq.n	7400366c <_vfprintf_r+0x1898>
7400364e:	9810      	ldr	r0, [sp, #64]	; 0x40
74003650:	2166      	movs	r1, #102	; 0x66
74003652:	9116      	str	r1, [sp, #88]	; 0x58
74003654:	1c43      	adds	r3, r0, #1
74003656:	19db      	adds	r3, r3, r7
74003658:	9310      	str	r3, [sp, #64]	; 0x40
7400365a:	ea23 72e3 	bic.w	r2, r3, r3, asr #31
7400365e:	920c      	str	r2, [sp, #48]	; 0x30
74003660:	e609      	b.n	74003276 <_vfprintf_r+0x14a2>
74003662:	9810      	ldr	r0, [sp, #64]	; 0x40
74003664:	2167      	movs	r1, #103	; 0x67
74003666:	9116      	str	r1, [sp, #88]	; 0x58
74003668:	3001      	adds	r0, #1
7400366a:	9010      	str	r0, [sp, #64]	; 0x40
7400366c:	ea20 72e0 	bic.w	r2, r0, r0, asr #31
74003670:	920c      	str	r2, [sp, #48]	; 0x30
74003672:	e600      	b.n	74003276 <_vfprintf_r+0x14a2>
74003674:	990b      	ldr	r1, [sp, #44]	; 0x2c
74003676:	781a      	ldrb	r2, [r3, #0]
74003678:	680f      	ldr	r7, [r1, #0]
7400367a:	3104      	adds	r1, #4
7400367c:	910b      	str	r1, [sp, #44]	; 0x2c
7400367e:	2f00      	cmp	r7, #0
74003680:	bfb8      	it	lt
74003682:	f04f 37ff 	movlt.w	r7, #4294967295
74003686:	f7fe bc50 	b.w	74001f2a <_vfprintf_r+0x156>
7400368a:	9a0a      	ldr	r2, [sp, #40]	; 0x28
7400368c:	f012 0f01 	tst.w	r2, #1
74003690:	bf04      	itt	eq
74003692:	ea20 73e0 	biceq.w	r3, r0, r0, asr #31
74003696:	930c      	streq	r3, [sp, #48]	; 0x30
74003698:	f43f aded 	beq.w	74003276 <_vfprintf_r+0x14a2>
7400369c:	e5e5      	b.n	7400326a <_vfprintf_r+0x1496>
7400369e:	222d      	movs	r2, #45	; 0x2d
740036a0:	425b      	negs	r3, r3
740036a2:	f88d 2561 	strb.w	r2, [sp, #1377]	; 0x561
740036a6:	e5c9      	b.n	7400323c <_vfprintf_r+0x1468>
740036a8:	b977      	cbnz	r7, 740036c8 <_vfprintf_r+0x18f4>
740036aa:	9b0a      	ldr	r3, [sp, #40]	; 0x28
740036ac:	f013 0f01 	tst.w	r3, #1
740036b0:	d10a      	bne.n	740036c8 <_vfprintf_r+0x18f4>
740036b2:	f04f 0c01 	mov.w	ip, #1
740036b6:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
740036ba:	f8cd c040 	str.w	ip, [sp, #64]	; 0x40
740036be:	e5da      	b.n	74003276 <_vfprintf_r+0x14a2>
740036c0:	f50d 62ac 	add.w	r2, sp, #1376	; 0x560
740036c4:	3202      	adds	r2, #2
740036c6:	e5c5      	b.n	74003254 <_vfprintf_r+0x1480>
740036c8:	3702      	adds	r7, #2
740036ca:	2166      	movs	r1, #102	; 0x66
740036cc:	ea27 72e7 	bic.w	r2, r7, r7, asr #31
740036d0:	9710      	str	r7, [sp, #64]	; 0x40
740036d2:	9116      	str	r1, [sp, #88]	; 0x58
740036d4:	920c      	str	r2, [sp, #48]	; 0x30
740036d6:	e5ce      	b.n	74003276 <_vfprintf_r+0x14a2>
740036d8:	740082a8 	.word	0x740082a8

740036dc <vfprintf>:
740036dc:	b410      	push	{r4}
740036de:	f240 043c 	movw	r4, #60	; 0x3c
740036e2:	f2c7 0400 	movt	r4, #28672	; 0x7000
740036e6:	468c      	mov	ip, r1
740036e8:	4613      	mov	r3, r2
740036ea:	4601      	mov	r1, r0
740036ec:	4662      	mov	r2, ip
740036ee:	6820      	ldr	r0, [r4, #0]
740036f0:	bc10      	pop	{r4}
740036f2:	f7fe bb6f 	b.w	74001dd4 <_vfprintf_r>
740036f6:	bf00      	nop

740036f8 <__swsetup_r>:
740036f8:	b570      	push	{r4, r5, r6, lr}
740036fa:	f240 053c 	movw	r5, #60	; 0x3c
740036fe:	f2c7 0500 	movt	r5, #28672	; 0x7000
74003702:	4606      	mov	r6, r0
74003704:	460c      	mov	r4, r1
74003706:	6828      	ldr	r0, [r5, #0]
74003708:	b110      	cbz	r0, 74003710 <__swsetup_r+0x18>
7400370a:	6983      	ldr	r3, [r0, #24]
7400370c:	2b00      	cmp	r3, #0
7400370e:	d036      	beq.n	7400377e <__swsetup_r+0x86>
74003710:	f248 330c 	movw	r3, #33548	; 0x830c
74003714:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003718:	429c      	cmp	r4, r3
7400371a:	d038      	beq.n	7400378e <__swsetup_r+0x96>
7400371c:	f248 332c 	movw	r3, #33580	; 0x832c
74003720:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003724:	429c      	cmp	r4, r3
74003726:	d041      	beq.n	740037ac <__swsetup_r+0xb4>
74003728:	f248 334c 	movw	r3, #33612	; 0x834c
7400372c:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003730:	429c      	cmp	r4, r3
74003732:	bf04      	itt	eq
74003734:	682b      	ldreq	r3, [r5, #0]
74003736:	68dc      	ldreq	r4, [r3, #12]
74003738:	89a2      	ldrh	r2, [r4, #12]
7400373a:	4611      	mov	r1, r2
7400373c:	b293      	uxth	r3, r2
7400373e:	f013 0f08 	tst.w	r3, #8
74003742:	4618      	mov	r0, r3
74003744:	bf18      	it	ne
74003746:	6922      	ldrne	r2, [r4, #16]
74003748:	d033      	beq.n	740037b2 <__swsetup_r+0xba>
7400374a:	b31a      	cbz	r2, 74003794 <__swsetup_r+0x9c>
7400374c:	f013 0101 	ands.w	r1, r3, #1
74003750:	d007      	beq.n	74003762 <__swsetup_r+0x6a>
74003752:	6963      	ldr	r3, [r4, #20]
74003754:	2100      	movs	r1, #0
74003756:	60a1      	str	r1, [r4, #8]
74003758:	425b      	negs	r3, r3
7400375a:	61a3      	str	r3, [r4, #24]
7400375c:	b142      	cbz	r2, 74003770 <__swsetup_r+0x78>
7400375e:	2000      	movs	r0, #0
74003760:	bd70      	pop	{r4, r5, r6, pc}
74003762:	f013 0f02 	tst.w	r3, #2
74003766:	bf08      	it	eq
74003768:	6961      	ldreq	r1, [r4, #20]
7400376a:	60a1      	str	r1, [r4, #8]
7400376c:	2a00      	cmp	r2, #0
7400376e:	d1f6      	bne.n	7400375e <__swsetup_r+0x66>
74003770:	89a3      	ldrh	r3, [r4, #12]
74003772:	f013 0f80 	tst.w	r3, #128	; 0x80
74003776:	d0f2      	beq.n	7400375e <__swsetup_r+0x66>
74003778:	f04f 30ff 	mov.w	r0, #4294967295
7400377c:	bd70      	pop	{r4, r5, r6, pc}
7400377e:	f001 f98b 	bl	74004a98 <__sinit>
74003782:	f248 330c 	movw	r3, #33548	; 0x830c
74003786:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400378a:	429c      	cmp	r4, r3
7400378c:	d1c6      	bne.n	7400371c <__swsetup_r+0x24>
7400378e:	682b      	ldr	r3, [r5, #0]
74003790:	685c      	ldr	r4, [r3, #4]
74003792:	e7d1      	b.n	74003738 <__swsetup_r+0x40>
74003794:	f403 7120 	and.w	r1, r3, #640	; 0x280
74003798:	f5b1 7f00 	cmp.w	r1, #512	; 0x200
7400379c:	d0d6      	beq.n	7400374c <__swsetup_r+0x54>
7400379e:	4630      	mov	r0, r6
740037a0:	4621      	mov	r1, r4
740037a2:	f001 fd01 	bl	740051a8 <__smakebuf_r>
740037a6:	89a3      	ldrh	r3, [r4, #12]
740037a8:	6922      	ldr	r2, [r4, #16]
740037aa:	e7cf      	b.n	7400374c <__swsetup_r+0x54>
740037ac:	682b      	ldr	r3, [r5, #0]
740037ae:	689c      	ldr	r4, [r3, #8]
740037b0:	e7c2      	b.n	74003738 <__swsetup_r+0x40>
740037b2:	f013 0f10 	tst.w	r3, #16
740037b6:	d0df      	beq.n	74003778 <__swsetup_r+0x80>
740037b8:	f013 0f04 	tst.w	r3, #4
740037bc:	bf08      	it	eq
740037be:	6922      	ldreq	r2, [r4, #16]
740037c0:	d017      	beq.n	740037f2 <__swsetup_r+0xfa>
740037c2:	6b61      	ldr	r1, [r4, #52]	; 0x34
740037c4:	b151      	cbz	r1, 740037dc <__swsetup_r+0xe4>
740037c6:	f104 0344 	add.w	r3, r4, #68	; 0x44
740037ca:	4299      	cmp	r1, r3
740037cc:	d003      	beq.n	740037d6 <__swsetup_r+0xde>
740037ce:	4630      	mov	r0, r6
740037d0:	f001 f9e6 	bl	74004ba0 <_free_r>
740037d4:	89a2      	ldrh	r2, [r4, #12]
740037d6:	b290      	uxth	r0, r2
740037d8:	2300      	movs	r3, #0
740037da:	6363      	str	r3, [r4, #52]	; 0x34
740037dc:	6922      	ldr	r2, [r4, #16]
740037de:	f64f 71db 	movw	r1, #65499	; 0xffdb
740037e2:	f2c0 0100 	movt	r1, #0
740037e6:	2300      	movs	r3, #0
740037e8:	ea00 0101 	and.w	r1, r0, r1
740037ec:	6063      	str	r3, [r4, #4]
740037ee:	81a1      	strh	r1, [r4, #12]
740037f0:	6022      	str	r2, [r4, #0]
740037f2:	f041 0308 	orr.w	r3, r1, #8
740037f6:	81a3      	strh	r3, [r4, #12]
740037f8:	b29b      	uxth	r3, r3
740037fa:	e7a6      	b.n	7400374a <__swsetup_r+0x52>
740037fc:	0000      	lsls	r0, r0, #0
	...

74003800 <quorem>:
74003800:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
74003804:	6903      	ldr	r3, [r0, #16]
74003806:	690e      	ldr	r6, [r1, #16]
74003808:	4682      	mov	sl, r0
7400380a:	4689      	mov	r9, r1
7400380c:	429e      	cmp	r6, r3
7400380e:	f300 8083 	bgt.w	74003918 <quorem+0x118>
74003812:	1cf2      	adds	r2, r6, #3
74003814:	f101 0514 	add.w	r5, r1, #20
74003818:	f100 0414 	add.w	r4, r0, #20
7400381c:	3e01      	subs	r6, #1
7400381e:	0092      	lsls	r2, r2, #2
74003820:	188b      	adds	r3, r1, r2
74003822:	1812      	adds	r2, r2, r0
74003824:	f103 0804 	add.w	r8, r3, #4
74003828:	6859      	ldr	r1, [r3, #4]
7400382a:	6850      	ldr	r0, [r2, #4]
7400382c:	3101      	adds	r1, #1
7400382e:	f003 fb7b 	bl	74006f28 <__aeabi_uidiv>
74003832:	4607      	mov	r7, r0
74003834:	2800      	cmp	r0, #0
74003836:	d039      	beq.n	740038ac <quorem+0xac>
74003838:	2300      	movs	r3, #0
7400383a:	469c      	mov	ip, r3
7400383c:	461a      	mov	r2, r3
7400383e:	58e9      	ldr	r1, [r5, r3]
74003840:	58e0      	ldr	r0, [r4, r3]
74003842:	fa1f fe81 	uxth.w	lr, r1
74003846:	ea4f 4b11 	mov.w	fp, r1, lsr #16
7400384a:	b281      	uxth	r1, r0
7400384c:	fb0e ce07 	mla	lr, lr, r7, ip
74003850:	1851      	adds	r1, r2, r1
74003852:	fb0b fc07 	mul.w	ip, fp, r7
74003856:	eb0c 4c1e 	add.w	ip, ip, lr, lsr #16
7400385a:	fa1f fe8e 	uxth.w	lr, lr
7400385e:	ebce 0101 	rsb	r1, lr, r1
74003862:	fa1f f28c 	uxth.w	r2, ip
74003866:	ea4f 4c1c 	mov.w	ip, ip, lsr #16
7400386a:	ebc2 4210 	rsb	r2, r2, r0, lsr #16
7400386e:	fa1f fe81 	uxth.w	lr, r1
74003872:	eb02 4221 	add.w	r2, r2, r1, asr #16
74003876:	ea4e 4102 	orr.w	r1, lr, r2, lsl #16
7400387a:	50e1      	str	r1, [r4, r3]
7400387c:	3304      	adds	r3, #4
7400387e:	1412      	asrs	r2, r2, #16
74003880:	1959      	adds	r1, r3, r5
74003882:	4588      	cmp	r8, r1
74003884:	d2db      	bcs.n	7400383e <quorem+0x3e>
74003886:	1d32      	adds	r2, r6, #4
74003888:	eb0a 0382 	add.w	r3, sl, r2, lsl #2
7400388c:	6859      	ldr	r1, [r3, #4]
7400388e:	b969      	cbnz	r1, 740038ac <quorem+0xac>
74003890:	429c      	cmp	r4, r3
74003892:	d209      	bcs.n	740038a8 <quorem+0xa8>
74003894:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
74003898:	b112      	cbz	r2, 740038a0 <quorem+0xa0>
7400389a:	e005      	b.n	740038a8 <quorem+0xa8>
7400389c:	681a      	ldr	r2, [r3, #0]
7400389e:	b91a      	cbnz	r2, 740038a8 <quorem+0xa8>
740038a0:	3b04      	subs	r3, #4
740038a2:	3e01      	subs	r6, #1
740038a4:	429c      	cmp	r4, r3
740038a6:	d3f9      	bcc.n	7400389c <quorem+0x9c>
740038a8:	f8ca 6010 	str.w	r6, [sl, #16]
740038ac:	4649      	mov	r1, r9
740038ae:	4650      	mov	r0, sl
740038b0:	f002 f9e8 	bl	74005c84 <__mcmp>
740038b4:	2800      	cmp	r0, #0
740038b6:	db2c      	blt.n	74003912 <quorem+0x112>
740038b8:	2300      	movs	r3, #0
740038ba:	3701      	adds	r7, #1
740038bc:	469c      	mov	ip, r3
740038be:	58ea      	ldr	r2, [r5, r3]
740038c0:	58e0      	ldr	r0, [r4, r3]
740038c2:	b291      	uxth	r1, r2
740038c4:	0c12      	lsrs	r2, r2, #16
740038c6:	fa1f f980 	uxth.w	r9, r0
740038ca:	ebc2 4210 	rsb	r2, r2, r0, lsr #16
740038ce:	ebc1 0109 	rsb	r1, r1, r9
740038d2:	4461      	add	r1, ip
740038d4:	eb02 4221 	add.w	r2, r2, r1, asr #16
740038d8:	b289      	uxth	r1, r1
740038da:	ea41 4102 	orr.w	r1, r1, r2, lsl #16
740038de:	50e1      	str	r1, [r4, r3]
740038e0:	3304      	adds	r3, #4
740038e2:	ea4f 4c22 	mov.w	ip, r2, asr #16
740038e6:	195a      	adds	r2, r3, r5
740038e8:	4590      	cmp	r8, r2
740038ea:	d2e8      	bcs.n	740038be <quorem+0xbe>
740038ec:	1d32      	adds	r2, r6, #4
740038ee:	eb0a 0382 	add.w	r3, sl, r2, lsl #2
740038f2:	6859      	ldr	r1, [r3, #4]
740038f4:	b969      	cbnz	r1, 74003912 <quorem+0x112>
740038f6:	429c      	cmp	r4, r3
740038f8:	d209      	bcs.n	7400390e <quorem+0x10e>
740038fa:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
740038fe:	b112      	cbz	r2, 74003906 <quorem+0x106>
74003900:	e005      	b.n	7400390e <quorem+0x10e>
74003902:	681a      	ldr	r2, [r3, #0]
74003904:	b91a      	cbnz	r2, 7400390e <quorem+0x10e>
74003906:	3b04      	subs	r3, #4
74003908:	3e01      	subs	r6, #1
7400390a:	429c      	cmp	r4, r3
7400390c:	d3f9      	bcc.n	74003902 <quorem+0x102>
7400390e:	f8ca 6010 	str.w	r6, [sl, #16]
74003912:	4638      	mov	r0, r7
74003914:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
74003918:	2000      	movs	r0, #0
7400391a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
7400391e:	bf00      	nop

74003920 <_dtoa_r>:
74003920:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
74003924:	6a46      	ldr	r6, [r0, #36]	; 0x24
74003926:	b0a1      	sub	sp, #132	; 0x84
74003928:	4604      	mov	r4, r0
7400392a:	4690      	mov	r8, r2
7400392c:	4699      	mov	r9, r3
7400392e:	9d2d      	ldr	r5, [sp, #180]	; 0xb4
74003930:	2e00      	cmp	r6, #0
74003932:	f000 8423 	beq.w	7400417c <_dtoa_r+0x85c>
74003936:	6832      	ldr	r2, [r6, #0]
74003938:	b182      	cbz	r2, 7400395c <_dtoa_r+0x3c>
7400393a:	6a61      	ldr	r1, [r4, #36]	; 0x24
7400393c:	f04f 0c01 	mov.w	ip, #1
74003940:	6876      	ldr	r6, [r6, #4]
74003942:	4620      	mov	r0, r4
74003944:	680b      	ldr	r3, [r1, #0]
74003946:	6056      	str	r6, [r2, #4]
74003948:	684a      	ldr	r2, [r1, #4]
7400394a:	4619      	mov	r1, r3
7400394c:	fa0c f202 	lsl.w	r2, ip, r2
74003950:	609a      	str	r2, [r3, #8]
74003952:	f002 fad1 	bl	74005ef8 <_Bfree>
74003956:	6a63      	ldr	r3, [r4, #36]	; 0x24
74003958:	2200      	movs	r2, #0
7400395a:	601a      	str	r2, [r3, #0]
7400395c:	f1b9 0600 	subs.w	r6, r9, #0
74003960:	db38      	blt.n	740039d4 <_dtoa_r+0xb4>
74003962:	2300      	movs	r3, #0
74003964:	602b      	str	r3, [r5, #0]
74003966:	f240 0300 	movw	r3, #0
7400396a:	f6c7 73f0 	movt	r3, #32752	; 0x7ff0
7400396e:	461a      	mov	r2, r3
74003970:	ea06 0303 	and.w	r3, r6, r3
74003974:	4293      	cmp	r3, r2
74003976:	d017      	beq.n	740039a8 <_dtoa_r+0x88>
74003978:	2200      	movs	r2, #0
7400397a:	2300      	movs	r3, #0
7400397c:	4640      	mov	r0, r8
7400397e:	4649      	mov	r1, r9
74003980:	e9cd 8906 	strd	r8, r9, [sp, #24]
74003984:	f004 f82e 	bl	740079e4 <__aeabi_dcmpeq>
74003988:	2800      	cmp	r0, #0
7400398a:	d029      	beq.n	740039e0 <_dtoa_r+0xc0>
7400398c:	982c      	ldr	r0, [sp, #176]	; 0xb0
7400398e:	2301      	movs	r3, #1
74003990:	992e      	ldr	r1, [sp, #184]	; 0xb8
74003992:	6003      	str	r3, [r0, #0]
74003994:	2900      	cmp	r1, #0
74003996:	f000 80d0 	beq.w	74003b3a <_dtoa_r+0x21a>
7400399a:	4b79      	ldr	r3, [pc, #484]	; (74003b80 <_dtoa_r+0x260>)
7400399c:	1e58      	subs	r0, r3, #1
7400399e:	9a2e      	ldr	r2, [sp, #184]	; 0xb8
740039a0:	6013      	str	r3, [r2, #0]
740039a2:	b021      	add	sp, #132	; 0x84
740039a4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
740039a8:	982c      	ldr	r0, [sp, #176]	; 0xb0
740039aa:	f242 730f 	movw	r3, #9999	; 0x270f
740039ae:	6003      	str	r3, [r0, #0]
740039b0:	f1b8 0f00 	cmp.w	r8, #0
740039b4:	f000 8095 	beq.w	74003ae2 <_dtoa_r+0x1c2>
740039b8:	f248 3008 	movw	r0, #33544	; 0x8308
740039bc:	f2c7 4000 	movt	r0, #29696	; 0x7400
740039c0:	992e      	ldr	r1, [sp, #184]	; 0xb8
740039c2:	2900      	cmp	r1, #0
740039c4:	d0ed      	beq.n	740039a2 <_dtoa_r+0x82>
740039c6:	78c2      	ldrb	r2, [r0, #3]
740039c8:	1cc3      	adds	r3, r0, #3
740039ca:	2a00      	cmp	r2, #0
740039cc:	d0e7      	beq.n	7400399e <_dtoa_r+0x7e>
740039ce:	f100 0308 	add.w	r3, r0, #8
740039d2:	e7e4      	b.n	7400399e <_dtoa_r+0x7e>
740039d4:	f026 4600 	bic.w	r6, r6, #2147483648	; 0x80000000
740039d8:	2301      	movs	r3, #1
740039da:	46b1      	mov	r9, r6
740039dc:	602b      	str	r3, [r5, #0]
740039de:	e7c2      	b.n	74003966 <_dtoa_r+0x46>
740039e0:	4620      	mov	r0, r4
740039e2:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
740039e6:	a91e      	add	r1, sp, #120	; 0x78
740039e8:	9100      	str	r1, [sp, #0]
740039ea:	a91f      	add	r1, sp, #124	; 0x7c
740039ec:	9101      	str	r1, [sp, #4]
740039ee:	f002 fad5 	bl	74005f9c <__d2b>
740039f2:	f3c6 550a 	ubfx	r5, r6, #20, #11
740039f6:	4683      	mov	fp, r0
740039f8:	2d00      	cmp	r5, #0
740039fa:	d07e      	beq.n	74003afa <_dtoa_r+0x1da>
740039fc:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
74003a00:	f5a5 757e 	sub.w	r5, r5, #1016	; 0x3f8
74003a04:	9f1f      	ldr	r7, [sp, #124]	; 0x7c
74003a06:	3d07      	subs	r5, #7
74003a08:	f021 437f 	bic.w	r3, r1, #4278190080	; 0xff000000
74003a0c:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
74003a10:	f043 517e 	orr.w	r1, r3, #1065353216	; 0x3f800000
74003a14:	2300      	movs	r3, #0
74003a16:	f441 01e0 	orr.w	r1, r1, #7340032	; 0x700000
74003a1a:	9319      	str	r3, [sp, #100]	; 0x64
74003a1c:	f240 0300 	movw	r3, #0
74003a20:	2200      	movs	r2, #0
74003a22:	f6c3 73f8 	movt	r3, #16376	; 0x3ff8
74003a26:	f003 fbc1 	bl	740071ac <__aeabi_dsub>
74003a2a:	a34f      	add	r3, pc, #316	; (adr r3, 74003b68 <_dtoa_r+0x248>)
74003a2c:	e9d3 2300 	ldrd	r2, r3, [r3]
74003a30:	f003 fd70 	bl	74007514 <__aeabi_dmul>
74003a34:	a34e      	add	r3, pc, #312	; (adr r3, 74003b70 <_dtoa_r+0x250>)
74003a36:	e9d3 2300 	ldrd	r2, r3, [r3]
74003a3a:	f003 fbb9 	bl	740071b0 <__adddf3>
74003a3e:	e9cd 0108 	strd	r0, r1, [sp, #32]
74003a42:	4628      	mov	r0, r5
74003a44:	f003 fd00 	bl	74007448 <__aeabi_i2d>
74003a48:	a34b      	add	r3, pc, #300	; (adr r3, 74003b78 <_dtoa_r+0x258>)
74003a4a:	e9d3 2300 	ldrd	r2, r3, [r3]
74003a4e:	f003 fd61 	bl	74007514 <__aeabi_dmul>
74003a52:	4602      	mov	r2, r0
74003a54:	460b      	mov	r3, r1
74003a56:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
74003a5a:	f003 fba9 	bl	740071b0 <__adddf3>
74003a5e:	e9cd 0108 	strd	r0, r1, [sp, #32]
74003a62:	f003 fff1 	bl	74007a48 <__aeabi_d2iz>
74003a66:	2200      	movs	r2, #0
74003a68:	2300      	movs	r3, #0
74003a6a:	4606      	mov	r6, r0
74003a6c:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
74003a70:	f003 ffc2 	bl	740079f8 <__aeabi_dcmplt>
74003a74:	b140      	cbz	r0, 74003a88 <_dtoa_r+0x168>
74003a76:	4630      	mov	r0, r6
74003a78:	f003 fce6 	bl	74007448 <__aeabi_i2d>
74003a7c:	e9dd 2308 	ldrd	r2, r3, [sp, #32]
74003a80:	f003 ffb0 	bl	740079e4 <__aeabi_dcmpeq>
74003a84:	b900      	cbnz	r0, 74003a88 <_dtoa_r+0x168>
74003a86:	3e01      	subs	r6, #1
74003a88:	2e16      	cmp	r6, #22
74003a8a:	d95b      	bls.n	74003b44 <_dtoa_r+0x224>
74003a8c:	2301      	movs	r3, #1
74003a8e:	9318      	str	r3, [sp, #96]	; 0x60
74003a90:	3f01      	subs	r7, #1
74003a92:	ebb7 0a05 	subs.w	sl, r7, r5
74003a96:	bf42      	ittt	mi
74003a98:	f1ca 0a00 	rsbmi	sl, sl, #0
74003a9c:	f8cd a03c 	strmi.w	sl, [sp, #60]	; 0x3c
74003aa0:	f04f 0a00 	movmi.w	sl, #0
74003aa4:	d401      	bmi.n	74003aaa <_dtoa_r+0x18a>
74003aa6:	2200      	movs	r2, #0
74003aa8:	920f      	str	r2, [sp, #60]	; 0x3c
74003aaa:	2e00      	cmp	r6, #0
74003aac:	f2c0 8371 	blt.w	74004192 <_dtoa_r+0x872>
74003ab0:	44b2      	add	sl, r6
74003ab2:	2300      	movs	r3, #0
74003ab4:	9617      	str	r6, [sp, #92]	; 0x5c
74003ab6:	9315      	str	r3, [sp, #84]	; 0x54
74003ab8:	9b2a      	ldr	r3, [sp, #168]	; 0xa8
74003aba:	2b09      	cmp	r3, #9
74003abc:	d862      	bhi.n	74003b84 <_dtoa_r+0x264>
74003abe:	2b05      	cmp	r3, #5
74003ac0:	f340 8677 	ble.w	740047b2 <_dtoa_r+0xe92>
74003ac4:	982a      	ldr	r0, [sp, #168]	; 0xa8
74003ac6:	2700      	movs	r7, #0
74003ac8:	3804      	subs	r0, #4
74003aca:	902a      	str	r0, [sp, #168]	; 0xa8
74003acc:	992a      	ldr	r1, [sp, #168]	; 0xa8
74003ace:	1e8b      	subs	r3, r1, #2
74003ad0:	2b03      	cmp	r3, #3
74003ad2:	f200 83dd 	bhi.w	74004290 <_dtoa_r+0x970>
74003ad6:	e8df f013 	tbh	[pc, r3, lsl #1]
74003ada:	03a5      	.short	0x03a5
74003adc:	03d503d8 	.word	0x03d503d8
74003ae0:	03c4      	.short	0x03c4
74003ae2:	f026 467f 	bic.w	r6, r6, #4278190080	; 0xff000000
74003ae6:	f426 0670 	bic.w	r6, r6, #15728640	; 0xf00000
74003aea:	2e00      	cmp	r6, #0
74003aec:	f47f af64 	bne.w	740039b8 <_dtoa_r+0x98>
74003af0:	f248 20fc 	movw	r0, #33532	; 0x82fc
74003af4:	f2c7 4000 	movt	r0, #29696	; 0x7400
74003af8:	e762      	b.n	740039c0 <_dtoa_r+0xa0>
74003afa:	9f1f      	ldr	r7, [sp, #124]	; 0x7c
74003afc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
74003afe:	18fb      	adds	r3, r7, r3
74003b00:	f503 6386 	add.w	r3, r3, #1072	; 0x430
74003b04:	1c9d      	adds	r5, r3, #2
74003b06:	2d20      	cmp	r5, #32
74003b08:	bfdc      	itt	le
74003b0a:	f1c5 0020 	rsble	r0, r5, #32
74003b0e:	fa08 f000 	lslle.w	r0, r8, r0
74003b12:	dd08      	ble.n	74003b26 <_dtoa_r+0x206>
74003b14:	3b1e      	subs	r3, #30
74003b16:	f1c5 0240 	rsb	r2, r5, #64	; 0x40
74003b1a:	fa16 f202 	lsls.w	r2, r6, r2
74003b1e:	fa28 f303 	lsr.w	r3, r8, r3
74003b22:	ea42 0003 	orr.w	r0, r2, r3
74003b26:	f003 fc7f 	bl	74007428 <__aeabi_ui2d>
74003b2a:	f5a5 6586 	sub.w	r5, r5, #1072	; 0x430
74003b2e:	2201      	movs	r2, #1
74003b30:	3d03      	subs	r5, #3
74003b32:	9219      	str	r2, [sp, #100]	; 0x64
74003b34:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
74003b38:	e770      	b.n	74003a1c <_dtoa_r+0xfc>
74003b3a:	f248 20f8 	movw	r0, #33528	; 0x82f8
74003b3e:	f2c7 4000 	movt	r0, #29696	; 0x7400
74003b42:	e72e      	b.n	740039a2 <_dtoa_r+0x82>
74003b44:	f248 33b0 	movw	r3, #33712	; 0x83b0
74003b48:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
74003b4c:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003b50:	eb03 03c6 	add.w	r3, r3, r6, lsl #3
74003b54:	e9d3 2300 	ldrd	r2, r3, [r3]
74003b58:	f003 ff4e 	bl	740079f8 <__aeabi_dcmplt>
74003b5c:	2800      	cmp	r0, #0
74003b5e:	f040 8320 	bne.w	740041a2 <_dtoa_r+0x882>
74003b62:	9018      	str	r0, [sp, #96]	; 0x60
74003b64:	e794      	b.n	74003a90 <_dtoa_r+0x170>
74003b66:	bf00      	nop
74003b68:	636f4361 	.word	0x636f4361
74003b6c:	3fd287a7 	.word	0x3fd287a7
74003b70:	8b60c8b3 	.word	0x8b60c8b3
74003b74:	3fc68a28 	.word	0x3fc68a28
74003b78:	509f79fb 	.word	0x509f79fb
74003b7c:	3fd34413 	.word	0x3fd34413
74003b80:	740082f9 	.word	0x740082f9
74003b84:	2300      	movs	r3, #0
74003b86:	f04f 30ff 	mov.w	r0, #4294967295
74003b8a:	461f      	mov	r7, r3
74003b8c:	2101      	movs	r1, #1
74003b8e:	932a      	str	r3, [sp, #168]	; 0xa8
74003b90:	9011      	str	r0, [sp, #68]	; 0x44
74003b92:	9116      	str	r1, [sp, #88]	; 0x58
74003b94:	9008      	str	r0, [sp, #32]
74003b96:	932b      	str	r3, [sp, #172]	; 0xac
74003b98:	6a65      	ldr	r5, [r4, #36]	; 0x24
74003b9a:	2300      	movs	r3, #0
74003b9c:	606b      	str	r3, [r5, #4]
74003b9e:	4620      	mov	r0, r4
74003ba0:	6869      	ldr	r1, [r5, #4]
74003ba2:	f002 f9c5 	bl	74005f30 <_Balloc>
74003ba6:	6a63      	ldr	r3, [r4, #36]	; 0x24
74003ba8:	6028      	str	r0, [r5, #0]
74003baa:	681b      	ldr	r3, [r3, #0]
74003bac:	9310      	str	r3, [sp, #64]	; 0x40
74003bae:	2f00      	cmp	r7, #0
74003bb0:	f000 815b 	beq.w	74003e6a <_dtoa_r+0x54a>
74003bb4:	2e00      	cmp	r6, #0
74003bb6:	f340 842a 	ble.w	7400440e <_dtoa_r+0xaee>
74003bba:	f248 33b0 	movw	r3, #33712	; 0x83b0
74003bbe:	f006 020f 	and.w	r2, r6, #15
74003bc2:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003bc6:	1135      	asrs	r5, r6, #4
74003bc8:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
74003bcc:	f015 0f10 	tst.w	r5, #16
74003bd0:	e9d3 0100 	ldrd	r0, r1, [r3]
74003bd4:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74003bd8:	f000 82e7 	beq.w	740041aa <_dtoa_r+0x88a>
74003bdc:	f248 4388 	movw	r3, #33928	; 0x8488
74003be0:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
74003be4:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003be8:	f005 050f 	and.w	r5, r5, #15
74003bec:	f04f 0803 	mov.w	r8, #3
74003bf0:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
74003bf4:	f003 fdb8 	bl	74007768 <__aeabi_ddiv>
74003bf8:	e9cd 0112 	strd	r0, r1, [sp, #72]	; 0x48
74003bfc:	b1bd      	cbz	r5, 74003c2e <_dtoa_r+0x30e>
74003bfe:	f248 4788 	movw	r7, #33928	; 0x8488
74003c02:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
74003c06:	f2c7 4700 	movt	r7, #29696	; 0x7400
74003c0a:	f015 0f01 	tst.w	r5, #1
74003c0e:	4610      	mov	r0, r2
74003c10:	4619      	mov	r1, r3
74003c12:	d007      	beq.n	74003c24 <_dtoa_r+0x304>
74003c14:	e9d7 2300 	ldrd	r2, r3, [r7]
74003c18:	f108 0801 	add.w	r8, r8, #1
74003c1c:	f003 fc7a 	bl	74007514 <__aeabi_dmul>
74003c20:	4602      	mov	r2, r0
74003c22:	460b      	mov	r3, r1
74003c24:	3708      	adds	r7, #8
74003c26:	106d      	asrs	r5, r5, #1
74003c28:	d1ef      	bne.n	74003c0a <_dtoa_r+0x2ea>
74003c2a:	e9cd 230c 	strd	r2, r3, [sp, #48]	; 0x30
74003c2e:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
74003c32:	e9dd 0112 	ldrd	r0, r1, [sp, #72]	; 0x48
74003c36:	f003 fd97 	bl	74007768 <__aeabi_ddiv>
74003c3a:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74003c3e:	9918      	ldr	r1, [sp, #96]	; 0x60
74003c40:	2900      	cmp	r1, #0
74003c42:	f000 80de 	beq.w	74003e02 <_dtoa_r+0x4e2>
74003c46:	f240 0300 	movw	r3, #0
74003c4a:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003c4e:	2200      	movs	r2, #0
74003c50:	f6c3 73f0 	movt	r3, #16368	; 0x3ff0
74003c54:	f04f 0500 	mov.w	r5, #0
74003c58:	f003 fece 	bl	740079f8 <__aeabi_dcmplt>
74003c5c:	b108      	cbz	r0, 74003c62 <_dtoa_r+0x342>
74003c5e:	f04f 0501 	mov.w	r5, #1
74003c62:	9a08      	ldr	r2, [sp, #32]
74003c64:	2a00      	cmp	r2, #0
74003c66:	bfd4      	ite	le
74003c68:	2500      	movle	r5, #0
74003c6a:	f005 0501 	andgt.w	r5, r5, #1
74003c6e:	2d00      	cmp	r5, #0
74003c70:	f000 80c7 	beq.w	74003e02 <_dtoa_r+0x4e2>
74003c74:	9b11      	ldr	r3, [sp, #68]	; 0x44
74003c76:	2b00      	cmp	r3, #0
74003c78:	f340 80f5 	ble.w	74003e66 <_dtoa_r+0x546>
74003c7c:	f240 0300 	movw	r3, #0
74003c80:	2200      	movs	r2, #0
74003c82:	f2c4 0324 	movt	r3, #16420	; 0x4024
74003c86:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003c8a:	f003 fc43 	bl	74007514 <__aeabi_dmul>
74003c8e:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74003c92:	f108 0001 	add.w	r0, r8, #1
74003c96:	1e71      	subs	r1, r6, #1
74003c98:	9112      	str	r1, [sp, #72]	; 0x48
74003c9a:	f003 fbd5 	bl	74007448 <__aeabi_i2d>
74003c9e:	4602      	mov	r2, r0
74003ca0:	460b      	mov	r3, r1
74003ca2:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003ca6:	f003 fc35 	bl	74007514 <__aeabi_dmul>
74003caa:	f240 0300 	movw	r3, #0
74003cae:	2200      	movs	r2, #0
74003cb0:	f2c4 031c 	movt	r3, #16412	; 0x401c
74003cb4:	f003 fa7c 	bl	740071b0 <__adddf3>
74003cb8:	f8dd c044 	ldr.w	ip, [sp, #68]	; 0x44
74003cbc:	4680      	mov	r8, r0
74003cbe:	f1a1 7950 	sub.w	r9, r1, #54525952	; 0x3400000
74003cc2:	9b16      	ldr	r3, [sp, #88]	; 0x58
74003cc4:	2b00      	cmp	r3, #0
74003cc6:	f000 83ad 	beq.w	74004424 <_dtoa_r+0xb04>
74003cca:	f248 33b0 	movw	r3, #33712	; 0x83b0
74003cce:	f240 0100 	movw	r1, #0
74003cd2:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003cd6:	2000      	movs	r0, #0
74003cd8:	eb03 03cc 	add.w	r3, r3, ip, lsl #3
74003cdc:	f6c3 71e0 	movt	r1, #16352	; 0x3fe0
74003ce0:	f8cd c00c 	str.w	ip, [sp, #12]
74003ce4:	e953 2302 	ldrd	r2, r3, [r3, #-8]
74003ce8:	f003 fd3e 	bl	74007768 <__aeabi_ddiv>
74003cec:	4642      	mov	r2, r8
74003cee:	464b      	mov	r3, r9
74003cf0:	9d10      	ldr	r5, [sp, #64]	; 0x40
74003cf2:	f003 fa5b 	bl	740071ac <__aeabi_dsub>
74003cf6:	4680      	mov	r8, r0
74003cf8:	4689      	mov	r9, r1
74003cfa:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003cfe:	f003 fea3 	bl	74007a48 <__aeabi_d2iz>
74003d02:	4607      	mov	r7, r0
74003d04:	f003 fba0 	bl	74007448 <__aeabi_i2d>
74003d08:	4602      	mov	r2, r0
74003d0a:	460b      	mov	r3, r1
74003d0c:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003d10:	f003 fa4c 	bl	740071ac <__aeabi_dsub>
74003d14:	f107 0330 	add.w	r3, r7, #48	; 0x30
74003d18:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74003d1c:	4640      	mov	r0, r8
74003d1e:	f805 3b01 	strb.w	r3, [r5], #1
74003d22:	4649      	mov	r1, r9
74003d24:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
74003d28:	f003 fe84 	bl	74007a34 <__aeabi_dcmpgt>
74003d2c:	2800      	cmp	r0, #0
74003d2e:	f040 8213 	bne.w	74004158 <_dtoa_r+0x838>
74003d32:	f240 0100 	movw	r1, #0
74003d36:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
74003d3a:	2000      	movs	r0, #0
74003d3c:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
74003d40:	f003 fa34 	bl	740071ac <__aeabi_dsub>
74003d44:	4602      	mov	r2, r0
74003d46:	460b      	mov	r3, r1
74003d48:	4640      	mov	r0, r8
74003d4a:	4649      	mov	r1, r9
74003d4c:	f003 fe72 	bl	74007a34 <__aeabi_dcmpgt>
74003d50:	f8dd c00c 	ldr.w	ip, [sp, #12]
74003d54:	2800      	cmp	r0, #0
74003d56:	f040 83e7 	bne.w	74004528 <_dtoa_r+0xc08>
74003d5a:	f1bc 0f01 	cmp.w	ip, #1
74003d5e:	f340 8082 	ble.w	74003e66 <_dtoa_r+0x546>
74003d62:	f8cd b068 	str.w	fp, [sp, #104]	; 0x68
74003d66:	2701      	movs	r7, #1
74003d68:	f8cd a070 	str.w	sl, [sp, #112]	; 0x70
74003d6c:	961d      	str	r6, [sp, #116]	; 0x74
74003d6e:	4666      	mov	r6, ip
74003d70:	e9dd ab0c 	ldrd	sl, fp, [sp, #48]	; 0x30
74003d74:	940c      	str	r4, [sp, #48]	; 0x30
74003d76:	e010      	b.n	74003d9a <_dtoa_r+0x47a>
74003d78:	f240 0100 	movw	r1, #0
74003d7c:	2000      	movs	r0, #0
74003d7e:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
74003d82:	f003 fa13 	bl	740071ac <__aeabi_dsub>
74003d86:	4642      	mov	r2, r8
74003d88:	464b      	mov	r3, r9
74003d8a:	f003 fe35 	bl	740079f8 <__aeabi_dcmplt>
74003d8e:	2800      	cmp	r0, #0
74003d90:	f040 83c7 	bne.w	74004522 <_dtoa_r+0xc02>
74003d94:	42b7      	cmp	r7, r6
74003d96:	f280 848b 	bge.w	740046b0 <_dtoa_r+0xd90>
74003d9a:	f240 0300 	movw	r3, #0
74003d9e:	4640      	mov	r0, r8
74003da0:	4649      	mov	r1, r9
74003da2:	2200      	movs	r2, #0
74003da4:	f2c4 0324 	movt	r3, #16420	; 0x4024
74003da8:	3501      	adds	r5, #1
74003daa:	f003 fbb3 	bl	74007514 <__aeabi_dmul>
74003dae:	f240 0300 	movw	r3, #0
74003db2:	2200      	movs	r2, #0
74003db4:	f2c4 0324 	movt	r3, #16420	; 0x4024
74003db8:	4680      	mov	r8, r0
74003dba:	4689      	mov	r9, r1
74003dbc:	4650      	mov	r0, sl
74003dbe:	4659      	mov	r1, fp
74003dc0:	f003 fba8 	bl	74007514 <__aeabi_dmul>
74003dc4:	468b      	mov	fp, r1
74003dc6:	4682      	mov	sl, r0
74003dc8:	f003 fe3e 	bl	74007a48 <__aeabi_d2iz>
74003dcc:	4604      	mov	r4, r0
74003dce:	f003 fb3b 	bl	74007448 <__aeabi_i2d>
74003dd2:	3430      	adds	r4, #48	; 0x30
74003dd4:	4602      	mov	r2, r0
74003dd6:	460b      	mov	r3, r1
74003dd8:	4650      	mov	r0, sl
74003dda:	4659      	mov	r1, fp
74003ddc:	f003 f9e6 	bl	740071ac <__aeabi_dsub>
74003de0:	9a10      	ldr	r2, [sp, #64]	; 0x40
74003de2:	464b      	mov	r3, r9
74003de4:	55d4      	strb	r4, [r2, r7]
74003de6:	4642      	mov	r2, r8
74003de8:	3701      	adds	r7, #1
74003dea:	4682      	mov	sl, r0
74003dec:	468b      	mov	fp, r1
74003dee:	f003 fe03 	bl	740079f8 <__aeabi_dcmplt>
74003df2:	4652      	mov	r2, sl
74003df4:	465b      	mov	r3, fp
74003df6:	2800      	cmp	r0, #0
74003df8:	d0be      	beq.n	74003d78 <_dtoa_r+0x458>
74003dfa:	f8dd b068 	ldr.w	fp, [sp, #104]	; 0x68
74003dfe:	9c0c      	ldr	r4, [sp, #48]	; 0x30
74003e00:	e1aa      	b.n	74004158 <_dtoa_r+0x838>
74003e02:	4640      	mov	r0, r8
74003e04:	f003 fb20 	bl	74007448 <__aeabi_i2d>
74003e08:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
74003e0c:	f003 fb82 	bl	74007514 <__aeabi_dmul>
74003e10:	f240 0300 	movw	r3, #0
74003e14:	2200      	movs	r2, #0
74003e16:	f2c4 031c 	movt	r3, #16412	; 0x401c
74003e1a:	f003 f9c9 	bl	740071b0 <__adddf3>
74003e1e:	9a08      	ldr	r2, [sp, #32]
74003e20:	f1a1 7550 	sub.w	r5, r1, #54525952	; 0x3400000
74003e24:	4680      	mov	r8, r0
74003e26:	46a9      	mov	r9, r5
74003e28:	2a00      	cmp	r2, #0
74003e2a:	f040 82ec 	bne.w	74004406 <_dtoa_r+0xae6>
74003e2e:	f240 0300 	movw	r3, #0
74003e32:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003e36:	2200      	movs	r2, #0
74003e38:	f2c4 0314 	movt	r3, #16404	; 0x4014
74003e3c:	f003 f9b6 	bl	740071ac <__aeabi_dsub>
74003e40:	4642      	mov	r2, r8
74003e42:	462b      	mov	r3, r5
74003e44:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74003e48:	f003 fdf4 	bl	74007a34 <__aeabi_dcmpgt>
74003e4c:	2800      	cmp	r0, #0
74003e4e:	f040 824a 	bne.w	740042e6 <_dtoa_r+0x9c6>
74003e52:	4642      	mov	r2, r8
74003e54:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74003e58:	f105 4300 	add.w	r3, r5, #2147483648	; 0x80000000
74003e5c:	f003 fdcc 	bl	740079f8 <__aeabi_dcmplt>
74003e60:	2800      	cmp	r0, #0
74003e62:	f040 81d5 	bne.w	74004210 <_dtoa_r+0x8f0>
74003e66:	e9dd 8906 	ldrd	r8, r9, [sp, #24]
74003e6a:	9b1e      	ldr	r3, [sp, #120]	; 0x78
74003e6c:	ea6f 0703 	mvn.w	r7, r3
74003e70:	ea4f 77d7 	mov.w	r7, r7, lsr #31
74003e74:	2e0e      	cmp	r6, #14
74003e76:	bfcc      	ite	gt
74003e78:	2700      	movgt	r7, #0
74003e7a:	f007 0701 	andle.w	r7, r7, #1
74003e7e:	2f00      	cmp	r7, #0
74003e80:	f000 80b7 	beq.w	74003ff2 <_dtoa_r+0x6d2>
74003e84:	982b      	ldr	r0, [sp, #172]	; 0xac
74003e86:	f248 33b0 	movw	r3, #33712	; 0x83b0
74003e8a:	f2c7 4300 	movt	r3, #29696	; 0x7400
74003e8e:	9908      	ldr	r1, [sp, #32]
74003e90:	eb03 03c6 	add.w	r3, r3, r6, lsl #3
74003e94:	0fc2      	lsrs	r2, r0, #31
74003e96:	2900      	cmp	r1, #0
74003e98:	bfcc      	ite	gt
74003e9a:	2200      	movgt	r2, #0
74003e9c:	f002 0201 	andle.w	r2, r2, #1
74003ea0:	e9d3 0100 	ldrd	r0, r1, [r3]
74003ea4:	e9cd 0104 	strd	r0, r1, [sp, #16]
74003ea8:	2a00      	cmp	r2, #0
74003eaa:	f040 81a0 	bne.w	740041ee <_dtoa_r+0x8ce>
74003eae:	4602      	mov	r2, r0
74003eb0:	460b      	mov	r3, r1
74003eb2:	4640      	mov	r0, r8
74003eb4:	4649      	mov	r1, r9
74003eb6:	f003 fc57 	bl	74007768 <__aeabi_ddiv>
74003eba:	9d10      	ldr	r5, [sp, #64]	; 0x40
74003ebc:	f003 fdc4 	bl	74007a48 <__aeabi_d2iz>
74003ec0:	4682      	mov	sl, r0
74003ec2:	f003 fac1 	bl	74007448 <__aeabi_i2d>
74003ec6:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
74003eca:	f003 fb23 	bl	74007514 <__aeabi_dmul>
74003ece:	4602      	mov	r2, r0
74003ed0:	460b      	mov	r3, r1
74003ed2:	4640      	mov	r0, r8
74003ed4:	4649      	mov	r1, r9
74003ed6:	f003 f969 	bl	740071ac <__aeabi_dsub>
74003eda:	f10a 0330 	add.w	r3, sl, #48	; 0x30
74003ede:	f805 3b01 	strb.w	r3, [r5], #1
74003ee2:	9a08      	ldr	r2, [sp, #32]
74003ee4:	2a01      	cmp	r2, #1
74003ee6:	4680      	mov	r8, r0
74003ee8:	4689      	mov	r9, r1
74003eea:	d052      	beq.n	74003f92 <_dtoa_r+0x672>
74003eec:	f240 0300 	movw	r3, #0
74003ef0:	2200      	movs	r2, #0
74003ef2:	f2c4 0324 	movt	r3, #16420	; 0x4024
74003ef6:	f003 fb0d 	bl	74007514 <__aeabi_dmul>
74003efa:	2200      	movs	r2, #0
74003efc:	2300      	movs	r3, #0
74003efe:	e9cd 0106 	strd	r0, r1, [sp, #24]
74003f02:	f003 fd6f 	bl	740079e4 <__aeabi_dcmpeq>
74003f06:	2800      	cmp	r0, #0
74003f08:	f040 81eb 	bne.w	740042e2 <_dtoa_r+0x9c2>
74003f0c:	9810      	ldr	r0, [sp, #64]	; 0x40
74003f0e:	f04f 0801 	mov.w	r8, #1
74003f12:	f8cd b02c 	str.w	fp, [sp, #44]	; 0x2c
74003f16:	46a3      	mov	fp, r4
74003f18:	1c87      	adds	r7, r0, #2
74003f1a:	960f      	str	r6, [sp, #60]	; 0x3c
74003f1c:	f8dd 9020 	ldr.w	r9, [sp, #32]
74003f20:	e9dd 4506 	ldrd	r4, r5, [sp, #24]
74003f24:	e00a      	b.n	74003f3c <_dtoa_r+0x61c>
74003f26:	f003 faf5 	bl	74007514 <__aeabi_dmul>
74003f2a:	2200      	movs	r2, #0
74003f2c:	2300      	movs	r3, #0
74003f2e:	4604      	mov	r4, r0
74003f30:	460d      	mov	r5, r1
74003f32:	f003 fd57 	bl	740079e4 <__aeabi_dcmpeq>
74003f36:	2800      	cmp	r0, #0
74003f38:	f040 81ce 	bne.w	740042d8 <_dtoa_r+0x9b8>
74003f3c:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
74003f40:	4620      	mov	r0, r4
74003f42:	4629      	mov	r1, r5
74003f44:	f108 0801 	add.w	r8, r8, #1
74003f48:	f003 fc0e 	bl	74007768 <__aeabi_ddiv>
74003f4c:	463e      	mov	r6, r7
74003f4e:	f003 fd7b 	bl	74007a48 <__aeabi_d2iz>
74003f52:	4682      	mov	sl, r0
74003f54:	f003 fa78 	bl	74007448 <__aeabi_i2d>
74003f58:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
74003f5c:	f003 fada 	bl	74007514 <__aeabi_dmul>
74003f60:	4602      	mov	r2, r0
74003f62:	460b      	mov	r3, r1
74003f64:	4620      	mov	r0, r4
74003f66:	4629      	mov	r1, r5
74003f68:	f003 f920 	bl	740071ac <__aeabi_dsub>
74003f6c:	2200      	movs	r2, #0
74003f6e:	f10a 0c30 	add.w	ip, sl, #48	; 0x30
74003f72:	f807 cc01 	strb.w	ip, [r7, #-1]
74003f76:	3701      	adds	r7, #1
74003f78:	45c1      	cmp	r9, r8
74003f7a:	f240 0300 	movw	r3, #0
74003f7e:	f2c4 0324 	movt	r3, #16420	; 0x4024
74003f82:	d1d0      	bne.n	74003f26 <_dtoa_r+0x606>
74003f84:	4635      	mov	r5, r6
74003f86:	465c      	mov	r4, fp
74003f88:	9e0f      	ldr	r6, [sp, #60]	; 0x3c
74003f8a:	4680      	mov	r8, r0
74003f8c:	f8dd b02c 	ldr.w	fp, [sp, #44]	; 0x2c
74003f90:	4689      	mov	r9, r1
74003f92:	4642      	mov	r2, r8
74003f94:	464b      	mov	r3, r9
74003f96:	4640      	mov	r0, r8
74003f98:	4649      	mov	r1, r9
74003f9a:	f003 f909 	bl	740071b0 <__adddf3>
74003f9e:	4680      	mov	r8, r0
74003fa0:	4689      	mov	r9, r1
74003fa2:	4642      	mov	r2, r8
74003fa4:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
74003fa8:	464b      	mov	r3, r9
74003faa:	f003 fd25 	bl	740079f8 <__aeabi_dcmplt>
74003fae:	b960      	cbnz	r0, 74003fca <_dtoa_r+0x6aa>
74003fb0:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
74003fb4:	4642      	mov	r2, r8
74003fb6:	464b      	mov	r3, r9
74003fb8:	f003 fd14 	bl	740079e4 <__aeabi_dcmpeq>
74003fbc:	2800      	cmp	r0, #0
74003fbe:	f000 8190 	beq.w	740042e2 <_dtoa_r+0x9c2>
74003fc2:	f01a 0f01 	tst.w	sl, #1
74003fc6:	f000 818c 	beq.w	740042e2 <_dtoa_r+0x9c2>
74003fca:	9910      	ldr	r1, [sp, #64]	; 0x40
74003fcc:	e000      	b.n	74003fd0 <_dtoa_r+0x6b0>
74003fce:	461d      	mov	r5, r3
74003fd0:	f815 2c01 	ldrb.w	r2, [r5, #-1]
74003fd4:	1e6b      	subs	r3, r5, #1
74003fd6:	2a39      	cmp	r2, #57	; 0x39
74003fd8:	f040 8367 	bne.w	740046aa <_dtoa_r+0xd8a>
74003fdc:	428b      	cmp	r3, r1
74003fde:	d1f6      	bne.n	74003fce <_dtoa_r+0x6ae>
74003fe0:	9910      	ldr	r1, [sp, #64]	; 0x40
74003fe2:	2330      	movs	r3, #48	; 0x30
74003fe4:	3601      	adds	r6, #1
74003fe6:	2231      	movs	r2, #49	; 0x31
74003fe8:	700b      	strb	r3, [r1, #0]
74003fea:	9b10      	ldr	r3, [sp, #64]	; 0x40
74003fec:	701a      	strb	r2, [r3, #0]
74003fee:	9612      	str	r6, [sp, #72]	; 0x48
74003ff0:	e0b2      	b.n	74004158 <_dtoa_r+0x838>
74003ff2:	9a16      	ldr	r2, [sp, #88]	; 0x58
74003ff4:	2a00      	cmp	r2, #0
74003ff6:	f040 80df 	bne.w	740041b8 <_dtoa_r+0x898>
74003ffa:	9f15      	ldr	r7, [sp, #84]	; 0x54
74003ffc:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
74003ffe:	920c      	str	r2, [sp, #48]	; 0x30
74004000:	2d00      	cmp	r5, #0
74004002:	bfd4      	ite	le
74004004:	2300      	movle	r3, #0
74004006:	2301      	movgt	r3, #1
74004008:	f1ba 0f00 	cmp.w	sl, #0
7400400c:	bfd4      	ite	le
7400400e:	2300      	movle	r3, #0
74004010:	f003 0301 	andgt.w	r3, r3, #1
74004014:	b14b      	cbz	r3, 7400402a <_dtoa_r+0x70a>
74004016:	45aa      	cmp	sl, r5
74004018:	bfb4      	ite	lt
7400401a:	4653      	movlt	r3, sl
7400401c:	462b      	movge	r3, r5
7400401e:	980f      	ldr	r0, [sp, #60]	; 0x3c
74004020:	ebc3 0a0a 	rsb	sl, r3, sl
74004024:	1aed      	subs	r5, r5, r3
74004026:	1ac0      	subs	r0, r0, r3
74004028:	900f      	str	r0, [sp, #60]	; 0x3c
7400402a:	9915      	ldr	r1, [sp, #84]	; 0x54
7400402c:	2900      	cmp	r1, #0
7400402e:	dd1c      	ble.n	7400406a <_dtoa_r+0x74a>
74004030:	9a16      	ldr	r2, [sp, #88]	; 0x58
74004032:	2a00      	cmp	r2, #0
74004034:	f000 82e9 	beq.w	7400460a <_dtoa_r+0xcea>
74004038:	2f00      	cmp	r7, #0
7400403a:	dd12      	ble.n	74004062 <_dtoa_r+0x742>
7400403c:	990c      	ldr	r1, [sp, #48]	; 0x30
7400403e:	463a      	mov	r2, r7
74004040:	4620      	mov	r0, r4
74004042:	f002 f9d5 	bl	740063f0 <__pow5mult>
74004046:	465a      	mov	r2, fp
74004048:	900c      	str	r0, [sp, #48]	; 0x30
7400404a:	4620      	mov	r0, r4
7400404c:	990c      	ldr	r1, [sp, #48]	; 0x30
7400404e:	f002 f8e7 	bl	74006220 <__multiply>
74004052:	4659      	mov	r1, fp
74004054:	4603      	mov	r3, r0
74004056:	4620      	mov	r0, r4
74004058:	9303      	str	r3, [sp, #12]
7400405a:	f001 ff4d 	bl	74005ef8 <_Bfree>
7400405e:	9b03      	ldr	r3, [sp, #12]
74004060:	469b      	mov	fp, r3
74004062:	9b15      	ldr	r3, [sp, #84]	; 0x54
74004064:	1bda      	subs	r2, r3, r7
74004066:	f040 8311 	bne.w	7400468c <_dtoa_r+0xd6c>
7400406a:	2101      	movs	r1, #1
7400406c:	4620      	mov	r0, r4
7400406e:	f002 f971 	bl	74006354 <__i2b>
74004072:	9006      	str	r0, [sp, #24]
74004074:	9817      	ldr	r0, [sp, #92]	; 0x5c
74004076:	2800      	cmp	r0, #0
74004078:	dd05      	ble.n	74004086 <_dtoa_r+0x766>
7400407a:	9906      	ldr	r1, [sp, #24]
7400407c:	4620      	mov	r0, r4
7400407e:	9a17      	ldr	r2, [sp, #92]	; 0x5c
74004080:	f002 f9b6 	bl	740063f0 <__pow5mult>
74004084:	9006      	str	r0, [sp, #24]
74004086:	992a      	ldr	r1, [sp, #168]	; 0xa8
74004088:	2901      	cmp	r1, #1
7400408a:	f340 810a 	ble.w	740042a2 <_dtoa_r+0x982>
7400408e:	2700      	movs	r7, #0
74004090:	9b17      	ldr	r3, [sp, #92]	; 0x5c
74004092:	2b00      	cmp	r3, #0
74004094:	f040 8261 	bne.w	7400455a <_dtoa_r+0xc3a>
74004098:	2301      	movs	r3, #1
7400409a:	4453      	add	r3, sl
7400409c:	f013 031f 	ands.w	r3, r3, #31
740040a0:	f040 812a 	bne.w	740042f8 <_dtoa_r+0x9d8>
740040a4:	231c      	movs	r3, #28
740040a6:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
740040a8:	449a      	add	sl, r3
740040aa:	18ed      	adds	r5, r5, r3
740040ac:	18d2      	adds	r2, r2, r3
740040ae:	920f      	str	r2, [sp, #60]	; 0x3c
740040b0:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
740040b2:	2b00      	cmp	r3, #0
740040b4:	dd05      	ble.n	740040c2 <_dtoa_r+0x7a2>
740040b6:	4659      	mov	r1, fp
740040b8:	461a      	mov	r2, r3
740040ba:	4620      	mov	r0, r4
740040bc:	f002 f852 	bl	74006164 <__lshift>
740040c0:	4683      	mov	fp, r0
740040c2:	f1ba 0f00 	cmp.w	sl, #0
740040c6:	dd05      	ble.n	740040d4 <_dtoa_r+0x7b4>
740040c8:	9906      	ldr	r1, [sp, #24]
740040ca:	4652      	mov	r2, sl
740040cc:	4620      	mov	r0, r4
740040ce:	f002 f849 	bl	74006164 <__lshift>
740040d2:	9006      	str	r0, [sp, #24]
740040d4:	9818      	ldr	r0, [sp, #96]	; 0x60
740040d6:	2800      	cmp	r0, #0
740040d8:	f040 8229 	bne.w	7400452e <_dtoa_r+0xc0e>
740040dc:	982a      	ldr	r0, [sp, #168]	; 0xa8
740040de:	9908      	ldr	r1, [sp, #32]
740040e0:	2802      	cmp	r0, #2
740040e2:	bfd4      	ite	le
740040e4:	2300      	movle	r3, #0
740040e6:	2301      	movgt	r3, #1
740040e8:	2900      	cmp	r1, #0
740040ea:	bfcc      	ite	gt
740040ec:	2300      	movgt	r3, #0
740040ee:	f003 0301 	andle.w	r3, r3, #1
740040f2:	2b00      	cmp	r3, #0
740040f4:	f000 810c 	beq.w	74004310 <_dtoa_r+0x9f0>
740040f8:	2900      	cmp	r1, #0
740040fa:	f040 808c 	bne.w	74004216 <_dtoa_r+0x8f6>
740040fe:	2205      	movs	r2, #5
74004100:	9906      	ldr	r1, [sp, #24]
74004102:	9b08      	ldr	r3, [sp, #32]
74004104:	4620      	mov	r0, r4
74004106:	f002 f92f 	bl	74006368 <__multadd>
7400410a:	9006      	str	r0, [sp, #24]
7400410c:	4658      	mov	r0, fp
7400410e:	9906      	ldr	r1, [sp, #24]
74004110:	f001 fdb8 	bl	74005c84 <__mcmp>
74004114:	2800      	cmp	r0, #0
74004116:	dd7e      	ble.n	74004216 <_dtoa_r+0x8f6>
74004118:	9d10      	ldr	r5, [sp, #64]	; 0x40
7400411a:	3601      	adds	r6, #1
7400411c:	2700      	movs	r7, #0
7400411e:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
74004122:	2331      	movs	r3, #49	; 0x31
74004124:	f805 3b01 	strb.w	r3, [r5], #1
74004128:	9906      	ldr	r1, [sp, #24]
7400412a:	4620      	mov	r0, r4
7400412c:	f001 fee4 	bl	74005ef8 <_Bfree>
74004130:	f1ba 0f00 	cmp.w	sl, #0
74004134:	f000 80d5 	beq.w	740042e2 <_dtoa_r+0x9c2>
74004138:	1e3b      	subs	r3, r7, #0
7400413a:	bf18      	it	ne
7400413c:	2301      	movne	r3, #1
7400413e:	4557      	cmp	r7, sl
74004140:	bf0c      	ite	eq
74004142:	2300      	moveq	r3, #0
74004144:	f003 0301 	andne.w	r3, r3, #1
74004148:	2b00      	cmp	r3, #0
7400414a:	f040 80d0 	bne.w	740042ee <_dtoa_r+0x9ce>
7400414e:	4651      	mov	r1, sl
74004150:	4620      	mov	r0, r4
74004152:	f001 fed1 	bl	74005ef8 <_Bfree>
74004156:	9612      	str	r6, [sp, #72]	; 0x48
74004158:	4620      	mov	r0, r4
7400415a:	4659      	mov	r1, fp
7400415c:	f001 fecc 	bl	74005ef8 <_Bfree>
74004160:	9a12      	ldr	r2, [sp, #72]	; 0x48
74004162:	1c53      	adds	r3, r2, #1
74004164:	2200      	movs	r2, #0
74004166:	702a      	strb	r2, [r5, #0]
74004168:	982c      	ldr	r0, [sp, #176]	; 0xb0
7400416a:	992e      	ldr	r1, [sp, #184]	; 0xb8
7400416c:	6003      	str	r3, [r0, #0]
7400416e:	2900      	cmp	r1, #0
74004170:	f000 81d4 	beq.w	7400451c <_dtoa_r+0xbfc>
74004174:	9a2e      	ldr	r2, [sp, #184]	; 0xb8
74004176:	9810      	ldr	r0, [sp, #64]	; 0x40
74004178:	6015      	str	r5, [r2, #0]
7400417a:	e412      	b.n	740039a2 <_dtoa_r+0x82>
7400417c:	2010      	movs	r0, #16
7400417e:	f001 f889 	bl	74005294 <malloc>
74004182:	60c6      	str	r6, [r0, #12]
74004184:	6046      	str	r6, [r0, #4]
74004186:	6086      	str	r6, [r0, #8]
74004188:	6006      	str	r6, [r0, #0]
7400418a:	4606      	mov	r6, r0
7400418c:	6260      	str	r0, [r4, #36]	; 0x24
7400418e:	f7ff bbd2 	b.w	74003936 <_dtoa_r+0x16>
74004192:	980f      	ldr	r0, [sp, #60]	; 0x3c
74004194:	4271      	negs	r1, r6
74004196:	2200      	movs	r2, #0
74004198:	9115      	str	r1, [sp, #84]	; 0x54
7400419a:	1b80      	subs	r0, r0, r6
7400419c:	9217      	str	r2, [sp, #92]	; 0x5c
7400419e:	900f      	str	r0, [sp, #60]	; 0x3c
740041a0:	e48a      	b.n	74003ab8 <_dtoa_r+0x198>
740041a2:	2100      	movs	r1, #0
740041a4:	3e01      	subs	r6, #1
740041a6:	9118      	str	r1, [sp, #96]	; 0x60
740041a8:	e472      	b.n	74003a90 <_dtoa_r+0x170>
740041aa:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
740041ae:	f04f 0802 	mov.w	r8, #2
740041b2:	e9cd 2312 	strd	r2, r3, [sp, #72]	; 0x48
740041b6:	e521      	b.n	74003bfc <_dtoa_r+0x2dc>
740041b8:	982a      	ldr	r0, [sp, #168]	; 0xa8
740041ba:	2801      	cmp	r0, #1
740041bc:	f340 826c 	ble.w	74004698 <_dtoa_r+0xd78>
740041c0:	9a08      	ldr	r2, [sp, #32]
740041c2:	9815      	ldr	r0, [sp, #84]	; 0x54
740041c4:	1e53      	subs	r3, r2, #1
740041c6:	4298      	cmp	r0, r3
740041c8:	f2c0 8258 	blt.w	7400467c <_dtoa_r+0xd5c>
740041cc:	1ac7      	subs	r7, r0, r3
740041ce:	9b08      	ldr	r3, [sp, #32]
740041d0:	2b00      	cmp	r3, #0
740041d2:	bfa8      	it	ge
740041d4:	9d0f      	ldrge	r5, [sp, #60]	; 0x3c
740041d6:	f2c0 8273 	blt.w	740046c0 <_dtoa_r+0xda0>
740041da:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
740041dc:	4620      	mov	r0, r4
740041de:	2101      	movs	r1, #1
740041e0:	449a      	add	sl, r3
740041e2:	18d2      	adds	r2, r2, r3
740041e4:	920f      	str	r2, [sp, #60]	; 0x3c
740041e6:	f002 f8b5 	bl	74006354 <__i2b>
740041ea:	900c      	str	r0, [sp, #48]	; 0x30
740041ec:	e708      	b.n	74004000 <_dtoa_r+0x6e0>
740041ee:	9b08      	ldr	r3, [sp, #32]
740041f0:	b973      	cbnz	r3, 74004210 <_dtoa_r+0x8f0>
740041f2:	f240 0300 	movw	r3, #0
740041f6:	2200      	movs	r2, #0
740041f8:	f2c4 0314 	movt	r3, #16404	; 0x4014
740041fc:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
74004200:	f003 f988 	bl	74007514 <__aeabi_dmul>
74004204:	4642      	mov	r2, r8
74004206:	464b      	mov	r3, r9
74004208:	f003 fc0a 	bl	74007a20 <__aeabi_dcmpge>
7400420c:	2800      	cmp	r0, #0
7400420e:	d06a      	beq.n	740042e6 <_dtoa_r+0x9c6>
74004210:	2200      	movs	r2, #0
74004212:	9206      	str	r2, [sp, #24]
74004214:	920c      	str	r2, [sp, #48]	; 0x30
74004216:	9b2b      	ldr	r3, [sp, #172]	; 0xac
74004218:	2700      	movs	r7, #0
7400421a:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
7400421e:	43de      	mvns	r6, r3
74004220:	9d10      	ldr	r5, [sp, #64]	; 0x40
74004222:	e781      	b.n	74004128 <_dtoa_r+0x808>
74004224:	2100      	movs	r1, #0
74004226:	9116      	str	r1, [sp, #88]	; 0x58
74004228:	982b      	ldr	r0, [sp, #172]	; 0xac
7400422a:	2800      	cmp	r0, #0
7400422c:	f340 819f 	ble.w	7400456e <_dtoa_r+0xc4e>
74004230:	982b      	ldr	r0, [sp, #172]	; 0xac
74004232:	4601      	mov	r1, r0
74004234:	9011      	str	r0, [sp, #68]	; 0x44
74004236:	9008      	str	r0, [sp, #32]
74004238:	6a65      	ldr	r5, [r4, #36]	; 0x24
7400423a:	2200      	movs	r2, #0
7400423c:	2917      	cmp	r1, #23
7400423e:	606a      	str	r2, [r5, #4]
74004240:	f240 82ab 	bls.w	7400479a <_dtoa_r+0xe7a>
74004244:	2304      	movs	r3, #4
74004246:	005b      	lsls	r3, r3, #1
74004248:	3201      	adds	r2, #1
7400424a:	f103 0014 	add.w	r0, r3, #20
7400424e:	4288      	cmp	r0, r1
74004250:	d9f9      	bls.n	74004246 <_dtoa_r+0x926>
74004252:	9b08      	ldr	r3, [sp, #32]
74004254:	606a      	str	r2, [r5, #4]
74004256:	2b0e      	cmp	r3, #14
74004258:	bf8c      	ite	hi
7400425a:	2700      	movhi	r7, #0
7400425c:	f007 0701 	andls.w	r7, r7, #1
74004260:	e49d      	b.n	74003b9e <_dtoa_r+0x27e>
74004262:	2201      	movs	r2, #1
74004264:	9216      	str	r2, [sp, #88]	; 0x58
74004266:	9b2b      	ldr	r3, [sp, #172]	; 0xac
74004268:	18f3      	adds	r3, r6, r3
7400426a:	9311      	str	r3, [sp, #68]	; 0x44
7400426c:	1c59      	adds	r1, r3, #1
7400426e:	2900      	cmp	r1, #0
74004270:	bfc8      	it	gt
74004272:	9108      	strgt	r1, [sp, #32]
74004274:	dce0      	bgt.n	74004238 <_dtoa_r+0x918>
74004276:	290e      	cmp	r1, #14
74004278:	bf8c      	ite	hi
7400427a:	2700      	movhi	r7, #0
7400427c:	f007 0701 	andls.w	r7, r7, #1
74004280:	9108      	str	r1, [sp, #32]
74004282:	e489      	b.n	74003b98 <_dtoa_r+0x278>
74004284:	2301      	movs	r3, #1
74004286:	9316      	str	r3, [sp, #88]	; 0x58
74004288:	e7ce      	b.n	74004228 <_dtoa_r+0x908>
7400428a:	2200      	movs	r2, #0
7400428c:	9216      	str	r2, [sp, #88]	; 0x58
7400428e:	e7ea      	b.n	74004266 <_dtoa_r+0x946>
74004290:	f04f 33ff 	mov.w	r3, #4294967295
74004294:	2700      	movs	r7, #0
74004296:	2001      	movs	r0, #1
74004298:	9311      	str	r3, [sp, #68]	; 0x44
7400429a:	9016      	str	r0, [sp, #88]	; 0x58
7400429c:	9308      	str	r3, [sp, #32]
7400429e:	972b      	str	r7, [sp, #172]	; 0xac
740042a0:	e47a      	b.n	74003b98 <_dtoa_r+0x278>
740042a2:	f1b8 0f00 	cmp.w	r8, #0
740042a6:	f47f aef2 	bne.w	7400408e <_dtoa_r+0x76e>
740042aa:	f029 437f 	bic.w	r3, r9, #4278190080	; 0xff000000
740042ae:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
740042b2:	2b00      	cmp	r3, #0
740042b4:	f47f aeeb 	bne.w	7400408e <_dtoa_r+0x76e>
740042b8:	f240 0300 	movw	r3, #0
740042bc:	f6c7 73f0 	movt	r3, #32752	; 0x7ff0
740042c0:	ea09 0303 	and.w	r3, r9, r3
740042c4:	2b00      	cmp	r3, #0
740042c6:	f43f aee2 	beq.w	7400408e <_dtoa_r+0x76e>
740042ca:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
740042cc:	f10a 0a01 	add.w	sl, sl, #1
740042d0:	2701      	movs	r7, #1
740042d2:	3201      	adds	r2, #1
740042d4:	920f      	str	r2, [sp, #60]	; 0x3c
740042d6:	e6db      	b.n	74004090 <_dtoa_r+0x770>
740042d8:	4635      	mov	r5, r6
740042da:	465c      	mov	r4, fp
740042dc:	9e0f      	ldr	r6, [sp, #60]	; 0x3c
740042de:	f8dd b02c 	ldr.w	fp, [sp, #44]	; 0x2c
740042e2:	9612      	str	r6, [sp, #72]	; 0x48
740042e4:	e738      	b.n	74004158 <_dtoa_r+0x838>
740042e6:	2000      	movs	r0, #0
740042e8:	9006      	str	r0, [sp, #24]
740042ea:	900c      	str	r0, [sp, #48]	; 0x30
740042ec:	e714      	b.n	74004118 <_dtoa_r+0x7f8>
740042ee:	4639      	mov	r1, r7
740042f0:	4620      	mov	r0, r4
740042f2:	f001 fe01 	bl	74005ef8 <_Bfree>
740042f6:	e72a      	b.n	7400414e <_dtoa_r+0x82e>
740042f8:	f1c3 0320 	rsb	r3, r3, #32
740042fc:	2b04      	cmp	r3, #4
740042fe:	f340 8254 	ble.w	740047aa <_dtoa_r+0xe8a>
74004302:	990f      	ldr	r1, [sp, #60]	; 0x3c
74004304:	3b04      	subs	r3, #4
74004306:	449a      	add	sl, r3
74004308:	18ed      	adds	r5, r5, r3
7400430a:	18c9      	adds	r1, r1, r3
7400430c:	910f      	str	r1, [sp, #60]	; 0x3c
7400430e:	e6cf      	b.n	740040b0 <_dtoa_r+0x790>
74004310:	9916      	ldr	r1, [sp, #88]	; 0x58
74004312:	2900      	cmp	r1, #0
74004314:	f000 8131 	beq.w	7400457a <_dtoa_r+0xc5a>
74004318:	2d00      	cmp	r5, #0
7400431a:	dd05      	ble.n	74004328 <_dtoa_r+0xa08>
7400431c:	990c      	ldr	r1, [sp, #48]	; 0x30
7400431e:	462a      	mov	r2, r5
74004320:	4620      	mov	r0, r4
74004322:	f001 ff1f 	bl	74006164 <__lshift>
74004326:	900c      	str	r0, [sp, #48]	; 0x30
74004328:	2f00      	cmp	r7, #0
7400432a:	f040 81ea 	bne.w	74004702 <_dtoa_r+0xde2>
7400432e:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
74004332:	9d10      	ldr	r5, [sp, #64]	; 0x40
74004334:	2301      	movs	r3, #1
74004336:	f008 0001 	and.w	r0, r8, #1
7400433a:	9f0c      	ldr	r7, [sp, #48]	; 0x30
7400433c:	9011      	str	r0, [sp, #68]	; 0x44
7400433e:	950f      	str	r5, [sp, #60]	; 0x3c
74004340:	461d      	mov	r5, r3
74004342:	960c      	str	r6, [sp, #48]	; 0x30
74004344:	9906      	ldr	r1, [sp, #24]
74004346:	4658      	mov	r0, fp
74004348:	f7ff fa5a 	bl	74003800 <quorem>
7400434c:	4639      	mov	r1, r7
7400434e:	3030      	adds	r0, #48	; 0x30
74004350:	900b      	str	r0, [sp, #44]	; 0x2c
74004352:	4658      	mov	r0, fp
74004354:	f001 fc96 	bl	74005c84 <__mcmp>
74004358:	9906      	ldr	r1, [sp, #24]
7400435a:	4652      	mov	r2, sl
7400435c:	4606      	mov	r6, r0
7400435e:	4620      	mov	r0, r4
74004360:	f001 fe84 	bl	7400606c <__mdiff>
74004364:	68c3      	ldr	r3, [r0, #12]
74004366:	4680      	mov	r8, r0
74004368:	2b00      	cmp	r3, #0
7400436a:	d03d      	beq.n	740043e8 <_dtoa_r+0xac8>
7400436c:	f04f 0901 	mov.w	r9, #1
74004370:	4641      	mov	r1, r8
74004372:	4620      	mov	r0, r4
74004374:	f001 fdc0 	bl	74005ef8 <_Bfree>
74004378:	992a      	ldr	r1, [sp, #168]	; 0xa8
7400437a:	ea59 0101 	orrs.w	r1, r9, r1
7400437e:	d103      	bne.n	74004388 <_dtoa_r+0xa68>
74004380:	9a11      	ldr	r2, [sp, #68]	; 0x44
74004382:	2a00      	cmp	r2, #0
74004384:	f000 81eb 	beq.w	7400475e <_dtoa_r+0xe3e>
74004388:	2e00      	cmp	r6, #0
7400438a:	f2c0 819e 	blt.w	740046ca <_dtoa_r+0xdaa>
7400438e:	9a2a      	ldr	r2, [sp, #168]	; 0xa8
74004390:	4332      	orrs	r2, r6
74004392:	d103      	bne.n	7400439c <_dtoa_r+0xa7c>
74004394:	9b11      	ldr	r3, [sp, #68]	; 0x44
74004396:	2b00      	cmp	r3, #0
74004398:	f000 8197 	beq.w	740046ca <_dtoa_r+0xdaa>
7400439c:	f1b9 0f00 	cmp.w	r9, #0
740043a0:	f300 81ce 	bgt.w	74004740 <_dtoa_r+0xe20>
740043a4:	990f      	ldr	r1, [sp, #60]	; 0x3c
740043a6:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
740043a8:	f801 2b01 	strb.w	r2, [r1], #1
740043ac:	9b08      	ldr	r3, [sp, #32]
740043ae:	910f      	str	r1, [sp, #60]	; 0x3c
740043b0:	429d      	cmp	r5, r3
740043b2:	f000 81c2 	beq.w	7400473a <_dtoa_r+0xe1a>
740043b6:	4659      	mov	r1, fp
740043b8:	220a      	movs	r2, #10
740043ba:	2300      	movs	r3, #0
740043bc:	4620      	mov	r0, r4
740043be:	f001 ffd3 	bl	74006368 <__multadd>
740043c2:	4557      	cmp	r7, sl
740043c4:	4639      	mov	r1, r7
740043c6:	4683      	mov	fp, r0
740043c8:	d014      	beq.n	740043f4 <_dtoa_r+0xad4>
740043ca:	220a      	movs	r2, #10
740043cc:	2300      	movs	r3, #0
740043ce:	4620      	mov	r0, r4
740043d0:	3501      	adds	r5, #1
740043d2:	f001 ffc9 	bl	74006368 <__multadd>
740043d6:	4651      	mov	r1, sl
740043d8:	220a      	movs	r2, #10
740043da:	2300      	movs	r3, #0
740043dc:	4607      	mov	r7, r0
740043de:	4620      	mov	r0, r4
740043e0:	f001 ffc2 	bl	74006368 <__multadd>
740043e4:	4682      	mov	sl, r0
740043e6:	e7ad      	b.n	74004344 <_dtoa_r+0xa24>
740043e8:	4658      	mov	r0, fp
740043ea:	4641      	mov	r1, r8
740043ec:	f001 fc4a 	bl	74005c84 <__mcmp>
740043f0:	4681      	mov	r9, r0
740043f2:	e7bd      	b.n	74004370 <_dtoa_r+0xa50>
740043f4:	4620      	mov	r0, r4
740043f6:	220a      	movs	r2, #10
740043f8:	2300      	movs	r3, #0
740043fa:	3501      	adds	r5, #1
740043fc:	f001 ffb4 	bl	74006368 <__multadd>
74004400:	4607      	mov	r7, r0
74004402:	4682      	mov	sl, r0
74004404:	e79e      	b.n	74004344 <_dtoa_r+0xa24>
74004406:	9612      	str	r6, [sp, #72]	; 0x48
74004408:	f8dd c020 	ldr.w	ip, [sp, #32]
7400440c:	e459      	b.n	74003cc2 <_dtoa_r+0x3a2>
7400440e:	4275      	negs	r5, r6
74004410:	2d00      	cmp	r5, #0
74004412:	f040 8101 	bne.w	74004618 <_dtoa_r+0xcf8>
74004416:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
7400441a:	f04f 0802 	mov.w	r8, #2
7400441e:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74004422:	e40c      	b.n	74003c3e <_dtoa_r+0x31e>
74004424:	f248 31b0 	movw	r1, #33712	; 0x83b0
74004428:	4642      	mov	r2, r8
7400442a:	f2c7 4100 	movt	r1, #29696	; 0x7400
7400442e:	464b      	mov	r3, r9
74004430:	eb01 01cc 	add.w	r1, r1, ip, lsl #3
74004434:	f8cd c00c 	str.w	ip, [sp, #12]
74004438:	9d10      	ldr	r5, [sp, #64]	; 0x40
7400443a:	e951 0102 	ldrd	r0, r1, [r1, #-8]
7400443e:	f003 f869 	bl	74007514 <__aeabi_dmul>
74004442:	e9cd 011a 	strd	r0, r1, [sp, #104]	; 0x68
74004446:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
7400444a:	f003 fafd 	bl	74007a48 <__aeabi_d2iz>
7400444e:	4607      	mov	r7, r0
74004450:	f002 fffa 	bl	74007448 <__aeabi_i2d>
74004454:	460b      	mov	r3, r1
74004456:	4602      	mov	r2, r0
74004458:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
7400445c:	f002 fea6 	bl	740071ac <__aeabi_dsub>
74004460:	f107 0330 	add.w	r3, r7, #48	; 0x30
74004464:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74004468:	f805 3b01 	strb.w	r3, [r5], #1
7400446c:	f8dd c00c 	ldr.w	ip, [sp, #12]
74004470:	f1bc 0f01 	cmp.w	ip, #1
74004474:	d029      	beq.n	740044ca <_dtoa_r+0xbaa>
74004476:	46d1      	mov	r9, sl
74004478:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
7400447c:	46b2      	mov	sl, r6
7400447e:	9e10      	ldr	r6, [sp, #64]	; 0x40
74004480:	951c      	str	r5, [sp, #112]	; 0x70
74004482:	2701      	movs	r7, #1
74004484:	4665      	mov	r5, ip
74004486:	46a0      	mov	r8, r4
74004488:	f240 0300 	movw	r3, #0
7400448c:	2200      	movs	r2, #0
7400448e:	f2c4 0324 	movt	r3, #16420	; 0x4024
74004492:	f003 f83f 	bl	74007514 <__aeabi_dmul>
74004496:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
7400449a:	f003 fad5 	bl	74007a48 <__aeabi_d2iz>
7400449e:	4604      	mov	r4, r0
740044a0:	f002 ffd2 	bl	74007448 <__aeabi_i2d>
740044a4:	3430      	adds	r4, #48	; 0x30
740044a6:	4602      	mov	r2, r0
740044a8:	460b      	mov	r3, r1
740044aa:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
740044ae:	f002 fe7d 	bl	740071ac <__aeabi_dsub>
740044b2:	55f4      	strb	r4, [r6, r7]
740044b4:	3701      	adds	r7, #1
740044b6:	42af      	cmp	r7, r5
740044b8:	d1e6      	bne.n	74004488 <_dtoa_r+0xb68>
740044ba:	9d1c      	ldr	r5, [sp, #112]	; 0x70
740044bc:	3f01      	subs	r7, #1
740044be:	4656      	mov	r6, sl
740044c0:	4644      	mov	r4, r8
740044c2:	46ca      	mov	sl, r9
740044c4:	19ed      	adds	r5, r5, r7
740044c6:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
740044ca:	f240 0300 	movw	r3, #0
740044ce:	2200      	movs	r2, #0
740044d0:	f6c3 73e0 	movt	r3, #16352	; 0x3fe0
740044d4:	e9dd 011a 	ldrd	r0, r1, [sp, #104]	; 0x68
740044d8:	f002 fe6a 	bl	740071b0 <__adddf3>
740044dc:	4602      	mov	r2, r0
740044de:	460b      	mov	r3, r1
740044e0:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
740044e4:	f003 faa6 	bl	74007a34 <__aeabi_dcmpgt>
740044e8:	b9f0      	cbnz	r0, 74004528 <_dtoa_r+0xc08>
740044ea:	f240 0100 	movw	r1, #0
740044ee:	e9dd 231a 	ldrd	r2, r3, [sp, #104]	; 0x68
740044f2:	2000      	movs	r0, #0
740044f4:	f6c3 71e0 	movt	r1, #16352	; 0x3fe0
740044f8:	f002 fe58 	bl	740071ac <__aeabi_dsub>
740044fc:	4602      	mov	r2, r0
740044fe:	460b      	mov	r3, r1
74004500:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
74004504:	f003 fa78 	bl	740079f8 <__aeabi_dcmplt>
74004508:	2800      	cmp	r0, #0
7400450a:	f43f acac 	beq.w	74003e66 <_dtoa_r+0x546>
7400450e:	462b      	mov	r3, r5
74004510:	461d      	mov	r5, r3
74004512:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
74004516:	2a30      	cmp	r2, #48	; 0x30
74004518:	d0fa      	beq.n	74004510 <_dtoa_r+0xbf0>
7400451a:	e61d      	b.n	74004158 <_dtoa_r+0x838>
7400451c:	9810      	ldr	r0, [sp, #64]	; 0x40
7400451e:	f7ff ba40 	b.w	740039a2 <_dtoa_r+0x82>
74004522:	f8dd b068 	ldr.w	fp, [sp, #104]	; 0x68
74004526:	9c0c      	ldr	r4, [sp, #48]	; 0x30
74004528:	9e12      	ldr	r6, [sp, #72]	; 0x48
7400452a:	9910      	ldr	r1, [sp, #64]	; 0x40
7400452c:	e550      	b.n	74003fd0 <_dtoa_r+0x6b0>
7400452e:	4658      	mov	r0, fp
74004530:	9906      	ldr	r1, [sp, #24]
74004532:	f001 fba7 	bl	74005c84 <__mcmp>
74004536:	2800      	cmp	r0, #0
74004538:	f6bf add0 	bge.w	740040dc <_dtoa_r+0x7bc>
7400453c:	4659      	mov	r1, fp
7400453e:	4620      	mov	r0, r4
74004540:	220a      	movs	r2, #10
74004542:	2300      	movs	r3, #0
74004544:	f001 ff10 	bl	74006368 <__multadd>
74004548:	9916      	ldr	r1, [sp, #88]	; 0x58
7400454a:	3e01      	subs	r6, #1
7400454c:	4683      	mov	fp, r0
7400454e:	2900      	cmp	r1, #0
74004550:	f040 8119 	bne.w	74004786 <_dtoa_r+0xe66>
74004554:	9a11      	ldr	r2, [sp, #68]	; 0x44
74004556:	9208      	str	r2, [sp, #32]
74004558:	e5c0      	b.n	740040dc <_dtoa_r+0x7bc>
7400455a:	9806      	ldr	r0, [sp, #24]
7400455c:	6903      	ldr	r3, [r0, #16]
7400455e:	eb00 0383 	add.w	r3, r0, r3, lsl #2
74004562:	6918      	ldr	r0, [r3, #16]
74004564:	f001 fb3c 	bl	74005be0 <__hi0bits>
74004568:	f1c0 0320 	rsb	r3, r0, #32
7400456c:	e595      	b.n	7400409a <_dtoa_r+0x77a>
7400456e:	2101      	movs	r1, #1
74004570:	9111      	str	r1, [sp, #68]	; 0x44
74004572:	9108      	str	r1, [sp, #32]
74004574:	912b      	str	r1, [sp, #172]	; 0xac
74004576:	f7ff bb0f 	b.w	74003b98 <_dtoa_r+0x278>
7400457a:	9d10      	ldr	r5, [sp, #64]	; 0x40
7400457c:	46b1      	mov	r9, r6
7400457e:	9f16      	ldr	r7, [sp, #88]	; 0x58
74004580:	46aa      	mov	sl, r5
74004582:	f8dd 8018 	ldr.w	r8, [sp, #24]
74004586:	9e08      	ldr	r6, [sp, #32]
74004588:	e002      	b.n	74004590 <_dtoa_r+0xc70>
7400458a:	f001 feed 	bl	74006368 <__multadd>
7400458e:	4683      	mov	fp, r0
74004590:	4641      	mov	r1, r8
74004592:	4658      	mov	r0, fp
74004594:	f7ff f934 	bl	74003800 <quorem>
74004598:	3501      	adds	r5, #1
7400459a:	220a      	movs	r2, #10
7400459c:	2300      	movs	r3, #0
7400459e:	4659      	mov	r1, fp
740045a0:	f100 0c30 	add.w	ip, r0, #48	; 0x30
740045a4:	f80a c007 	strb.w	ip, [sl, r7]
740045a8:	3701      	adds	r7, #1
740045aa:	4620      	mov	r0, r4
740045ac:	42be      	cmp	r6, r7
740045ae:	dcec      	bgt.n	7400458a <_dtoa_r+0xc6a>
740045b0:	f8dd a030 	ldr.w	sl, [sp, #48]	; 0x30
740045b4:	464e      	mov	r6, r9
740045b6:	2700      	movs	r7, #0
740045b8:	f8cd c02c 	str.w	ip, [sp, #44]	; 0x2c
740045bc:	4659      	mov	r1, fp
740045be:	2201      	movs	r2, #1
740045c0:	4620      	mov	r0, r4
740045c2:	f001 fdcf 	bl	74006164 <__lshift>
740045c6:	9906      	ldr	r1, [sp, #24]
740045c8:	4683      	mov	fp, r0
740045ca:	f001 fb5b 	bl	74005c84 <__mcmp>
740045ce:	2800      	cmp	r0, #0
740045d0:	dd0f      	ble.n	740045f2 <_dtoa_r+0xcd2>
740045d2:	9910      	ldr	r1, [sp, #64]	; 0x40
740045d4:	e000      	b.n	740045d8 <_dtoa_r+0xcb8>
740045d6:	461d      	mov	r5, r3
740045d8:	f815 2c01 	ldrb.w	r2, [r5, #-1]
740045dc:	1e6b      	subs	r3, r5, #1
740045de:	2a39      	cmp	r2, #57	; 0x39
740045e0:	f040 808c 	bne.w	740046fc <_dtoa_r+0xddc>
740045e4:	428b      	cmp	r3, r1
740045e6:	d1f6      	bne.n	740045d6 <_dtoa_r+0xcb6>
740045e8:	9910      	ldr	r1, [sp, #64]	; 0x40
740045ea:	2331      	movs	r3, #49	; 0x31
740045ec:	3601      	adds	r6, #1
740045ee:	700b      	strb	r3, [r1, #0]
740045f0:	e59a      	b.n	74004128 <_dtoa_r+0x808>
740045f2:	d103      	bne.n	740045fc <_dtoa_r+0xcdc>
740045f4:	980b      	ldr	r0, [sp, #44]	; 0x2c
740045f6:	f010 0f01 	tst.w	r0, #1
740045fa:	d1ea      	bne.n	740045d2 <_dtoa_r+0xcb2>
740045fc:	462b      	mov	r3, r5
740045fe:	461d      	mov	r5, r3
74004600:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
74004604:	2a30      	cmp	r2, #48	; 0x30
74004606:	d0fa      	beq.n	740045fe <_dtoa_r+0xcde>
74004608:	e58e      	b.n	74004128 <_dtoa_r+0x808>
7400460a:	4659      	mov	r1, fp
7400460c:	9a15      	ldr	r2, [sp, #84]	; 0x54
7400460e:	4620      	mov	r0, r4
74004610:	f001 feee 	bl	740063f0 <__pow5mult>
74004614:	4683      	mov	fp, r0
74004616:	e528      	b.n	7400406a <_dtoa_r+0x74a>
74004618:	f005 030f 	and.w	r3, r5, #15
7400461c:	f248 32b0 	movw	r2, #33712	; 0x83b0
74004620:	f2c7 4200 	movt	r2, #29696	; 0x7400
74004624:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
74004628:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
7400462c:	e9d3 2300 	ldrd	r2, r3, [r3]
74004630:	f002 ff70 	bl	74007514 <__aeabi_dmul>
74004634:	112d      	asrs	r5, r5, #4
74004636:	bf08      	it	eq
74004638:	f04f 0802 	moveq.w	r8, #2
7400463c:	e9cd 010c 	strd	r0, r1, [sp, #48]	; 0x30
74004640:	f43f aafd 	beq.w	74003c3e <_dtoa_r+0x31e>
74004644:	f248 4788 	movw	r7, #33928	; 0x8488
74004648:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
7400464c:	f04f 0802 	mov.w	r8, #2
74004650:	f2c7 4700 	movt	r7, #29696	; 0x7400
74004654:	f015 0f01 	tst.w	r5, #1
74004658:	4610      	mov	r0, r2
7400465a:	4619      	mov	r1, r3
7400465c:	d007      	beq.n	7400466e <_dtoa_r+0xd4e>
7400465e:	e9d7 2300 	ldrd	r2, r3, [r7]
74004662:	f108 0801 	add.w	r8, r8, #1
74004666:	f002 ff55 	bl	74007514 <__aeabi_dmul>
7400466a:	4602      	mov	r2, r0
7400466c:	460b      	mov	r3, r1
7400466e:	3708      	adds	r7, #8
74004670:	106d      	asrs	r5, r5, #1
74004672:	d1ef      	bne.n	74004654 <_dtoa_r+0xd34>
74004674:	e9cd 230c 	strd	r2, r3, [sp, #48]	; 0x30
74004678:	f7ff bae1 	b.w	74003c3e <_dtoa_r+0x31e>
7400467c:	9915      	ldr	r1, [sp, #84]	; 0x54
7400467e:	9a17      	ldr	r2, [sp, #92]	; 0x5c
74004680:	1a5b      	subs	r3, r3, r1
74004682:	18c9      	adds	r1, r1, r3
74004684:	18d2      	adds	r2, r2, r3
74004686:	9115      	str	r1, [sp, #84]	; 0x54
74004688:	9217      	str	r2, [sp, #92]	; 0x5c
7400468a:	e5a0      	b.n	740041ce <_dtoa_r+0x8ae>
7400468c:	4659      	mov	r1, fp
7400468e:	4620      	mov	r0, r4
74004690:	f001 feae 	bl	740063f0 <__pow5mult>
74004694:	4683      	mov	fp, r0
74004696:	e4e8      	b.n	7400406a <_dtoa_r+0x74a>
74004698:	9919      	ldr	r1, [sp, #100]	; 0x64
7400469a:	2900      	cmp	r1, #0
7400469c:	d047      	beq.n	7400472e <_dtoa_r+0xe0e>
7400469e:	f503 6386 	add.w	r3, r3, #1072	; 0x430
740046a2:	9f15      	ldr	r7, [sp, #84]	; 0x54
740046a4:	3303      	adds	r3, #3
740046a6:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
740046a8:	e597      	b.n	740041da <_dtoa_r+0x8ba>
740046aa:	3201      	adds	r2, #1
740046ac:	b2d2      	uxtb	r2, r2
740046ae:	e49d      	b.n	74003fec <_dtoa_r+0x6cc>
740046b0:	f8dd b068 	ldr.w	fp, [sp, #104]	; 0x68
740046b4:	f8dd a070 	ldr.w	sl, [sp, #112]	; 0x70
740046b8:	9e1d      	ldr	r6, [sp, #116]	; 0x74
740046ba:	9c0c      	ldr	r4, [sp, #48]	; 0x30
740046bc:	f7ff bbd3 	b.w	74003e66 <_dtoa_r+0x546>
740046c0:	990f      	ldr	r1, [sp, #60]	; 0x3c
740046c2:	2300      	movs	r3, #0
740046c4:	9808      	ldr	r0, [sp, #32]
740046c6:	1a0d      	subs	r5, r1, r0
740046c8:	e587      	b.n	740041da <_dtoa_r+0x8ba>
740046ca:	f1b9 0f00 	cmp.w	r9, #0
740046ce:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
740046d0:	9e0c      	ldr	r6, [sp, #48]	; 0x30
740046d2:	dd0f      	ble.n	740046f4 <_dtoa_r+0xdd4>
740046d4:	4659      	mov	r1, fp
740046d6:	2201      	movs	r2, #1
740046d8:	4620      	mov	r0, r4
740046da:	f001 fd43 	bl	74006164 <__lshift>
740046de:	9906      	ldr	r1, [sp, #24]
740046e0:	4683      	mov	fp, r0
740046e2:	f001 facf 	bl	74005c84 <__mcmp>
740046e6:	2800      	cmp	r0, #0
740046e8:	dd47      	ble.n	7400477a <_dtoa_r+0xe5a>
740046ea:	990b      	ldr	r1, [sp, #44]	; 0x2c
740046ec:	2939      	cmp	r1, #57	; 0x39
740046ee:	d031      	beq.n	74004754 <_dtoa_r+0xe34>
740046f0:	3101      	adds	r1, #1
740046f2:	910b      	str	r1, [sp, #44]	; 0x2c
740046f4:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
740046f6:	f805 2b01 	strb.w	r2, [r5], #1
740046fa:	e515      	b.n	74004128 <_dtoa_r+0x808>
740046fc:	3201      	adds	r2, #1
740046fe:	701a      	strb	r2, [r3, #0]
74004700:	e512      	b.n	74004128 <_dtoa_r+0x808>
74004702:	9a0c      	ldr	r2, [sp, #48]	; 0x30
74004704:	4620      	mov	r0, r4
74004706:	6851      	ldr	r1, [r2, #4]
74004708:	f001 fc12 	bl	74005f30 <_Balloc>
7400470c:	9b0c      	ldr	r3, [sp, #48]	; 0x30
7400470e:	f103 010c 	add.w	r1, r3, #12
74004712:	691a      	ldr	r2, [r3, #16]
74004714:	3202      	adds	r2, #2
74004716:	0092      	lsls	r2, r2, #2
74004718:	4605      	mov	r5, r0
7400471a:	300c      	adds	r0, #12
7400471c:	f001 f8ce 	bl	740058bc <memcpy>
74004720:	4620      	mov	r0, r4
74004722:	4629      	mov	r1, r5
74004724:	2201      	movs	r2, #1
74004726:	f001 fd1d 	bl	74006164 <__lshift>
7400472a:	4682      	mov	sl, r0
7400472c:	e601      	b.n	74004332 <_dtoa_r+0xa12>
7400472e:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
74004730:	9f15      	ldr	r7, [sp, #84]	; 0x54
74004732:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
74004734:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
74004738:	e54f      	b.n	740041da <_dtoa_r+0x8ba>
7400473a:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
7400473c:	9e0c      	ldr	r6, [sp, #48]	; 0x30
7400473e:	e73d      	b.n	740045bc <_dtoa_r+0xc9c>
74004740:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
74004742:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
74004744:	2b39      	cmp	r3, #57	; 0x39
74004746:	9e0c      	ldr	r6, [sp, #48]	; 0x30
74004748:	d004      	beq.n	74004754 <_dtoa_r+0xe34>
7400474a:	980b      	ldr	r0, [sp, #44]	; 0x2c
7400474c:	1c43      	adds	r3, r0, #1
7400474e:	f805 3b01 	strb.w	r3, [r5], #1
74004752:	e4e9      	b.n	74004128 <_dtoa_r+0x808>
74004754:	2339      	movs	r3, #57	; 0x39
74004756:	f805 3b01 	strb.w	r3, [r5], #1
7400475a:	9910      	ldr	r1, [sp, #64]	; 0x40
7400475c:	e73c      	b.n	740045d8 <_dtoa_r+0xcb8>
7400475e:	980b      	ldr	r0, [sp, #44]	; 0x2c
74004760:	4633      	mov	r3, r6
74004762:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
74004764:	2839      	cmp	r0, #57	; 0x39
74004766:	9e0c      	ldr	r6, [sp, #48]	; 0x30
74004768:	d0f4      	beq.n	74004754 <_dtoa_r+0xe34>
7400476a:	2b00      	cmp	r3, #0
7400476c:	dd01      	ble.n	74004772 <_dtoa_r+0xe52>
7400476e:	3001      	adds	r0, #1
74004770:	900b      	str	r0, [sp, #44]	; 0x2c
74004772:	990b      	ldr	r1, [sp, #44]	; 0x2c
74004774:	f805 1b01 	strb.w	r1, [r5], #1
74004778:	e4d6      	b.n	74004128 <_dtoa_r+0x808>
7400477a:	d1bb      	bne.n	740046f4 <_dtoa_r+0xdd4>
7400477c:	980b      	ldr	r0, [sp, #44]	; 0x2c
7400477e:	f010 0f01 	tst.w	r0, #1
74004782:	d0b7      	beq.n	740046f4 <_dtoa_r+0xdd4>
74004784:	e7b1      	b.n	740046ea <_dtoa_r+0xdca>
74004786:	2300      	movs	r3, #0
74004788:	990c      	ldr	r1, [sp, #48]	; 0x30
7400478a:	4620      	mov	r0, r4
7400478c:	220a      	movs	r2, #10
7400478e:	f001 fdeb 	bl	74006368 <__multadd>
74004792:	9b11      	ldr	r3, [sp, #68]	; 0x44
74004794:	9308      	str	r3, [sp, #32]
74004796:	900c      	str	r0, [sp, #48]	; 0x30
74004798:	e4a0      	b.n	740040dc <_dtoa_r+0x7bc>
7400479a:	9908      	ldr	r1, [sp, #32]
7400479c:	290e      	cmp	r1, #14
7400479e:	bf8c      	ite	hi
740047a0:	2700      	movhi	r7, #0
740047a2:	f007 0701 	andls.w	r7, r7, #1
740047a6:	f7ff b9fa 	b.w	74003b9e <_dtoa_r+0x27e>
740047aa:	f43f ac81 	beq.w	740040b0 <_dtoa_r+0x790>
740047ae:	331c      	adds	r3, #28
740047b0:	e479      	b.n	740040a6 <_dtoa_r+0x786>
740047b2:	2701      	movs	r7, #1
740047b4:	f7ff b98a 	b.w	74003acc <_dtoa_r+0x1ac>

740047b8 <_fflush_r>:
740047b8:	690b      	ldr	r3, [r1, #16]
740047ba:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
740047be:	460c      	mov	r4, r1
740047c0:	4680      	mov	r8, r0
740047c2:	2b00      	cmp	r3, #0
740047c4:	d071      	beq.n	740048aa <_fflush_r+0xf2>
740047c6:	b110      	cbz	r0, 740047ce <_fflush_r+0x16>
740047c8:	6983      	ldr	r3, [r0, #24]
740047ca:	2b00      	cmp	r3, #0
740047cc:	d078      	beq.n	740048c0 <_fflush_r+0x108>
740047ce:	f248 330c 	movw	r3, #33548	; 0x830c
740047d2:	f2c7 4300 	movt	r3, #29696	; 0x7400
740047d6:	429c      	cmp	r4, r3
740047d8:	bf08      	it	eq
740047da:	f8d8 4004 	ldreq.w	r4, [r8, #4]
740047de:	d010      	beq.n	74004802 <_fflush_r+0x4a>
740047e0:	f248 332c 	movw	r3, #33580	; 0x832c
740047e4:	f2c7 4300 	movt	r3, #29696	; 0x7400
740047e8:	429c      	cmp	r4, r3
740047ea:	bf08      	it	eq
740047ec:	f8d8 4008 	ldreq.w	r4, [r8, #8]
740047f0:	d007      	beq.n	74004802 <_fflush_r+0x4a>
740047f2:	f248 334c 	movw	r3, #33612	; 0x834c
740047f6:	f2c7 4300 	movt	r3, #29696	; 0x7400
740047fa:	429c      	cmp	r4, r3
740047fc:	bf08      	it	eq
740047fe:	f8d8 400c 	ldreq.w	r4, [r8, #12]
74004802:	89a3      	ldrh	r3, [r4, #12]
74004804:	b21a      	sxth	r2, r3
74004806:	f012 0f08 	tst.w	r2, #8
7400480a:	d135      	bne.n	74004878 <_fflush_r+0xc0>
7400480c:	6862      	ldr	r2, [r4, #4]
7400480e:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
74004812:	81a3      	strh	r3, [r4, #12]
74004814:	2a00      	cmp	r2, #0
74004816:	dd5e      	ble.n	740048d6 <_fflush_r+0x11e>
74004818:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
7400481a:	2e00      	cmp	r6, #0
7400481c:	d045      	beq.n	740048aa <_fflush_r+0xf2>
7400481e:	b29b      	uxth	r3, r3
74004820:	f413 5280 	ands.w	r2, r3, #4096	; 0x1000
74004824:	bf18      	it	ne
74004826:	6d65      	ldrne	r5, [r4, #84]	; 0x54
74004828:	d059      	beq.n	740048de <_fflush_r+0x126>
7400482a:	f013 0f04 	tst.w	r3, #4
7400482e:	d14a      	bne.n	740048c6 <_fflush_r+0x10e>
74004830:	2300      	movs	r3, #0
74004832:	4640      	mov	r0, r8
74004834:	6a21      	ldr	r1, [r4, #32]
74004836:	462a      	mov	r2, r5
74004838:	47b0      	blx	r6
7400483a:	4285      	cmp	r5, r0
7400483c:	d138      	bne.n	740048b0 <_fflush_r+0xf8>
7400483e:	89a1      	ldrh	r1, [r4, #12]
74004840:	f24f 73ff 	movw	r3, #63487	; 0xf7ff
74004844:	6922      	ldr	r2, [r4, #16]
74004846:	f2c0 0300 	movt	r3, #0
7400484a:	ea01 0303 	and.w	r3, r1, r3
7400484e:	2100      	movs	r1, #0
74004850:	6061      	str	r1, [r4, #4]
74004852:	f413 5f80 	tst.w	r3, #4096	; 0x1000
74004856:	6b61      	ldr	r1, [r4, #52]	; 0x34
74004858:	81a3      	strh	r3, [r4, #12]
7400485a:	6022      	str	r2, [r4, #0]
7400485c:	bf18      	it	ne
7400485e:	6565      	strne	r5, [r4, #84]	; 0x54
74004860:	b319      	cbz	r1, 740048aa <_fflush_r+0xf2>
74004862:	f104 0344 	add.w	r3, r4, #68	; 0x44
74004866:	4299      	cmp	r1, r3
74004868:	d002      	beq.n	74004870 <_fflush_r+0xb8>
7400486a:	4640      	mov	r0, r8
7400486c:	f000 f998 	bl	74004ba0 <_free_r>
74004870:	2000      	movs	r0, #0
74004872:	6360      	str	r0, [r4, #52]	; 0x34
74004874:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
74004878:	6926      	ldr	r6, [r4, #16]
7400487a:	b1b6      	cbz	r6, 740048aa <_fflush_r+0xf2>
7400487c:	6825      	ldr	r5, [r4, #0]
7400487e:	6026      	str	r6, [r4, #0]
74004880:	1bad      	subs	r5, r5, r6
74004882:	f012 0f03 	tst.w	r2, #3
74004886:	bf0c      	ite	eq
74004888:	6963      	ldreq	r3, [r4, #20]
7400488a:	2300      	movne	r3, #0
7400488c:	60a3      	str	r3, [r4, #8]
7400488e:	e00a      	b.n	740048a6 <_fflush_r+0xee>
74004890:	4632      	mov	r2, r6
74004892:	462b      	mov	r3, r5
74004894:	6aa7      	ldr	r7, [r4, #40]	; 0x28
74004896:	4640      	mov	r0, r8
74004898:	6a21      	ldr	r1, [r4, #32]
7400489a:	47b8      	blx	r7
7400489c:	2800      	cmp	r0, #0
7400489e:	ebc0 0505 	rsb	r5, r0, r5
740048a2:	4406      	add	r6, r0
740048a4:	dd04      	ble.n	740048b0 <_fflush_r+0xf8>
740048a6:	2d00      	cmp	r5, #0
740048a8:	dcf2      	bgt.n	74004890 <_fflush_r+0xd8>
740048aa:	2000      	movs	r0, #0
740048ac:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
740048b0:	89a3      	ldrh	r3, [r4, #12]
740048b2:	f04f 30ff 	mov.w	r0, #4294967295
740048b6:	f043 0340 	orr.w	r3, r3, #64	; 0x40
740048ba:	81a3      	strh	r3, [r4, #12]
740048bc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
740048c0:	f000 f8ea 	bl	74004a98 <__sinit>
740048c4:	e783      	b.n	740047ce <_fflush_r+0x16>
740048c6:	6862      	ldr	r2, [r4, #4]
740048c8:	6b63      	ldr	r3, [r4, #52]	; 0x34
740048ca:	1aad      	subs	r5, r5, r2
740048cc:	2b00      	cmp	r3, #0
740048ce:	d0af      	beq.n	74004830 <_fflush_r+0x78>
740048d0:	6c23      	ldr	r3, [r4, #64]	; 0x40
740048d2:	1aed      	subs	r5, r5, r3
740048d4:	e7ac      	b.n	74004830 <_fflush_r+0x78>
740048d6:	6c22      	ldr	r2, [r4, #64]	; 0x40
740048d8:	2a00      	cmp	r2, #0
740048da:	dc9d      	bgt.n	74004818 <_fflush_r+0x60>
740048dc:	e7e5      	b.n	740048aa <_fflush_r+0xf2>
740048de:	2301      	movs	r3, #1
740048e0:	4640      	mov	r0, r8
740048e2:	6a21      	ldr	r1, [r4, #32]
740048e4:	47b0      	blx	r6
740048e6:	f1b0 3fff 	cmp.w	r0, #4294967295
740048ea:	4605      	mov	r5, r0
740048ec:	d002      	beq.n	740048f4 <_fflush_r+0x13c>
740048ee:	89a3      	ldrh	r3, [r4, #12]
740048f0:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
740048f2:	e79a      	b.n	7400482a <_fflush_r+0x72>
740048f4:	f8d8 3000 	ldr.w	r3, [r8]
740048f8:	2b1d      	cmp	r3, #29
740048fa:	d0d6      	beq.n	740048aa <_fflush_r+0xf2>
740048fc:	89a3      	ldrh	r3, [r4, #12]
740048fe:	f043 0340 	orr.w	r3, r3, #64	; 0x40
74004902:	81a3      	strh	r3, [r4, #12]
74004904:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

74004908 <fflush>:
74004908:	4601      	mov	r1, r0
7400490a:	b128      	cbz	r0, 74004918 <fflush+0x10>
7400490c:	f240 033c 	movw	r3, #60	; 0x3c
74004910:	f2c7 0300 	movt	r3, #28672	; 0x7000
74004914:	6818      	ldr	r0, [r3, #0]
74004916:	e74f      	b.n	740047b8 <_fflush_r>
74004918:	f248 2390 	movw	r3, #33424	; 0x8290
7400491c:	f244 71b9 	movw	r1, #18361	; 0x47b9
74004920:	f2c7 4300 	movt	r3, #29696	; 0x7400
74004924:	f2c7 4100 	movt	r1, #29696	; 0x7400
74004928:	6818      	ldr	r0, [r3, #0]
7400492a:	f000 bbb3 	b.w	74005094 <_fwalk_reent>
7400492e:	bf00      	nop

74004930 <__sfp_lock_acquire>:
74004930:	4770      	bx	lr
74004932:	bf00      	nop

74004934 <__sfp_lock_release>:
74004934:	4770      	bx	lr
74004936:	bf00      	nop

74004938 <__sinit_lock_acquire>:
74004938:	4770      	bx	lr
7400493a:	bf00      	nop

7400493c <__sinit_lock_release>:
7400493c:	4770      	bx	lr
7400493e:	bf00      	nop

74004940 <__fp_lock>:
74004940:	2000      	movs	r0, #0
74004942:	4770      	bx	lr

74004944 <__fp_unlock>:
74004944:	2000      	movs	r0, #0
74004946:	4770      	bx	lr

74004948 <__fp_unlock_all>:
74004948:	f240 033c 	movw	r3, #60	; 0x3c
7400494c:	f644 1145 	movw	r1, #18757	; 0x4945
74004950:	f2c7 0300 	movt	r3, #28672	; 0x7000
74004954:	f2c7 4100 	movt	r1, #29696	; 0x7400
74004958:	6818      	ldr	r0, [r3, #0]
7400495a:	f000 bbc5 	b.w	740050e8 <_fwalk>
7400495e:	bf00      	nop

74004960 <__fp_lock_all>:
74004960:	f240 033c 	movw	r3, #60	; 0x3c
74004964:	f644 1141 	movw	r1, #18753	; 0x4941
74004968:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400496c:	f2c7 4100 	movt	r1, #29696	; 0x7400
74004970:	6818      	ldr	r0, [r3, #0]
74004972:	f000 bbb9 	b.w	740050e8 <_fwalk>
74004976:	bf00      	nop

74004978 <_cleanup_r>:
74004978:	f646 5161 	movw	r1, #28001	; 0x6d61
7400497c:	f2c7 4100 	movt	r1, #29696	; 0x7400
74004980:	f000 bbb2 	b.w	740050e8 <_fwalk>

74004984 <_cleanup>:
74004984:	f248 2390 	movw	r3, #33424	; 0x8290
74004988:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400498c:	6818      	ldr	r0, [r3, #0]
7400498e:	e7f3      	b.n	74004978 <_cleanup_r>

74004990 <std>:
74004990:	b510      	push	{r4, lr}
74004992:	4604      	mov	r4, r0
74004994:	2300      	movs	r3, #0
74004996:	305c      	adds	r0, #92	; 0x5c
74004998:	81a1      	strh	r1, [r4, #12]
7400499a:	4619      	mov	r1, r3
7400499c:	81e2      	strh	r2, [r4, #14]
7400499e:	2208      	movs	r2, #8
740049a0:	6023      	str	r3, [r4, #0]
740049a2:	6063      	str	r3, [r4, #4]
740049a4:	60a3      	str	r3, [r4, #8]
740049a6:	6663      	str	r3, [r4, #100]	; 0x64
740049a8:	6123      	str	r3, [r4, #16]
740049aa:	6163      	str	r3, [r4, #20]
740049ac:	61a3      	str	r3, [r4, #24]
740049ae:	f001 f8a9 	bl	74005b04 <memset>
740049b2:	f646 10c1 	movw	r0, #27073	; 0x69c1
740049b6:	f646 1185 	movw	r1, #27013	; 0x6985
740049ba:	f646 125d 	movw	r2, #26973	; 0x695d
740049be:	f646 1355 	movw	r3, #26965	; 0x6955
740049c2:	f2c7 4000 	movt	r0, #29696	; 0x7400
740049c6:	f2c7 4100 	movt	r1, #29696	; 0x7400
740049ca:	f2c7 4200 	movt	r2, #29696	; 0x7400
740049ce:	f2c7 4300 	movt	r3, #29696	; 0x7400
740049d2:	6260      	str	r0, [r4, #36]	; 0x24
740049d4:	62a1      	str	r1, [r4, #40]	; 0x28
740049d6:	62e2      	str	r2, [r4, #44]	; 0x2c
740049d8:	6323      	str	r3, [r4, #48]	; 0x30
740049da:	6224      	str	r4, [r4, #32]
740049dc:	bd10      	pop	{r4, pc}
740049de:	bf00      	nop

740049e0 <__sfmoreglue>:
740049e0:	b570      	push	{r4, r5, r6, lr}
740049e2:	2568      	movs	r5, #104	; 0x68
740049e4:	460e      	mov	r6, r1
740049e6:	fb05 f501 	mul.w	r5, r5, r1
740049ea:	f105 010c 	add.w	r1, r5, #12
740049ee:	f000 fc59 	bl	740052a4 <_malloc_r>
740049f2:	4604      	mov	r4, r0
740049f4:	b148      	cbz	r0, 74004a0a <__sfmoreglue+0x2a>
740049f6:	f100 030c 	add.w	r3, r0, #12
740049fa:	2100      	movs	r1, #0
740049fc:	6046      	str	r6, [r0, #4]
740049fe:	462a      	mov	r2, r5
74004a00:	4618      	mov	r0, r3
74004a02:	6021      	str	r1, [r4, #0]
74004a04:	60a3      	str	r3, [r4, #8]
74004a06:	f001 f87d 	bl	74005b04 <memset>
74004a0a:	4620      	mov	r0, r4
74004a0c:	bd70      	pop	{r4, r5, r6, pc}
74004a0e:	bf00      	nop

74004a10 <__sfp>:
74004a10:	f248 2390 	movw	r3, #33424	; 0x8290
74004a14:	f2c7 4300 	movt	r3, #29696	; 0x7400
74004a18:	b570      	push	{r4, r5, r6, lr}
74004a1a:	681d      	ldr	r5, [r3, #0]
74004a1c:	4606      	mov	r6, r0
74004a1e:	69ab      	ldr	r3, [r5, #24]
74004a20:	2b00      	cmp	r3, #0
74004a22:	d02a      	beq.n	74004a7a <__sfp+0x6a>
74004a24:	35d8      	adds	r5, #216	; 0xd8
74004a26:	686b      	ldr	r3, [r5, #4]
74004a28:	68ac      	ldr	r4, [r5, #8]
74004a2a:	3b01      	subs	r3, #1
74004a2c:	d503      	bpl.n	74004a36 <__sfp+0x26>
74004a2e:	e020      	b.n	74004a72 <__sfp+0x62>
74004a30:	3468      	adds	r4, #104	; 0x68
74004a32:	3b01      	subs	r3, #1
74004a34:	d41d      	bmi.n	74004a72 <__sfp+0x62>
74004a36:	f9b4 200c 	ldrsh.w	r2, [r4, #12]
74004a3a:	2a00      	cmp	r2, #0
74004a3c:	d1f8      	bne.n	74004a30 <__sfp+0x20>
74004a3e:	2500      	movs	r5, #0
74004a40:	f04f 33ff 	mov.w	r3, #4294967295
74004a44:	6665      	str	r5, [r4, #100]	; 0x64
74004a46:	f104 005c 	add.w	r0, r4, #92	; 0x5c
74004a4a:	81e3      	strh	r3, [r4, #14]
74004a4c:	4629      	mov	r1, r5
74004a4e:	f04f 0301 	mov.w	r3, #1
74004a52:	6025      	str	r5, [r4, #0]
74004a54:	81a3      	strh	r3, [r4, #12]
74004a56:	2208      	movs	r2, #8
74004a58:	60a5      	str	r5, [r4, #8]
74004a5a:	6065      	str	r5, [r4, #4]
74004a5c:	6125      	str	r5, [r4, #16]
74004a5e:	6165      	str	r5, [r4, #20]
74004a60:	61a5      	str	r5, [r4, #24]
74004a62:	f001 f84f 	bl	74005b04 <memset>
74004a66:	64e5      	str	r5, [r4, #76]	; 0x4c
74004a68:	6365      	str	r5, [r4, #52]	; 0x34
74004a6a:	63a5      	str	r5, [r4, #56]	; 0x38
74004a6c:	64a5      	str	r5, [r4, #72]	; 0x48
74004a6e:	4620      	mov	r0, r4
74004a70:	bd70      	pop	{r4, r5, r6, pc}
74004a72:	6828      	ldr	r0, [r5, #0]
74004a74:	b128      	cbz	r0, 74004a82 <__sfp+0x72>
74004a76:	4605      	mov	r5, r0
74004a78:	e7d5      	b.n	74004a26 <__sfp+0x16>
74004a7a:	4628      	mov	r0, r5
74004a7c:	f000 f80c 	bl	74004a98 <__sinit>
74004a80:	e7d0      	b.n	74004a24 <__sfp+0x14>
74004a82:	4630      	mov	r0, r6
74004a84:	2104      	movs	r1, #4
74004a86:	f7ff ffab 	bl	740049e0 <__sfmoreglue>
74004a8a:	6028      	str	r0, [r5, #0]
74004a8c:	2800      	cmp	r0, #0
74004a8e:	d1f2      	bne.n	74004a76 <__sfp+0x66>
74004a90:	230c      	movs	r3, #12
74004a92:	4604      	mov	r4, r0
74004a94:	6033      	str	r3, [r6, #0]
74004a96:	e7ea      	b.n	74004a6e <__sfp+0x5e>

74004a98 <__sinit>:
74004a98:	b570      	push	{r4, r5, r6, lr}
74004a9a:	6986      	ldr	r6, [r0, #24]
74004a9c:	4604      	mov	r4, r0
74004a9e:	b106      	cbz	r6, 74004aa2 <__sinit+0xa>
74004aa0:	bd70      	pop	{r4, r5, r6, pc}
74004aa2:	f644 1379 	movw	r3, #18809	; 0x4979
74004aa6:	2501      	movs	r5, #1
74004aa8:	f2c7 4300 	movt	r3, #29696	; 0x7400
74004aac:	f8c0 60d8 	str.w	r6, [r0, #216]	; 0xd8
74004ab0:	6283      	str	r3, [r0, #40]	; 0x28
74004ab2:	f8c0 60dc 	str.w	r6, [r0, #220]	; 0xdc
74004ab6:	f8c0 60e0 	str.w	r6, [r0, #224]	; 0xe0
74004aba:	6185      	str	r5, [r0, #24]
74004abc:	f7ff ffa8 	bl	74004a10 <__sfp>
74004ac0:	6060      	str	r0, [r4, #4]
74004ac2:	4620      	mov	r0, r4
74004ac4:	f7ff ffa4 	bl	74004a10 <__sfp>
74004ac8:	60a0      	str	r0, [r4, #8]
74004aca:	4620      	mov	r0, r4
74004acc:	f7ff ffa0 	bl	74004a10 <__sfp>
74004ad0:	4632      	mov	r2, r6
74004ad2:	2104      	movs	r1, #4
74004ad4:	4623      	mov	r3, r4
74004ad6:	60e0      	str	r0, [r4, #12]
74004ad8:	6860      	ldr	r0, [r4, #4]
74004ada:	f7ff ff59 	bl	74004990 <std>
74004ade:	462a      	mov	r2, r5
74004ae0:	68a0      	ldr	r0, [r4, #8]
74004ae2:	2109      	movs	r1, #9
74004ae4:	4623      	mov	r3, r4
74004ae6:	f7ff ff53 	bl	74004990 <std>
74004aea:	4623      	mov	r3, r4
74004aec:	68e0      	ldr	r0, [r4, #12]
74004aee:	2112      	movs	r1, #18
74004af0:	2202      	movs	r2, #2
74004af2:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
74004af6:	e74b      	b.n	74004990 <std>

74004af8 <_malloc_trim_r>:
74004af8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
74004afa:	f240 1440 	movw	r4, #320	; 0x140
74004afe:	f2c7 0400 	movt	r4, #28672	; 0x7000
74004b02:	460f      	mov	r7, r1
74004b04:	4605      	mov	r5, r0
74004b06:	f001 f867 	bl	74005bd8 <__malloc_lock>
74004b0a:	68a3      	ldr	r3, [r4, #8]
74004b0c:	685e      	ldr	r6, [r3, #4]
74004b0e:	f026 0603 	bic.w	r6, r6, #3
74004b12:	f506 637e 	add.w	r3, r6, #4064	; 0xfe0
74004b16:	330f      	adds	r3, #15
74004b18:	1bdf      	subs	r7, r3, r7
74004b1a:	0b3f      	lsrs	r7, r7, #12
74004b1c:	3f01      	subs	r7, #1
74004b1e:	033f      	lsls	r7, r7, #12
74004b20:	f5b7 5f80 	cmp.w	r7, #4096	; 0x1000
74004b24:	db07      	blt.n	74004b36 <_malloc_trim_r+0x3e>
74004b26:	2100      	movs	r1, #0
74004b28:	4628      	mov	r0, r5
74004b2a:	f001 feff 	bl	7400692c <_sbrk_r>
74004b2e:	68a3      	ldr	r3, [r4, #8]
74004b30:	18f3      	adds	r3, r6, r3
74004b32:	4283      	cmp	r3, r0
74004b34:	d004      	beq.n	74004b40 <_malloc_trim_r+0x48>
74004b36:	4628      	mov	r0, r5
74004b38:	f001 f850 	bl	74005bdc <__malloc_unlock>
74004b3c:	2000      	movs	r0, #0
74004b3e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
74004b40:	4279      	negs	r1, r7
74004b42:	4628      	mov	r0, r5
74004b44:	f001 fef2 	bl	7400692c <_sbrk_r>
74004b48:	f1b0 3fff 	cmp.w	r0, #4294967295
74004b4c:	d010      	beq.n	74004b70 <_malloc_trim_r+0x78>
74004b4e:	68a2      	ldr	r2, [r4, #8]
74004b50:	f240 5370 	movw	r3, #1392	; 0x570
74004b54:	f2c7 0300 	movt	r3, #28672	; 0x7000
74004b58:	1bf6      	subs	r6, r6, r7
74004b5a:	f046 0601 	orr.w	r6, r6, #1
74004b5e:	4628      	mov	r0, r5
74004b60:	6056      	str	r6, [r2, #4]
74004b62:	681a      	ldr	r2, [r3, #0]
74004b64:	1bd7      	subs	r7, r2, r7
74004b66:	601f      	str	r7, [r3, #0]
74004b68:	f001 f838 	bl	74005bdc <__malloc_unlock>
74004b6c:	2001      	movs	r0, #1
74004b6e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
74004b70:	2100      	movs	r1, #0
74004b72:	4628      	mov	r0, r5
74004b74:	f001 feda 	bl	7400692c <_sbrk_r>
74004b78:	68a3      	ldr	r3, [r4, #8]
74004b7a:	1ac2      	subs	r2, r0, r3
74004b7c:	2a0f      	cmp	r2, #15
74004b7e:	ddda      	ble.n	74004b36 <_malloc_trim_r+0x3e>
74004b80:	f240 5448 	movw	r4, #1352	; 0x548
74004b84:	f240 5170 	movw	r1, #1392	; 0x570
74004b88:	f2c7 0400 	movt	r4, #28672	; 0x7000
74004b8c:	f2c7 0100 	movt	r1, #28672	; 0x7000
74004b90:	f042 0201 	orr.w	r2, r2, #1
74004b94:	6824      	ldr	r4, [r4, #0]
74004b96:	1b00      	subs	r0, r0, r4
74004b98:	6008      	str	r0, [r1, #0]
74004b9a:	605a      	str	r2, [r3, #4]
74004b9c:	e7cb      	b.n	74004b36 <_malloc_trim_r+0x3e>
74004b9e:	bf00      	nop

74004ba0 <_free_r>:
74004ba0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
74004ba4:	4605      	mov	r5, r0
74004ba6:	460c      	mov	r4, r1
74004ba8:	2900      	cmp	r1, #0
74004baa:	f000 8088 	beq.w	74004cbe <_free_r+0x11e>
74004bae:	f001 f813 	bl	74005bd8 <__malloc_lock>
74004bb2:	f1a4 0208 	sub.w	r2, r4, #8
74004bb6:	f240 1040 	movw	r0, #320	; 0x140
74004bba:	6856      	ldr	r6, [r2, #4]
74004bbc:	f2c7 0000 	movt	r0, #28672	; 0x7000
74004bc0:	f026 0301 	bic.w	r3, r6, #1
74004bc4:	f8d0 c008 	ldr.w	ip, [r0, #8]
74004bc8:	18d1      	adds	r1, r2, r3
74004bca:	458c      	cmp	ip, r1
74004bcc:	684f      	ldr	r7, [r1, #4]
74004bce:	f027 0703 	bic.w	r7, r7, #3
74004bd2:	f000 8095 	beq.w	74004d00 <_free_r+0x160>
74004bd6:	f016 0601 	ands.w	r6, r6, #1
74004bda:	604f      	str	r7, [r1, #4]
74004bdc:	d05f      	beq.n	74004c9e <_free_r+0xfe>
74004bde:	2600      	movs	r6, #0
74004be0:	19cc      	adds	r4, r1, r7
74004be2:	6864      	ldr	r4, [r4, #4]
74004be4:	f014 0f01 	tst.w	r4, #1
74004be8:	d106      	bne.n	74004bf8 <_free_r+0x58>
74004bea:	19db      	adds	r3, r3, r7
74004bec:	2e00      	cmp	r6, #0
74004bee:	d07a      	beq.n	74004ce6 <_free_r+0x146>
74004bf0:	688c      	ldr	r4, [r1, #8]
74004bf2:	68c9      	ldr	r1, [r1, #12]
74004bf4:	608c      	str	r4, [r1, #8]
74004bf6:	60e1      	str	r1, [r4, #12]
74004bf8:	f043 0101 	orr.w	r1, r3, #1
74004bfc:	50d3      	str	r3, [r2, r3]
74004bfe:	6051      	str	r1, [r2, #4]
74004c00:	2e00      	cmp	r6, #0
74004c02:	d147      	bne.n	74004c94 <_free_r+0xf4>
74004c04:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
74004c08:	d35b      	bcc.n	74004cc2 <_free_r+0x122>
74004c0a:	0a59      	lsrs	r1, r3, #9
74004c0c:	2904      	cmp	r1, #4
74004c0e:	bf9e      	ittt	ls
74004c10:	ea4f 1c93 	movls.w	ip, r3, lsr #6
74004c14:	f10c 0c38 	addls.w	ip, ip, #56	; 0x38
74004c18:	ea4f 04cc 	movls.w	r4, ip, lsl #3
74004c1c:	d928      	bls.n	74004c70 <_free_r+0xd0>
74004c1e:	2914      	cmp	r1, #20
74004c20:	bf9c      	itt	ls
74004c22:	f101 0c5b 	addls.w	ip, r1, #91	; 0x5b
74004c26:	ea4f 04cc 	movls.w	r4, ip, lsl #3
74004c2a:	d921      	bls.n	74004c70 <_free_r+0xd0>
74004c2c:	2954      	cmp	r1, #84	; 0x54
74004c2e:	bf9e      	ittt	ls
74004c30:	ea4f 3c13 	movls.w	ip, r3, lsr #12
74004c34:	f10c 0c6e 	addls.w	ip, ip, #110	; 0x6e
74004c38:	ea4f 04cc 	movls.w	r4, ip, lsl #3
74004c3c:	d918      	bls.n	74004c70 <_free_r+0xd0>
74004c3e:	f5b1 7faa 	cmp.w	r1, #340	; 0x154
74004c42:	bf9e      	ittt	ls
74004c44:	ea4f 3cd3 	movls.w	ip, r3, lsr #15
74004c48:	f10c 0c77 	addls.w	ip, ip, #119	; 0x77
74004c4c:	ea4f 04cc 	movls.w	r4, ip, lsl #3
74004c50:	d90e      	bls.n	74004c70 <_free_r+0xd0>
74004c52:	f240 5c54 	movw	ip, #1364	; 0x554
74004c56:	4561      	cmp	r1, ip
74004c58:	bf95      	itete	ls
74004c5a:	ea4f 4c93 	movls.w	ip, r3, lsr #18
74004c5e:	f44f 747c 	movhi.w	r4, #1008	; 0x3f0
74004c62:	f10c 0c7c 	addls.w	ip, ip, #124	; 0x7c
74004c66:	f04f 0c7e 	movhi.w	ip, #126	; 0x7e
74004c6a:	bf98      	it	ls
74004c6c:	ea4f 04cc 	movls.w	r4, ip, lsl #3
74004c70:	1904      	adds	r4, r0, r4
74004c72:	68a1      	ldr	r1, [r4, #8]
74004c74:	42a1      	cmp	r1, r4
74004c76:	d103      	bne.n	74004c80 <_free_r+0xe0>
74004c78:	e064      	b.n	74004d44 <_free_r+0x1a4>
74004c7a:	6889      	ldr	r1, [r1, #8]
74004c7c:	428c      	cmp	r4, r1
74004c7e:	d004      	beq.n	74004c8a <_free_r+0xea>
74004c80:	6848      	ldr	r0, [r1, #4]
74004c82:	f020 0003 	bic.w	r0, r0, #3
74004c86:	4283      	cmp	r3, r0
74004c88:	d3f7      	bcc.n	74004c7a <_free_r+0xda>
74004c8a:	68cb      	ldr	r3, [r1, #12]
74004c8c:	60d3      	str	r3, [r2, #12]
74004c8e:	6091      	str	r1, [r2, #8]
74004c90:	60ca      	str	r2, [r1, #12]
74004c92:	609a      	str	r2, [r3, #8]
74004c94:	4628      	mov	r0, r5
74004c96:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
74004c9a:	f000 bf9f 	b.w	74005bdc <__malloc_unlock>
74004c9e:	f854 4c08 	ldr.w	r4, [r4, #-8]
74004ca2:	f100 0c08 	add.w	ip, r0, #8
74004ca6:	1b12      	subs	r2, r2, r4
74004ca8:	191b      	adds	r3, r3, r4
74004caa:	6894      	ldr	r4, [r2, #8]
74004cac:	4564      	cmp	r4, ip
74004cae:	d047      	beq.n	74004d40 <_free_r+0x1a0>
74004cb0:	f8d2 c00c 	ldr.w	ip, [r2, #12]
74004cb4:	f8cc 4008 	str.w	r4, [ip, #8]
74004cb8:	f8c4 c00c 	str.w	ip, [r4, #12]
74004cbc:	e790      	b.n	74004be0 <_free_r+0x40>
74004cbe:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
74004cc2:	08db      	lsrs	r3, r3, #3
74004cc4:	f04f 0c01 	mov.w	ip, #1
74004cc8:	6846      	ldr	r6, [r0, #4]
74004cca:	eb00 01c3 	add.w	r1, r0, r3, lsl #3
74004cce:	109b      	asrs	r3, r3, #2
74004cd0:	fa0c f303 	lsl.w	r3, ip, r3
74004cd4:	60d1      	str	r1, [r2, #12]
74004cd6:	688c      	ldr	r4, [r1, #8]
74004cd8:	ea46 0303 	orr.w	r3, r6, r3
74004cdc:	6043      	str	r3, [r0, #4]
74004cde:	6094      	str	r4, [r2, #8]
74004ce0:	60e2      	str	r2, [r4, #12]
74004ce2:	608a      	str	r2, [r1, #8]
74004ce4:	e7d6      	b.n	74004c94 <_free_r+0xf4>
74004ce6:	688c      	ldr	r4, [r1, #8]
74004ce8:	4f1c      	ldr	r7, [pc, #112]	; (74004d5c <_free_r+0x1bc>)
74004cea:	42bc      	cmp	r4, r7
74004cec:	d181      	bne.n	74004bf2 <_free_r+0x52>
74004cee:	50d3      	str	r3, [r2, r3]
74004cf0:	f043 0301 	orr.w	r3, r3, #1
74004cf4:	60e2      	str	r2, [r4, #12]
74004cf6:	60a2      	str	r2, [r4, #8]
74004cf8:	6053      	str	r3, [r2, #4]
74004cfa:	6094      	str	r4, [r2, #8]
74004cfc:	60d4      	str	r4, [r2, #12]
74004cfe:	e7c9      	b.n	74004c94 <_free_r+0xf4>
74004d00:	18fb      	adds	r3, r7, r3
74004d02:	f016 0f01 	tst.w	r6, #1
74004d06:	d107      	bne.n	74004d18 <_free_r+0x178>
74004d08:	f854 1c08 	ldr.w	r1, [r4, #-8]
74004d0c:	1a52      	subs	r2, r2, r1
74004d0e:	185b      	adds	r3, r3, r1
74004d10:	68d4      	ldr	r4, [r2, #12]
74004d12:	6891      	ldr	r1, [r2, #8]
74004d14:	60a1      	str	r1, [r4, #8]
74004d16:	60cc      	str	r4, [r1, #12]
74004d18:	f240 514c 	movw	r1, #1356	; 0x54c
74004d1c:	6082      	str	r2, [r0, #8]
74004d1e:	f2c7 0100 	movt	r1, #28672	; 0x7000
74004d22:	f043 0001 	orr.w	r0, r3, #1
74004d26:	6050      	str	r0, [r2, #4]
74004d28:	680a      	ldr	r2, [r1, #0]
74004d2a:	4293      	cmp	r3, r2
74004d2c:	d3b2      	bcc.n	74004c94 <_free_r+0xf4>
74004d2e:	f240 536c 	movw	r3, #1388	; 0x56c
74004d32:	4628      	mov	r0, r5
74004d34:	f2c7 0300 	movt	r3, #28672	; 0x7000
74004d38:	6819      	ldr	r1, [r3, #0]
74004d3a:	f7ff fedd 	bl	74004af8 <_malloc_trim_r>
74004d3e:	e7a9      	b.n	74004c94 <_free_r+0xf4>
74004d40:	2601      	movs	r6, #1
74004d42:	e74d      	b.n	74004be0 <_free_r+0x40>
74004d44:	2601      	movs	r6, #1
74004d46:	6844      	ldr	r4, [r0, #4]
74004d48:	ea4f 0cac 	mov.w	ip, ip, asr #2
74004d4c:	460b      	mov	r3, r1
74004d4e:	fa06 fc0c 	lsl.w	ip, r6, ip
74004d52:	ea44 040c 	orr.w	r4, r4, ip
74004d56:	6044      	str	r4, [r0, #4]
74004d58:	e798      	b.n	74004c8c <_free_r+0xec>
74004d5a:	bf00      	nop
74004d5c:	70000148 	.word	0x70000148

74004d60 <__sfvwrite_r>:
74004d60:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
74004d64:	6893      	ldr	r3, [r2, #8]
74004d66:	b085      	sub	sp, #20
74004d68:	4690      	mov	r8, r2
74004d6a:	460c      	mov	r4, r1
74004d6c:	9003      	str	r0, [sp, #12]
74004d6e:	2b00      	cmp	r3, #0
74004d70:	d064      	beq.n	74004e3c <__sfvwrite_r+0xdc>
74004d72:	8988      	ldrh	r0, [r1, #12]
74004d74:	fa1f fa80 	uxth.w	sl, r0
74004d78:	f01a 0f08 	tst.w	sl, #8
74004d7c:	f000 80a0 	beq.w	74004ec0 <__sfvwrite_r+0x160>
74004d80:	690b      	ldr	r3, [r1, #16]
74004d82:	2b00      	cmp	r3, #0
74004d84:	f000 809c 	beq.w	74004ec0 <__sfvwrite_r+0x160>
74004d88:	f01a 0b02 	ands.w	fp, sl, #2
74004d8c:	f8d8 5000 	ldr.w	r5, [r8]
74004d90:	bf1c      	itt	ne
74004d92:	f04f 0a00 	movne.w	sl, #0
74004d96:	4657      	movne	r7, sl
74004d98:	d136      	bne.n	74004e08 <__sfvwrite_r+0xa8>
74004d9a:	f01a 0a01 	ands.w	sl, sl, #1
74004d9e:	bf1d      	ittte	ne
74004da0:	46dc      	movne	ip, fp
74004da2:	46d9      	movne	r9, fp
74004da4:	465f      	movne	r7, fp
74004da6:	4656      	moveq	r6, sl
74004da8:	d152      	bne.n	74004e50 <__sfvwrite_r+0xf0>
74004daa:	b326      	cbz	r6, 74004df6 <__sfvwrite_r+0x96>
74004dac:	b280      	uxth	r0, r0
74004dae:	68a7      	ldr	r7, [r4, #8]
74004db0:	f410 7f00 	tst.w	r0, #512	; 0x200
74004db4:	f000 808f 	beq.w	74004ed6 <__sfvwrite_r+0x176>
74004db8:	42be      	cmp	r6, r7
74004dba:	46bb      	mov	fp, r7
74004dbc:	f080 80a7 	bcs.w	74004f0e <__sfvwrite_r+0x1ae>
74004dc0:	6820      	ldr	r0, [r4, #0]
74004dc2:	4637      	mov	r7, r6
74004dc4:	46b3      	mov	fp, r6
74004dc6:	465a      	mov	r2, fp
74004dc8:	4651      	mov	r1, sl
74004dca:	f000 fe3f 	bl	74005a4c <memmove>
74004dce:	68a2      	ldr	r2, [r4, #8]
74004dd0:	6823      	ldr	r3, [r4, #0]
74004dd2:	46b1      	mov	r9, r6
74004dd4:	1bd7      	subs	r7, r2, r7
74004dd6:	60a7      	str	r7, [r4, #8]
74004dd8:	4637      	mov	r7, r6
74004dda:	445b      	add	r3, fp
74004ddc:	6023      	str	r3, [r4, #0]
74004dde:	f8d8 3008 	ldr.w	r3, [r8, #8]
74004de2:	ebc9 0606 	rsb	r6, r9, r6
74004de6:	44ca      	add	sl, r9
74004de8:	1bdf      	subs	r7, r3, r7
74004dea:	f8c8 7008 	str.w	r7, [r8, #8]
74004dee:	b32f      	cbz	r7, 74004e3c <__sfvwrite_r+0xdc>
74004df0:	89a0      	ldrh	r0, [r4, #12]
74004df2:	2e00      	cmp	r6, #0
74004df4:	d1da      	bne.n	74004dac <__sfvwrite_r+0x4c>
74004df6:	f8d5 a000 	ldr.w	sl, [r5]
74004dfa:	686e      	ldr	r6, [r5, #4]
74004dfc:	3508      	adds	r5, #8
74004dfe:	e7d4      	b.n	74004daa <__sfvwrite_r+0x4a>
74004e00:	f8d5 a000 	ldr.w	sl, [r5]
74004e04:	686f      	ldr	r7, [r5, #4]
74004e06:	3508      	adds	r5, #8
74004e08:	f5b7 6f80 	cmp.w	r7, #1024	; 0x400
74004e0c:	bf34      	ite	cc
74004e0e:	463b      	movcc	r3, r7
74004e10:	f44f 6380 	movcs.w	r3, #1024	; 0x400
74004e14:	4652      	mov	r2, sl
74004e16:	9803      	ldr	r0, [sp, #12]
74004e18:	2f00      	cmp	r7, #0
74004e1a:	d0f1      	beq.n	74004e00 <__sfvwrite_r+0xa0>
74004e1c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
74004e1e:	6a21      	ldr	r1, [r4, #32]
74004e20:	47b0      	blx	r6
74004e22:	2800      	cmp	r0, #0
74004e24:	4482      	add	sl, r0
74004e26:	ebc0 0707 	rsb	r7, r0, r7
74004e2a:	f340 80ec 	ble.w	74005006 <__sfvwrite_r+0x2a6>
74004e2e:	f8d8 3008 	ldr.w	r3, [r8, #8]
74004e32:	1a18      	subs	r0, r3, r0
74004e34:	f8c8 0008 	str.w	r0, [r8, #8]
74004e38:	2800      	cmp	r0, #0
74004e3a:	d1e5      	bne.n	74004e08 <__sfvwrite_r+0xa8>
74004e3c:	2000      	movs	r0, #0
74004e3e:	b005      	add	sp, #20
74004e40:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
74004e44:	f8d5 9000 	ldr.w	r9, [r5]
74004e48:	f04f 0c00 	mov.w	ip, #0
74004e4c:	686f      	ldr	r7, [r5, #4]
74004e4e:	3508      	adds	r5, #8
74004e50:	2f00      	cmp	r7, #0
74004e52:	d0f7      	beq.n	74004e44 <__sfvwrite_r+0xe4>
74004e54:	f1bc 0f00 	cmp.w	ip, #0
74004e58:	f000 80b5 	beq.w	74004fc6 <__sfvwrite_r+0x266>
74004e5c:	6963      	ldr	r3, [r4, #20]
74004e5e:	45bb      	cmp	fp, r7
74004e60:	bf34      	ite	cc
74004e62:	46da      	movcc	sl, fp
74004e64:	46ba      	movcs	sl, r7
74004e66:	68a6      	ldr	r6, [r4, #8]
74004e68:	6820      	ldr	r0, [r4, #0]
74004e6a:	6922      	ldr	r2, [r4, #16]
74004e6c:	199e      	adds	r6, r3, r6
74004e6e:	4290      	cmp	r0, r2
74004e70:	bf94      	ite	ls
74004e72:	2200      	movls	r2, #0
74004e74:	2201      	movhi	r2, #1
74004e76:	45b2      	cmp	sl, r6
74004e78:	bfd4      	ite	le
74004e7a:	2200      	movle	r2, #0
74004e7c:	f002 0201 	andgt.w	r2, r2, #1
74004e80:	2a00      	cmp	r2, #0
74004e82:	f040 80ae 	bne.w	74004fe2 <__sfvwrite_r+0x282>
74004e86:	459a      	cmp	sl, r3
74004e88:	f2c0 8082 	blt.w	74004f90 <__sfvwrite_r+0x230>
74004e8c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
74004e8e:	464a      	mov	r2, r9
74004e90:	f8cd c004 	str.w	ip, [sp, #4]
74004e94:	9803      	ldr	r0, [sp, #12]
74004e96:	6a21      	ldr	r1, [r4, #32]
74004e98:	47b0      	blx	r6
74004e9a:	f8dd c004 	ldr.w	ip, [sp, #4]
74004e9e:	1e06      	subs	r6, r0, #0
74004ea0:	f340 80b1 	ble.w	74005006 <__sfvwrite_r+0x2a6>
74004ea4:	ebbb 0b06 	subs.w	fp, fp, r6
74004ea8:	f000 8086 	beq.w	74004fb8 <__sfvwrite_r+0x258>
74004eac:	f8d8 3008 	ldr.w	r3, [r8, #8]
74004eb0:	44b1      	add	r9, r6
74004eb2:	1bbf      	subs	r7, r7, r6
74004eb4:	1b9e      	subs	r6, r3, r6
74004eb6:	f8c8 6008 	str.w	r6, [r8, #8]
74004eba:	2e00      	cmp	r6, #0
74004ebc:	d1c8      	bne.n	74004e50 <__sfvwrite_r+0xf0>
74004ebe:	e7bd      	b.n	74004e3c <__sfvwrite_r+0xdc>
74004ec0:	9803      	ldr	r0, [sp, #12]
74004ec2:	4621      	mov	r1, r4
74004ec4:	f7fe fc18 	bl	740036f8 <__swsetup_r>
74004ec8:	2800      	cmp	r0, #0
74004eca:	f040 80d4 	bne.w	74005076 <__sfvwrite_r+0x316>
74004ece:	89a0      	ldrh	r0, [r4, #12]
74004ed0:	fa1f fa80 	uxth.w	sl, r0
74004ed4:	e758      	b.n	74004d88 <__sfvwrite_r+0x28>
74004ed6:	6820      	ldr	r0, [r4, #0]
74004ed8:	46b9      	mov	r9, r7
74004eda:	6923      	ldr	r3, [r4, #16]
74004edc:	4298      	cmp	r0, r3
74004ede:	bf94      	ite	ls
74004ee0:	2300      	movls	r3, #0
74004ee2:	2301      	movhi	r3, #1
74004ee4:	42b7      	cmp	r7, r6
74004ee6:	bf2c      	ite	cs
74004ee8:	2300      	movcs	r3, #0
74004eea:	f003 0301 	andcc.w	r3, r3, #1
74004eee:	2b00      	cmp	r3, #0
74004ef0:	f040 809d 	bne.w	7400502e <__sfvwrite_r+0x2ce>
74004ef4:	6963      	ldr	r3, [r4, #20]
74004ef6:	429e      	cmp	r6, r3
74004ef8:	f0c0 808c 	bcc.w	74005014 <__sfvwrite_r+0x2b4>
74004efc:	6aa7      	ldr	r7, [r4, #40]	; 0x28
74004efe:	4652      	mov	r2, sl
74004f00:	9803      	ldr	r0, [sp, #12]
74004f02:	6a21      	ldr	r1, [r4, #32]
74004f04:	47b8      	blx	r7
74004f06:	1e07      	subs	r7, r0, #0
74004f08:	dd7d      	ble.n	74005006 <__sfvwrite_r+0x2a6>
74004f0a:	46b9      	mov	r9, r7
74004f0c:	e767      	b.n	74004dde <__sfvwrite_r+0x7e>
74004f0e:	f410 6f90 	tst.w	r0, #1152	; 0x480
74004f12:	bf08      	it	eq
74004f14:	6820      	ldreq	r0, [r4, #0]
74004f16:	f43f af56 	beq.w	74004dc6 <__sfvwrite_r+0x66>
74004f1a:	6962      	ldr	r2, [r4, #20]
74004f1c:	6921      	ldr	r1, [r4, #16]
74004f1e:	6823      	ldr	r3, [r4, #0]
74004f20:	eb02 0942 	add.w	r9, r2, r2, lsl #1
74004f24:	1a5b      	subs	r3, r3, r1
74004f26:	eb09 79d9 	add.w	r9, r9, r9, lsr #31
74004f2a:	f103 0c01 	add.w	ip, r3, #1
74004f2e:	44b4      	add	ip, r6
74004f30:	ea4f 0969 	mov.w	r9, r9, asr #1
74004f34:	45e1      	cmp	r9, ip
74004f36:	464a      	mov	r2, r9
74004f38:	bf3c      	itt	cc
74004f3a:	46e1      	movcc	r9, ip
74004f3c:	464a      	movcc	r2, r9
74004f3e:	f410 6f80 	tst.w	r0, #1024	; 0x400
74004f42:	f000 8083 	beq.w	7400504c <__sfvwrite_r+0x2ec>
74004f46:	4611      	mov	r1, r2
74004f48:	9803      	ldr	r0, [sp, #12]
74004f4a:	9302      	str	r3, [sp, #8]
74004f4c:	f000 f9aa 	bl	740052a4 <_malloc_r>
74004f50:	9b02      	ldr	r3, [sp, #8]
74004f52:	2800      	cmp	r0, #0
74004f54:	f000 8099 	beq.w	7400508a <__sfvwrite_r+0x32a>
74004f58:	461a      	mov	r2, r3
74004f5a:	6921      	ldr	r1, [r4, #16]
74004f5c:	9302      	str	r3, [sp, #8]
74004f5e:	9001      	str	r0, [sp, #4]
74004f60:	f000 fcac 	bl	740058bc <memcpy>
74004f64:	89a2      	ldrh	r2, [r4, #12]
74004f66:	9b02      	ldr	r3, [sp, #8]
74004f68:	f8dd c004 	ldr.w	ip, [sp, #4]
74004f6c:	f422 6290 	bic.w	r2, r2, #1152	; 0x480
74004f70:	f042 0280 	orr.w	r2, r2, #128	; 0x80
74004f74:	81a2      	strh	r2, [r4, #12]
74004f76:	ebc3 0209 	rsb	r2, r3, r9
74004f7a:	eb0c 0003 	add.w	r0, ip, r3
74004f7e:	4637      	mov	r7, r6
74004f80:	46b3      	mov	fp, r6
74004f82:	60a2      	str	r2, [r4, #8]
74004f84:	f8c4 c010 	str.w	ip, [r4, #16]
74004f88:	6020      	str	r0, [r4, #0]
74004f8a:	f8c4 9014 	str.w	r9, [r4, #20]
74004f8e:	e71a      	b.n	74004dc6 <__sfvwrite_r+0x66>
74004f90:	4652      	mov	r2, sl
74004f92:	4649      	mov	r1, r9
74004f94:	4656      	mov	r6, sl
74004f96:	f8cd c004 	str.w	ip, [sp, #4]
74004f9a:	f000 fd57 	bl	74005a4c <memmove>
74004f9e:	68a2      	ldr	r2, [r4, #8]
74004fa0:	6823      	ldr	r3, [r4, #0]
74004fa2:	ebbb 0b06 	subs.w	fp, fp, r6
74004fa6:	ebca 0202 	rsb	r2, sl, r2
74004faa:	f8dd c004 	ldr.w	ip, [sp, #4]
74004fae:	4453      	add	r3, sl
74004fb0:	60a2      	str	r2, [r4, #8]
74004fb2:	6023      	str	r3, [r4, #0]
74004fb4:	f47f af7a 	bne.w	74004eac <__sfvwrite_r+0x14c>
74004fb8:	9803      	ldr	r0, [sp, #12]
74004fba:	4621      	mov	r1, r4
74004fbc:	f7ff fbfc 	bl	740047b8 <_fflush_r>
74004fc0:	bb08      	cbnz	r0, 74005006 <__sfvwrite_r+0x2a6>
74004fc2:	46dc      	mov	ip, fp
74004fc4:	e772      	b.n	74004eac <__sfvwrite_r+0x14c>
74004fc6:	4648      	mov	r0, r9
74004fc8:	210a      	movs	r1, #10
74004fca:	463a      	mov	r2, r7
74004fcc:	f000 fc3c 	bl	74005848 <memchr>
74004fd0:	2800      	cmp	r0, #0
74004fd2:	d04b      	beq.n	7400506c <__sfvwrite_r+0x30c>
74004fd4:	f100 0b01 	add.w	fp, r0, #1
74004fd8:	f04f 0c01 	mov.w	ip, #1
74004fdc:	ebc9 0b0b 	rsb	fp, r9, fp
74004fe0:	e73c      	b.n	74004e5c <__sfvwrite_r+0xfc>
74004fe2:	4649      	mov	r1, r9
74004fe4:	4632      	mov	r2, r6
74004fe6:	f8cd c004 	str.w	ip, [sp, #4]
74004fea:	f000 fd2f 	bl	74005a4c <memmove>
74004fee:	6823      	ldr	r3, [r4, #0]
74004ff0:	4621      	mov	r1, r4
74004ff2:	9803      	ldr	r0, [sp, #12]
74004ff4:	199b      	adds	r3, r3, r6
74004ff6:	6023      	str	r3, [r4, #0]
74004ff8:	f7ff fbde 	bl	740047b8 <_fflush_r>
74004ffc:	f8dd c004 	ldr.w	ip, [sp, #4]
74005000:	2800      	cmp	r0, #0
74005002:	f43f af4f 	beq.w	74004ea4 <__sfvwrite_r+0x144>
74005006:	89a3      	ldrh	r3, [r4, #12]
74005008:	f04f 30ff 	mov.w	r0, #4294967295
7400500c:	f043 0340 	orr.w	r3, r3, #64	; 0x40
74005010:	81a3      	strh	r3, [r4, #12]
74005012:	e714      	b.n	74004e3e <__sfvwrite_r+0xde>
74005014:	4632      	mov	r2, r6
74005016:	4651      	mov	r1, sl
74005018:	f000 fd18 	bl	74005a4c <memmove>
7400501c:	68a2      	ldr	r2, [r4, #8]
7400501e:	6823      	ldr	r3, [r4, #0]
74005020:	4637      	mov	r7, r6
74005022:	1b92      	subs	r2, r2, r6
74005024:	46b1      	mov	r9, r6
74005026:	199b      	adds	r3, r3, r6
74005028:	60a2      	str	r2, [r4, #8]
7400502a:	6023      	str	r3, [r4, #0]
7400502c:	e6d7      	b.n	74004dde <__sfvwrite_r+0x7e>
7400502e:	4651      	mov	r1, sl
74005030:	463a      	mov	r2, r7
74005032:	f000 fd0b 	bl	74005a4c <memmove>
74005036:	6823      	ldr	r3, [r4, #0]
74005038:	9803      	ldr	r0, [sp, #12]
7400503a:	4621      	mov	r1, r4
7400503c:	19db      	adds	r3, r3, r7
7400503e:	6023      	str	r3, [r4, #0]
74005040:	f7ff fbba 	bl	740047b8 <_fflush_r>
74005044:	2800      	cmp	r0, #0
74005046:	f43f aeca 	beq.w	74004dde <__sfvwrite_r+0x7e>
7400504a:	e7dc      	b.n	74005006 <__sfvwrite_r+0x2a6>
7400504c:	9803      	ldr	r0, [sp, #12]
7400504e:	9302      	str	r3, [sp, #8]
74005050:	f001 fa72 	bl	74006538 <_realloc_r>
74005054:	9b02      	ldr	r3, [sp, #8]
74005056:	4684      	mov	ip, r0
74005058:	2800      	cmp	r0, #0
7400505a:	d18c      	bne.n	74004f76 <__sfvwrite_r+0x216>
7400505c:	6921      	ldr	r1, [r4, #16]
7400505e:	9803      	ldr	r0, [sp, #12]
74005060:	f7ff fd9e 	bl	74004ba0 <_free_r>
74005064:	9903      	ldr	r1, [sp, #12]
74005066:	230c      	movs	r3, #12
74005068:	600b      	str	r3, [r1, #0]
7400506a:	e7cc      	b.n	74005006 <__sfvwrite_r+0x2a6>
7400506c:	f107 0b01 	add.w	fp, r7, #1
74005070:	f04f 0c01 	mov.w	ip, #1
74005074:	e6f2      	b.n	74004e5c <__sfvwrite_r+0xfc>
74005076:	9903      	ldr	r1, [sp, #12]
74005078:	2209      	movs	r2, #9
7400507a:	89a3      	ldrh	r3, [r4, #12]
7400507c:	f04f 30ff 	mov.w	r0, #4294967295
74005080:	f043 0340 	orr.w	r3, r3, #64	; 0x40
74005084:	600a      	str	r2, [r1, #0]
74005086:	81a3      	strh	r3, [r4, #12]
74005088:	e6d9      	b.n	74004e3e <__sfvwrite_r+0xde>
7400508a:	9a03      	ldr	r2, [sp, #12]
7400508c:	230c      	movs	r3, #12
7400508e:	6013      	str	r3, [r2, #0]
74005090:	e7b9      	b.n	74005006 <__sfvwrite_r+0x2a6>
74005092:	bf00      	nop

74005094 <_fwalk_reent>:
74005094:	e92d 45f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
74005098:	4607      	mov	r7, r0
7400509a:	468a      	mov	sl, r1
7400509c:	f7ff fc48 	bl	74004930 <__sfp_lock_acquire>
740050a0:	f117 06d8 	adds.w	r6, r7, #216	; 0xd8
740050a4:	bf08      	it	eq
740050a6:	46b0      	moveq	r8, r6
740050a8:	d018      	beq.n	740050dc <_fwalk_reent+0x48>
740050aa:	f04f 0800 	mov.w	r8, #0
740050ae:	6875      	ldr	r5, [r6, #4]
740050b0:	68b4      	ldr	r4, [r6, #8]
740050b2:	3d01      	subs	r5, #1
740050b4:	d40f      	bmi.n	740050d6 <_fwalk_reent+0x42>
740050b6:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
740050ba:	b14b      	cbz	r3, 740050d0 <_fwalk_reent+0x3c>
740050bc:	f9b4 300e 	ldrsh.w	r3, [r4, #14]
740050c0:	4621      	mov	r1, r4
740050c2:	4638      	mov	r0, r7
740050c4:	f1b3 3fff 	cmp.w	r3, #4294967295
740050c8:	d002      	beq.n	740050d0 <_fwalk_reent+0x3c>
740050ca:	47d0      	blx	sl
740050cc:	ea48 0800 	orr.w	r8, r8, r0
740050d0:	3468      	adds	r4, #104	; 0x68
740050d2:	3d01      	subs	r5, #1
740050d4:	d5ef      	bpl.n	740050b6 <_fwalk_reent+0x22>
740050d6:	6836      	ldr	r6, [r6, #0]
740050d8:	2e00      	cmp	r6, #0
740050da:	d1e8      	bne.n	740050ae <_fwalk_reent+0x1a>
740050dc:	f7ff fc2a 	bl	74004934 <__sfp_lock_release>
740050e0:	4640      	mov	r0, r8
740050e2:	e8bd 85f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
740050e6:	bf00      	nop

740050e8 <_fwalk>:
740050e8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
740050ec:	4606      	mov	r6, r0
740050ee:	4688      	mov	r8, r1
740050f0:	f7ff fc1e 	bl	74004930 <__sfp_lock_acquire>
740050f4:	36d8      	adds	r6, #216	; 0xd8
740050f6:	bf08      	it	eq
740050f8:	4637      	moveq	r7, r6
740050fa:	d015      	beq.n	74005128 <_fwalk+0x40>
740050fc:	2700      	movs	r7, #0
740050fe:	6875      	ldr	r5, [r6, #4]
74005100:	68b4      	ldr	r4, [r6, #8]
74005102:	3d01      	subs	r5, #1
74005104:	d40d      	bmi.n	74005122 <_fwalk+0x3a>
74005106:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
7400510a:	b13b      	cbz	r3, 7400511c <_fwalk+0x34>
7400510c:	f9b4 300e 	ldrsh.w	r3, [r4, #14]
74005110:	4620      	mov	r0, r4
74005112:	f1b3 3fff 	cmp.w	r3, #4294967295
74005116:	d001      	beq.n	7400511c <_fwalk+0x34>
74005118:	47c0      	blx	r8
7400511a:	4307      	orrs	r7, r0
7400511c:	3468      	adds	r4, #104	; 0x68
7400511e:	3d01      	subs	r5, #1
74005120:	d5f1      	bpl.n	74005106 <_fwalk+0x1e>
74005122:	6836      	ldr	r6, [r6, #0]
74005124:	2e00      	cmp	r6, #0
74005126:	d1ea      	bne.n	740050fe <_fwalk+0x16>
74005128:	f7ff fc04 	bl	74004934 <__sfp_lock_release>
7400512c:	4638      	mov	r0, r7
7400512e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
74005132:	bf00      	nop

74005134 <__locale_charset>:
74005134:	f248 336c 	movw	r3, #33644	; 0x836c
74005138:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400513c:	6818      	ldr	r0, [r3, #0]
7400513e:	4770      	bx	lr

74005140 <_localeconv_r>:
74005140:	4800      	ldr	r0, [pc, #0]	; (74005144 <_localeconv_r+0x4>)
74005142:	4770      	bx	lr
74005144:	74008370 	.word	0x74008370

74005148 <localeconv>:
74005148:	4800      	ldr	r0, [pc, #0]	; (7400514c <localeconv+0x4>)
7400514a:	4770      	bx	lr
7400514c:	74008370 	.word	0x74008370

74005150 <_setlocale_r>:
74005150:	b570      	push	{r4, r5, r6, lr}
74005152:	4605      	mov	r5, r0
74005154:	460e      	mov	r6, r1
74005156:	4614      	mov	r4, r2
74005158:	b172      	cbz	r2, 74005178 <_setlocale_r+0x28>
7400515a:	f248 2194 	movw	r1, #33428	; 0x8294
7400515e:	4610      	mov	r0, r2
74005160:	f2c7 4100 	movt	r1, #29696	; 0x7400
74005164:	f001 fc3e 	bl	740069e4 <strcmp>
74005168:	b958      	cbnz	r0, 74005182 <_setlocale_r+0x32>
7400516a:	f248 2094 	movw	r0, #33428	; 0x8294
7400516e:	622c      	str	r4, [r5, #32]
74005170:	f2c7 4000 	movt	r0, #29696	; 0x7400
74005174:	61ee      	str	r6, [r5, #28]
74005176:	bd70      	pop	{r4, r5, r6, pc}
74005178:	f248 2094 	movw	r0, #33428	; 0x8294
7400517c:	f2c7 4000 	movt	r0, #29696	; 0x7400
74005180:	bd70      	pop	{r4, r5, r6, pc}
74005182:	f248 21c8 	movw	r1, #33480	; 0x82c8
74005186:	4620      	mov	r0, r4
74005188:	f2c7 4100 	movt	r1, #29696	; 0x7400
7400518c:	f001 fc2a 	bl	740069e4 <strcmp>
74005190:	2800      	cmp	r0, #0
74005192:	d0ea      	beq.n	7400516a <_setlocale_r+0x1a>
74005194:	2000      	movs	r0, #0
74005196:	bd70      	pop	{r4, r5, r6, pc}

74005198 <setlocale>:
74005198:	f240 033c 	movw	r3, #60	; 0x3c
7400519c:	460a      	mov	r2, r1
7400519e:	f2c7 0300 	movt	r3, #28672	; 0x7000
740051a2:	4601      	mov	r1, r0
740051a4:	6818      	ldr	r0, [r3, #0]
740051a6:	e7d3      	b.n	74005150 <_setlocale_r>

740051a8 <__smakebuf_r>:
740051a8:	898b      	ldrh	r3, [r1, #12]
740051aa:	b5f0      	push	{r4, r5, r6, r7, lr}
740051ac:	460c      	mov	r4, r1
740051ae:	b29a      	uxth	r2, r3
740051b0:	b091      	sub	sp, #68	; 0x44
740051b2:	f012 0f02 	tst.w	r2, #2
740051b6:	4605      	mov	r5, r0
740051b8:	d141      	bne.n	7400523e <__smakebuf_r+0x96>
740051ba:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
740051be:	2900      	cmp	r1, #0
740051c0:	db18      	blt.n	740051f4 <__smakebuf_r+0x4c>
740051c2:	aa01      	add	r2, sp, #4
740051c4:	f001 fdd4 	bl	74006d70 <_fstat_r>
740051c8:	2800      	cmp	r0, #0
740051ca:	db11      	blt.n	740051f0 <__smakebuf_r+0x48>
740051cc:	9b02      	ldr	r3, [sp, #8]
740051ce:	f403 4370 	and.w	r3, r3, #61440	; 0xf000
740051d2:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
740051d6:	bf14      	ite	ne
740051d8:	2700      	movne	r7, #0
740051da:	2701      	moveq	r7, #1
740051dc:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
740051e0:	d040      	beq.n	74005264 <__smakebuf_r+0xbc>
740051e2:	89a3      	ldrh	r3, [r4, #12]
740051e4:	f44f 6680 	mov.w	r6, #1024	; 0x400
740051e8:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
740051ec:	81a3      	strh	r3, [r4, #12]
740051ee:	e00b      	b.n	74005208 <__smakebuf_r+0x60>
740051f0:	89a3      	ldrh	r3, [r4, #12]
740051f2:	b29a      	uxth	r2, r3
740051f4:	f012 0f80 	tst.w	r2, #128	; 0x80
740051f8:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
740051fc:	bf0c      	ite	eq
740051fe:	f44f 6680 	moveq.w	r6, #1024	; 0x400
74005202:	2640      	movne	r6, #64	; 0x40
74005204:	2700      	movs	r7, #0
74005206:	81a3      	strh	r3, [r4, #12]
74005208:	4628      	mov	r0, r5
7400520a:	4631      	mov	r1, r6
7400520c:	f000 f84a 	bl	740052a4 <_malloc_r>
74005210:	b170      	cbz	r0, 74005230 <__smakebuf_r+0x88>
74005212:	89a1      	ldrh	r1, [r4, #12]
74005214:	f644 1279 	movw	r2, #18809	; 0x4979
74005218:	f2c7 4200 	movt	r2, #29696	; 0x7400
7400521c:	6120      	str	r0, [r4, #16]
7400521e:	f041 0180 	orr.w	r1, r1, #128	; 0x80
74005222:	6166      	str	r6, [r4, #20]
74005224:	62aa      	str	r2, [r5, #40]	; 0x28
74005226:	81a1      	strh	r1, [r4, #12]
74005228:	6020      	str	r0, [r4, #0]
7400522a:	b97f      	cbnz	r7, 7400524c <__smakebuf_r+0xa4>
7400522c:	b011      	add	sp, #68	; 0x44
7400522e:	bdf0      	pop	{r4, r5, r6, r7, pc}
74005230:	89a3      	ldrh	r3, [r4, #12]
74005232:	f413 7f00 	tst.w	r3, #512	; 0x200
74005236:	d1f9      	bne.n	7400522c <__smakebuf_r+0x84>
74005238:	f043 0302 	orr.w	r3, r3, #2
7400523c:	81a3      	strh	r3, [r4, #12]
7400523e:	f104 0347 	add.w	r3, r4, #71	; 0x47
74005242:	6123      	str	r3, [r4, #16]
74005244:	6023      	str	r3, [r4, #0]
74005246:	2301      	movs	r3, #1
74005248:	6163      	str	r3, [r4, #20]
7400524a:	e7ef      	b.n	7400522c <__smakebuf_r+0x84>
7400524c:	4628      	mov	r0, r5
7400524e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
74005252:	f001 fda3 	bl	74006d9c <_isatty_r>
74005256:	2800      	cmp	r0, #0
74005258:	d0e8      	beq.n	7400522c <__smakebuf_r+0x84>
7400525a:	89a3      	ldrh	r3, [r4, #12]
7400525c:	f043 0301 	orr.w	r3, r3, #1
74005260:	81a3      	strh	r3, [r4, #12]
74005262:	e7e3      	b.n	7400522c <__smakebuf_r+0x84>
74005264:	f646 135d 	movw	r3, #26973	; 0x695d
74005268:	6ae2      	ldr	r2, [r4, #44]	; 0x2c
7400526a:	f2c7 4300 	movt	r3, #29696	; 0x7400
7400526e:	429a      	cmp	r2, r3
74005270:	d1b7      	bne.n	740051e2 <__smakebuf_r+0x3a>
74005272:	89a2      	ldrh	r2, [r4, #12]
74005274:	f44f 6380 	mov.w	r3, #1024	; 0x400
74005278:	461e      	mov	r6, r3
7400527a:	6523      	str	r3, [r4, #80]	; 0x50
7400527c:	ea42 0303 	orr.w	r3, r2, r3
74005280:	81a3      	strh	r3, [r4, #12]
74005282:	e7c1      	b.n	74005208 <__smakebuf_r+0x60>

74005284 <free>:
74005284:	f240 033c 	movw	r3, #60	; 0x3c
74005288:	4601      	mov	r1, r0
7400528a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400528e:	6818      	ldr	r0, [r3, #0]
74005290:	f7ff bc86 	b.w	74004ba0 <_free_r>

74005294 <malloc>:
74005294:	f240 033c 	movw	r3, #60	; 0x3c
74005298:	4601      	mov	r1, r0
7400529a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400529e:	6818      	ldr	r0, [r3, #0]
740052a0:	f000 b800 	b.w	740052a4 <_malloc_r>

740052a4 <_malloc_r>:
740052a4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
740052a8:	f101 040b 	add.w	r4, r1, #11
740052ac:	2c16      	cmp	r4, #22
740052ae:	b083      	sub	sp, #12
740052b0:	4606      	mov	r6, r0
740052b2:	d82f      	bhi.n	74005314 <_malloc_r+0x70>
740052b4:	2300      	movs	r3, #0
740052b6:	2410      	movs	r4, #16
740052b8:	428c      	cmp	r4, r1
740052ba:	bf2c      	ite	cs
740052bc:	4619      	movcs	r1, r3
740052be:	f043 0101 	orrcc.w	r1, r3, #1
740052c2:	2900      	cmp	r1, #0
740052c4:	d130      	bne.n	74005328 <_malloc_r+0x84>
740052c6:	4630      	mov	r0, r6
740052c8:	f000 fc86 	bl	74005bd8 <__malloc_lock>
740052cc:	f5b4 7ffc 	cmp.w	r4, #504	; 0x1f8
740052d0:	d22e      	bcs.n	74005330 <_malloc_r+0x8c>
740052d2:	ea4f 0ed4 	mov.w	lr, r4, lsr #3
740052d6:	f240 1540 	movw	r5, #320	; 0x140
740052da:	f2c7 0500 	movt	r5, #28672	; 0x7000
740052de:	eb05 02ce 	add.w	r2, r5, lr, lsl #3
740052e2:	68d3      	ldr	r3, [r2, #12]
740052e4:	4293      	cmp	r3, r2
740052e6:	f000 8206 	beq.w	740056f6 <_malloc_r+0x452>
740052ea:	685a      	ldr	r2, [r3, #4]
740052ec:	f103 0508 	add.w	r5, r3, #8
740052f0:	68d9      	ldr	r1, [r3, #12]
740052f2:	4630      	mov	r0, r6
740052f4:	f022 0c03 	bic.w	ip, r2, #3
740052f8:	689a      	ldr	r2, [r3, #8]
740052fa:	4463      	add	r3, ip
740052fc:	685c      	ldr	r4, [r3, #4]
740052fe:	608a      	str	r2, [r1, #8]
74005300:	f044 0401 	orr.w	r4, r4, #1
74005304:	60d1      	str	r1, [r2, #12]
74005306:	605c      	str	r4, [r3, #4]
74005308:	f000 fc68 	bl	74005bdc <__malloc_unlock>
7400530c:	4628      	mov	r0, r5
7400530e:	b003      	add	sp, #12
74005310:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
74005314:	f024 0407 	bic.w	r4, r4, #7
74005318:	0fe3      	lsrs	r3, r4, #31
7400531a:	428c      	cmp	r4, r1
7400531c:	bf2c      	ite	cs
7400531e:	4619      	movcs	r1, r3
74005320:	f043 0101 	orrcc.w	r1, r3, #1
74005324:	2900      	cmp	r1, #0
74005326:	d0ce      	beq.n	740052c6 <_malloc_r+0x22>
74005328:	230c      	movs	r3, #12
7400532a:	2500      	movs	r5, #0
7400532c:	6033      	str	r3, [r6, #0]
7400532e:	e7ed      	b.n	7400530c <_malloc_r+0x68>
74005330:	ea5f 2e54 	movs.w	lr, r4, lsr #9
74005334:	bf04      	itt	eq
74005336:	ea4f 0ed4 	moveq.w	lr, r4, lsr #3
7400533a:	ea4f 00ce 	moveq.w	r0, lr, lsl #3
7400533e:	f040 8090 	bne.w	74005462 <_malloc_r+0x1be>
74005342:	f240 1540 	movw	r5, #320	; 0x140
74005346:	f2c7 0500 	movt	r5, #28672	; 0x7000
7400534a:	1828      	adds	r0, r5, r0
7400534c:	68c3      	ldr	r3, [r0, #12]
7400534e:	4298      	cmp	r0, r3
74005350:	d106      	bne.n	74005360 <_malloc_r+0xbc>
74005352:	e00d      	b.n	74005370 <_malloc_r+0xcc>
74005354:	2a00      	cmp	r2, #0
74005356:	f280 816f 	bge.w	74005638 <_malloc_r+0x394>
7400535a:	68db      	ldr	r3, [r3, #12]
7400535c:	4298      	cmp	r0, r3
7400535e:	d007      	beq.n	74005370 <_malloc_r+0xcc>
74005360:	6859      	ldr	r1, [r3, #4]
74005362:	f021 0103 	bic.w	r1, r1, #3
74005366:	1b0a      	subs	r2, r1, r4
74005368:	2a0f      	cmp	r2, #15
7400536a:	ddf3      	ble.n	74005354 <_malloc_r+0xb0>
7400536c:	f10e 3eff 	add.w	lr, lr, #4294967295
74005370:	f10e 0e01 	add.w	lr, lr, #1
74005374:	f240 1740 	movw	r7, #320	; 0x140
74005378:	f2c7 0700 	movt	r7, #28672	; 0x7000
7400537c:	f107 0108 	add.w	r1, r7, #8
74005380:	688b      	ldr	r3, [r1, #8]
74005382:	4299      	cmp	r1, r3
74005384:	bf08      	it	eq
74005386:	687a      	ldreq	r2, [r7, #4]
74005388:	d026      	beq.n	740053d8 <_malloc_r+0x134>
7400538a:	685a      	ldr	r2, [r3, #4]
7400538c:	f022 0c03 	bic.w	ip, r2, #3
74005390:	ebc4 020c 	rsb	r2, r4, ip
74005394:	2a0f      	cmp	r2, #15
74005396:	f300 8194 	bgt.w	740056c2 <_malloc_r+0x41e>
7400539a:	2a00      	cmp	r2, #0
7400539c:	60c9      	str	r1, [r1, #12]
7400539e:	6089      	str	r1, [r1, #8]
740053a0:	f280 8099 	bge.w	740054d6 <_malloc_r+0x232>
740053a4:	f5bc 7f00 	cmp.w	ip, #512	; 0x200
740053a8:	f080 8165 	bcs.w	74005676 <_malloc_r+0x3d2>
740053ac:	ea4f 0cdc 	mov.w	ip, ip, lsr #3
740053b0:	f04f 0a01 	mov.w	sl, #1
740053b4:	687a      	ldr	r2, [r7, #4]
740053b6:	eb07 00cc 	add.w	r0, r7, ip, lsl #3
740053ba:	ea4f 0cac 	mov.w	ip, ip, asr #2
740053be:	fa0a fc0c 	lsl.w	ip, sl, ip
740053c2:	60d8      	str	r0, [r3, #12]
740053c4:	f8d0 8008 	ldr.w	r8, [r0, #8]
740053c8:	ea4c 0202 	orr.w	r2, ip, r2
740053cc:	607a      	str	r2, [r7, #4]
740053ce:	f8c3 8008 	str.w	r8, [r3, #8]
740053d2:	f8c8 300c 	str.w	r3, [r8, #12]
740053d6:	6083      	str	r3, [r0, #8]
740053d8:	f04f 0c01 	mov.w	ip, #1
740053dc:	ea4f 03ae 	mov.w	r3, lr, asr #2
740053e0:	fa0c fc03 	lsl.w	ip, ip, r3
740053e4:	4594      	cmp	ip, r2
740053e6:	f200 8082 	bhi.w	740054ee <_malloc_r+0x24a>
740053ea:	ea12 0f0c 	tst.w	r2, ip
740053ee:	d108      	bne.n	74005402 <_malloc_r+0x15e>
740053f0:	f02e 0e03 	bic.w	lr, lr, #3
740053f4:	ea4f 0c4c 	mov.w	ip, ip, lsl #1
740053f8:	f10e 0e04 	add.w	lr, lr, #4
740053fc:	ea12 0f0c 	tst.w	r2, ip
74005400:	d0f8      	beq.n	740053f4 <_malloc_r+0x150>
74005402:	eb07 09ce 	add.w	r9, r7, lr, lsl #3
74005406:	46f2      	mov	sl, lr
74005408:	46c8      	mov	r8, r9
7400540a:	f8d8 300c 	ldr.w	r3, [r8, #12]
7400540e:	4598      	cmp	r8, r3
74005410:	d107      	bne.n	74005422 <_malloc_r+0x17e>
74005412:	e168      	b.n	740056e6 <_malloc_r+0x442>
74005414:	2a00      	cmp	r2, #0
74005416:	f280 8178 	bge.w	7400570a <_malloc_r+0x466>
7400541a:	68db      	ldr	r3, [r3, #12]
7400541c:	4598      	cmp	r8, r3
7400541e:	f000 8162 	beq.w	740056e6 <_malloc_r+0x442>
74005422:	6858      	ldr	r0, [r3, #4]
74005424:	f020 0003 	bic.w	r0, r0, #3
74005428:	1b02      	subs	r2, r0, r4
7400542a:	2a0f      	cmp	r2, #15
7400542c:	ddf2      	ble.n	74005414 <_malloc_r+0x170>
7400542e:	461d      	mov	r5, r3
74005430:	191f      	adds	r7, r3, r4
74005432:	f8d3 c00c 	ldr.w	ip, [r3, #12]
74005436:	f044 0e01 	orr.w	lr, r4, #1
7400543a:	f855 4f08 	ldr.w	r4, [r5, #8]!
7400543e:	4630      	mov	r0, r6
74005440:	50ba      	str	r2, [r7, r2]
74005442:	f042 0201 	orr.w	r2, r2, #1
74005446:	f8c3 e004 	str.w	lr, [r3, #4]
7400544a:	f8cc 4008 	str.w	r4, [ip, #8]
7400544e:	f8c4 c00c 	str.w	ip, [r4, #12]
74005452:	608f      	str	r7, [r1, #8]
74005454:	60cf      	str	r7, [r1, #12]
74005456:	607a      	str	r2, [r7, #4]
74005458:	60b9      	str	r1, [r7, #8]
7400545a:	60f9      	str	r1, [r7, #12]
7400545c:	f000 fbbe 	bl	74005bdc <__malloc_unlock>
74005460:	e754      	b.n	7400530c <_malloc_r+0x68>
74005462:	f1be 0f04 	cmp.w	lr, #4
74005466:	bf9e      	ittt	ls
74005468:	ea4f 1e94 	movls.w	lr, r4, lsr #6
7400546c:	f10e 0e38 	addls.w	lr, lr, #56	; 0x38
74005470:	ea4f 00ce 	movls.w	r0, lr, lsl #3
74005474:	f67f af65 	bls.w	74005342 <_malloc_r+0x9e>
74005478:	f1be 0f14 	cmp.w	lr, #20
7400547c:	bf9c      	itt	ls
7400547e:	f10e 0e5b 	addls.w	lr, lr, #91	; 0x5b
74005482:	ea4f 00ce 	movls.w	r0, lr, lsl #3
74005486:	f67f af5c 	bls.w	74005342 <_malloc_r+0x9e>
7400548a:	f1be 0f54 	cmp.w	lr, #84	; 0x54
7400548e:	bf9e      	ittt	ls
74005490:	ea4f 3e14 	movls.w	lr, r4, lsr #12
74005494:	f10e 0e6e 	addls.w	lr, lr, #110	; 0x6e
74005498:	ea4f 00ce 	movls.w	r0, lr, lsl #3
7400549c:	f67f af51 	bls.w	74005342 <_malloc_r+0x9e>
740054a0:	f5be 7faa 	cmp.w	lr, #340	; 0x154
740054a4:	bf9e      	ittt	ls
740054a6:	ea4f 3ed4 	movls.w	lr, r4, lsr #15
740054aa:	f10e 0e77 	addls.w	lr, lr, #119	; 0x77
740054ae:	ea4f 00ce 	movls.w	r0, lr, lsl #3
740054b2:	f67f af46 	bls.w	74005342 <_malloc_r+0x9e>
740054b6:	f240 5354 	movw	r3, #1364	; 0x554
740054ba:	459e      	cmp	lr, r3
740054bc:	bf95      	itete	ls
740054be:	ea4f 4e94 	movls.w	lr, r4, lsr #18
740054c2:	f44f 707c 	movhi.w	r0, #1008	; 0x3f0
740054c6:	f10e 0e7c 	addls.w	lr, lr, #124	; 0x7c
740054ca:	f04f 0e7e 	movhi.w	lr, #126	; 0x7e
740054ce:	bf98      	it	ls
740054d0:	ea4f 00ce 	movls.w	r0, lr, lsl #3
740054d4:	e735      	b.n	74005342 <_malloc_r+0x9e>
740054d6:	eb03 020c 	add.w	r2, r3, ip
740054da:	f103 0508 	add.w	r5, r3, #8
740054de:	4630      	mov	r0, r6
740054e0:	6853      	ldr	r3, [r2, #4]
740054e2:	f043 0301 	orr.w	r3, r3, #1
740054e6:	6053      	str	r3, [r2, #4]
740054e8:	f000 fb78 	bl	74005bdc <__malloc_unlock>
740054ec:	e70e      	b.n	7400530c <_malloc_r+0x68>
740054ee:	f8d7 8008 	ldr.w	r8, [r7, #8]
740054f2:	f8d8 3004 	ldr.w	r3, [r8, #4]
740054f6:	f023 0903 	bic.w	r9, r3, #3
740054fa:	ebc4 0209 	rsb	r2, r4, r9
740054fe:	454c      	cmp	r4, r9
74005500:	bf94      	ite	ls
74005502:	2300      	movls	r3, #0
74005504:	2301      	movhi	r3, #1
74005506:	2a0f      	cmp	r2, #15
74005508:	bfd8      	it	le
7400550a:	f043 0301 	orrle.w	r3, r3, #1
7400550e:	2b00      	cmp	r3, #0
74005510:	f000 80a1 	beq.w	74005656 <_malloc_r+0x3b2>
74005514:	f240 5b6c 	movw	fp, #1388	; 0x56c
74005518:	f8d5 2408 	ldr.w	r2, [r5, #1032]	; 0x408
7400551c:	f2c7 0b00 	movt	fp, #28672	; 0x7000
74005520:	f8db 3000 	ldr.w	r3, [fp]
74005524:	3310      	adds	r3, #16
74005526:	191b      	adds	r3, r3, r4
74005528:	f1b2 3fff 	cmp.w	r2, #4294967295
7400552c:	d006      	beq.n	7400553c <_malloc_r+0x298>
7400552e:	f503 637e 	add.w	r3, r3, #4064	; 0xfe0
74005532:	331f      	adds	r3, #31
74005534:	f423 637e 	bic.w	r3, r3, #4064	; 0xfe0
74005538:	f023 031f 	bic.w	r3, r3, #31
7400553c:	4619      	mov	r1, r3
7400553e:	4630      	mov	r0, r6
74005540:	9301      	str	r3, [sp, #4]
74005542:	f001 f9f3 	bl	7400692c <_sbrk_r>
74005546:	9b01      	ldr	r3, [sp, #4]
74005548:	f1b0 3fff 	cmp.w	r0, #4294967295
7400554c:	4682      	mov	sl, r0
7400554e:	f000 80f4 	beq.w	7400573a <_malloc_r+0x496>
74005552:	eb08 0109 	add.w	r1, r8, r9
74005556:	4281      	cmp	r1, r0
74005558:	f200 80ec 	bhi.w	74005734 <_malloc_r+0x490>
7400555c:	f8db 2004 	ldr.w	r2, [fp, #4]
74005560:	189a      	adds	r2, r3, r2
74005562:	4551      	cmp	r1, sl
74005564:	f8cb 2004 	str.w	r2, [fp, #4]
74005568:	f000 8145 	beq.w	740057f6 <_malloc_r+0x552>
7400556c:	f8d5 5408 	ldr.w	r5, [r5, #1032]	; 0x408
74005570:	f240 1040 	movw	r0, #320	; 0x140
74005574:	f2c7 0000 	movt	r0, #28672	; 0x7000
74005578:	f1b5 3fff 	cmp.w	r5, #4294967295
7400557c:	bf08      	it	eq
7400557e:	f8c0 a408 	streq.w	sl, [r0, #1032]	; 0x408
74005582:	d003      	beq.n	7400558c <_malloc_r+0x2e8>
74005584:	4452      	add	r2, sl
74005586:	1a51      	subs	r1, r2, r1
74005588:	f8cb 1004 	str.w	r1, [fp, #4]
7400558c:	f01a 0507 	ands.w	r5, sl, #7
74005590:	4630      	mov	r0, r6
74005592:	bf17      	itett	ne
74005594:	f1c5 0508 	rsbne	r5, r5, #8
74005598:	f44f 5580 	moveq.w	r5, #4096	; 0x1000
7400559c:	44aa      	addne	sl, r5
7400559e:	f505 5580 	addne.w	r5, r5, #4096	; 0x1000
740055a2:	4453      	add	r3, sl
740055a4:	051b      	lsls	r3, r3, #20
740055a6:	0d1b      	lsrs	r3, r3, #20
740055a8:	1aed      	subs	r5, r5, r3
740055aa:	4629      	mov	r1, r5
740055ac:	f001 f9be 	bl	7400692c <_sbrk_r>
740055b0:	f1b0 3fff 	cmp.w	r0, #4294967295
740055b4:	f000 812c 	beq.w	74005810 <_malloc_r+0x56c>
740055b8:	ebca 0100 	rsb	r1, sl, r0
740055bc:	1949      	adds	r1, r1, r5
740055be:	f041 0101 	orr.w	r1, r1, #1
740055c2:	f8db 2004 	ldr.w	r2, [fp, #4]
740055c6:	f240 536c 	movw	r3, #1388	; 0x56c
740055ca:	f8c7 a008 	str.w	sl, [r7, #8]
740055ce:	f2c7 0300 	movt	r3, #28672	; 0x7000
740055d2:	18aa      	adds	r2, r5, r2
740055d4:	45b8      	cmp	r8, r7
740055d6:	f8cb 2004 	str.w	r2, [fp, #4]
740055da:	f8ca 1004 	str.w	r1, [sl, #4]
740055de:	d017      	beq.n	74005610 <_malloc_r+0x36c>
740055e0:	f1b9 0f0f 	cmp.w	r9, #15
740055e4:	f240 80df 	bls.w	740057a6 <_malloc_r+0x502>
740055e8:	f1a9 010c 	sub.w	r1, r9, #12
740055ec:	2505      	movs	r5, #5
740055ee:	f021 0107 	bic.w	r1, r1, #7
740055f2:	eb08 0001 	add.w	r0, r8, r1
740055f6:	290f      	cmp	r1, #15
740055f8:	6085      	str	r5, [r0, #8]
740055fa:	6045      	str	r5, [r0, #4]
740055fc:	f8d8 0004 	ldr.w	r0, [r8, #4]
74005600:	f000 0001 	and.w	r0, r0, #1
74005604:	ea41 0000 	orr.w	r0, r1, r0
74005608:	f8c8 0004 	str.w	r0, [r8, #4]
7400560c:	f200 80ac 	bhi.w	74005768 <_malloc_r+0x4c4>
74005610:	46d0      	mov	r8, sl
74005612:	f240 536c 	movw	r3, #1388	; 0x56c
74005616:	f8db 102c 	ldr.w	r1, [fp, #44]	; 0x2c
7400561a:	f2c7 0300 	movt	r3, #28672	; 0x7000
7400561e:	428a      	cmp	r2, r1
74005620:	f8db 1030 	ldr.w	r1, [fp, #48]	; 0x30
74005624:	bf88      	it	hi
74005626:	62da      	strhi	r2, [r3, #44]	; 0x2c
74005628:	f240 536c 	movw	r3, #1388	; 0x56c
7400562c:	f2c7 0300 	movt	r3, #28672	; 0x7000
74005630:	428a      	cmp	r2, r1
74005632:	bf88      	it	hi
74005634:	631a      	strhi	r2, [r3, #48]	; 0x30
74005636:	e082      	b.n	7400573e <_malloc_r+0x49a>
74005638:	185c      	adds	r4, r3, r1
7400563a:	689a      	ldr	r2, [r3, #8]
7400563c:	68d9      	ldr	r1, [r3, #12]
7400563e:	4630      	mov	r0, r6
74005640:	6866      	ldr	r6, [r4, #4]
74005642:	f103 0508 	add.w	r5, r3, #8
74005646:	608a      	str	r2, [r1, #8]
74005648:	f046 0301 	orr.w	r3, r6, #1
7400564c:	60d1      	str	r1, [r2, #12]
7400564e:	6063      	str	r3, [r4, #4]
74005650:	f000 fac4 	bl	74005bdc <__malloc_unlock>
74005654:	e65a      	b.n	7400530c <_malloc_r+0x68>
74005656:	eb08 0304 	add.w	r3, r8, r4
7400565a:	f042 0201 	orr.w	r2, r2, #1
7400565e:	f044 0401 	orr.w	r4, r4, #1
74005662:	4630      	mov	r0, r6
74005664:	f8c8 4004 	str.w	r4, [r8, #4]
74005668:	f108 0508 	add.w	r5, r8, #8
7400566c:	605a      	str	r2, [r3, #4]
7400566e:	60bb      	str	r3, [r7, #8]
74005670:	f000 fab4 	bl	74005bdc <__malloc_unlock>
74005674:	e64a      	b.n	7400530c <_malloc_r+0x68>
74005676:	ea4f 225c 	mov.w	r2, ip, lsr #9
7400567a:	2a04      	cmp	r2, #4
7400567c:	d954      	bls.n	74005728 <_malloc_r+0x484>
7400567e:	2a14      	cmp	r2, #20
74005680:	f200 8089 	bhi.w	74005796 <_malloc_r+0x4f2>
74005684:	325b      	adds	r2, #91	; 0x5b
74005686:	ea4f 08c2 	mov.w	r8, r2, lsl #3
7400568a:	44a8      	add	r8, r5
7400568c:	f240 1740 	movw	r7, #320	; 0x140
74005690:	f2c7 0700 	movt	r7, #28672	; 0x7000
74005694:	f8d8 0008 	ldr.w	r0, [r8, #8]
74005698:	4540      	cmp	r0, r8
7400569a:	d103      	bne.n	740056a4 <_malloc_r+0x400>
7400569c:	e06f      	b.n	7400577e <_malloc_r+0x4da>
7400569e:	6880      	ldr	r0, [r0, #8]
740056a0:	4580      	cmp	r8, r0
740056a2:	d004      	beq.n	740056ae <_malloc_r+0x40a>
740056a4:	6842      	ldr	r2, [r0, #4]
740056a6:	f022 0203 	bic.w	r2, r2, #3
740056aa:	4594      	cmp	ip, r2
740056ac:	d3f7      	bcc.n	7400569e <_malloc_r+0x3fa>
740056ae:	f8d0 c00c 	ldr.w	ip, [r0, #12]
740056b2:	f8c3 c00c 	str.w	ip, [r3, #12]
740056b6:	6098      	str	r0, [r3, #8]
740056b8:	687a      	ldr	r2, [r7, #4]
740056ba:	60c3      	str	r3, [r0, #12]
740056bc:	f8cc 3008 	str.w	r3, [ip, #8]
740056c0:	e68a      	b.n	740053d8 <_malloc_r+0x134>
740056c2:	191f      	adds	r7, r3, r4
740056c4:	4630      	mov	r0, r6
740056c6:	f044 0401 	orr.w	r4, r4, #1
740056ca:	60cf      	str	r7, [r1, #12]
740056cc:	605c      	str	r4, [r3, #4]
740056ce:	f103 0508 	add.w	r5, r3, #8
740056d2:	50ba      	str	r2, [r7, r2]
740056d4:	f042 0201 	orr.w	r2, r2, #1
740056d8:	608f      	str	r7, [r1, #8]
740056da:	607a      	str	r2, [r7, #4]
740056dc:	60b9      	str	r1, [r7, #8]
740056de:	60f9      	str	r1, [r7, #12]
740056e0:	f000 fa7c 	bl	74005bdc <__malloc_unlock>
740056e4:	e612      	b.n	7400530c <_malloc_r+0x68>
740056e6:	f10a 0a01 	add.w	sl, sl, #1
740056ea:	f01a 0f03 	tst.w	sl, #3
740056ee:	d05f      	beq.n	740057b0 <_malloc_r+0x50c>
740056f0:	f103 0808 	add.w	r8, r3, #8
740056f4:	e689      	b.n	7400540a <_malloc_r+0x166>
740056f6:	f103 0208 	add.w	r2, r3, #8
740056fa:	68d3      	ldr	r3, [r2, #12]
740056fc:	429a      	cmp	r2, r3
740056fe:	bf08      	it	eq
74005700:	f10e 0e02 	addeq.w	lr, lr, #2
74005704:	f43f ae36 	beq.w	74005374 <_malloc_r+0xd0>
74005708:	e5ef      	b.n	740052ea <_malloc_r+0x46>
7400570a:	461d      	mov	r5, r3
7400570c:	1819      	adds	r1, r3, r0
7400570e:	68da      	ldr	r2, [r3, #12]
74005710:	4630      	mov	r0, r6
74005712:	f855 3f08 	ldr.w	r3, [r5, #8]!
74005716:	684c      	ldr	r4, [r1, #4]
74005718:	6093      	str	r3, [r2, #8]
7400571a:	f044 0401 	orr.w	r4, r4, #1
7400571e:	60da      	str	r2, [r3, #12]
74005720:	604c      	str	r4, [r1, #4]
74005722:	f000 fa5b 	bl	74005bdc <__malloc_unlock>
74005726:	e5f1      	b.n	7400530c <_malloc_r+0x68>
74005728:	ea4f 129c 	mov.w	r2, ip, lsr #6
7400572c:	3238      	adds	r2, #56	; 0x38
7400572e:	ea4f 08c2 	mov.w	r8, r2, lsl #3
74005732:	e7aa      	b.n	7400568a <_malloc_r+0x3e6>
74005734:	45b8      	cmp	r8, r7
74005736:	f43f af11 	beq.w	7400555c <_malloc_r+0x2b8>
7400573a:	f8d7 8008 	ldr.w	r8, [r7, #8]
7400573e:	f8d8 2004 	ldr.w	r2, [r8, #4]
74005742:	f022 0203 	bic.w	r2, r2, #3
74005746:	4294      	cmp	r4, r2
74005748:	bf94      	ite	ls
7400574a:	2300      	movls	r3, #0
7400574c:	2301      	movhi	r3, #1
7400574e:	1b12      	subs	r2, r2, r4
74005750:	2a0f      	cmp	r2, #15
74005752:	bfd8      	it	le
74005754:	f043 0301 	orrle.w	r3, r3, #1
74005758:	2b00      	cmp	r3, #0
7400575a:	f43f af7c 	beq.w	74005656 <_malloc_r+0x3b2>
7400575e:	4630      	mov	r0, r6
74005760:	2500      	movs	r5, #0
74005762:	f000 fa3b 	bl	74005bdc <__malloc_unlock>
74005766:	e5d1      	b.n	7400530c <_malloc_r+0x68>
74005768:	f108 0108 	add.w	r1, r8, #8
7400576c:	4630      	mov	r0, r6
7400576e:	9301      	str	r3, [sp, #4]
74005770:	f7ff fa16 	bl	74004ba0 <_free_r>
74005774:	9b01      	ldr	r3, [sp, #4]
74005776:	f8d7 8008 	ldr.w	r8, [r7, #8]
7400577a:	685a      	ldr	r2, [r3, #4]
7400577c:	e749      	b.n	74005612 <_malloc_r+0x36e>
7400577e:	f04f 0a01 	mov.w	sl, #1
74005782:	f8d7 8004 	ldr.w	r8, [r7, #4]
74005786:	1092      	asrs	r2, r2, #2
74005788:	4684      	mov	ip, r0
7400578a:	fa0a f202 	lsl.w	r2, sl, r2
7400578e:	ea48 0202 	orr.w	r2, r8, r2
74005792:	607a      	str	r2, [r7, #4]
74005794:	e78d      	b.n	740056b2 <_malloc_r+0x40e>
74005796:	2a54      	cmp	r2, #84	; 0x54
74005798:	d824      	bhi.n	740057e4 <_malloc_r+0x540>
7400579a:	ea4f 321c 	mov.w	r2, ip, lsr #12
7400579e:	326e      	adds	r2, #110	; 0x6e
740057a0:	ea4f 08c2 	mov.w	r8, r2, lsl #3
740057a4:	e771      	b.n	7400568a <_malloc_r+0x3e6>
740057a6:	2301      	movs	r3, #1
740057a8:	46d0      	mov	r8, sl
740057aa:	f8ca 3004 	str.w	r3, [sl, #4]
740057ae:	e7c6      	b.n	7400573e <_malloc_r+0x49a>
740057b0:	464a      	mov	r2, r9
740057b2:	f01e 0f03 	tst.w	lr, #3
740057b6:	4613      	mov	r3, r2
740057b8:	f10e 3eff 	add.w	lr, lr, #4294967295
740057bc:	d033      	beq.n	74005826 <_malloc_r+0x582>
740057be:	f853 2908 	ldr.w	r2, [r3], #-8
740057c2:	429a      	cmp	r2, r3
740057c4:	d0f5      	beq.n	740057b2 <_malloc_r+0x50e>
740057c6:	687b      	ldr	r3, [r7, #4]
740057c8:	ea4f 0c4c 	mov.w	ip, ip, lsl #1
740057cc:	459c      	cmp	ip, r3
740057ce:	f63f ae8e 	bhi.w	740054ee <_malloc_r+0x24a>
740057d2:	f1bc 0f00 	cmp.w	ip, #0
740057d6:	f43f ae8a 	beq.w	740054ee <_malloc_r+0x24a>
740057da:	ea1c 0f03 	tst.w	ip, r3
740057de:	d027      	beq.n	74005830 <_malloc_r+0x58c>
740057e0:	46d6      	mov	lr, sl
740057e2:	e60e      	b.n	74005402 <_malloc_r+0x15e>
740057e4:	f5b2 7faa 	cmp.w	r2, #340	; 0x154
740057e8:	d815      	bhi.n	74005816 <_malloc_r+0x572>
740057ea:	ea4f 32dc 	mov.w	r2, ip, lsr #15
740057ee:	3277      	adds	r2, #119	; 0x77
740057f0:	ea4f 08c2 	mov.w	r8, r2, lsl #3
740057f4:	e749      	b.n	7400568a <_malloc_r+0x3e6>
740057f6:	0508      	lsls	r0, r1, #20
740057f8:	0d00      	lsrs	r0, r0, #20
740057fa:	2800      	cmp	r0, #0
740057fc:	f47f aeb6 	bne.w	7400556c <_malloc_r+0x2c8>
74005800:	f8d7 8008 	ldr.w	r8, [r7, #8]
74005804:	444b      	add	r3, r9
74005806:	f043 0301 	orr.w	r3, r3, #1
7400580a:	f8c8 3004 	str.w	r3, [r8, #4]
7400580e:	e700      	b.n	74005612 <_malloc_r+0x36e>
74005810:	2101      	movs	r1, #1
74005812:	2500      	movs	r5, #0
74005814:	e6d5      	b.n	740055c2 <_malloc_r+0x31e>
74005816:	f240 5054 	movw	r0, #1364	; 0x554
7400581a:	4282      	cmp	r2, r0
7400581c:	d90d      	bls.n	7400583a <_malloc_r+0x596>
7400581e:	f44f 787c 	mov.w	r8, #1008	; 0x3f0
74005822:	227e      	movs	r2, #126	; 0x7e
74005824:	e731      	b.n	7400568a <_malloc_r+0x3e6>
74005826:	687b      	ldr	r3, [r7, #4]
74005828:	ea23 030c 	bic.w	r3, r3, ip
7400582c:	607b      	str	r3, [r7, #4]
7400582e:	e7cb      	b.n	740057c8 <_malloc_r+0x524>
74005830:	ea4f 0c4c 	mov.w	ip, ip, lsl #1
74005834:	f10a 0a04 	add.w	sl, sl, #4
74005838:	e7cf      	b.n	740057da <_malloc_r+0x536>
7400583a:	ea4f 429c 	mov.w	r2, ip, lsr #18
7400583e:	327c      	adds	r2, #124	; 0x7c
74005840:	ea4f 08c2 	mov.w	r8, r2, lsl #3
74005844:	e721      	b.n	7400568a <_malloc_r+0x3e6>
74005846:	bf00      	nop

74005848 <memchr>:
74005848:	f010 0f03 	tst.w	r0, #3
7400584c:	b2c9      	uxtb	r1, r1
7400584e:	b410      	push	{r4}
74005850:	d010      	beq.n	74005874 <memchr+0x2c>
74005852:	2a00      	cmp	r2, #0
74005854:	d02f      	beq.n	740058b6 <memchr+0x6e>
74005856:	7803      	ldrb	r3, [r0, #0]
74005858:	428b      	cmp	r3, r1
7400585a:	d02a      	beq.n	740058b2 <memchr+0x6a>
7400585c:	3a01      	subs	r2, #1
7400585e:	e005      	b.n	7400586c <memchr+0x24>
74005860:	2a00      	cmp	r2, #0
74005862:	d028      	beq.n	740058b6 <memchr+0x6e>
74005864:	7803      	ldrb	r3, [r0, #0]
74005866:	3a01      	subs	r2, #1
74005868:	428b      	cmp	r3, r1
7400586a:	d022      	beq.n	740058b2 <memchr+0x6a>
7400586c:	3001      	adds	r0, #1
7400586e:	f010 0f03 	tst.w	r0, #3
74005872:	d1f5      	bne.n	74005860 <memchr+0x18>
74005874:	2a03      	cmp	r2, #3
74005876:	d911      	bls.n	7400589c <memchr+0x54>
74005878:	ea41 2401 	orr.w	r4, r1, r1, lsl #8
7400587c:	ea44 4404 	orr.w	r4, r4, r4, lsl #16
74005880:	6803      	ldr	r3, [r0, #0]
74005882:	ea84 0303 	eor.w	r3, r4, r3
74005886:	f1a3 3c01 	sub.w	ip, r3, #16843009	; 0x1010101
7400588a:	ea2c 0303 	bic.w	r3, ip, r3
7400588e:	f013 3f80 	tst.w	r3, #2155905152	; 0x80808080
74005892:	d103      	bne.n	7400589c <memchr+0x54>
74005894:	3a04      	subs	r2, #4
74005896:	3004      	adds	r0, #4
74005898:	2a03      	cmp	r2, #3
7400589a:	d8f1      	bhi.n	74005880 <memchr+0x38>
7400589c:	b15a      	cbz	r2, 740058b6 <memchr+0x6e>
7400589e:	7803      	ldrb	r3, [r0, #0]
740058a0:	428b      	cmp	r3, r1
740058a2:	d006      	beq.n	740058b2 <memchr+0x6a>
740058a4:	3a01      	subs	r2, #1
740058a6:	b132      	cbz	r2, 740058b6 <memchr+0x6e>
740058a8:	f810 3f01 	ldrb.w	r3, [r0, #1]!
740058ac:	3a01      	subs	r2, #1
740058ae:	428b      	cmp	r3, r1
740058b0:	d1f9      	bne.n	740058a6 <memchr+0x5e>
740058b2:	bc10      	pop	{r4}
740058b4:	4770      	bx	lr
740058b6:	2000      	movs	r0, #0
740058b8:	e7fb      	b.n	740058b2 <memchr+0x6a>
740058ba:	bf00      	nop

740058bc <memcpy>:
740058bc:	2a03      	cmp	r2, #3
740058be:	e92d 07f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl}
740058c2:	d80b      	bhi.n	740058dc <memcpy+0x20>
740058c4:	b13a      	cbz	r2, 740058d6 <memcpy+0x1a>
740058c6:	2300      	movs	r3, #0
740058c8:	f811 c003 	ldrb.w	ip, [r1, r3]
740058cc:	f800 c003 	strb.w	ip, [r0, r3]
740058d0:	3301      	adds	r3, #1
740058d2:	4293      	cmp	r3, r2
740058d4:	d1f8      	bne.n	740058c8 <memcpy+0xc>
740058d6:	e8bd 07f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl}
740058da:	4770      	bx	lr
740058dc:	1882      	adds	r2, r0, r2
740058de:	460c      	mov	r4, r1
740058e0:	4603      	mov	r3, r0
740058e2:	e003      	b.n	740058ec <memcpy+0x30>
740058e4:	f814 1c01 	ldrb.w	r1, [r4, #-1]
740058e8:	f803 1c01 	strb.w	r1, [r3, #-1]
740058ec:	f003 0603 	and.w	r6, r3, #3
740058f0:	4619      	mov	r1, r3
740058f2:	46a4      	mov	ip, r4
740058f4:	3301      	adds	r3, #1
740058f6:	3401      	adds	r4, #1
740058f8:	2e00      	cmp	r6, #0
740058fa:	d1f3      	bne.n	740058e4 <memcpy+0x28>
740058fc:	f01c 0403 	ands.w	r4, ip, #3
74005900:	4663      	mov	r3, ip
74005902:	bf08      	it	eq
74005904:	ebc1 0c02 	rsbeq	ip, r1, r2
74005908:	d068      	beq.n	740059dc <memcpy+0x120>
7400590a:	4265      	negs	r5, r4
7400590c:	f1c4 0a04 	rsb	sl, r4, #4
74005910:	eb0c 0705 	add.w	r7, ip, r5
74005914:	4633      	mov	r3, r6
74005916:	ea4f 0aca 	mov.w	sl, sl, lsl #3
7400591a:	f85c 6005 	ldr.w	r6, [ip, r5]
7400591e:	ea4f 08c4 	mov.w	r8, r4, lsl #3
74005922:	1a55      	subs	r5, r2, r1
74005924:	e008      	b.n	74005938 <memcpy+0x7c>
74005926:	f857 4f04 	ldr.w	r4, [r7, #4]!
7400592a:	4626      	mov	r6, r4
7400592c:	fa04 f40a 	lsl.w	r4, r4, sl
74005930:	ea49 0404 	orr.w	r4, r9, r4
74005934:	50cc      	str	r4, [r1, r3]
74005936:	3304      	adds	r3, #4
74005938:	185c      	adds	r4, r3, r1
7400593a:	2d03      	cmp	r5, #3
7400593c:	fa26 f908 	lsr.w	r9, r6, r8
74005940:	f1a5 0504 	sub.w	r5, r5, #4
74005944:	eb0c 0603 	add.w	r6, ip, r3
74005948:	dced      	bgt.n	74005926 <memcpy+0x6a>
7400594a:	2300      	movs	r3, #0
7400594c:	e002      	b.n	74005954 <memcpy+0x98>
7400594e:	5cf1      	ldrb	r1, [r6, r3]
74005950:	54e1      	strb	r1, [r4, r3]
74005952:	3301      	adds	r3, #1
74005954:	1919      	adds	r1, r3, r4
74005956:	4291      	cmp	r1, r2
74005958:	d3f9      	bcc.n	7400594e <memcpy+0x92>
7400595a:	e7bc      	b.n	740058d6 <memcpy+0x1a>
7400595c:	f853 4c40 	ldr.w	r4, [r3, #-64]
74005960:	f841 4c40 	str.w	r4, [r1, #-64]
74005964:	f853 4c3c 	ldr.w	r4, [r3, #-60]
74005968:	f841 4c3c 	str.w	r4, [r1, #-60]
7400596c:	f853 4c38 	ldr.w	r4, [r3, #-56]
74005970:	f841 4c38 	str.w	r4, [r1, #-56]
74005974:	f853 4c34 	ldr.w	r4, [r3, #-52]
74005978:	f841 4c34 	str.w	r4, [r1, #-52]
7400597c:	f853 4c30 	ldr.w	r4, [r3, #-48]
74005980:	f841 4c30 	str.w	r4, [r1, #-48]
74005984:	f853 4c2c 	ldr.w	r4, [r3, #-44]
74005988:	f841 4c2c 	str.w	r4, [r1, #-44]
7400598c:	f853 4c28 	ldr.w	r4, [r3, #-40]
74005990:	f841 4c28 	str.w	r4, [r1, #-40]
74005994:	f853 4c24 	ldr.w	r4, [r3, #-36]
74005998:	f841 4c24 	str.w	r4, [r1, #-36]
7400599c:	f853 4c20 	ldr.w	r4, [r3, #-32]
740059a0:	f841 4c20 	str.w	r4, [r1, #-32]
740059a4:	f853 4c1c 	ldr.w	r4, [r3, #-28]
740059a8:	f841 4c1c 	str.w	r4, [r1, #-28]
740059ac:	f853 4c18 	ldr.w	r4, [r3, #-24]
740059b0:	f841 4c18 	str.w	r4, [r1, #-24]
740059b4:	f853 4c14 	ldr.w	r4, [r3, #-20]
740059b8:	f841 4c14 	str.w	r4, [r1, #-20]
740059bc:	f853 4c10 	ldr.w	r4, [r3, #-16]
740059c0:	f841 4c10 	str.w	r4, [r1, #-16]
740059c4:	f853 4c0c 	ldr.w	r4, [r3, #-12]
740059c8:	f841 4c0c 	str.w	r4, [r1, #-12]
740059cc:	f853 4c08 	ldr.w	r4, [r3, #-8]
740059d0:	f841 4c08 	str.w	r4, [r1, #-8]
740059d4:	f853 4c04 	ldr.w	r4, [r3, #-4]
740059d8:	f841 4c04 	str.w	r4, [r1, #-4]
740059dc:	461c      	mov	r4, r3
740059de:	460d      	mov	r5, r1
740059e0:	3340      	adds	r3, #64	; 0x40
740059e2:	3140      	adds	r1, #64	; 0x40
740059e4:	f1bc 0f3f 	cmp.w	ip, #63	; 0x3f
740059e8:	f1ac 0c40 	sub.w	ip, ip, #64	; 0x40
740059ec:	dcb6      	bgt.n	7400595c <memcpy+0xa0>
740059ee:	4621      	mov	r1, r4
740059f0:	462b      	mov	r3, r5
740059f2:	1b54      	subs	r4, r2, r5
740059f4:	e00f      	b.n	74005a16 <memcpy+0x15a>
740059f6:	f851 5c10 	ldr.w	r5, [r1, #-16]
740059fa:	f843 5c10 	str.w	r5, [r3, #-16]
740059fe:	f851 5c0c 	ldr.w	r5, [r1, #-12]
74005a02:	f843 5c0c 	str.w	r5, [r3, #-12]
74005a06:	f851 5c08 	ldr.w	r5, [r1, #-8]
74005a0a:	f843 5c08 	str.w	r5, [r3, #-8]
74005a0e:	f851 5c04 	ldr.w	r5, [r1, #-4]
74005a12:	f843 5c04 	str.w	r5, [r3, #-4]
74005a16:	2c0f      	cmp	r4, #15
74005a18:	460d      	mov	r5, r1
74005a1a:	469c      	mov	ip, r3
74005a1c:	f101 0110 	add.w	r1, r1, #16
74005a20:	f103 0310 	add.w	r3, r3, #16
74005a24:	f1a4 0410 	sub.w	r4, r4, #16
74005a28:	dce5      	bgt.n	740059f6 <memcpy+0x13a>
74005a2a:	ebcc 0102 	rsb	r1, ip, r2
74005a2e:	2300      	movs	r3, #0
74005a30:	e003      	b.n	74005a3a <memcpy+0x17e>
74005a32:	58ec      	ldr	r4, [r5, r3]
74005a34:	f84c 4003 	str.w	r4, [ip, r3]
74005a38:	3304      	adds	r3, #4
74005a3a:	195e      	adds	r6, r3, r5
74005a3c:	2903      	cmp	r1, #3
74005a3e:	eb03 040c 	add.w	r4, r3, ip
74005a42:	f1a1 0104 	sub.w	r1, r1, #4
74005a46:	dcf4      	bgt.n	74005a32 <memcpy+0x176>
74005a48:	e77f      	b.n	7400594a <memcpy+0x8e>
74005a4a:	bf00      	nop

74005a4c <memmove>:
74005a4c:	4288      	cmp	r0, r1
74005a4e:	468c      	mov	ip, r1
74005a50:	b470      	push	{r4, r5, r6}
74005a52:	4605      	mov	r5, r0
74005a54:	4614      	mov	r4, r2
74005a56:	d90e      	bls.n	74005a76 <memmove+0x2a>
74005a58:	188b      	adds	r3, r1, r2
74005a5a:	4298      	cmp	r0, r3
74005a5c:	d20b      	bcs.n	74005a76 <memmove+0x2a>
74005a5e:	b142      	cbz	r2, 74005a72 <memmove+0x26>
74005a60:	ebc2 0c03 	rsb	ip, r2, r3
74005a64:	4601      	mov	r1, r0
74005a66:	1e53      	subs	r3, r2, #1
74005a68:	f81c 2003 	ldrb.w	r2, [ip, r3]
74005a6c:	54ca      	strb	r2, [r1, r3]
74005a6e:	3b01      	subs	r3, #1
74005a70:	d2fa      	bcs.n	74005a68 <memmove+0x1c>
74005a72:	bc70      	pop	{r4, r5, r6}
74005a74:	4770      	bx	lr
74005a76:	2a0f      	cmp	r2, #15
74005a78:	d809      	bhi.n	74005a8e <memmove+0x42>
74005a7a:	2c00      	cmp	r4, #0
74005a7c:	d0f9      	beq.n	74005a72 <memmove+0x26>
74005a7e:	2300      	movs	r3, #0
74005a80:	f81c 2003 	ldrb.w	r2, [ip, r3]
74005a84:	54ea      	strb	r2, [r5, r3]
74005a86:	3301      	adds	r3, #1
74005a88:	42a3      	cmp	r3, r4
74005a8a:	d1f9      	bne.n	74005a80 <memmove+0x34>
74005a8c:	e7f1      	b.n	74005a72 <memmove+0x26>
74005a8e:	ea41 0300 	orr.w	r3, r1, r0
74005a92:	f013 0f03 	tst.w	r3, #3
74005a96:	d1f0      	bne.n	74005a7a <memmove+0x2e>
74005a98:	4694      	mov	ip, r2
74005a9a:	460c      	mov	r4, r1
74005a9c:	4603      	mov	r3, r0
74005a9e:	6825      	ldr	r5, [r4, #0]
74005aa0:	f1ac 0c10 	sub.w	ip, ip, #16
74005aa4:	601d      	str	r5, [r3, #0]
74005aa6:	6865      	ldr	r5, [r4, #4]
74005aa8:	605d      	str	r5, [r3, #4]
74005aaa:	68a5      	ldr	r5, [r4, #8]
74005aac:	609d      	str	r5, [r3, #8]
74005aae:	68e5      	ldr	r5, [r4, #12]
74005ab0:	3410      	adds	r4, #16
74005ab2:	60dd      	str	r5, [r3, #12]
74005ab4:	3310      	adds	r3, #16
74005ab6:	f1bc 0f0f 	cmp.w	ip, #15
74005aba:	d8f0      	bhi.n	74005a9e <memmove+0x52>
74005abc:	3a10      	subs	r2, #16
74005abe:	ea4f 1c12 	mov.w	ip, r2, lsr #4
74005ac2:	f10c 0501 	add.w	r5, ip, #1
74005ac6:	ebcc 7c0c 	rsb	ip, ip, ip, lsl #28
74005aca:	012d      	lsls	r5, r5, #4
74005acc:	eb02 160c 	add.w	r6, r2, ip, lsl #4
74005ad0:	eb01 0c05 	add.w	ip, r1, r5
74005ad4:	1945      	adds	r5, r0, r5
74005ad6:	2e03      	cmp	r6, #3
74005ad8:	4634      	mov	r4, r6
74005ada:	d9ce      	bls.n	74005a7a <memmove+0x2e>
74005adc:	2300      	movs	r3, #0
74005ade:	f85c 2003 	ldr.w	r2, [ip, r3]
74005ae2:	50ea      	str	r2, [r5, r3]
74005ae4:	3304      	adds	r3, #4
74005ae6:	1af2      	subs	r2, r6, r3
74005ae8:	2a03      	cmp	r2, #3
74005aea:	d8f8      	bhi.n	74005ade <memmove+0x92>
74005aec:	3e04      	subs	r6, #4
74005aee:	08b3      	lsrs	r3, r6, #2
74005af0:	1c5a      	adds	r2, r3, #1
74005af2:	ebc3 7383 	rsb	r3, r3, r3, lsl #30
74005af6:	0092      	lsls	r2, r2, #2
74005af8:	4494      	add	ip, r2
74005afa:	eb06 0483 	add.w	r4, r6, r3, lsl #2
74005afe:	18ad      	adds	r5, r5, r2
74005b00:	e7bb      	b.n	74005a7a <memmove+0x2e>
74005b02:	bf00      	nop

74005b04 <memset>:
74005b04:	2a03      	cmp	r2, #3
74005b06:	b2c9      	uxtb	r1, r1
74005b08:	b430      	push	{r4, r5}
74005b0a:	d807      	bhi.n	74005b1c <memset+0x18>
74005b0c:	b122      	cbz	r2, 74005b18 <memset+0x14>
74005b0e:	2300      	movs	r3, #0
74005b10:	54c1      	strb	r1, [r0, r3]
74005b12:	3301      	adds	r3, #1
74005b14:	4293      	cmp	r3, r2
74005b16:	d1fb      	bne.n	74005b10 <memset+0xc>
74005b18:	bc30      	pop	{r4, r5}
74005b1a:	4770      	bx	lr
74005b1c:	eb00 0c02 	add.w	ip, r0, r2
74005b20:	4603      	mov	r3, r0
74005b22:	e001      	b.n	74005b28 <memset+0x24>
74005b24:	f803 1c01 	strb.w	r1, [r3, #-1]
74005b28:	f003 0403 	and.w	r4, r3, #3
74005b2c:	461a      	mov	r2, r3
74005b2e:	3301      	adds	r3, #1
74005b30:	2c00      	cmp	r4, #0
74005b32:	d1f7      	bne.n	74005b24 <memset+0x20>
74005b34:	f04f 3301 	mov.w	r3, #16843009	; 0x1010101
74005b38:	ebc2 040c 	rsb	r4, r2, ip
74005b3c:	fb03 f301 	mul.w	r3, r3, r1
74005b40:	e01f      	b.n	74005b82 <memset+0x7e>
74005b42:	f842 3c40 	str.w	r3, [r2, #-64]
74005b46:	f842 3c3c 	str.w	r3, [r2, #-60]
74005b4a:	f842 3c38 	str.w	r3, [r2, #-56]
74005b4e:	f842 3c34 	str.w	r3, [r2, #-52]
74005b52:	f842 3c30 	str.w	r3, [r2, #-48]
74005b56:	f842 3c2c 	str.w	r3, [r2, #-44]
74005b5a:	f842 3c28 	str.w	r3, [r2, #-40]
74005b5e:	f842 3c24 	str.w	r3, [r2, #-36]
74005b62:	f842 3c20 	str.w	r3, [r2, #-32]
74005b66:	f842 3c1c 	str.w	r3, [r2, #-28]
74005b6a:	f842 3c18 	str.w	r3, [r2, #-24]
74005b6e:	f842 3c14 	str.w	r3, [r2, #-20]
74005b72:	f842 3c10 	str.w	r3, [r2, #-16]
74005b76:	f842 3c0c 	str.w	r3, [r2, #-12]
74005b7a:	f842 3c08 	str.w	r3, [r2, #-8]
74005b7e:	f842 3c04 	str.w	r3, [r2, #-4]
74005b82:	4615      	mov	r5, r2
74005b84:	3240      	adds	r2, #64	; 0x40
74005b86:	2c3f      	cmp	r4, #63	; 0x3f
74005b88:	f1a4 0440 	sub.w	r4, r4, #64	; 0x40
74005b8c:	dcd9      	bgt.n	74005b42 <memset+0x3e>
74005b8e:	462a      	mov	r2, r5
74005b90:	ebc5 040c 	rsb	r4, r5, ip
74005b94:	e007      	b.n	74005ba6 <memset+0xa2>
74005b96:	f842 3c10 	str.w	r3, [r2, #-16]
74005b9a:	f842 3c0c 	str.w	r3, [r2, #-12]
74005b9e:	f842 3c08 	str.w	r3, [r2, #-8]
74005ba2:	f842 3c04 	str.w	r3, [r2, #-4]
74005ba6:	4615      	mov	r5, r2
74005ba8:	3210      	adds	r2, #16
74005baa:	2c0f      	cmp	r4, #15
74005bac:	f1a4 0410 	sub.w	r4, r4, #16
74005bb0:	dcf1      	bgt.n	74005b96 <memset+0x92>
74005bb2:	462a      	mov	r2, r5
74005bb4:	ebc5 050c 	rsb	r5, r5, ip
74005bb8:	e001      	b.n	74005bbe <memset+0xba>
74005bba:	f842 3c04 	str.w	r3, [r2, #-4]
74005bbe:	4614      	mov	r4, r2
74005bc0:	3204      	adds	r2, #4
74005bc2:	2d03      	cmp	r5, #3
74005bc4:	f1a5 0504 	sub.w	r5, r5, #4
74005bc8:	dcf7      	bgt.n	74005bba <memset+0xb6>
74005bca:	e001      	b.n	74005bd0 <memset+0xcc>
74005bcc:	f804 1b01 	strb.w	r1, [r4], #1
74005bd0:	4564      	cmp	r4, ip
74005bd2:	d3fb      	bcc.n	74005bcc <memset+0xc8>
74005bd4:	e7a0      	b.n	74005b18 <memset+0x14>
74005bd6:	bf00      	nop

74005bd8 <__malloc_lock>:
74005bd8:	4770      	bx	lr
74005bda:	bf00      	nop

74005bdc <__malloc_unlock>:
74005bdc:	4770      	bx	lr
74005bde:	bf00      	nop

74005be0 <__hi0bits>:
74005be0:	0c02      	lsrs	r2, r0, #16
74005be2:	4603      	mov	r3, r0
74005be4:	0412      	lsls	r2, r2, #16
74005be6:	b1b2      	cbz	r2, 74005c16 <__hi0bits+0x36>
74005be8:	2000      	movs	r0, #0
74005bea:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
74005bee:	d101      	bne.n	74005bf4 <__hi0bits+0x14>
74005bf0:	3008      	adds	r0, #8
74005bf2:	021b      	lsls	r3, r3, #8
74005bf4:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
74005bf8:	d101      	bne.n	74005bfe <__hi0bits+0x1e>
74005bfa:	3004      	adds	r0, #4
74005bfc:	011b      	lsls	r3, r3, #4
74005bfe:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
74005c02:	d101      	bne.n	74005c08 <__hi0bits+0x28>
74005c04:	3002      	adds	r0, #2
74005c06:	009b      	lsls	r3, r3, #2
74005c08:	2b00      	cmp	r3, #0
74005c0a:	db03      	blt.n	74005c14 <__hi0bits+0x34>
74005c0c:	f013 4f80 	tst.w	r3, #1073741824	; 0x40000000
74005c10:	d004      	beq.n	74005c1c <__hi0bits+0x3c>
74005c12:	3001      	adds	r0, #1
74005c14:	4770      	bx	lr
74005c16:	0403      	lsls	r3, r0, #16
74005c18:	2010      	movs	r0, #16
74005c1a:	e7e6      	b.n	74005bea <__hi0bits+0xa>
74005c1c:	2020      	movs	r0, #32
74005c1e:	4770      	bx	lr

74005c20 <__lo0bits>:
74005c20:	6803      	ldr	r3, [r0, #0]
74005c22:	4602      	mov	r2, r0
74005c24:	f013 0007 	ands.w	r0, r3, #7
74005c28:	d009      	beq.n	74005c3e <__lo0bits+0x1e>
74005c2a:	f013 0f01 	tst.w	r3, #1
74005c2e:	d121      	bne.n	74005c74 <__lo0bits+0x54>
74005c30:	f013 0f02 	tst.w	r3, #2
74005c34:	d122      	bne.n	74005c7c <__lo0bits+0x5c>
74005c36:	089b      	lsrs	r3, r3, #2
74005c38:	2002      	movs	r0, #2
74005c3a:	6013      	str	r3, [r2, #0]
74005c3c:	4770      	bx	lr
74005c3e:	b299      	uxth	r1, r3
74005c40:	b909      	cbnz	r1, 74005c46 <__lo0bits+0x26>
74005c42:	0c1b      	lsrs	r3, r3, #16
74005c44:	2010      	movs	r0, #16
74005c46:	f013 0fff 	tst.w	r3, #255	; 0xff
74005c4a:	d101      	bne.n	74005c50 <__lo0bits+0x30>
74005c4c:	3008      	adds	r0, #8
74005c4e:	0a1b      	lsrs	r3, r3, #8
74005c50:	f013 0f0f 	tst.w	r3, #15
74005c54:	d101      	bne.n	74005c5a <__lo0bits+0x3a>
74005c56:	3004      	adds	r0, #4
74005c58:	091b      	lsrs	r3, r3, #4
74005c5a:	f013 0f03 	tst.w	r3, #3
74005c5e:	d101      	bne.n	74005c64 <__lo0bits+0x44>
74005c60:	3002      	adds	r0, #2
74005c62:	089b      	lsrs	r3, r3, #2
74005c64:	f013 0f01 	tst.w	r3, #1
74005c68:	d102      	bne.n	74005c70 <__lo0bits+0x50>
74005c6a:	085b      	lsrs	r3, r3, #1
74005c6c:	d004      	beq.n	74005c78 <__lo0bits+0x58>
74005c6e:	3001      	adds	r0, #1
74005c70:	6013      	str	r3, [r2, #0]
74005c72:	4770      	bx	lr
74005c74:	2000      	movs	r0, #0
74005c76:	4770      	bx	lr
74005c78:	2020      	movs	r0, #32
74005c7a:	4770      	bx	lr
74005c7c:	085b      	lsrs	r3, r3, #1
74005c7e:	2001      	movs	r0, #1
74005c80:	6013      	str	r3, [r2, #0]
74005c82:	4770      	bx	lr

74005c84 <__mcmp>:
74005c84:	4603      	mov	r3, r0
74005c86:	690a      	ldr	r2, [r1, #16]
74005c88:	6900      	ldr	r0, [r0, #16]
74005c8a:	b410      	push	{r4}
74005c8c:	1a80      	subs	r0, r0, r2
74005c8e:	d111      	bne.n	74005cb4 <__mcmp+0x30>
74005c90:	3204      	adds	r2, #4
74005c92:	f103 0c14 	add.w	ip, r3, #20
74005c96:	0092      	lsls	r2, r2, #2
74005c98:	189b      	adds	r3, r3, r2
74005c9a:	1889      	adds	r1, r1, r2
74005c9c:	3104      	adds	r1, #4
74005c9e:	3304      	adds	r3, #4
74005ca0:	f853 4c04 	ldr.w	r4, [r3, #-4]
74005ca4:	3b04      	subs	r3, #4
74005ca6:	f851 2c04 	ldr.w	r2, [r1, #-4]
74005caa:	3904      	subs	r1, #4
74005cac:	4294      	cmp	r4, r2
74005cae:	d103      	bne.n	74005cb8 <__mcmp+0x34>
74005cb0:	459c      	cmp	ip, r3
74005cb2:	d3f5      	bcc.n	74005ca0 <__mcmp+0x1c>
74005cb4:	bc10      	pop	{r4}
74005cb6:	4770      	bx	lr
74005cb8:	bf38      	it	cc
74005cba:	f04f 30ff 	movcc.w	r0, #4294967295
74005cbe:	d3f9      	bcc.n	74005cb4 <__mcmp+0x30>
74005cc0:	2001      	movs	r0, #1
74005cc2:	e7f7      	b.n	74005cb4 <__mcmp+0x30>

74005cc4 <__ulp>:
74005cc4:	f240 0300 	movw	r3, #0
74005cc8:	f6c7 73f0 	movt	r3, #32752	; 0x7ff0
74005ccc:	ea01 0303 	and.w	r3, r1, r3
74005cd0:	f1a3 7350 	sub.w	r3, r3, #54525952	; 0x3400000
74005cd4:	2b00      	cmp	r3, #0
74005cd6:	dd02      	ble.n	74005cde <__ulp+0x1a>
74005cd8:	4619      	mov	r1, r3
74005cda:	2000      	movs	r0, #0
74005cdc:	4770      	bx	lr
74005cde:	425b      	negs	r3, r3
74005ce0:	151b      	asrs	r3, r3, #20
74005ce2:	2b13      	cmp	r3, #19
74005ce4:	dd0e      	ble.n	74005d04 <__ulp+0x40>
74005ce6:	3b14      	subs	r3, #20
74005ce8:	2b1e      	cmp	r3, #30
74005cea:	dd03      	ble.n	74005cf4 <__ulp+0x30>
74005cec:	2301      	movs	r3, #1
74005cee:	2100      	movs	r1, #0
74005cf0:	4618      	mov	r0, r3
74005cf2:	4770      	bx	lr
74005cf4:	2201      	movs	r2, #1
74005cf6:	f1c3 031f 	rsb	r3, r3, #31
74005cfa:	2100      	movs	r1, #0
74005cfc:	fa12 f303 	lsls.w	r3, r2, r3
74005d00:	4618      	mov	r0, r3
74005d02:	4770      	bx	lr
74005d04:	f44f 2200 	mov.w	r2, #524288	; 0x80000
74005d08:	2000      	movs	r0, #0
74005d0a:	fa52 f103 	asrs.w	r1, r2, r3
74005d0e:	4770      	bx	lr

74005d10 <__b2d>:
74005d10:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
74005d14:	6904      	ldr	r4, [r0, #16]
74005d16:	f100 0614 	add.w	r6, r0, #20
74005d1a:	460f      	mov	r7, r1
74005d1c:	3404      	adds	r4, #4
74005d1e:	f850 5024 	ldr.w	r5, [r0, r4, lsl #2]
74005d22:	eb00 0484 	add.w	r4, r0, r4, lsl #2
74005d26:	46a0      	mov	r8, r4
74005d28:	4628      	mov	r0, r5
74005d2a:	f7ff ff59 	bl	74005be0 <__hi0bits>
74005d2e:	280a      	cmp	r0, #10
74005d30:	f1c0 0320 	rsb	r3, r0, #32
74005d34:	603b      	str	r3, [r7, #0]
74005d36:	dc14      	bgt.n	74005d62 <__b2d+0x52>
74005d38:	42a6      	cmp	r6, r4
74005d3a:	f1c0 030b 	rsb	r3, r0, #11
74005d3e:	d237      	bcs.n	74005db0 <__b2d+0xa0>
74005d40:	f854 1c04 	ldr.w	r1, [r4, #-4]
74005d44:	40d9      	lsrs	r1, r3
74005d46:	fa25 fc03 	lsr.w	ip, r5, r3
74005d4a:	3015      	adds	r0, #21
74005d4c:	f04c 537e 	orr.w	r3, ip, #1065353216	; 0x3f800000
74005d50:	4085      	lsls	r5, r0
74005d52:	f443 03e0 	orr.w	r3, r3, #7340032	; 0x700000
74005d56:	ea41 0205 	orr.w	r2, r1, r5
74005d5a:	4610      	mov	r0, r2
74005d5c:	4619      	mov	r1, r3
74005d5e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
74005d62:	42a6      	cmp	r6, r4
74005d64:	d320      	bcc.n	74005da8 <__b2d+0x98>
74005d66:	2100      	movs	r1, #0
74005d68:	380b      	subs	r0, #11
74005d6a:	bf02      	ittt	eq
74005d6c:	f045 537e 	orreq.w	r3, r5, #1065353216	; 0x3f800000
74005d70:	460a      	moveq	r2, r1
74005d72:	f443 03e0 	orreq.w	r3, r3, #7340032	; 0x700000
74005d76:	d0f0      	beq.n	74005d5a <__b2d+0x4a>
74005d78:	42b4      	cmp	r4, r6
74005d7a:	f1c0 0320 	rsb	r3, r0, #32
74005d7e:	d919      	bls.n	74005db4 <__b2d+0xa4>
74005d80:	f854 4c04 	ldr.w	r4, [r4, #-4]
74005d84:	40dc      	lsrs	r4, r3
74005d86:	4085      	lsls	r5, r0
74005d88:	fa21 fc03 	lsr.w	ip, r1, r3
74005d8c:	f045 557e 	orr.w	r5, r5, #1065353216	; 0x3f800000
74005d90:	fa11 f000 	lsls.w	r0, r1, r0
74005d94:	f445 05e0 	orr.w	r5, r5, #7340032	; 0x700000
74005d98:	ea44 0200 	orr.w	r2, r4, r0
74005d9c:	ea45 030c 	orr.w	r3, r5, ip
74005da0:	4610      	mov	r0, r2
74005da2:	4619      	mov	r1, r3
74005da4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
74005da8:	f854 1c04 	ldr.w	r1, [r4, #-4]
74005dac:	3c04      	subs	r4, #4
74005dae:	e7db      	b.n	74005d68 <__b2d+0x58>
74005db0:	2100      	movs	r1, #0
74005db2:	e7c8      	b.n	74005d46 <__b2d+0x36>
74005db4:	2400      	movs	r4, #0
74005db6:	e7e6      	b.n	74005d86 <__b2d+0x76>

74005db8 <__ratio>:
74005db8:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
74005dbc:	b083      	sub	sp, #12
74005dbe:	460e      	mov	r6, r1
74005dc0:	a901      	add	r1, sp, #4
74005dc2:	4607      	mov	r7, r0
74005dc4:	f7ff ffa4 	bl	74005d10 <__b2d>
74005dc8:	460d      	mov	r5, r1
74005dca:	4604      	mov	r4, r0
74005dcc:	4669      	mov	r1, sp
74005dce:	4630      	mov	r0, r6
74005dd0:	f7ff ff9e 	bl	74005d10 <__b2d>
74005dd4:	f8dd c004 	ldr.w	ip, [sp, #4]
74005dd8:	46a9      	mov	r9, r5
74005dda:	46a0      	mov	r8, r4
74005ddc:	460b      	mov	r3, r1
74005dde:	4602      	mov	r2, r0
74005de0:	6931      	ldr	r1, [r6, #16]
74005de2:	4616      	mov	r6, r2
74005de4:	6938      	ldr	r0, [r7, #16]
74005de6:	461f      	mov	r7, r3
74005de8:	1a40      	subs	r0, r0, r1
74005dea:	9900      	ldr	r1, [sp, #0]
74005dec:	ebc1 010c 	rsb	r1, r1, ip
74005df0:	eb01 1140 	add.w	r1, r1, r0, lsl #5
74005df4:	2900      	cmp	r1, #0
74005df6:	bfc9      	itett	gt
74005df8:	eb05 5901 	addgt.w	r9, r5, r1, lsl #20
74005dfc:	eba3 5701 	suble.w	r7, r3, r1, lsl #20
74005e00:	4624      	movgt	r4, r4
74005e02:	464d      	movgt	r5, r9
74005e04:	bfdc      	itt	le
74005e06:	4612      	movle	r2, r2
74005e08:	463b      	movle	r3, r7
74005e0a:	4620      	mov	r0, r4
74005e0c:	4629      	mov	r1, r5
74005e0e:	f001 fcab 	bl	74007768 <__aeabi_ddiv>
74005e12:	b003      	add	sp, #12
74005e14:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

74005e18 <_mprec_log10>:
74005e18:	2817      	cmp	r0, #23
74005e1a:	b510      	push	{r4, lr}
74005e1c:	4604      	mov	r4, r0
74005e1e:	dd0e      	ble.n	74005e3e <_mprec_log10+0x26>
74005e20:	f240 0100 	movw	r1, #0
74005e24:	2000      	movs	r0, #0
74005e26:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
74005e2a:	f240 0300 	movw	r3, #0
74005e2e:	2200      	movs	r2, #0
74005e30:	f2c4 0324 	movt	r3, #16420	; 0x4024
74005e34:	f001 fb6e 	bl	74007514 <__aeabi_dmul>
74005e38:	3c01      	subs	r4, #1
74005e3a:	d1f6      	bne.n	74005e2a <_mprec_log10+0x12>
74005e3c:	bd10      	pop	{r4, pc}
74005e3e:	f248 33b0 	movw	r3, #33712	; 0x83b0
74005e42:	f2c7 4300 	movt	r3, #29696	; 0x7400
74005e46:	eb03 03c0 	add.w	r3, r3, r0, lsl #3
74005e4a:	e9d3 0100 	ldrd	r0, r1, [r3]
74005e4e:	bd10      	pop	{r4, pc}

74005e50 <__copybits>:
74005e50:	6913      	ldr	r3, [r2, #16]
74005e52:	3901      	subs	r1, #1
74005e54:	f102 0c14 	add.w	ip, r2, #20
74005e58:	b410      	push	{r4}
74005e5a:	eb02 0283 	add.w	r2, r2, r3, lsl #2
74005e5e:	114c      	asrs	r4, r1, #5
74005e60:	3214      	adds	r2, #20
74005e62:	3401      	adds	r4, #1
74005e64:	4594      	cmp	ip, r2
74005e66:	eb00 0484 	add.w	r4, r0, r4, lsl #2
74005e6a:	d20f      	bcs.n	74005e8c <__copybits+0x3c>
74005e6c:	2300      	movs	r3, #0
74005e6e:	f85c 1003 	ldr.w	r1, [ip, r3]
74005e72:	50c1      	str	r1, [r0, r3]
74005e74:	3304      	adds	r3, #4
74005e76:	eb03 010c 	add.w	r1, r3, ip
74005e7a:	428a      	cmp	r2, r1
74005e7c:	d8f7      	bhi.n	74005e6e <__copybits+0x1e>
74005e7e:	ea6f 0c0c 	mvn.w	ip, ip
74005e82:	4462      	add	r2, ip
74005e84:	f022 0203 	bic.w	r2, r2, #3
74005e88:	3204      	adds	r2, #4
74005e8a:	1880      	adds	r0, r0, r2
74005e8c:	4284      	cmp	r4, r0
74005e8e:	d904      	bls.n	74005e9a <__copybits+0x4a>
74005e90:	2300      	movs	r3, #0
74005e92:	f840 3b04 	str.w	r3, [r0], #4
74005e96:	4284      	cmp	r4, r0
74005e98:	d8fb      	bhi.n	74005e92 <__copybits+0x42>
74005e9a:	bc10      	pop	{r4}
74005e9c:	4770      	bx	lr
74005e9e:	bf00      	nop

74005ea0 <__any_on>:
74005ea0:	6902      	ldr	r2, [r0, #16]
74005ea2:	114b      	asrs	r3, r1, #5
74005ea4:	429a      	cmp	r2, r3
74005ea6:	db10      	blt.n	74005eca <__any_on+0x2a>
74005ea8:	dd0e      	ble.n	74005ec8 <__any_on+0x28>
74005eaa:	f011 011f 	ands.w	r1, r1, #31
74005eae:	d00b      	beq.n	74005ec8 <__any_on+0x28>
74005eb0:	461a      	mov	r2, r3
74005eb2:	eb00 0383 	add.w	r3, r0, r3, lsl #2
74005eb6:	695b      	ldr	r3, [r3, #20]
74005eb8:	fa23 fc01 	lsr.w	ip, r3, r1
74005ebc:	fa0c f101 	lsl.w	r1, ip, r1
74005ec0:	4299      	cmp	r1, r3
74005ec2:	d002      	beq.n	74005eca <__any_on+0x2a>
74005ec4:	2001      	movs	r0, #1
74005ec6:	4770      	bx	lr
74005ec8:	461a      	mov	r2, r3
74005eca:	3204      	adds	r2, #4
74005ecc:	f100 0114 	add.w	r1, r0, #20
74005ed0:	eb00 0382 	add.w	r3, r0, r2, lsl #2
74005ed4:	f103 0c04 	add.w	ip, r3, #4
74005ed8:	4561      	cmp	r1, ip
74005eda:	d20b      	bcs.n	74005ef4 <__any_on+0x54>
74005edc:	f850 2022 	ldr.w	r2, [r0, r2, lsl #2]
74005ee0:	2a00      	cmp	r2, #0
74005ee2:	d1ef      	bne.n	74005ec4 <__any_on+0x24>
74005ee4:	4299      	cmp	r1, r3
74005ee6:	d205      	bcs.n	74005ef4 <__any_on+0x54>
74005ee8:	f853 2d04 	ldr.w	r2, [r3, #-4]!
74005eec:	2a00      	cmp	r2, #0
74005eee:	d1e9      	bne.n	74005ec4 <__any_on+0x24>
74005ef0:	4299      	cmp	r1, r3
74005ef2:	d3f9      	bcc.n	74005ee8 <__any_on+0x48>
74005ef4:	2000      	movs	r0, #0
74005ef6:	4770      	bx	lr

74005ef8 <_Bfree>:
74005ef8:	b530      	push	{r4, r5, lr}
74005efa:	6a45      	ldr	r5, [r0, #36]	; 0x24
74005efc:	b083      	sub	sp, #12
74005efe:	4604      	mov	r4, r0
74005f00:	b155      	cbz	r5, 74005f18 <_Bfree+0x20>
74005f02:	b139      	cbz	r1, 74005f14 <_Bfree+0x1c>
74005f04:	6a63      	ldr	r3, [r4, #36]	; 0x24
74005f06:	684a      	ldr	r2, [r1, #4]
74005f08:	68db      	ldr	r3, [r3, #12]
74005f0a:	f853 0022 	ldr.w	r0, [r3, r2, lsl #2]
74005f0e:	6008      	str	r0, [r1, #0]
74005f10:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
74005f14:	b003      	add	sp, #12
74005f16:	bd30      	pop	{r4, r5, pc}
74005f18:	2010      	movs	r0, #16
74005f1a:	9101      	str	r1, [sp, #4]
74005f1c:	f7ff f9ba 	bl	74005294 <malloc>
74005f20:	9901      	ldr	r1, [sp, #4]
74005f22:	6260      	str	r0, [r4, #36]	; 0x24
74005f24:	60c5      	str	r5, [r0, #12]
74005f26:	6045      	str	r5, [r0, #4]
74005f28:	6085      	str	r5, [r0, #8]
74005f2a:	6005      	str	r5, [r0, #0]
74005f2c:	e7e9      	b.n	74005f02 <_Bfree+0xa>
74005f2e:	bf00      	nop

74005f30 <_Balloc>:
74005f30:	b570      	push	{r4, r5, r6, lr}
74005f32:	6a44      	ldr	r4, [r0, #36]	; 0x24
74005f34:	4606      	mov	r6, r0
74005f36:	460d      	mov	r5, r1
74005f38:	b164      	cbz	r4, 74005f54 <_Balloc+0x24>
74005f3a:	68e2      	ldr	r2, [r4, #12]
74005f3c:	b1a2      	cbz	r2, 74005f68 <_Balloc+0x38>
74005f3e:	f852 3025 	ldr.w	r3, [r2, r5, lsl #2]
74005f42:	b1eb      	cbz	r3, 74005f80 <_Balloc+0x50>
74005f44:	6819      	ldr	r1, [r3, #0]
74005f46:	f842 1025 	str.w	r1, [r2, r5, lsl #2]
74005f4a:	2200      	movs	r2, #0
74005f4c:	60da      	str	r2, [r3, #12]
74005f4e:	611a      	str	r2, [r3, #16]
74005f50:	4618      	mov	r0, r3
74005f52:	bd70      	pop	{r4, r5, r6, pc}
74005f54:	2010      	movs	r0, #16
74005f56:	f7ff f99d 	bl	74005294 <malloc>
74005f5a:	2300      	movs	r3, #0
74005f5c:	4604      	mov	r4, r0
74005f5e:	6270      	str	r0, [r6, #36]	; 0x24
74005f60:	60c3      	str	r3, [r0, #12]
74005f62:	6043      	str	r3, [r0, #4]
74005f64:	6083      	str	r3, [r0, #8]
74005f66:	6003      	str	r3, [r0, #0]
74005f68:	2210      	movs	r2, #16
74005f6a:	4630      	mov	r0, r6
74005f6c:	2104      	movs	r1, #4
74005f6e:	f000 fe57 	bl	74006c20 <_calloc_r>
74005f72:	6a73      	ldr	r3, [r6, #36]	; 0x24
74005f74:	60e0      	str	r0, [r4, #12]
74005f76:	68da      	ldr	r2, [r3, #12]
74005f78:	2a00      	cmp	r2, #0
74005f7a:	d1e0      	bne.n	74005f3e <_Balloc+0xe>
74005f7c:	4613      	mov	r3, r2
74005f7e:	e7e7      	b.n	74005f50 <_Balloc+0x20>
74005f80:	2401      	movs	r4, #1
74005f82:	4630      	mov	r0, r6
74005f84:	4621      	mov	r1, r4
74005f86:	40ac      	lsls	r4, r5
74005f88:	1d62      	adds	r2, r4, #5
74005f8a:	0092      	lsls	r2, r2, #2
74005f8c:	f000 fe48 	bl	74006c20 <_calloc_r>
74005f90:	4603      	mov	r3, r0
74005f92:	2800      	cmp	r0, #0
74005f94:	d0dc      	beq.n	74005f50 <_Balloc+0x20>
74005f96:	6045      	str	r5, [r0, #4]
74005f98:	6084      	str	r4, [r0, #8]
74005f9a:	e7d6      	b.n	74005f4a <_Balloc+0x1a>

74005f9c <__d2b>:
74005f9c:	e92d 45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
74005fa0:	b083      	sub	sp, #12
74005fa2:	2101      	movs	r1, #1
74005fa4:	461d      	mov	r5, r3
74005fa6:	4614      	mov	r4, r2
74005fa8:	9f0a      	ldr	r7, [sp, #40]	; 0x28
74005faa:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
74005fac:	f7ff ffc0 	bl	74005f30 <_Balloc>
74005fb0:	f025 4200 	bic.w	r2, r5, #2147483648	; 0x80000000
74005fb4:	f025 437f 	bic.w	r3, r5, #4278190080	; 0xff000000
74005fb8:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
74005fbc:	4615      	mov	r5, r2
74005fbe:	ea5f 5a12 	movs.w	sl, r2, lsr #20
74005fc2:	9300      	str	r3, [sp, #0]
74005fc4:	bf1c      	itt	ne
74005fc6:	f443 1380 	orrne.w	r3, r3, #1048576	; 0x100000
74005fca:	9300      	strne	r3, [sp, #0]
74005fcc:	4680      	mov	r8, r0
74005fce:	2c00      	cmp	r4, #0
74005fd0:	d023      	beq.n	7400601a <__d2b+0x7e>
74005fd2:	a802      	add	r0, sp, #8
74005fd4:	f840 4d04 	str.w	r4, [r0, #-4]!
74005fd8:	f7ff fe22 	bl	74005c20 <__lo0bits>
74005fdc:	4603      	mov	r3, r0
74005fde:	2800      	cmp	r0, #0
74005fe0:	d137      	bne.n	74006052 <__d2b+0xb6>
74005fe2:	9901      	ldr	r1, [sp, #4]
74005fe4:	9a00      	ldr	r2, [sp, #0]
74005fe6:	f8c8 1014 	str.w	r1, [r8, #20]
74005fea:	2a00      	cmp	r2, #0
74005fec:	bf14      	ite	ne
74005fee:	2402      	movne	r4, #2
74005ff0:	2401      	moveq	r4, #1
74005ff2:	f8c8 2018 	str.w	r2, [r8, #24]
74005ff6:	f8c8 4010 	str.w	r4, [r8, #16]
74005ffa:	f1ba 0f00 	cmp.w	sl, #0
74005ffe:	d01b      	beq.n	74006038 <__d2b+0x9c>
74006000:	f5aa 6a86 	sub.w	sl, sl, #1072	; 0x430
74006004:	f1c3 0235 	rsb	r2, r3, #53	; 0x35
74006008:	f1aa 0a03 	sub.w	sl, sl, #3
7400600c:	4453      	add	r3, sl
7400600e:	603b      	str	r3, [r7, #0]
74006010:	6032      	str	r2, [r6, #0]
74006012:	4640      	mov	r0, r8
74006014:	b003      	add	sp, #12
74006016:	e8bd 85f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, sl, pc}
7400601a:	4668      	mov	r0, sp
7400601c:	f7ff fe00 	bl	74005c20 <__lo0bits>
74006020:	2301      	movs	r3, #1
74006022:	461c      	mov	r4, r3
74006024:	f8c8 3010 	str.w	r3, [r8, #16]
74006028:	9b00      	ldr	r3, [sp, #0]
7400602a:	f8c8 3014 	str.w	r3, [r8, #20]
7400602e:	f100 0320 	add.w	r3, r0, #32
74006032:	f1ba 0f00 	cmp.w	sl, #0
74006036:	d1e3      	bne.n	74006000 <__d2b+0x64>
74006038:	eb08 0284 	add.w	r2, r8, r4, lsl #2
7400603c:	f5a3 6386 	sub.w	r3, r3, #1072	; 0x430
74006040:	3b02      	subs	r3, #2
74006042:	603b      	str	r3, [r7, #0]
74006044:	6910      	ldr	r0, [r2, #16]
74006046:	f7ff fdcb 	bl	74005be0 <__hi0bits>
7400604a:	ebc0 1044 	rsb	r0, r0, r4, lsl #5
7400604e:	6030      	str	r0, [r6, #0]
74006050:	e7df      	b.n	74006012 <__d2b+0x76>
74006052:	9a00      	ldr	r2, [sp, #0]
74006054:	f1c0 0120 	rsb	r1, r0, #32
74006058:	fa12 f101 	lsls.w	r1, r2, r1
7400605c:	40c2      	lsrs	r2, r0
7400605e:	9801      	ldr	r0, [sp, #4]
74006060:	4301      	orrs	r1, r0
74006062:	f8c8 1014 	str.w	r1, [r8, #20]
74006066:	9200      	str	r2, [sp, #0]
74006068:	e7bf      	b.n	74005fea <__d2b+0x4e>
7400606a:	bf00      	nop

7400606c <__mdiff>:
7400606c:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
74006070:	6913      	ldr	r3, [r2, #16]
74006072:	690f      	ldr	r7, [r1, #16]
74006074:	460c      	mov	r4, r1
74006076:	4615      	mov	r5, r2
74006078:	1aff      	subs	r7, r7, r3
7400607a:	2f00      	cmp	r7, #0
7400607c:	d04f      	beq.n	7400611e <__mdiff+0xb2>
7400607e:	db6a      	blt.n	74006156 <__mdiff+0xea>
74006080:	2700      	movs	r7, #0
74006082:	f101 0614 	add.w	r6, r1, #20
74006086:	6861      	ldr	r1, [r4, #4]
74006088:	f7ff ff52 	bl	74005f30 <_Balloc>
7400608c:	f8d5 8010 	ldr.w	r8, [r5, #16]
74006090:	f8d4 c010 	ldr.w	ip, [r4, #16]
74006094:	f105 0114 	add.w	r1, r5, #20
74006098:	2200      	movs	r2, #0
7400609a:	eb05 0588 	add.w	r5, r5, r8, lsl #2
7400609e:	eb04 048c 	add.w	r4, r4, ip, lsl #2
740060a2:	f105 0814 	add.w	r8, r5, #20
740060a6:	3414      	adds	r4, #20
740060a8:	f100 0314 	add.w	r3, r0, #20
740060ac:	60c7      	str	r7, [r0, #12]
740060ae:	f851 7b04 	ldr.w	r7, [r1], #4
740060b2:	f856 5b04 	ldr.w	r5, [r6], #4
740060b6:	46bb      	mov	fp, r7
740060b8:	fa1f fa87 	uxth.w	sl, r7
740060bc:	0c3f      	lsrs	r7, r7, #16
740060be:	fa1f f985 	uxth.w	r9, r5
740060c2:	ebc7 4715 	rsb	r7, r7, r5, lsr #16
740060c6:	ebca 0a09 	rsb	sl, sl, r9
740060ca:	4452      	add	r2, sl
740060cc:	eb07 4722 	add.w	r7, r7, r2, asr #16
740060d0:	b292      	uxth	r2, r2
740060d2:	ea42 4207 	orr.w	r2, r2, r7, lsl #16
740060d6:	f843 2b04 	str.w	r2, [r3], #4
740060da:	143a      	asrs	r2, r7, #16
740060dc:	4588      	cmp	r8, r1
740060de:	d8e6      	bhi.n	740060ae <__mdiff+0x42>
740060e0:	42a6      	cmp	r6, r4
740060e2:	d20e      	bcs.n	74006102 <__mdiff+0x96>
740060e4:	f856 1b04 	ldr.w	r1, [r6], #4
740060e8:	b28d      	uxth	r5, r1
740060ea:	0c09      	lsrs	r1, r1, #16
740060ec:	1952      	adds	r2, r2, r5
740060ee:	eb01 4122 	add.w	r1, r1, r2, asr #16
740060f2:	b292      	uxth	r2, r2
740060f4:	ea42 4201 	orr.w	r2, r2, r1, lsl #16
740060f8:	f843 2b04 	str.w	r2, [r3], #4
740060fc:	140a      	asrs	r2, r1, #16
740060fe:	42b4      	cmp	r4, r6
74006100:	d8f0      	bhi.n	740060e4 <__mdiff+0x78>
74006102:	f853 2c04 	ldr.w	r2, [r3, #-4]
74006106:	b932      	cbnz	r2, 74006116 <__mdiff+0xaa>
74006108:	f853 2c08 	ldr.w	r2, [r3, #-8]
7400610c:	f10c 3cff 	add.w	ip, ip, #4294967295
74006110:	3b04      	subs	r3, #4
74006112:	2a00      	cmp	r2, #0
74006114:	d0f8      	beq.n	74006108 <__mdiff+0x9c>
74006116:	f8c0 c010 	str.w	ip, [r0, #16]
7400611a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
7400611e:	3304      	adds	r3, #4
74006120:	f101 0614 	add.w	r6, r1, #20
74006124:	009b      	lsls	r3, r3, #2
74006126:	18d2      	adds	r2, r2, r3
74006128:	18cb      	adds	r3, r1, r3
7400612a:	3304      	adds	r3, #4
7400612c:	3204      	adds	r2, #4
7400612e:	f853 cc04 	ldr.w	ip, [r3, #-4]
74006132:	3b04      	subs	r3, #4
74006134:	f852 1c04 	ldr.w	r1, [r2, #-4]
74006138:	3a04      	subs	r2, #4
7400613a:	458c      	cmp	ip, r1
7400613c:	d10a      	bne.n	74006154 <__mdiff+0xe8>
7400613e:	429e      	cmp	r6, r3
74006140:	d3f5      	bcc.n	7400612e <__mdiff+0xc2>
74006142:	2100      	movs	r1, #0
74006144:	f7ff fef4 	bl	74005f30 <_Balloc>
74006148:	2301      	movs	r3, #1
7400614a:	6103      	str	r3, [r0, #16]
7400614c:	2300      	movs	r3, #0
7400614e:	6143      	str	r3, [r0, #20]
74006150:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
74006154:	d297      	bcs.n	74006086 <__mdiff+0x1a>
74006156:	4623      	mov	r3, r4
74006158:	462c      	mov	r4, r5
7400615a:	2701      	movs	r7, #1
7400615c:	461d      	mov	r5, r3
7400615e:	f104 0614 	add.w	r6, r4, #20
74006162:	e790      	b.n	74006086 <__mdiff+0x1a>

74006164 <__lshift>:
74006164:	e92d 45f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
74006168:	690d      	ldr	r5, [r1, #16]
7400616a:	688b      	ldr	r3, [r1, #8]
7400616c:	1156      	asrs	r6, r2, #5
7400616e:	3501      	adds	r5, #1
74006170:	460c      	mov	r4, r1
74006172:	19ad      	adds	r5, r5, r6
74006174:	4690      	mov	r8, r2
74006176:	429d      	cmp	r5, r3
74006178:	4682      	mov	sl, r0
7400617a:	6849      	ldr	r1, [r1, #4]
7400617c:	dd03      	ble.n	74006186 <__lshift+0x22>
7400617e:	005b      	lsls	r3, r3, #1
74006180:	3101      	adds	r1, #1
74006182:	429d      	cmp	r5, r3
74006184:	dcfb      	bgt.n	7400617e <__lshift+0x1a>
74006186:	4650      	mov	r0, sl
74006188:	f7ff fed2 	bl	74005f30 <_Balloc>
7400618c:	2e00      	cmp	r6, #0
7400618e:	4607      	mov	r7, r0
74006190:	f100 0214 	add.w	r2, r0, #20
74006194:	dd0a      	ble.n	740061ac <__lshift+0x48>
74006196:	2300      	movs	r3, #0
74006198:	4619      	mov	r1, r3
7400619a:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
7400619e:	3301      	adds	r3, #1
740061a0:	42b3      	cmp	r3, r6
740061a2:	d1fa      	bne.n	7400619a <__lshift+0x36>
740061a4:	eb07 0383 	add.w	r3, r7, r3, lsl #2
740061a8:	f103 0214 	add.w	r2, r3, #20
740061ac:	6920      	ldr	r0, [r4, #16]
740061ae:	f104 0314 	add.w	r3, r4, #20
740061b2:	eb04 0080 	add.w	r0, r4, r0, lsl #2
740061b6:	3014      	adds	r0, #20
740061b8:	f018 081f 	ands.w	r8, r8, #31
740061bc:	d01b      	beq.n	740061f6 <__lshift+0x92>
740061be:	f1c8 0e20 	rsb	lr, r8, #32
740061c2:	2100      	movs	r1, #0
740061c4:	681e      	ldr	r6, [r3, #0]
740061c6:	fa06 fc08 	lsl.w	ip, r6, r8
740061ca:	ea41 010c 	orr.w	r1, r1, ip
740061ce:	f842 1b04 	str.w	r1, [r2], #4
740061d2:	f853 1b04 	ldr.w	r1, [r3], #4
740061d6:	4298      	cmp	r0, r3
740061d8:	fa21 f10e 	lsr.w	r1, r1, lr
740061dc:	d8f2      	bhi.n	740061c4 <__lshift+0x60>
740061de:	6011      	str	r1, [r2, #0]
740061e0:	b101      	cbz	r1, 740061e4 <__lshift+0x80>
740061e2:	3501      	adds	r5, #1
740061e4:	4650      	mov	r0, sl
740061e6:	3d01      	subs	r5, #1
740061e8:	4621      	mov	r1, r4
740061ea:	613d      	str	r5, [r7, #16]
740061ec:	f7ff fe84 	bl	74005ef8 <_Bfree>
740061f0:	4638      	mov	r0, r7
740061f2:	e8bd 85f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
740061f6:	f853 1008 	ldr.w	r1, [r3, r8]
740061fa:	f842 1008 	str.w	r1, [r2, r8]
740061fe:	f108 0804 	add.w	r8, r8, #4
74006202:	eb08 0103 	add.w	r1, r8, r3
74006206:	4288      	cmp	r0, r1
74006208:	d9ec      	bls.n	740061e4 <__lshift+0x80>
7400620a:	f853 1008 	ldr.w	r1, [r3, r8]
7400620e:	f842 1008 	str.w	r1, [r2, r8]
74006212:	f108 0804 	add.w	r8, r8, #4
74006216:	eb08 0103 	add.w	r1, r8, r3
7400621a:	4288      	cmp	r0, r1
7400621c:	d8eb      	bhi.n	740061f6 <__lshift+0x92>
7400621e:	e7e1      	b.n	740061e4 <__lshift+0x80>

74006220 <__multiply>:
74006220:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
74006224:	f8d1 8010 	ldr.w	r8, [r1, #16]
74006228:	6917      	ldr	r7, [r2, #16]
7400622a:	460d      	mov	r5, r1
7400622c:	4616      	mov	r6, r2
7400622e:	b087      	sub	sp, #28
74006230:	45b8      	cmp	r8, r7
74006232:	bfb5      	itete	lt
74006234:	4615      	movlt	r5, r2
74006236:	463b      	movge	r3, r7
74006238:	460b      	movlt	r3, r1
7400623a:	4647      	movge	r7, r8
7400623c:	bfb4      	ite	lt
7400623e:	461e      	movlt	r6, r3
74006240:	4698      	movge	r8, r3
74006242:	68ab      	ldr	r3, [r5, #8]
74006244:	eb08 0407 	add.w	r4, r8, r7
74006248:	6869      	ldr	r1, [r5, #4]
7400624a:	429c      	cmp	r4, r3
7400624c:	bfc8      	it	gt
7400624e:	3101      	addgt	r1, #1
74006250:	f7ff fe6e 	bl	74005f30 <_Balloc>
74006254:	eb00 0384 	add.w	r3, r0, r4, lsl #2
74006258:	f100 0b14 	add.w	fp, r0, #20
7400625c:	3314      	adds	r3, #20
7400625e:	9003      	str	r0, [sp, #12]
74006260:	459b      	cmp	fp, r3
74006262:	9304      	str	r3, [sp, #16]
74006264:	d206      	bcs.n	74006274 <__multiply+0x54>
74006266:	9904      	ldr	r1, [sp, #16]
74006268:	465b      	mov	r3, fp
7400626a:	2200      	movs	r2, #0
7400626c:	f843 2b04 	str.w	r2, [r3], #4
74006270:	4299      	cmp	r1, r3
74006272:	d8fb      	bhi.n	7400626c <__multiply+0x4c>
74006274:	eb06 0888 	add.w	r8, r6, r8, lsl #2
74006278:	f106 0914 	add.w	r9, r6, #20
7400627c:	f108 0814 	add.w	r8, r8, #20
74006280:	eb05 0c87 	add.w	ip, r5, r7, lsl #2
74006284:	3514      	adds	r5, #20
74006286:	45c1      	cmp	r9, r8
74006288:	f8cd 8004 	str.w	r8, [sp, #4]
7400628c:	f10c 0c14 	add.w	ip, ip, #20
74006290:	9502      	str	r5, [sp, #8]
74006292:	d24b      	bcs.n	7400632c <__multiply+0x10c>
74006294:	f04f 0a00 	mov.w	sl, #0
74006298:	9405      	str	r4, [sp, #20]
7400629a:	f859 400a 	ldr.w	r4, [r9, sl]
7400629e:	eb0a 080b 	add.w	r8, sl, fp
740062a2:	b2a0      	uxth	r0, r4
740062a4:	b1d8      	cbz	r0, 740062de <__multiply+0xbe>
740062a6:	9a02      	ldr	r2, [sp, #8]
740062a8:	4643      	mov	r3, r8
740062aa:	2400      	movs	r4, #0
740062ac:	f852 5b04 	ldr.w	r5, [r2], #4
740062b0:	6819      	ldr	r1, [r3, #0]
740062b2:	b2af      	uxth	r7, r5
740062b4:	0c2d      	lsrs	r5, r5, #16
740062b6:	b28e      	uxth	r6, r1
740062b8:	0c09      	lsrs	r1, r1, #16
740062ba:	fb00 6607 	mla	r6, r0, r7, r6
740062be:	fb00 1105 	mla	r1, r0, r5, r1
740062c2:	1936      	adds	r6, r6, r4
740062c4:	eb01 4116 	add.w	r1, r1, r6, lsr #16
740062c8:	b2b6      	uxth	r6, r6
740062ca:	0c0c      	lsrs	r4, r1, #16
740062cc:	4594      	cmp	ip, r2
740062ce:	ea46 4601 	orr.w	r6, r6, r1, lsl #16
740062d2:	f843 6b04 	str.w	r6, [r3], #4
740062d6:	d8e9      	bhi.n	740062ac <__multiply+0x8c>
740062d8:	601c      	str	r4, [r3, #0]
740062da:	f859 400a 	ldr.w	r4, [r9, sl]
740062de:	0c24      	lsrs	r4, r4, #16
740062e0:	d01c      	beq.n	7400631c <__multiply+0xfc>
740062e2:	f85b 200a 	ldr.w	r2, [fp, sl]
740062e6:	4641      	mov	r1, r8
740062e8:	9b02      	ldr	r3, [sp, #8]
740062ea:	2500      	movs	r5, #0
740062ec:	4610      	mov	r0, r2
740062ee:	881e      	ldrh	r6, [r3, #0]
740062f0:	b297      	uxth	r7, r2
740062f2:	fb06 5504 	mla	r5, r6, r4, r5
740062f6:	eb05 4510 	add.w	r5, r5, r0, lsr #16
740062fa:	ea47 4705 	orr.w	r7, r7, r5, lsl #16
740062fe:	600f      	str	r7, [r1, #0]
74006300:	f851 0f04 	ldr.w	r0, [r1, #4]!
74006304:	f853 2b04 	ldr.w	r2, [r3], #4
74006308:	b286      	uxth	r6, r0
7400630a:	0c12      	lsrs	r2, r2, #16
7400630c:	fb02 6204 	mla	r2, r2, r4, r6
74006310:	eb02 4215 	add.w	r2, r2, r5, lsr #16
74006314:	0c15      	lsrs	r5, r2, #16
74006316:	459c      	cmp	ip, r3
74006318:	d8e9      	bhi.n	740062ee <__multiply+0xce>
7400631a:	600a      	str	r2, [r1, #0]
7400631c:	f10a 0a04 	add.w	sl, sl, #4
74006320:	9a01      	ldr	r2, [sp, #4]
74006322:	eb0a 0309 	add.w	r3, sl, r9
74006326:	429a      	cmp	r2, r3
74006328:	d8b7      	bhi.n	7400629a <__multiply+0x7a>
7400632a:	9c05      	ldr	r4, [sp, #20]
7400632c:	2c00      	cmp	r4, #0
7400632e:	dd0b      	ble.n	74006348 <__multiply+0x128>
74006330:	9a04      	ldr	r2, [sp, #16]
74006332:	f852 3c04 	ldr.w	r3, [r2, #-4]
74006336:	b93b      	cbnz	r3, 74006348 <__multiply+0x128>
74006338:	4613      	mov	r3, r2
7400633a:	e003      	b.n	74006344 <__multiply+0x124>
7400633c:	f853 2c08 	ldr.w	r2, [r3, #-8]
74006340:	3b04      	subs	r3, #4
74006342:	b90a      	cbnz	r2, 74006348 <__multiply+0x128>
74006344:	3c01      	subs	r4, #1
74006346:	d1f9      	bne.n	7400633c <__multiply+0x11c>
74006348:	9b03      	ldr	r3, [sp, #12]
7400634a:	4618      	mov	r0, r3
7400634c:	611c      	str	r4, [r3, #16]
7400634e:	b007      	add	sp, #28
74006350:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

74006354 <__i2b>:
74006354:	b510      	push	{r4, lr}
74006356:	460c      	mov	r4, r1
74006358:	2101      	movs	r1, #1
7400635a:	f7ff fde9 	bl	74005f30 <_Balloc>
7400635e:	2201      	movs	r2, #1
74006360:	6144      	str	r4, [r0, #20]
74006362:	6102      	str	r2, [r0, #16]
74006364:	bd10      	pop	{r4, pc}
74006366:	bf00      	nop

74006368 <__multadd>:
74006368:	e92d 45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
7400636c:	460d      	mov	r5, r1
7400636e:	2100      	movs	r1, #0
74006370:	4606      	mov	r6, r0
74006372:	692c      	ldr	r4, [r5, #16]
74006374:	b083      	sub	sp, #12
74006376:	f105 0814 	add.w	r8, r5, #20
7400637a:	4608      	mov	r0, r1
7400637c:	f858 7001 	ldr.w	r7, [r8, r1]
74006380:	3001      	adds	r0, #1
74006382:	fa1f fa87 	uxth.w	sl, r7
74006386:	ea4f 4c17 	mov.w	ip, r7, lsr #16
7400638a:	fb0a 3302 	mla	r3, sl, r2, r3
7400638e:	fb0c fc02 	mul.w	ip, ip, r2
74006392:	eb0c 4c13 	add.w	ip, ip, r3, lsr #16
74006396:	b29b      	uxth	r3, r3
74006398:	eb03 430c 	add.w	r3, r3, ip, lsl #16
7400639c:	f848 3001 	str.w	r3, [r8, r1]
740063a0:	3104      	adds	r1, #4
740063a2:	4284      	cmp	r4, r0
740063a4:	ea4f 431c 	mov.w	r3, ip, lsr #16
740063a8:	dce8      	bgt.n	7400637c <__multadd+0x14>
740063aa:	b13b      	cbz	r3, 740063bc <__multadd+0x54>
740063ac:	68aa      	ldr	r2, [r5, #8]
740063ae:	4294      	cmp	r4, r2
740063b0:	da08      	bge.n	740063c4 <__multadd+0x5c>
740063b2:	eb05 0284 	add.w	r2, r5, r4, lsl #2
740063b6:	3401      	adds	r4, #1
740063b8:	612c      	str	r4, [r5, #16]
740063ba:	6153      	str	r3, [r2, #20]
740063bc:	4628      	mov	r0, r5
740063be:	b003      	add	sp, #12
740063c0:	e8bd 85f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, sl, pc}
740063c4:	6869      	ldr	r1, [r5, #4]
740063c6:	4630      	mov	r0, r6
740063c8:	9301      	str	r3, [sp, #4]
740063ca:	3101      	adds	r1, #1
740063cc:	f7ff fdb0 	bl	74005f30 <_Balloc>
740063d0:	692a      	ldr	r2, [r5, #16]
740063d2:	f105 010c 	add.w	r1, r5, #12
740063d6:	3202      	adds	r2, #2
740063d8:	0092      	lsls	r2, r2, #2
740063da:	4607      	mov	r7, r0
740063dc:	300c      	adds	r0, #12
740063de:	f7ff fa6d 	bl	740058bc <memcpy>
740063e2:	4629      	mov	r1, r5
740063e4:	4630      	mov	r0, r6
740063e6:	463d      	mov	r5, r7
740063e8:	f7ff fd86 	bl	74005ef8 <_Bfree>
740063ec:	9b01      	ldr	r3, [sp, #4]
740063ee:	e7e0      	b.n	740063b2 <__multadd+0x4a>

740063f0 <__pow5mult>:
740063f0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
740063f4:	4615      	mov	r5, r2
740063f6:	f012 0203 	ands.w	r2, r2, #3
740063fa:	4604      	mov	r4, r0
740063fc:	4688      	mov	r8, r1
740063fe:	d12c      	bne.n	7400645a <__pow5mult+0x6a>
74006400:	10ad      	asrs	r5, r5, #2
74006402:	d01e      	beq.n	74006442 <__pow5mult+0x52>
74006404:	6a66      	ldr	r6, [r4, #36]	; 0x24
74006406:	2e00      	cmp	r6, #0
74006408:	d034      	beq.n	74006474 <__pow5mult+0x84>
7400640a:	68b7      	ldr	r7, [r6, #8]
7400640c:	2f00      	cmp	r7, #0
7400640e:	d03b      	beq.n	74006488 <__pow5mult+0x98>
74006410:	f015 0f01 	tst.w	r5, #1
74006414:	d108      	bne.n	74006428 <__pow5mult+0x38>
74006416:	106d      	asrs	r5, r5, #1
74006418:	d013      	beq.n	74006442 <__pow5mult+0x52>
7400641a:	683e      	ldr	r6, [r7, #0]
7400641c:	b1a6      	cbz	r6, 74006448 <__pow5mult+0x58>
7400641e:	4630      	mov	r0, r6
74006420:	4607      	mov	r7, r0
74006422:	f015 0f01 	tst.w	r5, #1
74006426:	d0f6      	beq.n	74006416 <__pow5mult+0x26>
74006428:	4641      	mov	r1, r8
7400642a:	463a      	mov	r2, r7
7400642c:	4620      	mov	r0, r4
7400642e:	f7ff fef7 	bl	74006220 <__multiply>
74006432:	4641      	mov	r1, r8
74006434:	4606      	mov	r6, r0
74006436:	4620      	mov	r0, r4
74006438:	f7ff fd5e 	bl	74005ef8 <_Bfree>
7400643c:	106d      	asrs	r5, r5, #1
7400643e:	46b0      	mov	r8, r6
74006440:	d1eb      	bne.n	7400641a <__pow5mult+0x2a>
74006442:	4640      	mov	r0, r8
74006444:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
74006448:	4639      	mov	r1, r7
7400644a:	463a      	mov	r2, r7
7400644c:	4620      	mov	r0, r4
7400644e:	f7ff fee7 	bl	74006220 <__multiply>
74006452:	6038      	str	r0, [r7, #0]
74006454:	4607      	mov	r7, r0
74006456:	6006      	str	r6, [r0, #0]
74006458:	e7e3      	b.n	74006422 <__pow5mult+0x32>
7400645a:	f248 3cb0 	movw	ip, #33712	; 0x83b0
7400645e:	2300      	movs	r3, #0
74006460:	f2c7 4c00 	movt	ip, #29696	; 0x7400
74006464:	eb0c 0282 	add.w	r2, ip, r2, lsl #2
74006468:	f8d2 20c4 	ldr.w	r2, [r2, #196]	; 0xc4
7400646c:	f7ff ff7c 	bl	74006368 <__multadd>
74006470:	4680      	mov	r8, r0
74006472:	e7c5      	b.n	74006400 <__pow5mult+0x10>
74006474:	2010      	movs	r0, #16
74006476:	f7fe ff0d 	bl	74005294 <malloc>
7400647a:	2300      	movs	r3, #0
7400647c:	4606      	mov	r6, r0
7400647e:	6260      	str	r0, [r4, #36]	; 0x24
74006480:	60c3      	str	r3, [r0, #12]
74006482:	6043      	str	r3, [r0, #4]
74006484:	6083      	str	r3, [r0, #8]
74006486:	6003      	str	r3, [r0, #0]
74006488:	4620      	mov	r0, r4
7400648a:	f240 2171 	movw	r1, #625	; 0x271
7400648e:	f7ff ff61 	bl	74006354 <__i2b>
74006492:	2300      	movs	r3, #0
74006494:	60b0      	str	r0, [r6, #8]
74006496:	4607      	mov	r7, r0
74006498:	6003      	str	r3, [r0, #0]
7400649a:	e7b9      	b.n	74006410 <__pow5mult+0x20>

7400649c <__s2b>:
7400649c:	e92d 45f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
740064a0:	461e      	mov	r6, r3
740064a2:	f648 6339 	movw	r3, #36409	; 0x8e39
740064a6:	f106 0c08 	add.w	ip, r6, #8
740064aa:	f6c3 03e3 	movt	r3, #14563	; 0x38e3
740064ae:	4688      	mov	r8, r1
740064b0:	4605      	mov	r5, r0
740064b2:	4617      	mov	r7, r2
740064b4:	fb83 130c 	smull	r1, r3, r3, ip
740064b8:	ea4f 7cec 	mov.w	ip, ip, asr #31
740064bc:	ebcc 0c63 	rsb	ip, ip, r3, asr #1
740064c0:	f1bc 0f01 	cmp.w	ip, #1
740064c4:	dd35      	ble.n	74006532 <__s2b+0x96>
740064c6:	2100      	movs	r1, #0
740064c8:	2201      	movs	r2, #1
740064ca:	0052      	lsls	r2, r2, #1
740064cc:	3101      	adds	r1, #1
740064ce:	4594      	cmp	ip, r2
740064d0:	dcfb      	bgt.n	740064ca <__s2b+0x2e>
740064d2:	4628      	mov	r0, r5
740064d4:	f7ff fd2c 	bl	74005f30 <_Balloc>
740064d8:	9b08      	ldr	r3, [sp, #32]
740064da:	6143      	str	r3, [r0, #20]
740064dc:	2301      	movs	r3, #1
740064de:	2f09      	cmp	r7, #9
740064e0:	6103      	str	r3, [r0, #16]
740064e2:	dd22      	ble.n	7400652a <__s2b+0x8e>
740064e4:	f108 0a09 	add.w	sl, r8, #9
740064e8:	2409      	movs	r4, #9
740064ea:	f818 3004 	ldrb.w	r3, [r8, r4]
740064ee:	4601      	mov	r1, r0
740064f0:	220a      	movs	r2, #10
740064f2:	3401      	adds	r4, #1
740064f4:	3b30      	subs	r3, #48	; 0x30
740064f6:	4628      	mov	r0, r5
740064f8:	f7ff ff36 	bl	74006368 <__multadd>
740064fc:	42a7      	cmp	r7, r4
740064fe:	dcf4      	bgt.n	740064ea <__s2b+0x4e>
74006500:	eb0a 0807 	add.w	r8, sl, r7
74006504:	f1a8 0808 	sub.w	r8, r8, #8
74006508:	42be      	cmp	r6, r7
7400650a:	dd0c      	ble.n	74006526 <__s2b+0x8a>
7400650c:	2400      	movs	r4, #0
7400650e:	f818 3004 	ldrb.w	r3, [r8, r4]
74006512:	4601      	mov	r1, r0
74006514:	3401      	adds	r4, #1
74006516:	220a      	movs	r2, #10
74006518:	3b30      	subs	r3, #48	; 0x30
7400651a:	4628      	mov	r0, r5
7400651c:	f7ff ff24 	bl	74006368 <__multadd>
74006520:	19e3      	adds	r3, r4, r7
74006522:	429e      	cmp	r6, r3
74006524:	dcf3      	bgt.n	7400650e <__s2b+0x72>
74006526:	e8bd 85f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
7400652a:	f108 080a 	add.w	r8, r8, #10
7400652e:	2709      	movs	r7, #9
74006530:	e7ea      	b.n	74006508 <__s2b+0x6c>
74006532:	2100      	movs	r1, #0
74006534:	e7cd      	b.n	740064d2 <__s2b+0x36>
74006536:	bf00      	nop

74006538 <_realloc_r>:
74006538:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
7400653c:	4691      	mov	r9, r2
7400653e:	b083      	sub	sp, #12
74006540:	4607      	mov	r7, r0
74006542:	460e      	mov	r6, r1
74006544:	2900      	cmp	r1, #0
74006546:	f000 813a 	beq.w	740067be <_realloc_r+0x286>
7400654a:	f1a1 0808 	sub.w	r8, r1, #8
7400654e:	f109 040b 	add.w	r4, r9, #11
74006552:	f7ff fb41 	bl	74005bd8 <__malloc_lock>
74006556:	2c16      	cmp	r4, #22
74006558:	f8d8 1004 	ldr.w	r1, [r8, #4]
7400655c:	460b      	mov	r3, r1
7400655e:	f200 80a0 	bhi.w	740066a2 <_realloc_r+0x16a>
74006562:	2210      	movs	r2, #16
74006564:	2500      	movs	r5, #0
74006566:	4614      	mov	r4, r2
74006568:	454c      	cmp	r4, r9
7400656a:	bf38      	it	cc
7400656c:	f045 0501 	orrcc.w	r5, r5, #1
74006570:	2d00      	cmp	r5, #0
74006572:	f040 812a 	bne.w	740067ca <_realloc_r+0x292>
74006576:	f021 0a03 	bic.w	sl, r1, #3
7400657a:	4592      	cmp	sl, r2
7400657c:	bfa2      	ittt	ge
7400657e:	4640      	movge	r0, r8
74006580:	4655      	movge	r5, sl
74006582:	f108 0808 	addge.w	r8, r8, #8
74006586:	da75      	bge.n	74006674 <_realloc_r+0x13c>
74006588:	f240 1340 	movw	r3, #320	; 0x140
7400658c:	eb08 000a 	add.w	r0, r8, sl
74006590:	f2c7 0300 	movt	r3, #28672	; 0x7000
74006594:	f8d3 e008 	ldr.w	lr, [r3, #8]
74006598:	4586      	cmp	lr, r0
7400659a:	f000 811a 	beq.w	740067d2 <_realloc_r+0x29a>
7400659e:	f8d0 c004 	ldr.w	ip, [r0, #4]
740065a2:	f02c 0b01 	bic.w	fp, ip, #1
740065a6:	4483      	add	fp, r0
740065a8:	f8db b004 	ldr.w	fp, [fp, #4]
740065ac:	f01b 0f01 	tst.w	fp, #1
740065b0:	d07c      	beq.n	740066ac <_realloc_r+0x174>
740065b2:	46ac      	mov	ip, r5
740065b4:	4628      	mov	r0, r5
740065b6:	f011 0f01 	tst.w	r1, #1
740065ba:	f040 809b 	bne.w	740066f4 <_realloc_r+0x1bc>
740065be:	f856 1c08 	ldr.w	r1, [r6, #-8]
740065c2:	ebc1 0b08 	rsb	fp, r1, r8
740065c6:	f8db 5004 	ldr.w	r5, [fp, #4]
740065ca:	f025 0503 	bic.w	r5, r5, #3
740065ce:	2800      	cmp	r0, #0
740065d0:	f000 80dd 	beq.w	7400678e <_realloc_r+0x256>
740065d4:	4570      	cmp	r0, lr
740065d6:	f000 811f 	beq.w	74006818 <_realloc_r+0x2e0>
740065da:	eb05 030a 	add.w	r3, r5, sl
740065de:	eb0c 0503 	add.w	r5, ip, r3
740065e2:	4295      	cmp	r5, r2
740065e4:	bfb8      	it	lt
740065e6:	461d      	movlt	r5, r3
740065e8:	f2c0 80d2 	blt.w	74006790 <_realloc_r+0x258>
740065ec:	6881      	ldr	r1, [r0, #8]
740065ee:	465b      	mov	r3, fp
740065f0:	68c0      	ldr	r0, [r0, #12]
740065f2:	f1aa 0204 	sub.w	r2, sl, #4
740065f6:	2a24      	cmp	r2, #36	; 0x24
740065f8:	6081      	str	r1, [r0, #8]
740065fa:	60c8      	str	r0, [r1, #12]
740065fc:	f853 1f08 	ldr.w	r1, [r3, #8]!
74006600:	f8db 000c 	ldr.w	r0, [fp, #12]
74006604:	6081      	str	r1, [r0, #8]
74006606:	60c8      	str	r0, [r1, #12]
74006608:	f200 80d0 	bhi.w	740067ac <_realloc_r+0x274>
7400660c:	2a13      	cmp	r2, #19
7400660e:	469c      	mov	ip, r3
74006610:	d921      	bls.n	74006656 <_realloc_r+0x11e>
74006612:	4631      	mov	r1, r6
74006614:	f10b 0c10 	add.w	ip, fp, #16
74006618:	f851 0b04 	ldr.w	r0, [r1], #4
7400661c:	f8cb 0008 	str.w	r0, [fp, #8]
74006620:	6870      	ldr	r0, [r6, #4]
74006622:	1d0e      	adds	r6, r1, #4
74006624:	2a1b      	cmp	r2, #27
74006626:	f8cb 000c 	str.w	r0, [fp, #12]
7400662a:	d914      	bls.n	74006656 <_realloc_r+0x11e>
7400662c:	6848      	ldr	r0, [r1, #4]
7400662e:	1d31      	adds	r1, r6, #4
74006630:	f10b 0c18 	add.w	ip, fp, #24
74006634:	f8cb 0010 	str.w	r0, [fp, #16]
74006638:	6870      	ldr	r0, [r6, #4]
7400663a:	1d0e      	adds	r6, r1, #4
7400663c:	2a24      	cmp	r2, #36	; 0x24
7400663e:	f8cb 0014 	str.w	r0, [fp, #20]
74006642:	d108      	bne.n	74006656 <_realloc_r+0x11e>
74006644:	684a      	ldr	r2, [r1, #4]
74006646:	f10b 0c20 	add.w	ip, fp, #32
7400664a:	f8cb 2018 	str.w	r2, [fp, #24]
7400664e:	6872      	ldr	r2, [r6, #4]
74006650:	3608      	adds	r6, #8
74006652:	f8cb 201c 	str.w	r2, [fp, #28]
74006656:	4631      	mov	r1, r6
74006658:	4698      	mov	r8, r3
7400665a:	4662      	mov	r2, ip
7400665c:	4658      	mov	r0, fp
7400665e:	f851 3b04 	ldr.w	r3, [r1], #4
74006662:	f842 3b04 	str.w	r3, [r2], #4
74006666:	6873      	ldr	r3, [r6, #4]
74006668:	f8cc 3004 	str.w	r3, [ip, #4]
7400666c:	684b      	ldr	r3, [r1, #4]
7400666e:	6053      	str	r3, [r2, #4]
74006670:	f8db 3004 	ldr.w	r3, [fp, #4]
74006674:	ebc4 0c05 	rsb	ip, r4, r5
74006678:	f1bc 0f0f 	cmp.w	ip, #15
7400667c:	d826      	bhi.n	740066cc <_realloc_r+0x194>
7400667e:	1942      	adds	r2, r0, r5
74006680:	f003 0301 	and.w	r3, r3, #1
74006684:	ea43 0505 	orr.w	r5, r3, r5
74006688:	6045      	str	r5, [r0, #4]
7400668a:	6853      	ldr	r3, [r2, #4]
7400668c:	f043 0301 	orr.w	r3, r3, #1
74006690:	6053      	str	r3, [r2, #4]
74006692:	4638      	mov	r0, r7
74006694:	4645      	mov	r5, r8
74006696:	f7ff faa1 	bl	74005bdc <__malloc_unlock>
7400669a:	4628      	mov	r0, r5
7400669c:	b003      	add	sp, #12
7400669e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
740066a2:	f024 0407 	bic.w	r4, r4, #7
740066a6:	4622      	mov	r2, r4
740066a8:	0fe5      	lsrs	r5, r4, #31
740066aa:	e75d      	b.n	74006568 <_realloc_r+0x30>
740066ac:	f02c 0c03 	bic.w	ip, ip, #3
740066b0:	eb0c 050a 	add.w	r5, ip, sl
740066b4:	4295      	cmp	r5, r2
740066b6:	f6ff af7e 	blt.w	740065b6 <_realloc_r+0x7e>
740066ba:	6882      	ldr	r2, [r0, #8]
740066bc:	460b      	mov	r3, r1
740066be:	68c1      	ldr	r1, [r0, #12]
740066c0:	4640      	mov	r0, r8
740066c2:	f108 0808 	add.w	r8, r8, #8
740066c6:	608a      	str	r2, [r1, #8]
740066c8:	60d1      	str	r1, [r2, #12]
740066ca:	e7d3      	b.n	74006674 <_realloc_r+0x13c>
740066cc:	1901      	adds	r1, r0, r4
740066ce:	f003 0301 	and.w	r3, r3, #1
740066d2:	eb01 020c 	add.w	r2, r1, ip
740066d6:	ea43 0404 	orr.w	r4, r3, r4
740066da:	f04c 0301 	orr.w	r3, ip, #1
740066de:	6044      	str	r4, [r0, #4]
740066e0:	604b      	str	r3, [r1, #4]
740066e2:	4638      	mov	r0, r7
740066e4:	6853      	ldr	r3, [r2, #4]
740066e6:	3108      	adds	r1, #8
740066e8:	f043 0301 	orr.w	r3, r3, #1
740066ec:	6053      	str	r3, [r2, #4]
740066ee:	f7fe fa57 	bl	74004ba0 <_free_r>
740066f2:	e7ce      	b.n	74006692 <_realloc_r+0x15a>
740066f4:	4649      	mov	r1, r9
740066f6:	4638      	mov	r0, r7
740066f8:	f7fe fdd4 	bl	740052a4 <_malloc_r>
740066fc:	4605      	mov	r5, r0
740066fe:	2800      	cmp	r0, #0
74006700:	d041      	beq.n	74006786 <_realloc_r+0x24e>
74006702:	f8d8 3004 	ldr.w	r3, [r8, #4]
74006706:	f1a0 0208 	sub.w	r2, r0, #8
7400670a:	f023 0101 	bic.w	r1, r3, #1
7400670e:	4441      	add	r1, r8
74006710:	428a      	cmp	r2, r1
74006712:	f000 80d7 	beq.w	740068c4 <_realloc_r+0x38c>
74006716:	f1aa 0204 	sub.w	r2, sl, #4
7400671a:	4631      	mov	r1, r6
7400671c:	2a24      	cmp	r2, #36	; 0x24
7400671e:	d878      	bhi.n	74006812 <_realloc_r+0x2da>
74006720:	2a13      	cmp	r2, #19
74006722:	4603      	mov	r3, r0
74006724:	d921      	bls.n	7400676a <_realloc_r+0x232>
74006726:	4634      	mov	r4, r6
74006728:	f854 3b04 	ldr.w	r3, [r4], #4
7400672c:	1d21      	adds	r1, r4, #4
7400672e:	f840 3b04 	str.w	r3, [r0], #4
74006732:	1d03      	adds	r3, r0, #4
74006734:	f8d6 c004 	ldr.w	ip, [r6, #4]
74006738:	2a1b      	cmp	r2, #27
7400673a:	f8c5 c004 	str.w	ip, [r5, #4]
7400673e:	d914      	bls.n	7400676a <_realloc_r+0x232>
74006740:	f8d4 e004 	ldr.w	lr, [r4, #4]
74006744:	1d1c      	adds	r4, r3, #4
74006746:	f101 0c04 	add.w	ip, r1, #4
7400674a:	f8c0 e004 	str.w	lr, [r0, #4]
7400674e:	6848      	ldr	r0, [r1, #4]
74006750:	f10c 0104 	add.w	r1, ip, #4
74006754:	6058      	str	r0, [r3, #4]
74006756:	1d23      	adds	r3, r4, #4
74006758:	2a24      	cmp	r2, #36	; 0x24
7400675a:	d106      	bne.n	7400676a <_realloc_r+0x232>
7400675c:	f8dc 2004 	ldr.w	r2, [ip, #4]
74006760:	6062      	str	r2, [r4, #4]
74006762:	684a      	ldr	r2, [r1, #4]
74006764:	3108      	adds	r1, #8
74006766:	605a      	str	r2, [r3, #4]
74006768:	3308      	adds	r3, #8
7400676a:	4608      	mov	r0, r1
7400676c:	461a      	mov	r2, r3
7400676e:	f850 4b04 	ldr.w	r4, [r0], #4
74006772:	f842 4b04 	str.w	r4, [r2], #4
74006776:	6849      	ldr	r1, [r1, #4]
74006778:	6059      	str	r1, [r3, #4]
7400677a:	6843      	ldr	r3, [r0, #4]
7400677c:	6053      	str	r3, [r2, #4]
7400677e:	4631      	mov	r1, r6
74006780:	4638      	mov	r0, r7
74006782:	f7fe fa0d 	bl	74004ba0 <_free_r>
74006786:	4638      	mov	r0, r7
74006788:	f7ff fa28 	bl	74005bdc <__malloc_unlock>
7400678c:	e785      	b.n	7400669a <_realloc_r+0x162>
7400678e:	4455      	add	r5, sl
74006790:	4295      	cmp	r5, r2
74006792:	dbaf      	blt.n	740066f4 <_realloc_r+0x1bc>
74006794:	465b      	mov	r3, fp
74006796:	f8db 000c 	ldr.w	r0, [fp, #12]
7400679a:	f1aa 0204 	sub.w	r2, sl, #4
7400679e:	f853 1f08 	ldr.w	r1, [r3, #8]!
740067a2:	2a24      	cmp	r2, #36	; 0x24
740067a4:	6081      	str	r1, [r0, #8]
740067a6:	60c8      	str	r0, [r1, #12]
740067a8:	f67f af30 	bls.w	7400660c <_realloc_r+0xd4>
740067ac:	4618      	mov	r0, r3
740067ae:	4631      	mov	r1, r6
740067b0:	4698      	mov	r8, r3
740067b2:	f7ff f94b 	bl	74005a4c <memmove>
740067b6:	4658      	mov	r0, fp
740067b8:	f8db 3004 	ldr.w	r3, [fp, #4]
740067bc:	e75a      	b.n	74006674 <_realloc_r+0x13c>
740067be:	4611      	mov	r1, r2
740067c0:	b003      	add	sp, #12
740067c2:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
740067c6:	f7fe bd6d 	b.w	740052a4 <_malloc_r>
740067ca:	230c      	movs	r3, #12
740067cc:	2500      	movs	r5, #0
740067ce:	603b      	str	r3, [r7, #0]
740067d0:	e763      	b.n	7400669a <_realloc_r+0x162>
740067d2:	f8de 5004 	ldr.w	r5, [lr, #4]
740067d6:	f104 0b10 	add.w	fp, r4, #16
740067da:	f025 0c03 	bic.w	ip, r5, #3
740067de:	eb0c 000a 	add.w	r0, ip, sl
740067e2:	4558      	cmp	r0, fp
740067e4:	bfb8      	it	lt
740067e6:	4670      	movlt	r0, lr
740067e8:	f6ff aee5 	blt.w	740065b6 <_realloc_r+0x7e>
740067ec:	eb08 0204 	add.w	r2, r8, r4
740067f0:	1b01      	subs	r1, r0, r4
740067f2:	f041 0101 	orr.w	r1, r1, #1
740067f6:	609a      	str	r2, [r3, #8]
740067f8:	6051      	str	r1, [r2, #4]
740067fa:	4638      	mov	r0, r7
740067fc:	f8d8 1004 	ldr.w	r1, [r8, #4]
74006800:	4635      	mov	r5, r6
74006802:	f001 0301 	and.w	r3, r1, #1
74006806:	431c      	orrs	r4, r3
74006808:	f8c8 4004 	str.w	r4, [r8, #4]
7400680c:	f7ff f9e6 	bl	74005bdc <__malloc_unlock>
74006810:	e743      	b.n	7400669a <_realloc_r+0x162>
74006812:	f7ff f91b 	bl	74005a4c <memmove>
74006816:	e7b2      	b.n	7400677e <_realloc_r+0x246>
74006818:	4455      	add	r5, sl
7400681a:	f104 0110 	add.w	r1, r4, #16
7400681e:	44ac      	add	ip, r5
74006820:	458c      	cmp	ip, r1
74006822:	dbb5      	blt.n	74006790 <_realloc_r+0x258>
74006824:	465d      	mov	r5, fp
74006826:	f8db 000c 	ldr.w	r0, [fp, #12]
7400682a:	f1aa 0204 	sub.w	r2, sl, #4
7400682e:	f855 1f08 	ldr.w	r1, [r5, #8]!
74006832:	2a24      	cmp	r2, #36	; 0x24
74006834:	6081      	str	r1, [r0, #8]
74006836:	60c8      	str	r0, [r1, #12]
74006838:	d84c      	bhi.n	740068d4 <_realloc_r+0x39c>
7400683a:	2a13      	cmp	r2, #19
7400683c:	4628      	mov	r0, r5
7400683e:	d924      	bls.n	7400688a <_realloc_r+0x352>
74006840:	4631      	mov	r1, r6
74006842:	f10b 0010 	add.w	r0, fp, #16
74006846:	f851 eb04 	ldr.w	lr, [r1], #4
7400684a:	f8cb e008 	str.w	lr, [fp, #8]
7400684e:	f8d6 e004 	ldr.w	lr, [r6, #4]
74006852:	1d0e      	adds	r6, r1, #4
74006854:	2a1b      	cmp	r2, #27
74006856:	f8cb e00c 	str.w	lr, [fp, #12]
7400685a:	d916      	bls.n	7400688a <_realloc_r+0x352>
7400685c:	f8d1 e004 	ldr.w	lr, [r1, #4]
74006860:	1d31      	adds	r1, r6, #4
74006862:	f10b 0018 	add.w	r0, fp, #24
74006866:	f8cb e010 	str.w	lr, [fp, #16]
7400686a:	f8d6 e004 	ldr.w	lr, [r6, #4]
7400686e:	1d0e      	adds	r6, r1, #4
74006870:	2a24      	cmp	r2, #36	; 0x24
74006872:	f8cb e014 	str.w	lr, [fp, #20]
74006876:	d108      	bne.n	7400688a <_realloc_r+0x352>
74006878:	684a      	ldr	r2, [r1, #4]
7400687a:	f10b 0020 	add.w	r0, fp, #32
7400687e:	f8cb 2018 	str.w	r2, [fp, #24]
74006882:	6872      	ldr	r2, [r6, #4]
74006884:	3608      	adds	r6, #8
74006886:	f8cb 201c 	str.w	r2, [fp, #28]
7400688a:	4631      	mov	r1, r6
7400688c:	4602      	mov	r2, r0
7400688e:	f851 eb04 	ldr.w	lr, [r1], #4
74006892:	f842 eb04 	str.w	lr, [r2], #4
74006896:	6876      	ldr	r6, [r6, #4]
74006898:	6046      	str	r6, [r0, #4]
7400689a:	6849      	ldr	r1, [r1, #4]
7400689c:	6051      	str	r1, [r2, #4]
7400689e:	eb0b 0204 	add.w	r2, fp, r4
740068a2:	ebc4 010c 	rsb	r1, r4, ip
740068a6:	f041 0101 	orr.w	r1, r1, #1
740068aa:	609a      	str	r2, [r3, #8]
740068ac:	6051      	str	r1, [r2, #4]
740068ae:	4638      	mov	r0, r7
740068b0:	f8db 1004 	ldr.w	r1, [fp, #4]
740068b4:	f001 0301 	and.w	r3, r1, #1
740068b8:	431c      	orrs	r4, r3
740068ba:	f8cb 4004 	str.w	r4, [fp, #4]
740068be:	f7ff f98d 	bl	74005bdc <__malloc_unlock>
740068c2:	e6ea      	b.n	7400669a <_realloc_r+0x162>
740068c4:	6855      	ldr	r5, [r2, #4]
740068c6:	4640      	mov	r0, r8
740068c8:	f108 0808 	add.w	r8, r8, #8
740068cc:	f025 0503 	bic.w	r5, r5, #3
740068d0:	4455      	add	r5, sl
740068d2:	e6cf      	b.n	74006674 <_realloc_r+0x13c>
740068d4:	4631      	mov	r1, r6
740068d6:	4628      	mov	r0, r5
740068d8:	9300      	str	r3, [sp, #0]
740068da:	f8cd c004 	str.w	ip, [sp, #4]
740068de:	f7ff f8b5 	bl	74005a4c <memmove>
740068e2:	f8dd c004 	ldr.w	ip, [sp, #4]
740068e6:	9b00      	ldr	r3, [sp, #0]
740068e8:	e7d9      	b.n	7400689e <_realloc_r+0x366>
740068ea:	bf00      	nop

740068ec <__isinfd>:
740068ec:	4602      	mov	r2, r0
740068ee:	4240      	negs	r0, r0
740068f0:	ea40 0302 	orr.w	r3, r0, r2
740068f4:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
740068f8:	ea41 73d3 	orr.w	r3, r1, r3, lsr #31
740068fc:	f1c3 43fe 	rsb	r3, r3, #2130706432	; 0x7f000000
74006900:	f503 0370 	add.w	r3, r3, #15728640	; 0xf00000
74006904:	4258      	negs	r0, r3
74006906:	ea40 0303 	orr.w	r3, r0, r3
7400690a:	17d8      	asrs	r0, r3, #31
7400690c:	3001      	adds	r0, #1
7400690e:	4770      	bx	lr

74006910 <__isnand>:
74006910:	4602      	mov	r2, r0
74006912:	4240      	negs	r0, r0
74006914:	4310      	orrs	r0, r2
74006916:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
7400691a:	ea41 70d0 	orr.w	r0, r1, r0, lsr #31
7400691e:	f1c0 40fe 	rsb	r0, r0, #2130706432	; 0x7f000000
74006922:	f500 0070 	add.w	r0, r0, #15728640	; 0xf00000
74006926:	0fc0      	lsrs	r0, r0, #31
74006928:	4770      	bx	lr
7400692a:	bf00      	nop

7400692c <_sbrk_r>:
7400692c:	b538      	push	{r3, r4, r5, lr}
7400692e:	f240 54f0 	movw	r4, #1520	; 0x5f0
74006932:	f2c7 0400 	movt	r4, #28672	; 0x7000
74006936:	4605      	mov	r5, r0
74006938:	4608      	mov	r0, r1
7400693a:	2300      	movs	r3, #0
7400693c:	6023      	str	r3, [r4, #0]
7400693e:	f7f9 fef5 	bl	7400072c <_sbrk>
74006942:	f1b0 3fff 	cmp.w	r0, #4294967295
74006946:	d000      	beq.n	7400694a <_sbrk_r+0x1e>
74006948:	bd38      	pop	{r3, r4, r5, pc}
7400694a:	6823      	ldr	r3, [r4, #0]
7400694c:	2b00      	cmp	r3, #0
7400694e:	d0fb      	beq.n	74006948 <_sbrk_r+0x1c>
74006950:	602b      	str	r3, [r5, #0]
74006952:	bd38      	pop	{r3, r4, r5, pc}

74006954 <__sclose>:
74006954:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
74006958:	f000 b990 	b.w	74006c7c <_close_r>

7400695c <__sseek>:
7400695c:	b510      	push	{r4, lr}
7400695e:	460c      	mov	r4, r1
74006960:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
74006964:	f000 fa2e 	bl	74006dc4 <_lseek_r>
74006968:	89a3      	ldrh	r3, [r4, #12]
7400696a:	f1b0 3fff 	cmp.w	r0, #4294967295
7400696e:	bf15      	itete	ne
74006970:	6560      	strne	r0, [r4, #84]	; 0x54
74006972:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
74006976:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
7400697a:	81a3      	strheq	r3, [r4, #12]
7400697c:	bf18      	it	ne
7400697e:	81a3      	strhne	r3, [r4, #12]
74006980:	bd10      	pop	{r4, pc}
74006982:	bf00      	nop

74006984 <__swrite>:
74006984:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
74006988:	461d      	mov	r5, r3
7400698a:	898b      	ldrh	r3, [r1, #12]
7400698c:	460c      	mov	r4, r1
7400698e:	4616      	mov	r6, r2
74006990:	4607      	mov	r7, r0
74006992:	f413 7f80 	tst.w	r3, #256	; 0x100
74006996:	d006      	beq.n	740069a6 <__swrite+0x22>
74006998:	2302      	movs	r3, #2
7400699a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
7400699e:	2200      	movs	r2, #0
740069a0:	f000 fa10 	bl	74006dc4 <_lseek_r>
740069a4:	89a3      	ldrh	r3, [r4, #12]
740069a6:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
740069aa:	4638      	mov	r0, r7
740069ac:	81a3      	strh	r3, [r4, #12]
740069ae:	4632      	mov	r2, r6
740069b0:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
740069b4:	462b      	mov	r3, r5
740069b6:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
740069ba:	f7f9 be89 	b.w	740006d0 <_write_r>
740069be:	bf00      	nop

740069c0 <__sread>:
740069c0:	b510      	push	{r4, lr}
740069c2:	460c      	mov	r4, r1
740069c4:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
740069c8:	f000 fa12 	bl	74006df0 <_read_r>
740069cc:	2800      	cmp	r0, #0
740069ce:	db03      	blt.n	740069d8 <__sread+0x18>
740069d0:	6d63      	ldr	r3, [r4, #84]	; 0x54
740069d2:	181b      	adds	r3, r3, r0
740069d4:	6563      	str	r3, [r4, #84]	; 0x54
740069d6:	bd10      	pop	{r4, pc}
740069d8:	89a3      	ldrh	r3, [r4, #12]
740069da:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
740069de:	81a3      	strh	r3, [r4, #12]
740069e0:	bd10      	pop	{r4, pc}
740069e2:	bf00      	nop

740069e4 <strcmp>:
740069e4:	ea80 0201 	eor.w	r2, r0, r1
740069e8:	f012 0f03 	tst.w	r2, #3
740069ec:	d13a      	bne.n	74006a64 <strcmp_unaligned>
740069ee:	f010 0203 	ands.w	r2, r0, #3
740069f2:	f020 0003 	bic.w	r0, r0, #3
740069f6:	f021 0103 	bic.w	r1, r1, #3
740069fa:	f850 cb04 	ldr.w	ip, [r0], #4
740069fe:	bf08      	it	eq
74006a00:	f851 3b04 	ldreq.w	r3, [r1], #4
74006a04:	d00d      	beq.n	74006a22 <strcmp+0x3e>
74006a06:	f082 0203 	eor.w	r2, r2, #3
74006a0a:	ea4f 02c2 	mov.w	r2, r2, lsl #3
74006a0e:	f06f 437f 	mvn.w	r3, #4278190080	; 0xff000000
74006a12:	fa23 f202 	lsr.w	r2, r3, r2
74006a16:	f851 3b04 	ldr.w	r3, [r1], #4
74006a1a:	ea4c 0c02 	orr.w	ip, ip, r2
74006a1e:	ea43 0302 	orr.w	r3, r3, r2
74006a22:	bf00      	nop
74006a24:	f1ac 3201 	sub.w	r2, ip, #16843009	; 0x1010101
74006a28:	459c      	cmp	ip, r3
74006a2a:	bf01      	itttt	eq
74006a2c:	ea22 020c 	biceq.w	r2, r2, ip
74006a30:	f012 3f80 	tsteq.w	r2, #2155905152	; 0x80808080
74006a34:	f850 cb04 	ldreq.w	ip, [r0], #4
74006a38:	f851 3b04 	ldreq.w	r3, [r1], #4
74006a3c:	d0f2      	beq.n	74006a24 <strcmp+0x40>
74006a3e:	ea4f 600c 	mov.w	r0, ip, lsl #24
74006a42:	ea4f 2c1c 	mov.w	ip, ip, lsr #8
74006a46:	2801      	cmp	r0, #1
74006a48:	bf28      	it	cs
74006a4a:	ebb0 6f03 	cmpcs.w	r0, r3, lsl #24
74006a4e:	bf08      	it	eq
74006a50:	0a1b      	lsreq	r3, r3, #8
74006a52:	d0f4      	beq.n	74006a3e <strcmp+0x5a>
74006a54:	f003 03ff 	and.w	r3, r3, #255	; 0xff
74006a58:	ea4f 6010 	mov.w	r0, r0, lsr #24
74006a5c:	eba0 0003 	sub.w	r0, r0, r3
74006a60:	4770      	bx	lr
74006a62:	bf00      	nop

74006a64 <strcmp_unaligned>:
74006a64:	f010 0f03 	tst.w	r0, #3
74006a68:	d00a      	beq.n	74006a80 <strcmp_unaligned+0x1c>
74006a6a:	f810 2b01 	ldrb.w	r2, [r0], #1
74006a6e:	f811 3b01 	ldrb.w	r3, [r1], #1
74006a72:	2a01      	cmp	r2, #1
74006a74:	bf28      	it	cs
74006a76:	429a      	cmpcs	r2, r3
74006a78:	d0f4      	beq.n	74006a64 <strcmp_unaligned>
74006a7a:	eba2 0003 	sub.w	r0, r2, r3
74006a7e:	4770      	bx	lr
74006a80:	f84d 5d04 	str.w	r5, [sp, #-4]!
74006a84:	f84d 4d04 	str.w	r4, [sp, #-4]!
74006a88:	f04f 0201 	mov.w	r2, #1
74006a8c:	ea42 2202 	orr.w	r2, r2, r2, lsl #8
74006a90:	ea42 4202 	orr.w	r2, r2, r2, lsl #16
74006a94:	f001 0c03 	and.w	ip, r1, #3
74006a98:	f021 0103 	bic.w	r1, r1, #3
74006a9c:	f850 4b04 	ldr.w	r4, [r0], #4
74006aa0:	f851 5b04 	ldr.w	r5, [r1], #4
74006aa4:	f1bc 0f02 	cmp.w	ip, #2
74006aa8:	d026      	beq.n	74006af8 <strcmp_unaligned+0x94>
74006aaa:	d84b      	bhi.n	74006b44 <strcmp_unaligned+0xe0>
74006aac:	f024 4c7f 	bic.w	ip, r4, #4278190080	; 0xff000000
74006ab0:	ebbc 2f15 	cmp.w	ip, r5, lsr #8
74006ab4:	eba4 0302 	sub.w	r3, r4, r2
74006ab8:	ea23 0304 	bic.w	r3, r3, r4
74006abc:	d10d      	bne.n	74006ada <strcmp_unaligned+0x76>
74006abe:	ea13 13c2 	ands.w	r3, r3, r2, lsl #7
74006ac2:	bf08      	it	eq
74006ac4:	f851 5b04 	ldreq.w	r5, [r1], #4
74006ac8:	d10a      	bne.n	74006ae0 <strcmp_unaligned+0x7c>
74006aca:	ea8c 0c04 	eor.w	ip, ip, r4
74006ace:	ebbc 6f05 	cmp.w	ip, r5, lsl #24
74006ad2:	d10c      	bne.n	74006aee <strcmp_unaligned+0x8a>
74006ad4:	f850 4b04 	ldr.w	r4, [r0], #4
74006ad8:	e7e8      	b.n	74006aac <strcmp_unaligned+0x48>
74006ada:	ea4f 2515 	mov.w	r5, r5, lsr #8
74006ade:	e05c      	b.n	74006b9a <strcmp_unaligned+0x136>
74006ae0:	f033 437f 	bics.w	r3, r3, #4278190080	; 0xff000000
74006ae4:	d152      	bne.n	74006b8c <strcmp_unaligned+0x128>
74006ae6:	780d      	ldrb	r5, [r1, #0]
74006ae8:	ea4f 6c14 	mov.w	ip, r4, lsr #24
74006aec:	e055      	b.n	74006b9a <strcmp_unaligned+0x136>
74006aee:	ea4f 6c14 	mov.w	ip, r4, lsr #24
74006af2:	f005 05ff 	and.w	r5, r5, #255	; 0xff
74006af6:	e050      	b.n	74006b9a <strcmp_unaligned+0x136>
74006af8:	ea4f 4c04 	mov.w	ip, r4, lsl #16
74006afc:	eba4 0302 	sub.w	r3, r4, r2
74006b00:	ea4f 4c1c 	mov.w	ip, ip, lsr #16
74006b04:	ea23 0304 	bic.w	r3, r3, r4
74006b08:	ebbc 4f15 	cmp.w	ip, r5, lsr #16
74006b0c:	d117      	bne.n	74006b3e <strcmp_unaligned+0xda>
74006b0e:	ea13 13c2 	ands.w	r3, r3, r2, lsl #7
74006b12:	bf08      	it	eq
74006b14:	f851 5b04 	ldreq.w	r5, [r1], #4
74006b18:	d107      	bne.n	74006b2a <strcmp_unaligned+0xc6>
74006b1a:	ea8c 0c04 	eor.w	ip, ip, r4
74006b1e:	ebbc 4f05 	cmp.w	ip, r5, lsl #16
74006b22:	d108      	bne.n	74006b36 <strcmp_unaligned+0xd2>
74006b24:	f850 4b04 	ldr.w	r4, [r0], #4
74006b28:	e7e6      	b.n	74006af8 <strcmp_unaligned+0x94>
74006b2a:	041b      	lsls	r3, r3, #16
74006b2c:	d12e      	bne.n	74006b8c <strcmp_unaligned+0x128>
74006b2e:	880d      	ldrh	r5, [r1, #0]
74006b30:	ea4f 4c14 	mov.w	ip, r4, lsr #16
74006b34:	e031      	b.n	74006b9a <strcmp_unaligned+0x136>
74006b36:	ea4f 4505 	mov.w	r5, r5, lsl #16
74006b3a:	ea4f 4c14 	mov.w	ip, r4, lsr #16
74006b3e:	ea4f 4515 	mov.w	r5, r5, lsr #16
74006b42:	e02a      	b.n	74006b9a <strcmp_unaligned+0x136>
74006b44:	f004 0cff 	and.w	ip, r4, #255	; 0xff
74006b48:	ebbc 6f15 	cmp.w	ip, r5, lsr #24
74006b4c:	eba4 0302 	sub.w	r3, r4, r2
74006b50:	ea23 0304 	bic.w	r3, r3, r4
74006b54:	d10d      	bne.n	74006b72 <strcmp_unaligned+0x10e>
74006b56:	ea13 13c2 	ands.w	r3, r3, r2, lsl #7
74006b5a:	bf08      	it	eq
74006b5c:	f851 5b04 	ldreq.w	r5, [r1], #4
74006b60:	d10a      	bne.n	74006b78 <strcmp_unaligned+0x114>
74006b62:	ea8c 0c04 	eor.w	ip, ip, r4
74006b66:	ebbc 2f05 	cmp.w	ip, r5, lsl #8
74006b6a:	d10a      	bne.n	74006b82 <strcmp_unaligned+0x11e>
74006b6c:	f850 4b04 	ldr.w	r4, [r0], #4
74006b70:	e7e8      	b.n	74006b44 <strcmp_unaligned+0xe0>
74006b72:	ea4f 6515 	mov.w	r5, r5, lsr #24
74006b76:	e010      	b.n	74006b9a <strcmp_unaligned+0x136>
74006b78:	f014 0fff 	tst.w	r4, #255	; 0xff
74006b7c:	d006      	beq.n	74006b8c <strcmp_unaligned+0x128>
74006b7e:	f851 5b04 	ldr.w	r5, [r1], #4
74006b82:	ea4f 2c14 	mov.w	ip, r4, lsr #8
74006b86:	f025 457f 	bic.w	r5, r5, #4278190080	; 0xff000000
74006b8a:	e006      	b.n	74006b9a <strcmp_unaligned+0x136>
74006b8c:	f04f 0000 	mov.w	r0, #0
74006b90:	f85d 4b04 	ldr.w	r4, [sp], #4
74006b94:	f85d 5b04 	ldr.w	r5, [sp], #4
74006b98:	4770      	bx	lr
74006b9a:	f00c 02ff 	and.w	r2, ip, #255	; 0xff
74006b9e:	f005 00ff 	and.w	r0, r5, #255	; 0xff
74006ba2:	2801      	cmp	r0, #1
74006ba4:	bf28      	it	cs
74006ba6:	4290      	cmpcs	r0, r2
74006ba8:	bf04      	itt	eq
74006baa:	ea4f 2c1c 	moveq.w	ip, ip, lsr #8
74006bae:	0a2d      	lsreq	r5, r5, #8
74006bb0:	d0f3      	beq.n	74006b9a <strcmp_unaligned+0x136>
74006bb2:	eba2 0000 	sub.w	r0, r2, r0
74006bb6:	f85d 4b04 	ldr.w	r4, [sp], #4
74006bba:	f85d 5b04 	ldr.w	r5, [sp], #4
74006bbe:	4770      	bx	lr

74006bc0 <strlen>:
74006bc0:	f020 0103 	bic.w	r1, r0, #3
74006bc4:	f010 0003 	ands.w	r0, r0, #3
74006bc8:	f1c0 0000 	rsb	r0, r0, #0
74006bcc:	f851 3b04 	ldr.w	r3, [r1], #4
74006bd0:	f100 0c04 	add.w	ip, r0, #4
74006bd4:	ea4f 0ccc 	mov.w	ip, ip, lsl #3
74006bd8:	f06f 0200 	mvn.w	r2, #0
74006bdc:	bf1c      	itt	ne
74006bde:	fa22 f20c 	lsrne.w	r2, r2, ip
74006be2:	4313      	orrne	r3, r2
74006be4:	f04f 0c01 	mov.w	ip, #1
74006be8:	ea4c 2c0c 	orr.w	ip, ip, ip, lsl #8
74006bec:	ea4c 4c0c 	orr.w	ip, ip, ip, lsl #16
74006bf0:	eba3 020c 	sub.w	r2, r3, ip
74006bf4:	ea22 0203 	bic.w	r2, r2, r3
74006bf8:	ea12 12cc 	ands.w	r2, r2, ip, lsl #7
74006bfc:	bf04      	itt	eq
74006bfe:	f851 3b04 	ldreq.w	r3, [r1], #4
74006c02:	3004      	addeq	r0, #4
74006c04:	d0f4      	beq.n	74006bf0 <strlen+0x30>
74006c06:	f013 0fff 	tst.w	r3, #255	; 0xff
74006c0a:	bf1f      	itttt	ne
74006c0c:	3001      	addne	r0, #1
74006c0e:	f413 4f7f 	tstne.w	r3, #65280	; 0xff00
74006c12:	3001      	addne	r0, #1
74006c14:	f413 0f7f 	tstne.w	r3, #16711680	; 0xff0000
74006c18:	bf18      	it	ne
74006c1a:	3001      	addne	r0, #1
74006c1c:	4770      	bx	lr
74006c1e:	bf00      	nop

74006c20 <_calloc_r>:
74006c20:	b538      	push	{r3, r4, r5, lr}
74006c22:	fb01 f102 	mul.w	r1, r1, r2
74006c26:	f7fe fb3d 	bl	740052a4 <_malloc_r>
74006c2a:	4604      	mov	r4, r0
74006c2c:	b1f8      	cbz	r0, 74006c6e <_calloc_r+0x4e>
74006c2e:	f850 2c04 	ldr.w	r2, [r0, #-4]
74006c32:	f022 0203 	bic.w	r2, r2, #3
74006c36:	3a04      	subs	r2, #4
74006c38:	2a24      	cmp	r2, #36	; 0x24
74006c3a:	d81a      	bhi.n	74006c72 <_calloc_r+0x52>
74006c3c:	2a13      	cmp	r2, #19
74006c3e:	4603      	mov	r3, r0
74006c40:	d90f      	bls.n	74006c62 <_calloc_r+0x42>
74006c42:	2100      	movs	r1, #0
74006c44:	f840 1b04 	str.w	r1, [r0], #4
74006c48:	1d03      	adds	r3, r0, #4
74006c4a:	2a1b      	cmp	r2, #27
74006c4c:	6061      	str	r1, [r4, #4]
74006c4e:	d908      	bls.n	74006c62 <_calloc_r+0x42>
74006c50:	1d1d      	adds	r5, r3, #4
74006c52:	6041      	str	r1, [r0, #4]
74006c54:	6059      	str	r1, [r3, #4]
74006c56:	1d2b      	adds	r3, r5, #4
74006c58:	2a24      	cmp	r2, #36	; 0x24
74006c5a:	bf02      	ittt	eq
74006c5c:	6069      	streq	r1, [r5, #4]
74006c5e:	6059      	streq	r1, [r3, #4]
74006c60:	3308      	addeq	r3, #8
74006c62:	461a      	mov	r2, r3
74006c64:	2100      	movs	r1, #0
74006c66:	f842 1b04 	str.w	r1, [r2], #4
74006c6a:	6059      	str	r1, [r3, #4]
74006c6c:	6051      	str	r1, [r2, #4]
74006c6e:	4620      	mov	r0, r4
74006c70:	bd38      	pop	{r3, r4, r5, pc}
74006c72:	2100      	movs	r1, #0
74006c74:	f7fe ff46 	bl	74005b04 <memset>
74006c78:	4620      	mov	r0, r4
74006c7a:	bd38      	pop	{r3, r4, r5, pc}

74006c7c <_close_r>:
74006c7c:	b538      	push	{r3, r4, r5, lr}
74006c7e:	f240 54f0 	movw	r4, #1520	; 0x5f0
74006c82:	f2c7 0400 	movt	r4, #28672	; 0x7000
74006c86:	4605      	mov	r5, r0
74006c88:	4608      	mov	r0, r1
74006c8a:	2300      	movs	r3, #0
74006c8c:	6023      	str	r3, [r4, #0]
74006c8e:	f7f9 fc79 	bl	74000584 <_close>
74006c92:	f1b0 3fff 	cmp.w	r0, #4294967295
74006c96:	d000      	beq.n	74006c9a <_close_r+0x1e>
74006c98:	bd38      	pop	{r3, r4, r5, pc}
74006c9a:	6823      	ldr	r3, [r4, #0]
74006c9c:	2b00      	cmp	r3, #0
74006c9e:	d0fb      	beq.n	74006c98 <_close_r+0x1c>
74006ca0:	602b      	str	r3, [r5, #0]
74006ca2:	bd38      	pop	{r3, r4, r5, pc}

74006ca4 <_fclose_r>:
74006ca4:	b570      	push	{r4, r5, r6, lr}
74006ca6:	4605      	mov	r5, r0
74006ca8:	460c      	mov	r4, r1
74006caa:	2900      	cmp	r1, #0
74006cac:	d04b      	beq.n	74006d46 <_fclose_r+0xa2>
74006cae:	f7fd fe3f 	bl	74004930 <__sfp_lock_acquire>
74006cb2:	b115      	cbz	r5, 74006cba <_fclose_r+0x16>
74006cb4:	69ab      	ldr	r3, [r5, #24]
74006cb6:	2b00      	cmp	r3, #0
74006cb8:	d048      	beq.n	74006d4c <_fclose_r+0xa8>
74006cba:	f248 330c 	movw	r3, #33548	; 0x830c
74006cbe:	f2c7 4300 	movt	r3, #29696	; 0x7400
74006cc2:	429c      	cmp	r4, r3
74006cc4:	bf08      	it	eq
74006cc6:	686c      	ldreq	r4, [r5, #4]
74006cc8:	d00e      	beq.n	74006ce8 <_fclose_r+0x44>
74006cca:	f248 332c 	movw	r3, #33580	; 0x832c
74006cce:	f2c7 4300 	movt	r3, #29696	; 0x7400
74006cd2:	429c      	cmp	r4, r3
74006cd4:	bf08      	it	eq
74006cd6:	68ac      	ldreq	r4, [r5, #8]
74006cd8:	d006      	beq.n	74006ce8 <_fclose_r+0x44>
74006cda:	f248 334c 	movw	r3, #33612	; 0x834c
74006cde:	f2c7 4300 	movt	r3, #29696	; 0x7400
74006ce2:	429c      	cmp	r4, r3
74006ce4:	bf08      	it	eq
74006ce6:	68ec      	ldreq	r4, [r5, #12]
74006ce8:	f9b4 600c 	ldrsh.w	r6, [r4, #12]
74006cec:	b33e      	cbz	r6, 74006d3e <_fclose_r+0x9a>
74006cee:	4628      	mov	r0, r5
74006cf0:	4621      	mov	r1, r4
74006cf2:	f7fd fd61 	bl	740047b8 <_fflush_r>
74006cf6:	6b23      	ldr	r3, [r4, #48]	; 0x30
74006cf8:	4606      	mov	r6, r0
74006cfa:	b13b      	cbz	r3, 74006d0c <_fclose_r+0x68>
74006cfc:	4628      	mov	r0, r5
74006cfe:	6a21      	ldr	r1, [r4, #32]
74006d00:	4798      	blx	r3
74006d02:	ea36 0620 	bics.w	r6, r6, r0, asr #32
74006d06:	bf28      	it	cs
74006d08:	f04f 36ff 	movcs.w	r6, #4294967295
74006d0c:	89a3      	ldrh	r3, [r4, #12]
74006d0e:	f013 0f80 	tst.w	r3, #128	; 0x80
74006d12:	d11f      	bne.n	74006d54 <_fclose_r+0xb0>
74006d14:	6b61      	ldr	r1, [r4, #52]	; 0x34
74006d16:	b141      	cbz	r1, 74006d2a <_fclose_r+0x86>
74006d18:	f104 0344 	add.w	r3, r4, #68	; 0x44
74006d1c:	4299      	cmp	r1, r3
74006d1e:	d002      	beq.n	74006d26 <_fclose_r+0x82>
74006d20:	4628      	mov	r0, r5
74006d22:	f7fd ff3d 	bl	74004ba0 <_free_r>
74006d26:	2300      	movs	r3, #0
74006d28:	6363      	str	r3, [r4, #52]	; 0x34
74006d2a:	6ca1      	ldr	r1, [r4, #72]	; 0x48
74006d2c:	b121      	cbz	r1, 74006d38 <_fclose_r+0x94>
74006d2e:	4628      	mov	r0, r5
74006d30:	f7fd ff36 	bl	74004ba0 <_free_r>
74006d34:	2300      	movs	r3, #0
74006d36:	64a3      	str	r3, [r4, #72]	; 0x48
74006d38:	f04f 0300 	mov.w	r3, #0
74006d3c:	81a3      	strh	r3, [r4, #12]
74006d3e:	f7fd fdf9 	bl	74004934 <__sfp_lock_release>
74006d42:	4630      	mov	r0, r6
74006d44:	bd70      	pop	{r4, r5, r6, pc}
74006d46:	460e      	mov	r6, r1
74006d48:	4630      	mov	r0, r6
74006d4a:	bd70      	pop	{r4, r5, r6, pc}
74006d4c:	4628      	mov	r0, r5
74006d4e:	f7fd fea3 	bl	74004a98 <__sinit>
74006d52:	e7b2      	b.n	74006cba <_fclose_r+0x16>
74006d54:	4628      	mov	r0, r5
74006d56:	6921      	ldr	r1, [r4, #16]
74006d58:	f7fd ff22 	bl	74004ba0 <_free_r>
74006d5c:	e7da      	b.n	74006d14 <_fclose_r+0x70>
74006d5e:	bf00      	nop

74006d60 <fclose>:
74006d60:	f240 033c 	movw	r3, #60	; 0x3c
74006d64:	4601      	mov	r1, r0
74006d66:	f2c7 0300 	movt	r3, #28672	; 0x7000
74006d6a:	6818      	ldr	r0, [r3, #0]
74006d6c:	e79a      	b.n	74006ca4 <_fclose_r>
74006d6e:	bf00      	nop

74006d70 <_fstat_r>:
74006d70:	b538      	push	{r3, r4, r5, lr}
74006d72:	f240 54f0 	movw	r4, #1520	; 0x5f0
74006d76:	f2c7 0400 	movt	r4, #28672	; 0x7000
74006d7a:	4605      	mov	r5, r0
74006d7c:	4608      	mov	r0, r1
74006d7e:	4611      	mov	r1, r2
74006d80:	2300      	movs	r3, #0
74006d82:	6023      	str	r3, [r4, #0]
74006d84:	f7f9 fc30 	bl	740005e8 <_fstat>
74006d88:	f1b0 3fff 	cmp.w	r0, #4294967295
74006d8c:	d000      	beq.n	74006d90 <_fstat_r+0x20>
74006d8e:	bd38      	pop	{r3, r4, r5, pc}
74006d90:	6823      	ldr	r3, [r4, #0]
74006d92:	2b00      	cmp	r3, #0
74006d94:	d0fb      	beq.n	74006d8e <_fstat_r+0x1e>
74006d96:	602b      	str	r3, [r5, #0]
74006d98:	bd38      	pop	{r3, r4, r5, pc}
74006d9a:	bf00      	nop

74006d9c <_isatty_r>:
74006d9c:	b538      	push	{r3, r4, r5, lr}
74006d9e:	f240 54f0 	movw	r4, #1520	; 0x5f0
74006da2:	f2c7 0400 	movt	r4, #28672	; 0x7000
74006da6:	4605      	mov	r5, r0
74006da8:	4608      	mov	r0, r1
74006daa:	2300      	movs	r3, #0
74006dac:	6023      	str	r3, [r4, #0]
74006dae:	f7f9 fc35 	bl	7400061c <_isatty>
74006db2:	f1b0 3fff 	cmp.w	r0, #4294967295
74006db6:	d000      	beq.n	74006dba <_isatty_r+0x1e>
74006db8:	bd38      	pop	{r3, r4, r5, pc}
74006dba:	6823      	ldr	r3, [r4, #0]
74006dbc:	2b00      	cmp	r3, #0
74006dbe:	d0fb      	beq.n	74006db8 <_isatty_r+0x1c>
74006dc0:	602b      	str	r3, [r5, #0]
74006dc2:	bd38      	pop	{r3, r4, r5, pc}

74006dc4 <_lseek_r>:
74006dc4:	b538      	push	{r3, r4, r5, lr}
74006dc6:	f240 54f0 	movw	r4, #1520	; 0x5f0
74006dca:	f2c7 0400 	movt	r4, #28672	; 0x7000
74006dce:	4605      	mov	r5, r0
74006dd0:	4608      	mov	r0, r1
74006dd2:	4611      	mov	r1, r2
74006dd4:	461a      	mov	r2, r3
74006dd6:	2300      	movs	r3, #0
74006dd8:	6023      	str	r3, [r4, #0]
74006dda:	f7f9 fc4f 	bl	7400067c <_lseek>
74006dde:	f1b0 3fff 	cmp.w	r0, #4294967295
74006de2:	d000      	beq.n	74006de6 <_lseek_r+0x22>
74006de4:	bd38      	pop	{r3, r4, r5, pc}
74006de6:	6823      	ldr	r3, [r4, #0]
74006de8:	2b00      	cmp	r3, #0
74006dea:	d0fb      	beq.n	74006de4 <_lseek_r+0x20>
74006dec:	602b      	str	r3, [r5, #0]
74006dee:	bd38      	pop	{r3, r4, r5, pc}

74006df0 <_read_r>:
74006df0:	b538      	push	{r3, r4, r5, lr}
74006df2:	f240 54f0 	movw	r4, #1520	; 0x5f0
74006df6:	f2c7 0400 	movt	r4, #28672	; 0x7000
74006dfa:	4605      	mov	r5, r0
74006dfc:	4608      	mov	r0, r1
74006dfe:	4611      	mov	r1, r2
74006e00:	461a      	mov	r2, r3
74006e02:	2300      	movs	r3, #0
74006e04:	6023      	str	r3, [r4, #0]
74006e06:	f7f9 fc55 	bl	740006b4 <_read>
74006e0a:	f1b0 3fff 	cmp.w	r0, #4294967295
74006e0e:	d000      	beq.n	74006e12 <_read_r+0x22>
74006e10:	bd38      	pop	{r3, r4, r5, pc}
74006e12:	6823      	ldr	r3, [r4, #0]
74006e14:	2b00      	cmp	r3, #0
74006e16:	d0fb      	beq.n	74006e10 <_read_r+0x20>
74006e18:	602b      	str	r3, [r5, #0]
74006e1a:	bd38      	pop	{r3, r4, r5, pc}

74006e1c <_wrapup_reent>:
74006e1c:	b570      	push	{r4, r5, r6, lr}
74006e1e:	4604      	mov	r4, r0
74006e20:	b188      	cbz	r0, 74006e46 <_wrapup_reent+0x2a>
74006e22:	f104 0248 	add.w	r2, r4, #72	; 0x48
74006e26:	6853      	ldr	r3, [r2, #4]
74006e28:	1e5d      	subs	r5, r3, #1
74006e2a:	d407      	bmi.n	74006e3c <_wrapup_reent+0x20>
74006e2c:	3302      	adds	r3, #2
74006e2e:	eb02 0683 	add.w	r6, r2, r3, lsl #2
74006e32:	f856 3d04 	ldr.w	r3, [r6, #-4]!
74006e36:	4798      	blx	r3
74006e38:	3d01      	subs	r5, #1
74006e3a:	d5fa      	bpl.n	74006e32 <_wrapup_reent+0x16>
74006e3c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
74006e3e:	b10b      	cbz	r3, 74006e44 <_wrapup_reent+0x28>
74006e40:	4620      	mov	r0, r4
74006e42:	4798      	blx	r3
74006e44:	bd70      	pop	{r4, r5, r6, pc}
74006e46:	f240 033c 	movw	r3, #60	; 0x3c
74006e4a:	f2c7 0300 	movt	r3, #28672	; 0x7000
74006e4e:	681c      	ldr	r4, [r3, #0]
74006e50:	e7e7      	b.n	74006e22 <_wrapup_reent+0x6>
74006e52:	bf00      	nop

74006e54 <cleanup_glue>:
74006e54:	b570      	push	{r4, r5, r6, lr}
74006e56:	460c      	mov	r4, r1
74006e58:	6809      	ldr	r1, [r1, #0]
74006e5a:	4605      	mov	r5, r0
74006e5c:	b109      	cbz	r1, 74006e62 <cleanup_glue+0xe>
74006e5e:	f7ff fff9 	bl	74006e54 <cleanup_glue>
74006e62:	4628      	mov	r0, r5
74006e64:	4621      	mov	r1, r4
74006e66:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
74006e6a:	f7fd be99 	b.w	74004ba0 <_free_r>
74006e6e:	bf00      	nop

74006e70 <_reclaim_reent>:
74006e70:	f240 033c 	movw	r3, #60	; 0x3c
74006e74:	f2c7 0300 	movt	r3, #28672	; 0x7000
74006e78:	b570      	push	{r4, r5, r6, lr}
74006e7a:	681b      	ldr	r3, [r3, #0]
74006e7c:	4605      	mov	r5, r0
74006e7e:	4298      	cmp	r0, r3
74006e80:	d046      	beq.n	74006f10 <_reclaim_reent+0xa0>
74006e82:	6a43      	ldr	r3, [r0, #36]	; 0x24
74006e84:	4619      	mov	r1, r3
74006e86:	b1bb      	cbz	r3, 74006eb8 <_reclaim_reent+0x48>
74006e88:	68da      	ldr	r2, [r3, #12]
74006e8a:	b1aa      	cbz	r2, 74006eb8 <_reclaim_reent+0x48>
74006e8c:	2600      	movs	r6, #0
74006e8e:	5991      	ldr	r1, [r2, r6]
74006e90:	b141      	cbz	r1, 74006ea4 <_reclaim_reent+0x34>
74006e92:	680c      	ldr	r4, [r1, #0]
74006e94:	4628      	mov	r0, r5
74006e96:	f7fd fe83 	bl	74004ba0 <_free_r>
74006e9a:	4621      	mov	r1, r4
74006e9c:	2c00      	cmp	r4, #0
74006e9e:	d1f8      	bne.n	74006e92 <_reclaim_reent+0x22>
74006ea0:	6a6b      	ldr	r3, [r5, #36]	; 0x24
74006ea2:	68da      	ldr	r2, [r3, #12]
74006ea4:	3604      	adds	r6, #4
74006ea6:	2e3c      	cmp	r6, #60	; 0x3c
74006ea8:	d001      	beq.n	74006eae <_reclaim_reent+0x3e>
74006eaa:	68da      	ldr	r2, [r3, #12]
74006eac:	e7ef      	b.n	74006e8e <_reclaim_reent+0x1e>
74006eae:	4611      	mov	r1, r2
74006eb0:	4628      	mov	r0, r5
74006eb2:	f7fd fe75 	bl	74004ba0 <_free_r>
74006eb6:	6a69      	ldr	r1, [r5, #36]	; 0x24
74006eb8:	6809      	ldr	r1, [r1, #0]
74006eba:	b111      	cbz	r1, 74006ec2 <_reclaim_reent+0x52>
74006ebc:	4628      	mov	r0, r5
74006ebe:	f7fd fe6f 	bl	74004ba0 <_free_r>
74006ec2:	6969      	ldr	r1, [r5, #20]
74006ec4:	b111      	cbz	r1, 74006ecc <_reclaim_reent+0x5c>
74006ec6:	4628      	mov	r0, r5
74006ec8:	f7fd fe6a 	bl	74004ba0 <_free_r>
74006ecc:	6a69      	ldr	r1, [r5, #36]	; 0x24
74006ece:	b111      	cbz	r1, 74006ed6 <_reclaim_reent+0x66>
74006ed0:	4628      	mov	r0, r5
74006ed2:	f7fd fe65 	bl	74004ba0 <_free_r>
74006ed6:	6ba9      	ldr	r1, [r5, #56]	; 0x38
74006ed8:	b111      	cbz	r1, 74006ee0 <_reclaim_reent+0x70>
74006eda:	4628      	mov	r0, r5
74006edc:	f7fd fe60 	bl	74004ba0 <_free_r>
74006ee0:	6be9      	ldr	r1, [r5, #60]	; 0x3c
74006ee2:	b111      	cbz	r1, 74006eea <_reclaim_reent+0x7a>
74006ee4:	4628      	mov	r0, r5
74006ee6:	f7fd fe5b 	bl	74004ba0 <_free_r>
74006eea:	6c29      	ldr	r1, [r5, #64]	; 0x40
74006eec:	b111      	cbz	r1, 74006ef4 <_reclaim_reent+0x84>
74006eee:	4628      	mov	r0, r5
74006ef0:	f7fd fe56 	bl	74004ba0 <_free_r>
74006ef4:	6cab      	ldr	r3, [r5, #72]	; 0x48
74006ef6:	f8d3 1088 	ldr.w	r1, [r3, #136]	; 0x88
74006efa:	b111      	cbz	r1, 74006f02 <_reclaim_reent+0x92>
74006efc:	4628      	mov	r0, r5
74006efe:	f7fd fe4f 	bl	74004ba0 <_free_r>
74006f02:	6b69      	ldr	r1, [r5, #52]	; 0x34
74006f04:	b111      	cbz	r1, 74006f0c <_reclaim_reent+0x9c>
74006f06:	4628      	mov	r0, r5
74006f08:	f7fd fe4a 	bl	74004ba0 <_free_r>
74006f0c:	69ab      	ldr	r3, [r5, #24]
74006f0e:	b903      	cbnz	r3, 74006f12 <_reclaim_reent+0xa2>
74006f10:	bd70      	pop	{r4, r5, r6, pc}
74006f12:	6aab      	ldr	r3, [r5, #40]	; 0x28
74006f14:	4628      	mov	r0, r5
74006f16:	4798      	blx	r3
74006f18:	f8d5 10d8 	ldr.w	r1, [r5, #216]	; 0xd8
74006f1c:	2900      	cmp	r1, #0
74006f1e:	d0f7      	beq.n	74006f10 <_reclaim_reent+0xa0>
74006f20:	4628      	mov	r0, r5
74006f22:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
74006f26:	e795      	b.n	74006e54 <cleanup_glue>

74006f28 <__aeabi_uidiv>:
74006f28:	1e4a      	subs	r2, r1, #1
74006f2a:	bf08      	it	eq
74006f2c:	4770      	bxeq	lr
74006f2e:	f0c0 8124 	bcc.w	7400717a <__aeabi_uidiv+0x252>
74006f32:	4288      	cmp	r0, r1
74006f34:	f240 8116 	bls.w	74007164 <__aeabi_uidiv+0x23c>
74006f38:	4211      	tst	r1, r2
74006f3a:	f000 8117 	beq.w	7400716c <__aeabi_uidiv+0x244>
74006f3e:	fab0 f380 	clz	r3, r0
74006f42:	fab1 f281 	clz	r2, r1
74006f46:	eba2 0303 	sub.w	r3, r2, r3
74006f4a:	f1c3 031f 	rsb	r3, r3, #31
74006f4e:	a204      	add	r2, pc, #16	; (adr r2, 74006f60 <__aeabi_uidiv+0x38>)
74006f50:	eb02 1303 	add.w	r3, r2, r3, lsl #4
74006f54:	f04f 0200 	mov.w	r2, #0
74006f58:	469f      	mov	pc, r3
74006f5a:	bf00      	nop
74006f5c:	f3af 8000 	nop.w
74006f60:	ebb0 7fc1 	cmp.w	r0, r1, lsl #31
74006f64:	bf00      	nop
74006f66:	eb42 0202 	adc.w	r2, r2, r2
74006f6a:	bf28      	it	cs
74006f6c:	eba0 70c1 	subcs.w	r0, r0, r1, lsl #31
74006f70:	ebb0 7f81 	cmp.w	r0, r1, lsl #30
74006f74:	bf00      	nop
74006f76:	eb42 0202 	adc.w	r2, r2, r2
74006f7a:	bf28      	it	cs
74006f7c:	eba0 7081 	subcs.w	r0, r0, r1, lsl #30
74006f80:	ebb0 7f41 	cmp.w	r0, r1, lsl #29
74006f84:	bf00      	nop
74006f86:	eb42 0202 	adc.w	r2, r2, r2
74006f8a:	bf28      	it	cs
74006f8c:	eba0 7041 	subcs.w	r0, r0, r1, lsl #29
74006f90:	ebb0 7f01 	cmp.w	r0, r1, lsl #28
74006f94:	bf00      	nop
74006f96:	eb42 0202 	adc.w	r2, r2, r2
74006f9a:	bf28      	it	cs
74006f9c:	eba0 7001 	subcs.w	r0, r0, r1, lsl #28
74006fa0:	ebb0 6fc1 	cmp.w	r0, r1, lsl #27
74006fa4:	bf00      	nop
74006fa6:	eb42 0202 	adc.w	r2, r2, r2
74006faa:	bf28      	it	cs
74006fac:	eba0 60c1 	subcs.w	r0, r0, r1, lsl #27
74006fb0:	ebb0 6f81 	cmp.w	r0, r1, lsl #26
74006fb4:	bf00      	nop
74006fb6:	eb42 0202 	adc.w	r2, r2, r2
74006fba:	bf28      	it	cs
74006fbc:	eba0 6081 	subcs.w	r0, r0, r1, lsl #26
74006fc0:	ebb0 6f41 	cmp.w	r0, r1, lsl #25
74006fc4:	bf00      	nop
74006fc6:	eb42 0202 	adc.w	r2, r2, r2
74006fca:	bf28      	it	cs
74006fcc:	eba0 6041 	subcs.w	r0, r0, r1, lsl #25
74006fd0:	ebb0 6f01 	cmp.w	r0, r1, lsl #24
74006fd4:	bf00      	nop
74006fd6:	eb42 0202 	adc.w	r2, r2, r2
74006fda:	bf28      	it	cs
74006fdc:	eba0 6001 	subcs.w	r0, r0, r1, lsl #24
74006fe0:	ebb0 5fc1 	cmp.w	r0, r1, lsl #23
74006fe4:	bf00      	nop
74006fe6:	eb42 0202 	adc.w	r2, r2, r2
74006fea:	bf28      	it	cs
74006fec:	eba0 50c1 	subcs.w	r0, r0, r1, lsl #23
74006ff0:	ebb0 5f81 	cmp.w	r0, r1, lsl #22
74006ff4:	bf00      	nop
74006ff6:	eb42 0202 	adc.w	r2, r2, r2
74006ffa:	bf28      	it	cs
74006ffc:	eba0 5081 	subcs.w	r0, r0, r1, lsl #22
74007000:	ebb0 5f41 	cmp.w	r0, r1, lsl #21
74007004:	bf00      	nop
74007006:	eb42 0202 	adc.w	r2, r2, r2
7400700a:	bf28      	it	cs
7400700c:	eba0 5041 	subcs.w	r0, r0, r1, lsl #21
74007010:	ebb0 5f01 	cmp.w	r0, r1, lsl #20
74007014:	bf00      	nop
74007016:	eb42 0202 	adc.w	r2, r2, r2
7400701a:	bf28      	it	cs
7400701c:	eba0 5001 	subcs.w	r0, r0, r1, lsl #20
74007020:	ebb0 4fc1 	cmp.w	r0, r1, lsl #19
74007024:	bf00      	nop
74007026:	eb42 0202 	adc.w	r2, r2, r2
7400702a:	bf28      	it	cs
7400702c:	eba0 40c1 	subcs.w	r0, r0, r1, lsl #19
74007030:	ebb0 4f81 	cmp.w	r0, r1, lsl #18
74007034:	bf00      	nop
74007036:	eb42 0202 	adc.w	r2, r2, r2
7400703a:	bf28      	it	cs
7400703c:	eba0 4081 	subcs.w	r0, r0, r1, lsl #18
74007040:	ebb0 4f41 	cmp.w	r0, r1, lsl #17
74007044:	bf00      	nop
74007046:	eb42 0202 	adc.w	r2, r2, r2
7400704a:	bf28      	it	cs
7400704c:	eba0 4041 	subcs.w	r0, r0, r1, lsl #17
74007050:	ebb0 4f01 	cmp.w	r0, r1, lsl #16
74007054:	bf00      	nop
74007056:	eb42 0202 	adc.w	r2, r2, r2
7400705a:	bf28      	it	cs
7400705c:	eba0 4001 	subcs.w	r0, r0, r1, lsl #16
74007060:	ebb0 3fc1 	cmp.w	r0, r1, lsl #15
74007064:	bf00      	nop
74007066:	eb42 0202 	adc.w	r2, r2, r2
7400706a:	bf28      	it	cs
7400706c:	eba0 30c1 	subcs.w	r0, r0, r1, lsl #15
74007070:	ebb0 3f81 	cmp.w	r0, r1, lsl #14
74007074:	bf00      	nop
74007076:	eb42 0202 	adc.w	r2, r2, r2
7400707a:	bf28      	it	cs
7400707c:	eba0 3081 	subcs.w	r0, r0, r1, lsl #14
74007080:	ebb0 3f41 	cmp.w	r0, r1, lsl #13
74007084:	bf00      	nop
74007086:	eb42 0202 	adc.w	r2, r2, r2
7400708a:	bf28      	it	cs
7400708c:	eba0 3041 	subcs.w	r0, r0, r1, lsl #13
74007090:	ebb0 3f01 	cmp.w	r0, r1, lsl #12
74007094:	bf00      	nop
74007096:	eb42 0202 	adc.w	r2, r2, r2
7400709a:	bf28      	it	cs
7400709c:	eba0 3001 	subcs.w	r0, r0, r1, lsl #12
740070a0:	ebb0 2fc1 	cmp.w	r0, r1, lsl #11
740070a4:	bf00      	nop
740070a6:	eb42 0202 	adc.w	r2, r2, r2
740070aa:	bf28      	it	cs
740070ac:	eba0 20c1 	subcs.w	r0, r0, r1, lsl #11
740070b0:	ebb0 2f81 	cmp.w	r0, r1, lsl #10
740070b4:	bf00      	nop
740070b6:	eb42 0202 	adc.w	r2, r2, r2
740070ba:	bf28      	it	cs
740070bc:	eba0 2081 	subcs.w	r0, r0, r1, lsl #10
740070c0:	ebb0 2f41 	cmp.w	r0, r1, lsl #9
740070c4:	bf00      	nop
740070c6:	eb42 0202 	adc.w	r2, r2, r2
740070ca:	bf28      	it	cs
740070cc:	eba0 2041 	subcs.w	r0, r0, r1, lsl #9
740070d0:	ebb0 2f01 	cmp.w	r0, r1, lsl #8
740070d4:	bf00      	nop
740070d6:	eb42 0202 	adc.w	r2, r2, r2
740070da:	bf28      	it	cs
740070dc:	eba0 2001 	subcs.w	r0, r0, r1, lsl #8
740070e0:	ebb0 1fc1 	cmp.w	r0, r1, lsl #7
740070e4:	bf00      	nop
740070e6:	eb42 0202 	adc.w	r2, r2, r2
740070ea:	bf28      	it	cs
740070ec:	eba0 10c1 	subcs.w	r0, r0, r1, lsl #7
740070f0:	ebb0 1f81 	cmp.w	r0, r1, lsl #6
740070f4:	bf00      	nop
740070f6:	eb42 0202 	adc.w	r2, r2, r2
740070fa:	bf28      	it	cs
740070fc:	eba0 1081 	subcs.w	r0, r0, r1, lsl #6
74007100:	ebb0 1f41 	cmp.w	r0, r1, lsl #5
74007104:	bf00      	nop
74007106:	eb42 0202 	adc.w	r2, r2, r2
7400710a:	bf28      	it	cs
7400710c:	eba0 1041 	subcs.w	r0, r0, r1, lsl #5
74007110:	ebb0 1f01 	cmp.w	r0, r1, lsl #4
74007114:	bf00      	nop
74007116:	eb42 0202 	adc.w	r2, r2, r2
7400711a:	bf28      	it	cs
7400711c:	eba0 1001 	subcs.w	r0, r0, r1, lsl #4
74007120:	ebb0 0fc1 	cmp.w	r0, r1, lsl #3
74007124:	bf00      	nop
74007126:	eb42 0202 	adc.w	r2, r2, r2
7400712a:	bf28      	it	cs
7400712c:	eba0 00c1 	subcs.w	r0, r0, r1, lsl #3
74007130:	ebb0 0f81 	cmp.w	r0, r1, lsl #2
74007134:	bf00      	nop
74007136:	eb42 0202 	adc.w	r2, r2, r2
7400713a:	bf28      	it	cs
7400713c:	eba0 0081 	subcs.w	r0, r0, r1, lsl #2
74007140:	ebb0 0f41 	cmp.w	r0, r1, lsl #1
74007144:	bf00      	nop
74007146:	eb42 0202 	adc.w	r2, r2, r2
7400714a:	bf28      	it	cs
7400714c:	eba0 0041 	subcs.w	r0, r0, r1, lsl #1
74007150:	ebb0 0f01 	cmp.w	r0, r1
74007154:	bf00      	nop
74007156:	eb42 0202 	adc.w	r2, r2, r2
7400715a:	bf28      	it	cs
7400715c:	eba0 0001 	subcs.w	r0, r0, r1
74007160:	4610      	mov	r0, r2
74007162:	4770      	bx	lr
74007164:	bf0c      	ite	eq
74007166:	2001      	moveq	r0, #1
74007168:	2000      	movne	r0, #0
7400716a:	4770      	bx	lr
7400716c:	fab1 f281 	clz	r2, r1
74007170:	f1c2 021f 	rsb	r2, r2, #31
74007174:	fa20 f002 	lsr.w	r0, r0, r2
74007178:	4770      	bx	lr
7400717a:	b108      	cbz	r0, 74007180 <__aeabi_uidiv+0x258>
7400717c:	f04f 30ff 	mov.w	r0, #4294967295
74007180:	f000 b80e 	b.w	740071a0 <__aeabi_idiv0>

74007184 <__aeabi_uidivmod>:
74007184:	2900      	cmp	r1, #0
74007186:	d0f8      	beq.n	7400717a <__aeabi_uidiv+0x252>
74007188:	e92d 4003 	stmdb	sp!, {r0, r1, lr}
7400718c:	f7ff fecc 	bl	74006f28 <__aeabi_uidiv>
74007190:	e8bd 4006 	ldmia.w	sp!, {r1, r2, lr}
74007194:	fb02 f300 	mul.w	r3, r2, r0
74007198:	eba1 0103 	sub.w	r1, r1, r3
7400719c:	4770      	bx	lr
7400719e:	bf00      	nop

740071a0 <__aeabi_idiv0>:
740071a0:	4770      	bx	lr
740071a2:	bf00      	nop

740071a4 <__aeabi_drsub>:
740071a4:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
740071a8:	e002      	b.n	740071b0 <__adddf3>
740071aa:	bf00      	nop

740071ac <__aeabi_dsub>:
740071ac:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000

740071b0 <__adddf3>:
740071b0:	b530      	push	{r4, r5, lr}
740071b2:	ea4f 0441 	mov.w	r4, r1, lsl #1
740071b6:	ea4f 0543 	mov.w	r5, r3, lsl #1
740071ba:	ea94 0f05 	teq	r4, r5
740071be:	bf08      	it	eq
740071c0:	ea90 0f02 	teqeq	r0, r2
740071c4:	bf1f      	itttt	ne
740071c6:	ea54 0c00 	orrsne.w	ip, r4, r0
740071ca:	ea55 0c02 	orrsne.w	ip, r5, r2
740071ce:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
740071d2:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
740071d6:	f000 80e2 	beq.w	7400739e <__adddf3+0x1ee>
740071da:	ea4f 5454 	mov.w	r4, r4, lsr #21
740071de:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
740071e2:	bfb8      	it	lt
740071e4:	426d      	neglt	r5, r5
740071e6:	dd0c      	ble.n	74007202 <__adddf3+0x52>
740071e8:	442c      	add	r4, r5
740071ea:	ea80 0202 	eor.w	r2, r0, r2
740071ee:	ea81 0303 	eor.w	r3, r1, r3
740071f2:	ea82 0000 	eor.w	r0, r2, r0
740071f6:	ea83 0101 	eor.w	r1, r3, r1
740071fa:	ea80 0202 	eor.w	r2, r0, r2
740071fe:	ea81 0303 	eor.w	r3, r1, r3
74007202:	2d36      	cmp	r5, #54	; 0x36
74007204:	bf88      	it	hi
74007206:	bd30      	pophi	{r4, r5, pc}
74007208:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
7400720c:	ea4f 3101 	mov.w	r1, r1, lsl #12
74007210:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
74007214:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
74007218:	d002      	beq.n	74007220 <__adddf3+0x70>
7400721a:	4240      	negs	r0, r0
7400721c:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
74007220:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
74007224:	ea4f 3303 	mov.w	r3, r3, lsl #12
74007228:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
7400722c:	d002      	beq.n	74007234 <__adddf3+0x84>
7400722e:	4252      	negs	r2, r2
74007230:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
74007234:	ea94 0f05 	teq	r4, r5
74007238:	f000 80a7 	beq.w	7400738a <__adddf3+0x1da>
7400723c:	f1a4 0401 	sub.w	r4, r4, #1
74007240:	f1d5 0e20 	rsbs	lr, r5, #32
74007244:	db0d      	blt.n	74007262 <__adddf3+0xb2>
74007246:	fa02 fc0e 	lsl.w	ip, r2, lr
7400724a:	fa22 f205 	lsr.w	r2, r2, r5
7400724e:	1880      	adds	r0, r0, r2
74007250:	f141 0100 	adc.w	r1, r1, #0
74007254:	fa03 f20e 	lsl.w	r2, r3, lr
74007258:	1880      	adds	r0, r0, r2
7400725a:	fa43 f305 	asr.w	r3, r3, r5
7400725e:	4159      	adcs	r1, r3
74007260:	e00e      	b.n	74007280 <__adddf3+0xd0>
74007262:	f1a5 0520 	sub.w	r5, r5, #32
74007266:	f10e 0e20 	add.w	lr, lr, #32
7400726a:	2a01      	cmp	r2, #1
7400726c:	fa03 fc0e 	lsl.w	ip, r3, lr
74007270:	bf28      	it	cs
74007272:	f04c 0c02 	orrcs.w	ip, ip, #2
74007276:	fa43 f305 	asr.w	r3, r3, r5
7400727a:	18c0      	adds	r0, r0, r3
7400727c:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
74007280:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
74007284:	d507      	bpl.n	74007296 <__adddf3+0xe6>
74007286:	f04f 0e00 	mov.w	lr, #0
7400728a:	f1dc 0c00 	rsbs	ip, ip, #0
7400728e:	eb7e 0000 	sbcs.w	r0, lr, r0
74007292:	eb6e 0101 	sbc.w	r1, lr, r1
74007296:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
7400729a:	d31b      	bcc.n	740072d4 <__adddf3+0x124>
7400729c:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
740072a0:	d30c      	bcc.n	740072bc <__adddf3+0x10c>
740072a2:	0849      	lsrs	r1, r1, #1
740072a4:	ea5f 0030 	movs.w	r0, r0, rrx
740072a8:	ea4f 0c3c 	mov.w	ip, ip, rrx
740072ac:	f104 0401 	add.w	r4, r4, #1
740072b0:	ea4f 5244 	mov.w	r2, r4, lsl #21
740072b4:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
740072b8:	f080 809a 	bcs.w	740073f0 <__adddf3+0x240>
740072bc:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
740072c0:	bf08      	it	eq
740072c2:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
740072c6:	f150 0000 	adcs.w	r0, r0, #0
740072ca:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
740072ce:	ea41 0105 	orr.w	r1, r1, r5
740072d2:	bd30      	pop	{r4, r5, pc}
740072d4:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
740072d8:	4140      	adcs	r0, r0
740072da:	eb41 0101 	adc.w	r1, r1, r1
740072de:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
740072e2:	f1a4 0401 	sub.w	r4, r4, #1
740072e6:	d1e9      	bne.n	740072bc <__adddf3+0x10c>
740072e8:	f091 0f00 	teq	r1, #0
740072ec:	bf04      	itt	eq
740072ee:	4601      	moveq	r1, r0
740072f0:	2000      	moveq	r0, #0
740072f2:	fab1 f381 	clz	r3, r1
740072f6:	bf08      	it	eq
740072f8:	3320      	addeq	r3, #32
740072fa:	f1a3 030b 	sub.w	r3, r3, #11
740072fe:	f1b3 0220 	subs.w	r2, r3, #32
74007302:	da0c      	bge.n	7400731e <__adddf3+0x16e>
74007304:	320c      	adds	r2, #12
74007306:	dd08      	ble.n	7400731a <__adddf3+0x16a>
74007308:	f102 0c14 	add.w	ip, r2, #20
7400730c:	f1c2 020c 	rsb	r2, r2, #12
74007310:	fa01 f00c 	lsl.w	r0, r1, ip
74007314:	fa21 f102 	lsr.w	r1, r1, r2
74007318:	e00c      	b.n	74007334 <__adddf3+0x184>
7400731a:	f102 0214 	add.w	r2, r2, #20
7400731e:	bfd8      	it	le
74007320:	f1c2 0c20 	rsble	ip, r2, #32
74007324:	fa01 f102 	lsl.w	r1, r1, r2
74007328:	fa20 fc0c 	lsr.w	ip, r0, ip
7400732c:	bfdc      	itt	le
7400732e:	ea41 010c 	orrle.w	r1, r1, ip
74007332:	4090      	lslle	r0, r2
74007334:	1ae4      	subs	r4, r4, r3
74007336:	bfa2      	ittt	ge
74007338:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
7400733c:	4329      	orrge	r1, r5
7400733e:	bd30      	popge	{r4, r5, pc}
74007340:	ea6f 0404 	mvn.w	r4, r4
74007344:	3c1f      	subs	r4, #31
74007346:	da1c      	bge.n	74007382 <__adddf3+0x1d2>
74007348:	340c      	adds	r4, #12
7400734a:	dc0e      	bgt.n	7400736a <__adddf3+0x1ba>
7400734c:	f104 0414 	add.w	r4, r4, #20
74007350:	f1c4 0220 	rsb	r2, r4, #32
74007354:	fa20 f004 	lsr.w	r0, r0, r4
74007358:	fa01 f302 	lsl.w	r3, r1, r2
7400735c:	ea40 0003 	orr.w	r0, r0, r3
74007360:	fa21 f304 	lsr.w	r3, r1, r4
74007364:	ea45 0103 	orr.w	r1, r5, r3
74007368:	bd30      	pop	{r4, r5, pc}
7400736a:	f1c4 040c 	rsb	r4, r4, #12
7400736e:	f1c4 0220 	rsb	r2, r4, #32
74007372:	fa20 f002 	lsr.w	r0, r0, r2
74007376:	fa01 f304 	lsl.w	r3, r1, r4
7400737a:	ea40 0003 	orr.w	r0, r0, r3
7400737e:	4629      	mov	r1, r5
74007380:	bd30      	pop	{r4, r5, pc}
74007382:	fa21 f004 	lsr.w	r0, r1, r4
74007386:	4629      	mov	r1, r5
74007388:	bd30      	pop	{r4, r5, pc}
7400738a:	f094 0f00 	teq	r4, #0
7400738e:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
74007392:	bf06      	itte	eq
74007394:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
74007398:	3401      	addeq	r4, #1
7400739a:	3d01      	subne	r5, #1
7400739c:	e74e      	b.n	7400723c <__adddf3+0x8c>
7400739e:	ea7f 5c64 	mvns.w	ip, r4, asr #21
740073a2:	bf18      	it	ne
740073a4:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
740073a8:	d029      	beq.n	740073fe <__adddf3+0x24e>
740073aa:	ea94 0f05 	teq	r4, r5
740073ae:	bf08      	it	eq
740073b0:	ea90 0f02 	teqeq	r0, r2
740073b4:	d005      	beq.n	740073c2 <__adddf3+0x212>
740073b6:	ea54 0c00 	orrs.w	ip, r4, r0
740073ba:	bf04      	itt	eq
740073bc:	4619      	moveq	r1, r3
740073be:	4610      	moveq	r0, r2
740073c0:	bd30      	pop	{r4, r5, pc}
740073c2:	ea91 0f03 	teq	r1, r3
740073c6:	bf1e      	ittt	ne
740073c8:	2100      	movne	r1, #0
740073ca:	2000      	movne	r0, #0
740073cc:	bd30      	popne	{r4, r5, pc}
740073ce:	ea5f 5c54 	movs.w	ip, r4, lsr #21
740073d2:	d105      	bne.n	740073e0 <__adddf3+0x230>
740073d4:	0040      	lsls	r0, r0, #1
740073d6:	4149      	adcs	r1, r1
740073d8:	bf28      	it	cs
740073da:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
740073de:	bd30      	pop	{r4, r5, pc}
740073e0:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
740073e4:	bf3c      	itt	cc
740073e6:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
740073ea:	bd30      	popcc	{r4, r5, pc}
740073ec:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
740073f0:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
740073f4:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
740073f8:	f04f 0000 	mov.w	r0, #0
740073fc:	bd30      	pop	{r4, r5, pc}
740073fe:	ea7f 5c64 	mvns.w	ip, r4, asr #21
74007402:	bf1a      	itte	ne
74007404:	4619      	movne	r1, r3
74007406:	4610      	movne	r0, r2
74007408:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
7400740c:	bf1c      	itt	ne
7400740e:	460b      	movne	r3, r1
74007410:	4602      	movne	r2, r0
74007412:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
74007416:	bf06      	itte	eq
74007418:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
7400741c:	ea91 0f03 	teqeq	r1, r3
74007420:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
74007424:	bd30      	pop	{r4, r5, pc}
74007426:	bf00      	nop

74007428 <__aeabi_ui2d>:
74007428:	f090 0f00 	teq	r0, #0
7400742c:	bf04      	itt	eq
7400742e:	2100      	moveq	r1, #0
74007430:	4770      	bxeq	lr
74007432:	b530      	push	{r4, r5, lr}
74007434:	f44f 6480 	mov.w	r4, #1024	; 0x400
74007438:	f104 0432 	add.w	r4, r4, #50	; 0x32
7400743c:	f04f 0500 	mov.w	r5, #0
74007440:	f04f 0100 	mov.w	r1, #0
74007444:	e750      	b.n	740072e8 <__adddf3+0x138>
74007446:	bf00      	nop

74007448 <__aeabi_i2d>:
74007448:	f090 0f00 	teq	r0, #0
7400744c:	bf04      	itt	eq
7400744e:	2100      	moveq	r1, #0
74007450:	4770      	bxeq	lr
74007452:	b530      	push	{r4, r5, lr}
74007454:	f44f 6480 	mov.w	r4, #1024	; 0x400
74007458:	f104 0432 	add.w	r4, r4, #50	; 0x32
7400745c:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
74007460:	bf48      	it	mi
74007462:	4240      	negmi	r0, r0
74007464:	f04f 0100 	mov.w	r1, #0
74007468:	e73e      	b.n	740072e8 <__adddf3+0x138>
7400746a:	bf00      	nop

7400746c <__aeabi_f2d>:
7400746c:	0042      	lsls	r2, r0, #1
7400746e:	ea4f 01e2 	mov.w	r1, r2, asr #3
74007472:	ea4f 0131 	mov.w	r1, r1, rrx
74007476:	ea4f 7002 	mov.w	r0, r2, lsl #28
7400747a:	bf1f      	itttt	ne
7400747c:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
74007480:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
74007484:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
74007488:	4770      	bxne	lr
7400748a:	f092 0f00 	teq	r2, #0
7400748e:	bf14      	ite	ne
74007490:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
74007494:	4770      	bxeq	lr
74007496:	b530      	push	{r4, r5, lr}
74007498:	f44f 7460 	mov.w	r4, #896	; 0x380
7400749c:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
740074a0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
740074a4:	e720      	b.n	740072e8 <__adddf3+0x138>
740074a6:	bf00      	nop

740074a8 <__aeabi_ul2d>:
740074a8:	ea50 0201 	orrs.w	r2, r0, r1
740074ac:	bf08      	it	eq
740074ae:	4770      	bxeq	lr
740074b0:	b530      	push	{r4, r5, lr}
740074b2:	f04f 0500 	mov.w	r5, #0
740074b6:	e00a      	b.n	740074ce <__aeabi_l2d+0x16>

740074b8 <__aeabi_l2d>:
740074b8:	ea50 0201 	orrs.w	r2, r0, r1
740074bc:	bf08      	it	eq
740074be:	4770      	bxeq	lr
740074c0:	b530      	push	{r4, r5, lr}
740074c2:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
740074c6:	d502      	bpl.n	740074ce <__aeabi_l2d+0x16>
740074c8:	4240      	negs	r0, r0
740074ca:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
740074ce:	f44f 6480 	mov.w	r4, #1024	; 0x400
740074d2:	f104 0432 	add.w	r4, r4, #50	; 0x32
740074d6:	ea5f 5c91 	movs.w	ip, r1, lsr #22
740074da:	f43f aedc 	beq.w	74007296 <__adddf3+0xe6>
740074de:	f04f 0203 	mov.w	r2, #3
740074e2:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
740074e6:	bf18      	it	ne
740074e8:	3203      	addne	r2, #3
740074ea:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
740074ee:	bf18      	it	ne
740074f0:	3203      	addne	r2, #3
740074f2:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
740074f6:	f1c2 0320 	rsb	r3, r2, #32
740074fa:	fa00 fc03 	lsl.w	ip, r0, r3
740074fe:	fa20 f002 	lsr.w	r0, r0, r2
74007502:	fa01 fe03 	lsl.w	lr, r1, r3
74007506:	ea40 000e 	orr.w	r0, r0, lr
7400750a:	fa21 f102 	lsr.w	r1, r1, r2
7400750e:	4414      	add	r4, r2
74007510:	e6c1      	b.n	74007296 <__adddf3+0xe6>
74007512:	bf00      	nop

74007514 <__aeabi_dmul>:
74007514:	b570      	push	{r4, r5, r6, lr}
74007516:	f04f 0cff 	mov.w	ip, #255	; 0xff
7400751a:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
7400751e:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
74007522:	bf1d      	ittte	ne
74007524:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
74007528:	ea94 0f0c 	teqne	r4, ip
7400752c:	ea95 0f0c 	teqne	r5, ip
74007530:	f000 f8de 	bleq	740076f0 <__aeabi_dmul+0x1dc>
74007534:	442c      	add	r4, r5
74007536:	ea81 0603 	eor.w	r6, r1, r3
7400753a:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
7400753e:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
74007542:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
74007546:	bf18      	it	ne
74007548:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
7400754c:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
74007550:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
74007554:	d038      	beq.n	740075c8 <__aeabi_dmul+0xb4>
74007556:	fba0 ce02 	umull	ip, lr, r0, r2
7400755a:	f04f 0500 	mov.w	r5, #0
7400755e:	fbe1 e502 	umlal	lr, r5, r1, r2
74007562:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
74007566:	fbe0 e503 	umlal	lr, r5, r0, r3
7400756a:	f04f 0600 	mov.w	r6, #0
7400756e:	fbe1 5603 	umlal	r5, r6, r1, r3
74007572:	f09c 0f00 	teq	ip, #0
74007576:	bf18      	it	ne
74007578:	f04e 0e01 	orrne.w	lr, lr, #1
7400757c:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
74007580:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
74007584:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
74007588:	d204      	bcs.n	74007594 <__aeabi_dmul+0x80>
7400758a:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
7400758e:	416d      	adcs	r5, r5
74007590:	eb46 0606 	adc.w	r6, r6, r6
74007594:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
74007598:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
7400759c:	ea4f 20c5 	mov.w	r0, r5, lsl #11
740075a0:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
740075a4:	ea4f 2ece 	mov.w	lr, lr, lsl #11
740075a8:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
740075ac:	bf88      	it	hi
740075ae:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
740075b2:	d81e      	bhi.n	740075f2 <__aeabi_dmul+0xde>
740075b4:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
740075b8:	bf08      	it	eq
740075ba:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
740075be:	f150 0000 	adcs.w	r0, r0, #0
740075c2:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
740075c6:	bd70      	pop	{r4, r5, r6, pc}
740075c8:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
740075cc:	ea46 0101 	orr.w	r1, r6, r1
740075d0:	ea40 0002 	orr.w	r0, r0, r2
740075d4:	ea81 0103 	eor.w	r1, r1, r3
740075d8:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
740075dc:	bfc2      	ittt	gt
740075de:	ebd4 050c 	rsbsgt	r5, r4, ip
740075e2:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
740075e6:	bd70      	popgt	{r4, r5, r6, pc}
740075e8:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
740075ec:	f04f 0e00 	mov.w	lr, #0
740075f0:	3c01      	subs	r4, #1
740075f2:	f300 80ab 	bgt.w	7400774c <__aeabi_dmul+0x238>
740075f6:	f114 0f36 	cmn.w	r4, #54	; 0x36
740075fa:	bfde      	ittt	le
740075fc:	2000      	movle	r0, #0
740075fe:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
74007602:	bd70      	pople	{r4, r5, r6, pc}
74007604:	f1c4 0400 	rsb	r4, r4, #0
74007608:	3c20      	subs	r4, #32
7400760a:	da35      	bge.n	74007678 <__aeabi_dmul+0x164>
7400760c:	340c      	adds	r4, #12
7400760e:	dc1b      	bgt.n	74007648 <__aeabi_dmul+0x134>
74007610:	f104 0414 	add.w	r4, r4, #20
74007614:	f1c4 0520 	rsb	r5, r4, #32
74007618:	fa00 f305 	lsl.w	r3, r0, r5
7400761c:	fa20 f004 	lsr.w	r0, r0, r4
74007620:	fa01 f205 	lsl.w	r2, r1, r5
74007624:	ea40 0002 	orr.w	r0, r0, r2
74007628:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
7400762c:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
74007630:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
74007634:	fa21 f604 	lsr.w	r6, r1, r4
74007638:	eb42 0106 	adc.w	r1, r2, r6
7400763c:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
74007640:	bf08      	it	eq
74007642:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
74007646:	bd70      	pop	{r4, r5, r6, pc}
74007648:	f1c4 040c 	rsb	r4, r4, #12
7400764c:	f1c4 0520 	rsb	r5, r4, #32
74007650:	fa00 f304 	lsl.w	r3, r0, r4
74007654:	fa20 f005 	lsr.w	r0, r0, r5
74007658:	fa01 f204 	lsl.w	r2, r1, r4
7400765c:	ea40 0002 	orr.w	r0, r0, r2
74007660:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
74007664:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
74007668:	f141 0100 	adc.w	r1, r1, #0
7400766c:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
74007670:	bf08      	it	eq
74007672:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
74007676:	bd70      	pop	{r4, r5, r6, pc}
74007678:	f1c4 0520 	rsb	r5, r4, #32
7400767c:	fa00 f205 	lsl.w	r2, r0, r5
74007680:	ea4e 0e02 	orr.w	lr, lr, r2
74007684:	fa20 f304 	lsr.w	r3, r0, r4
74007688:	fa01 f205 	lsl.w	r2, r1, r5
7400768c:	ea43 0302 	orr.w	r3, r3, r2
74007690:	fa21 f004 	lsr.w	r0, r1, r4
74007694:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
74007698:	fa21 f204 	lsr.w	r2, r1, r4
7400769c:	ea20 0002 	bic.w	r0, r0, r2
740076a0:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
740076a4:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
740076a8:	bf08      	it	eq
740076aa:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
740076ae:	bd70      	pop	{r4, r5, r6, pc}
740076b0:	f094 0f00 	teq	r4, #0
740076b4:	d10f      	bne.n	740076d6 <__aeabi_dmul+0x1c2>
740076b6:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
740076ba:	0040      	lsls	r0, r0, #1
740076bc:	eb41 0101 	adc.w	r1, r1, r1
740076c0:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
740076c4:	bf08      	it	eq
740076c6:	3c01      	subeq	r4, #1
740076c8:	d0f7      	beq.n	740076ba <__aeabi_dmul+0x1a6>
740076ca:	ea41 0106 	orr.w	r1, r1, r6
740076ce:	f095 0f00 	teq	r5, #0
740076d2:	bf18      	it	ne
740076d4:	4770      	bxne	lr
740076d6:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
740076da:	0052      	lsls	r2, r2, #1
740076dc:	eb43 0303 	adc.w	r3, r3, r3
740076e0:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
740076e4:	bf08      	it	eq
740076e6:	3d01      	subeq	r5, #1
740076e8:	d0f7      	beq.n	740076da <__aeabi_dmul+0x1c6>
740076ea:	ea43 0306 	orr.w	r3, r3, r6
740076ee:	4770      	bx	lr
740076f0:	ea94 0f0c 	teq	r4, ip
740076f4:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
740076f8:	bf18      	it	ne
740076fa:	ea95 0f0c 	teqne	r5, ip
740076fe:	d00c      	beq.n	7400771a <__aeabi_dmul+0x206>
74007700:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
74007704:	bf18      	it	ne
74007706:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
7400770a:	d1d1      	bne.n	740076b0 <__aeabi_dmul+0x19c>
7400770c:	ea81 0103 	eor.w	r1, r1, r3
74007710:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
74007714:	f04f 0000 	mov.w	r0, #0
74007718:	bd70      	pop	{r4, r5, r6, pc}
7400771a:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
7400771e:	bf06      	itte	eq
74007720:	4610      	moveq	r0, r2
74007722:	4619      	moveq	r1, r3
74007724:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
74007728:	d019      	beq.n	7400775e <__aeabi_dmul+0x24a>
7400772a:	ea94 0f0c 	teq	r4, ip
7400772e:	d102      	bne.n	74007736 <__aeabi_dmul+0x222>
74007730:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
74007734:	d113      	bne.n	7400775e <__aeabi_dmul+0x24a>
74007736:	ea95 0f0c 	teq	r5, ip
7400773a:	d105      	bne.n	74007748 <__aeabi_dmul+0x234>
7400773c:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
74007740:	bf1c      	itt	ne
74007742:	4610      	movne	r0, r2
74007744:	4619      	movne	r1, r3
74007746:	d10a      	bne.n	7400775e <__aeabi_dmul+0x24a>
74007748:	ea81 0103 	eor.w	r1, r1, r3
7400774c:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
74007750:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
74007754:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
74007758:	f04f 0000 	mov.w	r0, #0
7400775c:	bd70      	pop	{r4, r5, r6, pc}
7400775e:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
74007762:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
74007766:	bd70      	pop	{r4, r5, r6, pc}

74007768 <__aeabi_ddiv>:
74007768:	b570      	push	{r4, r5, r6, lr}
7400776a:	f04f 0cff 	mov.w	ip, #255	; 0xff
7400776e:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
74007772:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
74007776:	bf1d      	ittte	ne
74007778:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
7400777c:	ea94 0f0c 	teqne	r4, ip
74007780:	ea95 0f0c 	teqne	r5, ip
74007784:	f000 f8a7 	bleq	740078d6 <__aeabi_ddiv+0x16e>
74007788:	eba4 0405 	sub.w	r4, r4, r5
7400778c:	ea81 0e03 	eor.w	lr, r1, r3
74007790:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
74007794:	ea4f 3101 	mov.w	r1, r1, lsl #12
74007798:	f000 8088 	beq.w	740078ac <__aeabi_ddiv+0x144>
7400779c:	ea4f 3303 	mov.w	r3, r3, lsl #12
740077a0:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
740077a4:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
740077a8:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
740077ac:	ea4f 2202 	mov.w	r2, r2, lsl #8
740077b0:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
740077b4:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
740077b8:	ea4f 2600 	mov.w	r6, r0, lsl #8
740077bc:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
740077c0:	429d      	cmp	r5, r3
740077c2:	bf08      	it	eq
740077c4:	4296      	cmpeq	r6, r2
740077c6:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
740077ca:	f504 7440 	add.w	r4, r4, #768	; 0x300
740077ce:	d202      	bcs.n	740077d6 <__aeabi_ddiv+0x6e>
740077d0:	085b      	lsrs	r3, r3, #1
740077d2:	ea4f 0232 	mov.w	r2, r2, rrx
740077d6:	1ab6      	subs	r6, r6, r2
740077d8:	eb65 0503 	sbc.w	r5, r5, r3
740077dc:	085b      	lsrs	r3, r3, #1
740077de:	ea4f 0232 	mov.w	r2, r2, rrx
740077e2:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
740077e6:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
740077ea:	ebb6 0e02 	subs.w	lr, r6, r2
740077ee:	eb75 0e03 	sbcs.w	lr, r5, r3
740077f2:	bf22      	ittt	cs
740077f4:	1ab6      	subcs	r6, r6, r2
740077f6:	4675      	movcs	r5, lr
740077f8:	ea40 000c 	orrcs.w	r0, r0, ip
740077fc:	085b      	lsrs	r3, r3, #1
740077fe:	ea4f 0232 	mov.w	r2, r2, rrx
74007802:	ebb6 0e02 	subs.w	lr, r6, r2
74007806:	eb75 0e03 	sbcs.w	lr, r5, r3
7400780a:	bf22      	ittt	cs
7400780c:	1ab6      	subcs	r6, r6, r2
7400780e:	4675      	movcs	r5, lr
74007810:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
74007814:	085b      	lsrs	r3, r3, #1
74007816:	ea4f 0232 	mov.w	r2, r2, rrx
7400781a:	ebb6 0e02 	subs.w	lr, r6, r2
7400781e:	eb75 0e03 	sbcs.w	lr, r5, r3
74007822:	bf22      	ittt	cs
74007824:	1ab6      	subcs	r6, r6, r2
74007826:	4675      	movcs	r5, lr
74007828:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
7400782c:	085b      	lsrs	r3, r3, #1
7400782e:	ea4f 0232 	mov.w	r2, r2, rrx
74007832:	ebb6 0e02 	subs.w	lr, r6, r2
74007836:	eb75 0e03 	sbcs.w	lr, r5, r3
7400783a:	bf22      	ittt	cs
7400783c:	1ab6      	subcs	r6, r6, r2
7400783e:	4675      	movcs	r5, lr
74007840:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
74007844:	ea55 0e06 	orrs.w	lr, r5, r6
74007848:	d018      	beq.n	7400787c <__aeabi_ddiv+0x114>
7400784a:	ea4f 1505 	mov.w	r5, r5, lsl #4
7400784e:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
74007852:	ea4f 1606 	mov.w	r6, r6, lsl #4
74007856:	ea4f 03c3 	mov.w	r3, r3, lsl #3
7400785a:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
7400785e:	ea4f 02c2 	mov.w	r2, r2, lsl #3
74007862:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
74007866:	d1c0      	bne.n	740077ea <__aeabi_ddiv+0x82>
74007868:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
7400786c:	d10b      	bne.n	74007886 <__aeabi_ddiv+0x11e>
7400786e:	ea41 0100 	orr.w	r1, r1, r0
74007872:	f04f 0000 	mov.w	r0, #0
74007876:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
7400787a:	e7b6      	b.n	740077ea <__aeabi_ddiv+0x82>
7400787c:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
74007880:	bf04      	itt	eq
74007882:	4301      	orreq	r1, r0
74007884:	2000      	moveq	r0, #0
74007886:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
7400788a:	bf88      	it	hi
7400788c:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
74007890:	f63f aeaf 	bhi.w	740075f2 <__aeabi_dmul+0xde>
74007894:	ebb5 0c03 	subs.w	ip, r5, r3
74007898:	bf04      	itt	eq
7400789a:	ebb6 0c02 	subseq.w	ip, r6, r2
7400789e:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
740078a2:	f150 0000 	adcs.w	r0, r0, #0
740078a6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
740078aa:	bd70      	pop	{r4, r5, r6, pc}
740078ac:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
740078b0:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
740078b4:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
740078b8:	bfc2      	ittt	gt
740078ba:	ebd4 050c 	rsbsgt	r5, r4, ip
740078be:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
740078c2:	bd70      	popgt	{r4, r5, r6, pc}
740078c4:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
740078c8:	f04f 0e00 	mov.w	lr, #0
740078cc:	3c01      	subs	r4, #1
740078ce:	e690      	b.n	740075f2 <__aeabi_dmul+0xde>
740078d0:	ea45 0e06 	orr.w	lr, r5, r6
740078d4:	e68d      	b.n	740075f2 <__aeabi_dmul+0xde>
740078d6:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
740078da:	ea94 0f0c 	teq	r4, ip
740078de:	bf08      	it	eq
740078e0:	ea95 0f0c 	teqeq	r5, ip
740078e4:	f43f af3b 	beq.w	7400775e <__aeabi_dmul+0x24a>
740078e8:	ea94 0f0c 	teq	r4, ip
740078ec:	d10a      	bne.n	74007904 <__aeabi_ddiv+0x19c>
740078ee:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
740078f2:	f47f af34 	bne.w	7400775e <__aeabi_dmul+0x24a>
740078f6:	ea95 0f0c 	teq	r5, ip
740078fa:	f47f af25 	bne.w	74007748 <__aeabi_dmul+0x234>
740078fe:	4610      	mov	r0, r2
74007900:	4619      	mov	r1, r3
74007902:	e72c      	b.n	7400775e <__aeabi_dmul+0x24a>
74007904:	ea95 0f0c 	teq	r5, ip
74007908:	d106      	bne.n	74007918 <__aeabi_ddiv+0x1b0>
7400790a:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
7400790e:	f43f aefd 	beq.w	7400770c <__aeabi_dmul+0x1f8>
74007912:	4610      	mov	r0, r2
74007914:	4619      	mov	r1, r3
74007916:	e722      	b.n	7400775e <__aeabi_dmul+0x24a>
74007918:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
7400791c:	bf18      	it	ne
7400791e:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
74007922:	f47f aec5 	bne.w	740076b0 <__aeabi_dmul+0x19c>
74007926:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
7400792a:	f47f af0d 	bne.w	74007748 <__aeabi_dmul+0x234>
7400792e:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
74007932:	f47f aeeb 	bne.w	7400770c <__aeabi_dmul+0x1f8>
74007936:	e712      	b.n	7400775e <__aeabi_dmul+0x24a>

74007938 <__gedf2>:
74007938:	f04f 3cff 	mov.w	ip, #4294967295
7400793c:	e006      	b.n	7400794c <__cmpdf2+0x4>
7400793e:	bf00      	nop

74007940 <__ledf2>:
74007940:	f04f 0c01 	mov.w	ip, #1
74007944:	e002      	b.n	7400794c <__cmpdf2+0x4>
74007946:	bf00      	nop

74007948 <__cmpdf2>:
74007948:	f04f 0c01 	mov.w	ip, #1
7400794c:	f84d cd04 	str.w	ip, [sp, #-4]!
74007950:	ea4f 0c41 	mov.w	ip, r1, lsl #1
74007954:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
74007958:	ea4f 0c43 	mov.w	ip, r3, lsl #1
7400795c:	bf18      	it	ne
7400795e:	ea7f 5c6c 	mvnsne.w	ip, ip, asr #21
74007962:	d01b      	beq.n	7400799c <__cmpdf2+0x54>
74007964:	b001      	add	sp, #4
74007966:	ea50 0c41 	orrs.w	ip, r0, r1, lsl #1
7400796a:	bf0c      	ite	eq
7400796c:	ea52 0c43 	orrseq.w	ip, r2, r3, lsl #1
74007970:	ea91 0f03 	teqne	r1, r3
74007974:	bf02      	ittt	eq
74007976:	ea90 0f02 	teqeq	r0, r2
7400797a:	2000      	moveq	r0, #0
7400797c:	4770      	bxeq	lr
7400797e:	f110 0f00 	cmn.w	r0, #0
74007982:	ea91 0f03 	teq	r1, r3
74007986:	bf58      	it	pl
74007988:	4299      	cmppl	r1, r3
7400798a:	bf08      	it	eq
7400798c:	4290      	cmpeq	r0, r2
7400798e:	bf2c      	ite	cs
74007990:	17d8      	asrcs	r0, r3, #31
74007992:	ea6f 70e3 	mvncc.w	r0, r3, asr #31
74007996:	f040 0001 	orr.w	r0, r0, #1
7400799a:	4770      	bx	lr
7400799c:	ea4f 0c41 	mov.w	ip, r1, lsl #1
740079a0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
740079a4:	d102      	bne.n	740079ac <__cmpdf2+0x64>
740079a6:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
740079aa:	d107      	bne.n	740079bc <__cmpdf2+0x74>
740079ac:	ea4f 0c43 	mov.w	ip, r3, lsl #1
740079b0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
740079b4:	d1d6      	bne.n	74007964 <__cmpdf2+0x1c>
740079b6:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
740079ba:	d0d3      	beq.n	74007964 <__cmpdf2+0x1c>
740079bc:	f85d 0b04 	ldr.w	r0, [sp], #4
740079c0:	4770      	bx	lr
740079c2:	bf00      	nop

740079c4 <__aeabi_cdrcmple>:
740079c4:	4684      	mov	ip, r0
740079c6:	4610      	mov	r0, r2
740079c8:	4662      	mov	r2, ip
740079ca:	468c      	mov	ip, r1
740079cc:	4619      	mov	r1, r3
740079ce:	4663      	mov	r3, ip
740079d0:	e000      	b.n	740079d4 <__aeabi_cdcmpeq>
740079d2:	bf00      	nop

740079d4 <__aeabi_cdcmpeq>:
740079d4:	b501      	push	{r0, lr}
740079d6:	f7ff ffb7 	bl	74007948 <__cmpdf2>
740079da:	2800      	cmp	r0, #0
740079dc:	bf48      	it	mi
740079de:	f110 0f00 	cmnmi.w	r0, #0
740079e2:	bd01      	pop	{r0, pc}

740079e4 <__aeabi_dcmpeq>:
740079e4:	f84d ed08 	str.w	lr, [sp, #-8]!
740079e8:	f7ff fff4 	bl	740079d4 <__aeabi_cdcmpeq>
740079ec:	bf0c      	ite	eq
740079ee:	2001      	moveq	r0, #1
740079f0:	2000      	movne	r0, #0
740079f2:	f85d fb08 	ldr.w	pc, [sp], #8
740079f6:	bf00      	nop

740079f8 <__aeabi_dcmplt>:
740079f8:	f84d ed08 	str.w	lr, [sp, #-8]!
740079fc:	f7ff ffea 	bl	740079d4 <__aeabi_cdcmpeq>
74007a00:	bf34      	ite	cc
74007a02:	2001      	movcc	r0, #1
74007a04:	2000      	movcs	r0, #0
74007a06:	f85d fb08 	ldr.w	pc, [sp], #8
74007a0a:	bf00      	nop

74007a0c <__aeabi_dcmple>:
74007a0c:	f84d ed08 	str.w	lr, [sp, #-8]!
74007a10:	f7ff ffe0 	bl	740079d4 <__aeabi_cdcmpeq>
74007a14:	bf94      	ite	ls
74007a16:	2001      	movls	r0, #1
74007a18:	2000      	movhi	r0, #0
74007a1a:	f85d fb08 	ldr.w	pc, [sp], #8
74007a1e:	bf00      	nop

74007a20 <__aeabi_dcmpge>:
74007a20:	f84d ed08 	str.w	lr, [sp, #-8]!
74007a24:	f7ff ffce 	bl	740079c4 <__aeabi_cdrcmple>
74007a28:	bf94      	ite	ls
74007a2a:	2001      	movls	r0, #1
74007a2c:	2000      	movhi	r0, #0
74007a2e:	f85d fb08 	ldr.w	pc, [sp], #8
74007a32:	bf00      	nop

74007a34 <__aeabi_dcmpgt>:
74007a34:	f84d ed08 	str.w	lr, [sp, #-8]!
74007a38:	f7ff ffc4 	bl	740079c4 <__aeabi_cdrcmple>
74007a3c:	bf34      	ite	cc
74007a3e:	2001      	movcc	r0, #1
74007a40:	2000      	movcs	r0, #0
74007a42:	f85d fb08 	ldr.w	pc, [sp], #8
74007a46:	bf00      	nop

74007a48 <__aeabi_d2iz>:
74007a48:	ea4f 0241 	mov.w	r2, r1, lsl #1
74007a4c:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
74007a50:	d215      	bcs.n	74007a7e <__aeabi_d2iz+0x36>
74007a52:	d511      	bpl.n	74007a78 <__aeabi_d2iz+0x30>
74007a54:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
74007a58:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
74007a5c:	d912      	bls.n	74007a84 <__aeabi_d2iz+0x3c>
74007a5e:	ea4f 23c1 	mov.w	r3, r1, lsl #11
74007a62:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
74007a66:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
74007a6a:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
74007a6e:	fa23 f002 	lsr.w	r0, r3, r2
74007a72:	bf18      	it	ne
74007a74:	4240      	negne	r0, r0
74007a76:	4770      	bx	lr
74007a78:	f04f 0000 	mov.w	r0, #0
74007a7c:	4770      	bx	lr
74007a7e:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
74007a82:	d105      	bne.n	74007a90 <__aeabi_d2iz+0x48>
74007a84:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
74007a88:	bf08      	it	eq
74007a8a:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
74007a8e:	4770      	bx	lr
74007a90:	f04f 0000 	mov.w	r0, #0
74007a94:	4770      	bx	lr
74007a96:	bf00      	nop

74007a98 <__aeabi_uldivmod>:
74007a98:	b94b      	cbnz	r3, 74007aae <__aeabi_uldivmod+0x16>
74007a9a:	b942      	cbnz	r2, 74007aae <__aeabi_uldivmod+0x16>
74007a9c:	2900      	cmp	r1, #0
74007a9e:	bf08      	it	eq
74007aa0:	2800      	cmpeq	r0, #0
74007aa2:	d002      	beq.n	74007aaa <__aeabi_uldivmod+0x12>
74007aa4:	f04f 31ff 	mov.w	r1, #4294967295
74007aa8:	4608      	mov	r0, r1
74007aaa:	f7ff bb79 	b.w	740071a0 <__aeabi_idiv0>
74007aae:	b082      	sub	sp, #8
74007ab0:	46ec      	mov	ip, sp
74007ab2:	e92d 5000 	stmdb	sp!, {ip, lr}
74007ab6:	f000 f805 	bl	74007ac4 <__gnu_uldivmod_helper>
74007aba:	f8dd e004 	ldr.w	lr, [sp, #4]
74007abe:	b002      	add	sp, #8
74007ac0:	bc0c      	pop	{r2, r3}
74007ac2:	4770      	bx	lr

74007ac4 <__gnu_uldivmod_helper>:
74007ac4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
74007ac6:	4614      	mov	r4, r2
74007ac8:	461d      	mov	r5, r3
74007aca:	4606      	mov	r6, r0
74007acc:	460f      	mov	r7, r1
74007ace:	f000 f9d7 	bl	74007e80 <__udivdi3>
74007ad2:	fb00 f505 	mul.w	r5, r0, r5
74007ad6:	fba0 2304 	umull	r2, r3, r0, r4
74007ada:	fb04 5401 	mla	r4, r4, r1, r5
74007ade:	18e3      	adds	r3, r4, r3
74007ae0:	1ab6      	subs	r6, r6, r2
74007ae2:	eb67 0703 	sbc.w	r7, r7, r3
74007ae6:	9b06      	ldr	r3, [sp, #24]
74007ae8:	e9c3 6700 	strd	r6, r7, [r3]
74007aec:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
74007aee:	bf00      	nop

74007af0 <__gnu_ldivmod_helper>:
74007af0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
74007af2:	4614      	mov	r4, r2
74007af4:	461d      	mov	r5, r3
74007af6:	4606      	mov	r6, r0
74007af8:	460f      	mov	r7, r1
74007afa:	f000 f80f 	bl	74007b1c <__divdi3>
74007afe:	fb00 f505 	mul.w	r5, r0, r5
74007b02:	fba0 2304 	umull	r2, r3, r0, r4
74007b06:	fb04 5401 	mla	r4, r4, r1, r5
74007b0a:	18e3      	adds	r3, r4, r3
74007b0c:	1ab6      	subs	r6, r6, r2
74007b0e:	eb67 0703 	sbc.w	r7, r7, r3
74007b12:	9b06      	ldr	r3, [sp, #24]
74007b14:	e9c3 6700 	strd	r6, r7, [r3]
74007b18:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
74007b1a:	bf00      	nop

74007b1c <__divdi3>:
74007b1c:	2900      	cmp	r1, #0
74007b1e:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
74007b22:	b085      	sub	sp, #20
74007b24:	f2c0 80c8 	blt.w	74007cb8 <__divdi3+0x19c>
74007b28:	2600      	movs	r6, #0
74007b2a:	2b00      	cmp	r3, #0
74007b2c:	f2c0 80bf 	blt.w	74007cae <__divdi3+0x192>
74007b30:	4689      	mov	r9, r1
74007b32:	4614      	mov	r4, r2
74007b34:	4605      	mov	r5, r0
74007b36:	469b      	mov	fp, r3
74007b38:	2b00      	cmp	r3, #0
74007b3a:	d14a      	bne.n	74007bd2 <__divdi3+0xb6>
74007b3c:	428a      	cmp	r2, r1
74007b3e:	d957      	bls.n	74007bf0 <__divdi3+0xd4>
74007b40:	fab2 f382 	clz	r3, r2
74007b44:	b153      	cbz	r3, 74007b5c <__divdi3+0x40>
74007b46:	f1c3 0020 	rsb	r0, r3, #32
74007b4a:	fa01 f903 	lsl.w	r9, r1, r3
74007b4e:	fa25 f800 	lsr.w	r8, r5, r0
74007b52:	fa12 f403 	lsls.w	r4, r2, r3
74007b56:	409d      	lsls	r5, r3
74007b58:	ea48 0909 	orr.w	r9, r8, r9
74007b5c:	0c27      	lsrs	r7, r4, #16
74007b5e:	4648      	mov	r0, r9
74007b60:	4639      	mov	r1, r7
74007b62:	fa1f fb84 	uxth.w	fp, r4
74007b66:	f7ff f9df 	bl	74006f28 <__aeabi_uidiv>
74007b6a:	4639      	mov	r1, r7
74007b6c:	4682      	mov	sl, r0
74007b6e:	4648      	mov	r0, r9
74007b70:	f7ff fb08 	bl	74007184 <__aeabi_uidivmod>
74007b74:	0c2a      	lsrs	r2, r5, #16
74007b76:	fb0b f30a 	mul.w	r3, fp, sl
74007b7a:	ea42 4901 	orr.w	r9, r2, r1, lsl #16
74007b7e:	454b      	cmp	r3, r9
74007b80:	d909      	bls.n	74007b96 <__divdi3+0x7a>
74007b82:	eb19 0904 	adds.w	r9, r9, r4
74007b86:	f10a 3aff 	add.w	sl, sl, #4294967295
74007b8a:	d204      	bcs.n	74007b96 <__divdi3+0x7a>
74007b8c:	454b      	cmp	r3, r9
74007b8e:	bf84      	itt	hi
74007b90:	f10a 3aff 	addhi.w	sl, sl, #4294967295
74007b94:	44a1      	addhi	r9, r4
74007b96:	ebc3 0909 	rsb	r9, r3, r9
74007b9a:	4639      	mov	r1, r7
74007b9c:	4648      	mov	r0, r9
74007b9e:	b2ad      	uxth	r5, r5
74007ba0:	f7ff f9c2 	bl	74006f28 <__aeabi_uidiv>
74007ba4:	4639      	mov	r1, r7
74007ba6:	4680      	mov	r8, r0
74007ba8:	4648      	mov	r0, r9
74007baa:	f7ff faeb 	bl	74007184 <__aeabi_uidivmod>
74007bae:	fb0b fb08 	mul.w	fp, fp, r8
74007bb2:	ea45 4501 	orr.w	r5, r5, r1, lsl #16
74007bb6:	45ab      	cmp	fp, r5
74007bb8:	d907      	bls.n	74007bca <__divdi3+0xae>
74007bba:	192d      	adds	r5, r5, r4
74007bbc:	f108 38ff 	add.w	r8, r8, #4294967295
74007bc0:	d203      	bcs.n	74007bca <__divdi3+0xae>
74007bc2:	45ab      	cmp	fp, r5
74007bc4:	bf88      	it	hi
74007bc6:	f108 38ff 	addhi.w	r8, r8, #4294967295
74007bca:	ea48 480a 	orr.w	r8, r8, sl, lsl #16
74007bce:	2700      	movs	r7, #0
74007bd0:	e003      	b.n	74007bda <__divdi3+0xbe>
74007bd2:	428b      	cmp	r3, r1
74007bd4:	d957      	bls.n	74007c86 <__divdi3+0x16a>
74007bd6:	2700      	movs	r7, #0
74007bd8:	46b8      	mov	r8, r7
74007bda:	4642      	mov	r2, r8
74007bdc:	463b      	mov	r3, r7
74007bde:	b116      	cbz	r6, 74007be6 <__divdi3+0xca>
74007be0:	4252      	negs	r2, r2
74007be2:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
74007be6:	4619      	mov	r1, r3
74007be8:	4610      	mov	r0, r2
74007bea:	b005      	add	sp, #20
74007bec:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
74007bf0:	b922      	cbnz	r2, 74007bfc <__divdi3+0xe0>
74007bf2:	4611      	mov	r1, r2
74007bf4:	2001      	movs	r0, #1
74007bf6:	f7ff f997 	bl	74006f28 <__aeabi_uidiv>
74007bfa:	4604      	mov	r4, r0
74007bfc:	fab4 f884 	clz	r8, r4
74007c00:	f1b8 0f00 	cmp.w	r8, #0
74007c04:	d15e      	bne.n	74007cc4 <__divdi3+0x1a8>
74007c06:	ebc4 0809 	rsb	r8, r4, r9
74007c0a:	0c27      	lsrs	r7, r4, #16
74007c0c:	fa1f f984 	uxth.w	r9, r4
74007c10:	2101      	movs	r1, #1
74007c12:	9102      	str	r1, [sp, #8]
74007c14:	4639      	mov	r1, r7
74007c16:	4640      	mov	r0, r8
74007c18:	f7ff f986 	bl	74006f28 <__aeabi_uidiv>
74007c1c:	4639      	mov	r1, r7
74007c1e:	4682      	mov	sl, r0
74007c20:	4640      	mov	r0, r8
74007c22:	f7ff faaf 	bl	74007184 <__aeabi_uidivmod>
74007c26:	ea4f 4815 	mov.w	r8, r5, lsr #16
74007c2a:	fb09 f30a 	mul.w	r3, r9, sl
74007c2e:	ea48 4b01 	orr.w	fp, r8, r1, lsl #16
74007c32:	455b      	cmp	r3, fp
74007c34:	d909      	bls.n	74007c4a <__divdi3+0x12e>
74007c36:	eb1b 0b04 	adds.w	fp, fp, r4
74007c3a:	f10a 3aff 	add.w	sl, sl, #4294967295
74007c3e:	d204      	bcs.n	74007c4a <__divdi3+0x12e>
74007c40:	455b      	cmp	r3, fp
74007c42:	bf84      	itt	hi
74007c44:	f10a 3aff 	addhi.w	sl, sl, #4294967295
74007c48:	44a3      	addhi	fp, r4
74007c4a:	ebc3 0b0b 	rsb	fp, r3, fp
74007c4e:	4639      	mov	r1, r7
74007c50:	4658      	mov	r0, fp
74007c52:	b2ad      	uxth	r5, r5
74007c54:	f7ff f968 	bl	74006f28 <__aeabi_uidiv>
74007c58:	4639      	mov	r1, r7
74007c5a:	4680      	mov	r8, r0
74007c5c:	4658      	mov	r0, fp
74007c5e:	f7ff fa91 	bl	74007184 <__aeabi_uidivmod>
74007c62:	fb09 f908 	mul.w	r9, r9, r8
74007c66:	ea45 4501 	orr.w	r5, r5, r1, lsl #16
74007c6a:	45a9      	cmp	r9, r5
74007c6c:	d907      	bls.n	74007c7e <__divdi3+0x162>
74007c6e:	192d      	adds	r5, r5, r4
74007c70:	f108 38ff 	add.w	r8, r8, #4294967295
74007c74:	d203      	bcs.n	74007c7e <__divdi3+0x162>
74007c76:	45a9      	cmp	r9, r5
74007c78:	bf88      	it	hi
74007c7a:	f108 38ff 	addhi.w	r8, r8, #4294967295
74007c7e:	ea48 480a 	orr.w	r8, r8, sl, lsl #16
74007c82:	9f02      	ldr	r7, [sp, #8]
74007c84:	e7a9      	b.n	74007bda <__divdi3+0xbe>
74007c86:	fab3 f783 	clz	r7, r3
74007c8a:	2f00      	cmp	r7, #0
74007c8c:	d168      	bne.n	74007d60 <__divdi3+0x244>
74007c8e:	428b      	cmp	r3, r1
74007c90:	bf2c      	ite	cs
74007c92:	f04f 0900 	movcs.w	r9, #0
74007c96:	f04f 0901 	movcc.w	r9, #1
74007c9a:	4282      	cmp	r2, r0
74007c9c:	bf8c      	ite	hi
74007c9e:	464c      	movhi	r4, r9
74007ca0:	f049 0401 	orrls.w	r4, r9, #1
74007ca4:	2c00      	cmp	r4, #0
74007ca6:	d096      	beq.n	74007bd6 <__divdi3+0xba>
74007ca8:	f04f 0801 	mov.w	r8, #1
74007cac:	e795      	b.n	74007bda <__divdi3+0xbe>
74007cae:	4252      	negs	r2, r2
74007cb0:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
74007cb4:	43f6      	mvns	r6, r6
74007cb6:	e73b      	b.n	74007b30 <__divdi3+0x14>
74007cb8:	4240      	negs	r0, r0
74007cba:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
74007cbe:	f04f 36ff 	mov.w	r6, #4294967295
74007cc2:	e732      	b.n	74007b2a <__divdi3+0xe>
74007cc4:	fa04 f408 	lsl.w	r4, r4, r8
74007cc8:	f1c8 0720 	rsb	r7, r8, #32
74007ccc:	fa35 f307 	lsrs.w	r3, r5, r7
74007cd0:	fa29 fa07 	lsr.w	sl, r9, r7
74007cd4:	0c27      	lsrs	r7, r4, #16
74007cd6:	fa09 fb08 	lsl.w	fp, r9, r8
74007cda:	4639      	mov	r1, r7
74007cdc:	4650      	mov	r0, sl
74007cde:	ea43 020b 	orr.w	r2, r3, fp
74007ce2:	9202      	str	r2, [sp, #8]
74007ce4:	f7ff f920 	bl	74006f28 <__aeabi_uidiv>
74007ce8:	4639      	mov	r1, r7
74007cea:	fa1f f984 	uxth.w	r9, r4
74007cee:	4683      	mov	fp, r0
74007cf0:	4650      	mov	r0, sl
74007cf2:	f7ff fa47 	bl	74007184 <__aeabi_uidivmod>
74007cf6:	9802      	ldr	r0, [sp, #8]
74007cf8:	fb09 f20b 	mul.w	r2, r9, fp
74007cfc:	0c03      	lsrs	r3, r0, #16
74007cfe:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
74007d02:	429a      	cmp	r2, r3
74007d04:	d904      	bls.n	74007d10 <__divdi3+0x1f4>
74007d06:	191b      	adds	r3, r3, r4
74007d08:	f10b 3bff 	add.w	fp, fp, #4294967295
74007d0c:	f0c0 80b1 	bcc.w	74007e72 <__divdi3+0x356>
74007d10:	1a9b      	subs	r3, r3, r2
74007d12:	4639      	mov	r1, r7
74007d14:	4618      	mov	r0, r3
74007d16:	9301      	str	r3, [sp, #4]
74007d18:	f7ff f906 	bl	74006f28 <__aeabi_uidiv>
74007d1c:	9901      	ldr	r1, [sp, #4]
74007d1e:	4682      	mov	sl, r0
74007d20:	4608      	mov	r0, r1
74007d22:	4639      	mov	r1, r7
74007d24:	f7ff fa2e 	bl	74007184 <__aeabi_uidivmod>
74007d28:	f8dd c008 	ldr.w	ip, [sp, #8]
74007d2c:	fb09 f30a 	mul.w	r3, r9, sl
74007d30:	fa1f f08c 	uxth.w	r0, ip
74007d34:	ea40 4201 	orr.w	r2, r0, r1, lsl #16
74007d38:	4293      	cmp	r3, r2
74007d3a:	d908      	bls.n	74007d4e <__divdi3+0x232>
74007d3c:	1912      	adds	r2, r2, r4
74007d3e:	f10a 3aff 	add.w	sl, sl, #4294967295
74007d42:	d204      	bcs.n	74007d4e <__divdi3+0x232>
74007d44:	4293      	cmp	r3, r2
74007d46:	bf84      	itt	hi
74007d48:	f10a 3aff 	addhi.w	sl, sl, #4294967295
74007d4c:	1912      	addhi	r2, r2, r4
74007d4e:	fa05 f508 	lsl.w	r5, r5, r8
74007d52:	ea4a 4e0b 	orr.w	lr, sl, fp, lsl #16
74007d56:	ebc3 0802 	rsb	r8, r3, r2
74007d5a:	f8cd e008 	str.w	lr, [sp, #8]
74007d5e:	e759      	b.n	74007c14 <__divdi3+0xf8>
74007d60:	f1c7 0020 	rsb	r0, r7, #32
74007d64:	fa03 fa07 	lsl.w	sl, r3, r7
74007d68:	40c2      	lsrs	r2, r0
74007d6a:	fa35 f300 	lsrs.w	r3, r5, r0
74007d6e:	ea42 0b0a 	orr.w	fp, r2, sl
74007d72:	fa21 f800 	lsr.w	r8, r1, r0
74007d76:	fa01 f907 	lsl.w	r9, r1, r7
74007d7a:	4640      	mov	r0, r8
74007d7c:	ea4f 4a1b 	mov.w	sl, fp, lsr #16
74007d80:	ea43 0109 	orr.w	r1, r3, r9
74007d84:	9102      	str	r1, [sp, #8]
74007d86:	4651      	mov	r1, sl
74007d88:	fa1f f28b 	uxth.w	r2, fp
74007d8c:	9203      	str	r2, [sp, #12]
74007d8e:	f7ff f8cb 	bl	74006f28 <__aeabi_uidiv>
74007d92:	4651      	mov	r1, sl
74007d94:	4681      	mov	r9, r0
74007d96:	4640      	mov	r0, r8
74007d98:	f7ff f9f4 	bl	74007184 <__aeabi_uidivmod>
74007d9c:	9b03      	ldr	r3, [sp, #12]
74007d9e:	f8dd c008 	ldr.w	ip, [sp, #8]
74007da2:	fb03 f209 	mul.w	r2, r3, r9
74007da6:	ea4f 401c 	mov.w	r0, ip, lsr #16
74007daa:	fa14 f307 	lsls.w	r3, r4, r7
74007dae:	ea40 4401 	orr.w	r4, r0, r1, lsl #16
74007db2:	42a2      	cmp	r2, r4
74007db4:	d904      	bls.n	74007dc0 <__divdi3+0x2a4>
74007db6:	eb14 040b 	adds.w	r4, r4, fp
74007dba:	f109 39ff 	add.w	r9, r9, #4294967295
74007dbe:	d352      	bcc.n	74007e66 <__divdi3+0x34a>
74007dc0:	1aa4      	subs	r4, r4, r2
74007dc2:	4651      	mov	r1, sl
74007dc4:	4620      	mov	r0, r4
74007dc6:	9301      	str	r3, [sp, #4]
74007dc8:	f7ff f8ae 	bl	74006f28 <__aeabi_uidiv>
74007dcc:	4651      	mov	r1, sl
74007dce:	4680      	mov	r8, r0
74007dd0:	4620      	mov	r0, r4
74007dd2:	f7ff f9d7 	bl	74007184 <__aeabi_uidivmod>
74007dd6:	9803      	ldr	r0, [sp, #12]
74007dd8:	f8dd c008 	ldr.w	ip, [sp, #8]
74007ddc:	fb00 f208 	mul.w	r2, r0, r8
74007de0:	fa1f f38c 	uxth.w	r3, ip
74007de4:	ea43 4001 	orr.w	r0, r3, r1, lsl #16
74007de8:	9b01      	ldr	r3, [sp, #4]
74007dea:	4282      	cmp	r2, r0
74007dec:	d904      	bls.n	74007df8 <__divdi3+0x2dc>
74007dee:	eb10 000b 	adds.w	r0, r0, fp
74007df2:	f108 38ff 	add.w	r8, r8, #4294967295
74007df6:	d330      	bcc.n	74007e5a <__divdi3+0x33e>
74007df8:	ea48 4809 	orr.w	r8, r8, r9, lsl #16
74007dfc:	fa1f fc83 	uxth.w	ip, r3
74007e00:	0c1b      	lsrs	r3, r3, #16
74007e02:	1a80      	subs	r0, r0, r2
74007e04:	fa1f fe88 	uxth.w	lr, r8
74007e08:	ea4f 4a18 	mov.w	sl, r8, lsr #16
74007e0c:	fb0c f90e 	mul.w	r9, ip, lr
74007e10:	fb0c fc0a 	mul.w	ip, ip, sl
74007e14:	fb03 c10e 	mla	r1, r3, lr, ip
74007e18:	fb03 f20a 	mul.w	r2, r3, sl
74007e1c:	eb01 4119 	add.w	r1, r1, r9, lsr #16
74007e20:	458c      	cmp	ip, r1
74007e22:	bf88      	it	hi
74007e24:	f502 3280 	addhi.w	r2, r2, #65536	; 0x10000
74007e28:	eb02 4e11 	add.w	lr, r2, r1, lsr #16
74007e2c:	4570      	cmp	r0, lr
74007e2e:	d310      	bcc.n	74007e52 <__divdi3+0x336>
74007e30:	fa1f f989 	uxth.w	r9, r9
74007e34:	fa05 f707 	lsl.w	r7, r5, r7
74007e38:	eb09 4001 	add.w	r0, r9, r1, lsl #16
74007e3c:	bf14      	ite	ne
74007e3e:	2200      	movne	r2, #0
74007e40:	2201      	moveq	r2, #1
74007e42:	4287      	cmp	r7, r0
74007e44:	bf2c      	ite	cs
74007e46:	2700      	movcs	r7, #0
74007e48:	f002 0701 	andcc.w	r7, r2, #1
74007e4c:	2f00      	cmp	r7, #0
74007e4e:	f43f aec4 	beq.w	74007bda <__divdi3+0xbe>
74007e52:	f108 38ff 	add.w	r8, r8, #4294967295
74007e56:	2700      	movs	r7, #0
74007e58:	e6bf      	b.n	74007bda <__divdi3+0xbe>
74007e5a:	4282      	cmp	r2, r0
74007e5c:	bf84      	itt	hi
74007e5e:	4458      	addhi	r0, fp
74007e60:	f108 38ff 	addhi.w	r8, r8, #4294967295
74007e64:	e7c8      	b.n	74007df8 <__divdi3+0x2dc>
74007e66:	42a2      	cmp	r2, r4
74007e68:	bf84      	itt	hi
74007e6a:	f109 39ff 	addhi.w	r9, r9, #4294967295
74007e6e:	445c      	addhi	r4, fp
74007e70:	e7a6      	b.n	74007dc0 <__divdi3+0x2a4>
74007e72:	429a      	cmp	r2, r3
74007e74:	bf84      	itt	hi
74007e76:	f10b 3bff 	addhi.w	fp, fp, #4294967295
74007e7a:	191b      	addhi	r3, r3, r4
74007e7c:	e748      	b.n	74007d10 <__divdi3+0x1f4>
74007e7e:	bf00      	nop

74007e80 <__udivdi3>:
74007e80:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
74007e84:	460c      	mov	r4, r1
74007e86:	b083      	sub	sp, #12
74007e88:	4680      	mov	r8, r0
74007e8a:	4616      	mov	r6, r2
74007e8c:	4689      	mov	r9, r1
74007e8e:	461f      	mov	r7, r3
74007e90:	4615      	mov	r5, r2
74007e92:	468a      	mov	sl, r1
74007e94:	2b00      	cmp	r3, #0
74007e96:	d14b      	bne.n	74007f30 <__udivdi3+0xb0>
74007e98:	428a      	cmp	r2, r1
74007e9a:	d95c      	bls.n	74007f56 <__udivdi3+0xd6>
74007e9c:	fab2 f382 	clz	r3, r2
74007ea0:	b15b      	cbz	r3, 74007eba <__udivdi3+0x3a>
74007ea2:	f1c3 0020 	rsb	r0, r3, #32
74007ea6:	fa01 fa03 	lsl.w	sl, r1, r3
74007eaa:	fa28 f200 	lsr.w	r2, r8, r0
74007eae:	fa16 f503 	lsls.w	r5, r6, r3
74007eb2:	fa08 f803 	lsl.w	r8, r8, r3
74007eb6:	ea42 0a0a 	orr.w	sl, r2, sl
74007eba:	0c2e      	lsrs	r6, r5, #16
74007ebc:	4650      	mov	r0, sl
74007ebe:	4631      	mov	r1, r6
74007ec0:	b2af      	uxth	r7, r5
74007ec2:	f7ff f831 	bl	74006f28 <__aeabi_uidiv>
74007ec6:	4631      	mov	r1, r6
74007ec8:	ea4f 4418 	mov.w	r4, r8, lsr #16
74007ecc:	4681      	mov	r9, r0
74007ece:	4650      	mov	r0, sl
74007ed0:	f7ff f958 	bl	74007184 <__aeabi_uidivmod>
74007ed4:	fb07 f309 	mul.w	r3, r7, r9
74007ed8:	ea44 4a01 	orr.w	sl, r4, r1, lsl #16
74007edc:	4553      	cmp	r3, sl
74007ede:	d909      	bls.n	74007ef4 <__udivdi3+0x74>
74007ee0:	eb1a 0a05 	adds.w	sl, sl, r5
74007ee4:	f109 39ff 	add.w	r9, r9, #4294967295
74007ee8:	d204      	bcs.n	74007ef4 <__udivdi3+0x74>
74007eea:	4553      	cmp	r3, sl
74007eec:	bf84      	itt	hi
74007eee:	f109 39ff 	addhi.w	r9, r9, #4294967295
74007ef2:	44aa      	addhi	sl, r5
74007ef4:	ebc3 0a0a 	rsb	sl, r3, sl
74007ef8:	4631      	mov	r1, r6
74007efa:	4650      	mov	r0, sl
74007efc:	fa1f f888 	uxth.w	r8, r8
74007f00:	f7ff f812 	bl	74006f28 <__aeabi_uidiv>
74007f04:	4631      	mov	r1, r6
74007f06:	4604      	mov	r4, r0
74007f08:	4650      	mov	r0, sl
74007f0a:	f7ff f93b 	bl	74007184 <__aeabi_uidivmod>
74007f0e:	fb07 f704 	mul.w	r7, r7, r4
74007f12:	ea48 4801 	orr.w	r8, r8, r1, lsl #16
74007f16:	4547      	cmp	r7, r8
74007f18:	d906      	bls.n	74007f28 <__udivdi3+0xa8>
74007f1a:	3c01      	subs	r4, #1
74007f1c:	eb18 0805 	adds.w	r8, r8, r5
74007f20:	d202      	bcs.n	74007f28 <__udivdi3+0xa8>
74007f22:	4547      	cmp	r7, r8
74007f24:	bf88      	it	hi
74007f26:	3c01      	subhi	r4, #1
74007f28:	ea44 4409 	orr.w	r4, r4, r9, lsl #16
74007f2c:	2600      	movs	r6, #0
74007f2e:	e05c      	b.n	74007fea <__udivdi3+0x16a>
74007f30:	428b      	cmp	r3, r1
74007f32:	d858      	bhi.n	74007fe6 <__udivdi3+0x166>
74007f34:	fab3 f683 	clz	r6, r3
74007f38:	2e00      	cmp	r6, #0
74007f3a:	d15b      	bne.n	74007ff4 <__udivdi3+0x174>
74007f3c:	428b      	cmp	r3, r1
74007f3e:	bf2c      	ite	cs
74007f40:	2200      	movcs	r2, #0
74007f42:	2201      	movcc	r2, #1
74007f44:	4285      	cmp	r5, r0
74007f46:	bf8c      	ite	hi
74007f48:	4615      	movhi	r5, r2
74007f4a:	f042 0501 	orrls.w	r5, r2, #1
74007f4e:	2d00      	cmp	r5, #0
74007f50:	d049      	beq.n	74007fe6 <__udivdi3+0x166>
74007f52:	2401      	movs	r4, #1
74007f54:	e049      	b.n	74007fea <__udivdi3+0x16a>
74007f56:	b922      	cbnz	r2, 74007f62 <__udivdi3+0xe2>
74007f58:	4611      	mov	r1, r2
74007f5a:	2001      	movs	r0, #1
74007f5c:	f7fe ffe4 	bl	74006f28 <__aeabi_uidiv>
74007f60:	4605      	mov	r5, r0
74007f62:	fab5 f685 	clz	r6, r5
74007f66:	2e00      	cmp	r6, #0
74007f68:	f040 80ba 	bne.w	740080e0 <__udivdi3+0x260>
74007f6c:	1b64      	subs	r4, r4, r5
74007f6e:	0c2f      	lsrs	r7, r5, #16
74007f70:	fa1f fa85 	uxth.w	sl, r5
74007f74:	2601      	movs	r6, #1
74007f76:	4639      	mov	r1, r7
74007f78:	4620      	mov	r0, r4
74007f7a:	f7fe ffd5 	bl	74006f28 <__aeabi_uidiv>
74007f7e:	4639      	mov	r1, r7
74007f80:	ea4f 4b18 	mov.w	fp, r8, lsr #16
74007f84:	4681      	mov	r9, r0
74007f86:	4620      	mov	r0, r4
74007f88:	f7ff f8fc 	bl	74007184 <__aeabi_uidivmod>
74007f8c:	fb0a f309 	mul.w	r3, sl, r9
74007f90:	ea4b 4b01 	orr.w	fp, fp, r1, lsl #16
74007f94:	455b      	cmp	r3, fp
74007f96:	d909      	bls.n	74007fac <__udivdi3+0x12c>
74007f98:	eb1b 0b05 	adds.w	fp, fp, r5
74007f9c:	f109 39ff 	add.w	r9, r9, #4294967295
74007fa0:	d204      	bcs.n	74007fac <__udivdi3+0x12c>
74007fa2:	455b      	cmp	r3, fp
74007fa4:	bf84      	itt	hi
74007fa6:	f109 39ff 	addhi.w	r9, r9, #4294967295
74007faa:	44ab      	addhi	fp, r5
74007fac:	ebc3 0b0b 	rsb	fp, r3, fp
74007fb0:	4639      	mov	r1, r7
74007fb2:	4658      	mov	r0, fp
74007fb4:	fa1f f888 	uxth.w	r8, r8
74007fb8:	f7fe ffb6 	bl	74006f28 <__aeabi_uidiv>
74007fbc:	4639      	mov	r1, r7
74007fbe:	4604      	mov	r4, r0
74007fc0:	4658      	mov	r0, fp
74007fc2:	f7ff f8df 	bl	74007184 <__aeabi_uidivmod>
74007fc6:	fb0a fa04 	mul.w	sl, sl, r4
74007fca:	ea48 4801 	orr.w	r8, r8, r1, lsl #16
74007fce:	45c2      	cmp	sl, r8
74007fd0:	d906      	bls.n	74007fe0 <__udivdi3+0x160>
74007fd2:	3c01      	subs	r4, #1
74007fd4:	eb18 0805 	adds.w	r8, r8, r5
74007fd8:	d202      	bcs.n	74007fe0 <__udivdi3+0x160>
74007fda:	45c2      	cmp	sl, r8
74007fdc:	bf88      	it	hi
74007fde:	3c01      	subhi	r4, #1
74007fe0:	ea44 4409 	orr.w	r4, r4, r9, lsl #16
74007fe4:	e001      	b.n	74007fea <__udivdi3+0x16a>
74007fe6:	2600      	movs	r6, #0
74007fe8:	4634      	mov	r4, r6
74007fea:	4631      	mov	r1, r6
74007fec:	4620      	mov	r0, r4
74007fee:	b003      	add	sp, #12
74007ff0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
74007ff4:	f1c6 0020 	rsb	r0, r6, #32
74007ff8:	40b3      	lsls	r3, r6
74007ffa:	fa32 f700 	lsrs.w	r7, r2, r0
74007ffe:	fa21 fb00 	lsr.w	fp, r1, r0
74008002:	431f      	orrs	r7, r3
74008004:	fa14 f206 	lsls.w	r2, r4, r6
74008008:	fa28 f100 	lsr.w	r1, r8, r0
7400800c:	4658      	mov	r0, fp
7400800e:	ea4f 4a17 	mov.w	sl, r7, lsr #16
74008012:	4311      	orrs	r1, r2
74008014:	9100      	str	r1, [sp, #0]
74008016:	4651      	mov	r1, sl
74008018:	b2bb      	uxth	r3, r7
7400801a:	9301      	str	r3, [sp, #4]
7400801c:	f7fe ff84 	bl	74006f28 <__aeabi_uidiv>
74008020:	4651      	mov	r1, sl
74008022:	40b5      	lsls	r5, r6
74008024:	4681      	mov	r9, r0
74008026:	4658      	mov	r0, fp
74008028:	f7ff f8ac 	bl	74007184 <__aeabi_uidivmod>
7400802c:	9c01      	ldr	r4, [sp, #4]
7400802e:	9800      	ldr	r0, [sp, #0]
74008030:	fb04 f309 	mul.w	r3, r4, r9
74008034:	ea4f 4c10 	mov.w	ip, r0, lsr #16
74008038:	ea4c 4b01 	orr.w	fp, ip, r1, lsl #16
7400803c:	455b      	cmp	r3, fp
7400803e:	d905      	bls.n	7400804c <__udivdi3+0x1cc>
74008040:	eb1b 0b07 	adds.w	fp, fp, r7
74008044:	f109 39ff 	add.w	r9, r9, #4294967295
74008048:	f0c0 808e 	bcc.w	74008168 <__udivdi3+0x2e8>
7400804c:	ebc3 0b0b 	rsb	fp, r3, fp
74008050:	4651      	mov	r1, sl
74008052:	4658      	mov	r0, fp
74008054:	f7fe ff68 	bl	74006f28 <__aeabi_uidiv>
74008058:	4651      	mov	r1, sl
7400805a:	4604      	mov	r4, r0
7400805c:	4658      	mov	r0, fp
7400805e:	f7ff f891 	bl	74007184 <__aeabi_uidivmod>
74008062:	9801      	ldr	r0, [sp, #4]
74008064:	9a00      	ldr	r2, [sp, #0]
74008066:	fb00 f304 	mul.w	r3, r0, r4
7400806a:	fa1f fc82 	uxth.w	ip, r2
7400806e:	ea4c 4201 	orr.w	r2, ip, r1, lsl #16
74008072:	4293      	cmp	r3, r2
74008074:	d906      	bls.n	74008084 <__udivdi3+0x204>
74008076:	3c01      	subs	r4, #1
74008078:	19d2      	adds	r2, r2, r7
7400807a:	d203      	bcs.n	74008084 <__udivdi3+0x204>
7400807c:	4293      	cmp	r3, r2
7400807e:	d901      	bls.n	74008084 <__udivdi3+0x204>
74008080:	19d2      	adds	r2, r2, r7
74008082:	3c01      	subs	r4, #1
74008084:	ea44 4409 	orr.w	r4, r4, r9, lsl #16
74008088:	b2a8      	uxth	r0, r5
7400808a:	1ad2      	subs	r2, r2, r3
7400808c:	0c2d      	lsrs	r5, r5, #16
7400808e:	fa1f fc84 	uxth.w	ip, r4
74008092:	0c23      	lsrs	r3, r4, #16
74008094:	fb00 f70c 	mul.w	r7, r0, ip
74008098:	fb00 fe03 	mul.w	lr, r0, r3
7400809c:	fb05 e10c 	mla	r1, r5, ip, lr
740080a0:	fb05 f503 	mul.w	r5, r5, r3
740080a4:	eb01 4117 	add.w	r1, r1, r7, lsr #16
740080a8:	458e      	cmp	lr, r1
740080aa:	bf88      	it	hi
740080ac:	f505 3580 	addhi.w	r5, r5, #65536	; 0x10000
740080b0:	eb05 4511 	add.w	r5, r5, r1, lsr #16
740080b4:	42aa      	cmp	r2, r5
740080b6:	d310      	bcc.n	740080da <__udivdi3+0x25a>
740080b8:	b2bf      	uxth	r7, r7
740080ba:	fa08 f606 	lsl.w	r6, r8, r6
740080be:	eb07 4201 	add.w	r2, r7, r1, lsl #16
740080c2:	bf14      	ite	ne
740080c4:	f04f 0e00 	movne.w	lr, #0
740080c8:	f04f 0e01 	moveq.w	lr, #1
740080cc:	4296      	cmp	r6, r2
740080ce:	bf2c      	ite	cs
740080d0:	2600      	movcs	r6, #0
740080d2:	f00e 0601 	andcc.w	r6, lr, #1
740080d6:	2e00      	cmp	r6, #0
740080d8:	d087      	beq.n	74007fea <__udivdi3+0x16a>
740080da:	3c01      	subs	r4, #1
740080dc:	2600      	movs	r6, #0
740080de:	e784      	b.n	74007fea <__udivdi3+0x16a>
740080e0:	40b5      	lsls	r5, r6
740080e2:	f1c6 0120 	rsb	r1, r6, #32
740080e6:	fa24 f901 	lsr.w	r9, r4, r1
740080ea:	fa28 f201 	lsr.w	r2, r8, r1
740080ee:	0c2f      	lsrs	r7, r5, #16
740080f0:	40b4      	lsls	r4, r6
740080f2:	4639      	mov	r1, r7
740080f4:	4648      	mov	r0, r9
740080f6:	4322      	orrs	r2, r4
740080f8:	9200      	str	r2, [sp, #0]
740080fa:	f7fe ff15 	bl	74006f28 <__aeabi_uidiv>
740080fe:	4639      	mov	r1, r7
74008100:	fa1f fa85 	uxth.w	sl, r5
74008104:	4683      	mov	fp, r0
74008106:	4648      	mov	r0, r9
74008108:	f7ff f83c 	bl	74007184 <__aeabi_uidivmod>
7400810c:	9b00      	ldr	r3, [sp, #0]
7400810e:	0c1a      	lsrs	r2, r3, #16
74008110:	fb0a f30b 	mul.w	r3, sl, fp
74008114:	ea42 4401 	orr.w	r4, r2, r1, lsl #16
74008118:	42a3      	cmp	r3, r4
7400811a:	d903      	bls.n	74008124 <__udivdi3+0x2a4>
7400811c:	1964      	adds	r4, r4, r5
7400811e:	f10b 3bff 	add.w	fp, fp, #4294967295
74008122:	d327      	bcc.n	74008174 <__udivdi3+0x2f4>
74008124:	1ae4      	subs	r4, r4, r3
74008126:	4639      	mov	r1, r7
74008128:	4620      	mov	r0, r4
7400812a:	f7fe fefd 	bl	74006f28 <__aeabi_uidiv>
7400812e:	4639      	mov	r1, r7
74008130:	4681      	mov	r9, r0
74008132:	4620      	mov	r0, r4
74008134:	f7ff f826 	bl	74007184 <__aeabi_uidivmod>
74008138:	9800      	ldr	r0, [sp, #0]
7400813a:	fb0a f309 	mul.w	r3, sl, r9
7400813e:	fa1f fc80 	uxth.w	ip, r0
74008142:	ea4c 4401 	orr.w	r4, ip, r1, lsl #16
74008146:	42a3      	cmp	r3, r4
74008148:	d908      	bls.n	7400815c <__udivdi3+0x2dc>
7400814a:	1964      	adds	r4, r4, r5
7400814c:	f109 39ff 	add.w	r9, r9, #4294967295
74008150:	d204      	bcs.n	7400815c <__udivdi3+0x2dc>
74008152:	42a3      	cmp	r3, r4
74008154:	bf84      	itt	hi
74008156:	f109 39ff 	addhi.w	r9, r9, #4294967295
7400815a:	1964      	addhi	r4, r4, r5
7400815c:	fa08 f806 	lsl.w	r8, r8, r6
74008160:	1ae4      	subs	r4, r4, r3
74008162:	ea49 460b 	orr.w	r6, r9, fp, lsl #16
74008166:	e706      	b.n	74007f76 <__udivdi3+0xf6>
74008168:	455b      	cmp	r3, fp
7400816a:	bf84      	itt	hi
7400816c:	f109 39ff 	addhi.w	r9, r9, #4294967295
74008170:	44bb      	addhi	fp, r7
74008172:	e76b      	b.n	7400804c <__udivdi3+0x1cc>
74008174:	42a3      	cmp	r3, r4
74008176:	bf84      	itt	hi
74008178:	f10b 3bff 	addhi.w	fp, fp, #4294967295
7400817c:	1964      	addhi	r4, r4, r5
7400817e:	e7d1      	b.n	74008124 <__udivdi3+0x2a4>
74008180:	54207325 	.word	0x54207325
74008184:	20736968 	.word	0x20736968
74008188:	69727473 	.word	0x69727473
7400818c:	6920676e 	.word	0x6920676e
74008190:	74732073 	.word	0x74732073
74008194:	6465726f 	.word	0x6465726f
74008198:	20746120 	.word	0x20746120
7400819c:	0a0d7025 	.word	0x0a0d7025
740081a0:	00000000 	.word	0x00000000
740081a4:	70616548 	.word	0x70616548
740081a8:	646e6120 	.word	0x646e6120
740081ac:	61747320 	.word	0x61747320
740081b0:	63206b63 	.word	0x63206b63
740081b4:	696c6c6f 	.word	0x696c6c6f
740081b8:	6e6f6973 	.word	0x6e6f6973
740081bc:	0000000a 	.word	0x0000000a

740081c0 <g_config_reg_lut>:
740081c0:	40013000 40013004 40013008 4001300c     .0.@.0.@.0.@.0.@
740081d0:	40013010 40013014 40013018 4001301c     .0.@.0.@.0.@.0.@
740081e0:	40013020 40013024 40013028 4001302c      0.@$0.@(0.@,0.@
740081f0:	40013030 40013034 40013038 4001303c     00.@40.@80.@<0.@
74008200:	40013040 40013044 40013048 4001304c     @0.@D0.@H0.@L0.@
74008210:	40013050 40013054 40013058 4001305c     P0.@T0.@X0.@\0.@
74008220:	40013060 40013064 40013068 4001306c     `0.@d0.@h0.@l0.@
74008230:	40013070 40013074 40013078 4001307c     p0.@t0.@x0.@|0.@

74008240 <g_gpio_irqn_lut>:
74008240:	00210020 00230022 00250024 00270026      .!.".#.$.%.&.'.
74008250:	00290028 002b002a 002d002c 002f002e     (.).*.+.,.-.../.
74008260:	00310030 00330032 00350034 00370036     0.1.2.3.4.5.6.7.
74008270:	00390038 003b003a 003d003c 003f003e     8.9.:.;.<.=.>.?.

74008280 <C.18.2576>:
74008280:	00000001 00000002 00000004 00000001     ................

74008290 <_global_impure_ptr>:
74008290:	70000040 00000043                       @..pC...

74008298 <blanks.3577>:
74008298:	20202020 20202020 20202020 20202020                     

740082a8 <zeroes.3578>:
740082a8:	30303030 30303030 30303030 30303030     0000000000000000
740082b8:	33323130 37363534 42413938 46454443     0123456789ABCDEF
740082c8:	00000000 00464e49 00666e69 004e414e     ....INF.inf.NAN.
740082d8:	006e616e 33323130 37363534 62613938     nan.0123456789ab
740082e8:	66656463 00000000 6c756e28 0000296c     cdef....(null)..
740082f8:	00000030 69666e49 7974696e 00000000     0...Infinity....
74008308:	004e614e                                NaN.

7400830c <__sf_fake_stdin>:
	...

7400832c <__sf_fake_stdout>:
	...

7400834c <__sf_fake_stderr>:
	...

7400836c <charset>:
7400836c:	740083a4                                ...t

74008370 <lconv>:
74008370:	740083a0 740082c8 740082c8 740082c8     ...t...t...t...t
74008380:	740082c8 740082c8 740082c8 740082c8     ...t...t...t...t
74008390:	740082c8 740082c8 ffffffff ffffffff     ...t...t........
740083a0:	0000002e 2d4f5349 39353838 0000312d     ....ISO-8859-1..

740083b0 <__mprec_tens>:
740083b0:	00000000 3ff00000 00000000 40240000     .......?......$@
740083c0:	00000000 40590000 00000000 408f4000     ......Y@.....@.@
740083d0:	00000000 40c38800 00000000 40f86a00     .......@.....j.@
740083e0:	00000000 412e8480 00000000 416312d0     .......A......cA
740083f0:	00000000 4197d784 00000000 41cdcd65     .......A....e..A
74008400:	20000000 4202a05f e8000000 42374876     ... _..B....vH7B
74008410:	a2000000 426d1a94 e5400000 42a2309c     ......mB..@..0.B
74008420:	1e900000 42d6bcc4 26340000 430c6bf5     .......B..4&.k.C
74008430:	37e08000 4341c379 85d8a000 43763457     ...7y.AC....W4vC
74008440:	674ec800 43abc16d 60913d00 43e158e4     ..Ngm..C.=.`.X.C
74008450:	78b58c40 4415af1d d6e2ef50 444b1ae4     @..x...DP.....KD
74008460:	064dd592 4480f0cf c7e14af6 44b52d02     ..M....D.J...-.D
74008470:	79d99db4 44ea7843                       ...yCx.D

74008478 <p05.2463>:
74008478:	00000005 00000019 0000007d 00000000     ........}.......

74008488 <__mprec_bigtens>:
74008488:	37e08000 4341c379 b5056e17 4693b8b5     ...7y.AC.n.....F
74008498:	e93ff9f5 4d384f03 f9301d32 5a827748     ..?..O8M2.0.Hw.Z
740084a8:	7f73bf3c 75154fdd                       <.s..O.u

740084b0 <__mprec_tinytens>:
740084b0:	97d889bc 3c9cd2b2 d5a8a733 3949f623     .......<3...#.I9
740084c0:	44f4a73d 32a50ffd cf8c979d 255bba08     =..D...2......[%
740084d0:	64ac6f43 0ac80628                       Co.d(...

740084d8 <_init>:
740084d8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
740084da:	bf00      	nop
740084dc:	bcf8      	pop	{r3, r4, r5, r6, r7}
740084de:	bc08      	pop	{r3}
740084e0:	469e      	mov	lr, r3
740084e2:	4770      	bx	lr

740084e4 <_fini>:
740084e4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
740084e6:	bf00      	nop
740084e8:	bcf8      	pop	{r3, r4, r5, r6, r7}
740084ea:	bc08      	pop	{r3}
740084ec:	469e      	mov	lr, r3
740084ee:	4770      	bx	lr

740084f0 <__frame_dummy_init_array_entry>:
740084f0:	047d 7400                                   }..t

740084f4 <__do_global_dtors_aux_fini_array_entry>:
740084f4:	0469 7400                                   i..t
