# (OPEN DESIGN)

open_design "D:/AC346/A2F_AC346_DF/A2F500/Verilog/Loading_Booting_Ext_Memories/designer/impl1/Loading_Booting_EMC.adb"
export -format "FDB" {D:/AC346/A2F_AC346_DF/A2F500/Verilog/Loading_Booting_Ext_Memories/designer/impl1/Loading_Booting_EMC.fdb}

save_design "D:/AC346/A2F_AC346_DF/A2F500/Verilog/Loading_Booting_Ext_Memories/designer/impl1/Loading_Booting_EMC.adb"

