@W: CD434 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":909:17:909:21|Signal paddr in the sensitivity list is not used in the process
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":546:0:546:17|Pruning register CGPIOiOI.2.CGPIOI1I.CGPIOOLL_11(2)  
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":526:0:526:17|Pruning register CGPIOiOI.2.CGPIOI1I.CGPIOlll_11(2)  
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":546:0:546:17|Pruning register CGPIOiOI.1.CGPIOI1I.CGPIOOLL_7(1)  
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":526:0:526:17|Pruning register CGPIOiOI.1.CGPIOI1I.CGPIOlll_7(1)  
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":546:0:546:17|Pruning register CGPIOiOI.0.CGPIOI1I.CGPIOOLL_3(0)  
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":526:0:526:17|Pruning register CGPIOiOI.0.CGPIOI1I.CGPIOlll_3(0)  
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(0) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(1) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(2) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(3) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(4) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(5) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(6) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Optimizing register bit CoreInTERRUPT_l0l(7) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(0) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(1) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(2) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(3) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(4) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(5) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(6) to a constant 0
@W: CL190 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Optimizing register bit CoreInterrupT_I0L(7) to a constant 0
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":216:0:216:1|Pruning register CoreInTERRUPT_l0l(7 downto 0)  
@W: CL169 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":234:0:234:1|Pruning register CoreInterrupT_I0L(7 downto 0)  
@W: CL168 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\Interrupt_Generator\Interrupt_Generator.vhd":272:4:272:8|Pruning instance 	VCC -- not in use ... 
@W: CD604 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":439:0:439:13|OTHERS clause is not synthesized 
@W: CD604 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3_muxptob3.vhd":152:0:152:13|OTHERS clause is not synthesized 
@W: CD604 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3_muxptob3.vhd":195:0:195:13|OTHERS clause is not synthesized 
@W: CD604 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3_muxptob3.vhd":238:0:238:13|OTHERS clause is not synthesized 
@W: CL240 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":38:10:38:21|LPXIN_CLKOUT is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":37:10:37:23|MAINXIN_CLKOUT is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":36:10:36:21|RCOSC_CLKOUT is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":10:10:10:13|Input CLKA is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":11:10:11:17|Input CLKA_PAD is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":12:10:12:18|Input CLKA_PADP is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":13:10:13:18|Input CLKA_PADN is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":14:10:14:13|Input CLKB is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":15:10:15:17|Input CLKB_PAD is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":16:10:16:18|Input CLKB_PADP is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":17:10:17:18|Input CLKB_PADN is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":18:10:18:13|Input CLKC is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":19:10:19:17|Input CLKC_PAD is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":20:10:20:18|Input CLKC_PADP is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":21:10:21:18|Input CLKC_PADN is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":23:10:23:14|Input LPXIN is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\work\MSS_top_level\MSS_CCC_0\MSS_top_level_tmp_MSS_CCC_0_MSS_CCC.vhd":24:10:24:16|Input MAC_CLK is unused
@W: CL246 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":35:0:35:4|Input port bits 23 to 12 of paddr(23 downto 0) are unused 
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":33:52:33:58|Input presetn is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":34:0:34:3|Input pclk is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":66:0:66:7|Input PRDATAS2 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":67:0:67:7|Input PRDATAS3 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":68:0:68:7|Input PRDATAS4 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":69:0:69:7|Input PRDATAS5 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":70:0:70:7|Input PRDATAS6 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":71:0:71:7|Input PRDATAS7 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":72:0:72:7|Input PRDATAS8 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":73:0:73:7|Input PRDATAS9 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":74:0:74:8|Input PRDATAS10 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":75:0:75:8|Input PRDATAS11 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":76:0:76:8|Input PRDATAS12 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":77:0:77:8|Input PRDATAS13 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":78:0:78:8|Input PRDATAS14 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":79:0:79:8|Input PRDATAS15 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":82:0:82:7|Input preadys2 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":83:0:83:7|Input preADYS3 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":84:0:84:7|Input preadys4 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":85:0:85:7|Input PREADYs5 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":86:0:86:7|Input preadyS6 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":87:0:87:7|Input PREadys7 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":88:0:88:7|Input pREADYS8 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":89:0:89:7|Input preADYS9 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":90:0:90:8|Input preadys10 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":91:0:91:8|Input preaDYS11 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":92:0:92:8|Input PREADYS12 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":93:0:93:8|Input PREadys13 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":94:0:94:8|Input preADYS14 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":95:0:95:8|Input PREAdys15 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":98:0:98:8|Input pslverrs2 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":99:0:99:8|Input pslverrS3 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":100:0:100:8|Input pSLVERRS4 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":101:0:101:8|Input PSLVERRS5 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":102:0:102:8|Input PSLVERRS6 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":103:0:103:8|Input pslvERRS7 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":104:0:104:8|Input pslverrs8 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":105:0:105:8|Input PSLVERRS9 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":106:0:106:9|Input PSLVERRS10 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":107:0:107:9|Input pslverRS11 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":108:0:108:9|Input PSLverrs12 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":109:0:109:9|Input PSLVERRS13 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":110:0:110:9|Input pslverrs14 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreAPB3\3.0.103\rtl\vhdl\core_obfuscated\coreapb3.vhd":111:0:111:9|Input pSLVERRS15 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":16:0:16:9|Input fiqSource7 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":17:0:17:9|Input fiqSOURCE6 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":18:0:18:9|Input fiqSource5 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":19:0:19:9|Input FIQSource4 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":20:0:20:9|Input FIQSOURCe3 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":21:0:21:9|Input fiqSourcE2 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":22:0:22:9|Input FiqSource1 is unused
@W: CL159 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreInterrupt\1.1.101\rtl\vhdl\o\CoreInterrupt.vhd":23:0:23:9|Input FiqSource0 is unused
@W: CL246 :"C:\A2F_AC339_DF\A2F500\VHDL\component\Actel\DirectCore\CoreGPIO\3.0.120\rtl\vhdl\core_obfuscated\coregpio.vhd":154:0:154:5|Input port bits 31 to 3 of pwdata(31 downto 0) are unused 

