Timing Violation Report Max Delay Analysis

SmartTime Version v10.0
Actel Corporation - Actel Designer Software Release v10.0 (Version 10.0.9.37)
Copyright (c) 1989-2011
Date: Mon Dec 12 14:41:18 2011


Design: top_timer
Family: SmartFusion
Die: A2F500M3G
Package: 484 FBGA
Temperature: COM
Voltage: COM
Speed Grade: STD
Design State: Post-Layout
Data source: Silicon verified
Min Operating Condition: BEST
Max Operating Condition: WORST
Using Enhanced Min Delay Analysis
Scenario for Timing Analysis: Primary


Path 1
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[1]/U1:D
  Delay (ns):                  9.246
  Slack (ns):                  -5.399
  Arrival (ns):                15.168
  Required (ns):               9.769

Path 2
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[9]/U1:D
  Delay (ns):                  9.172
  Slack (ns):                  -5.340
  Arrival (ns):                15.094
  Required (ns):               9.754

Path 3
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[0]/U1:D
  Delay (ns):                  9.152
  Slack (ns):                  -5.294
  Arrival (ns):                15.074
  Required (ns):               9.780

Path 4
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[20]/U1:D
  Delay (ns):                  9.151
  Slack (ns):                  -5.284
  Arrival (ns):                15.073
  Required (ns):               9.789

Path 5
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[1]/U1:D
  Delay (ns):                  9.100
  Slack (ns):                  -5.237
  Arrival (ns):                15.006
  Required (ns):               9.769

Path 6
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[7]/U1:D
  Delay (ns):                  9.027
  Slack (ns):                  -5.180
  Arrival (ns):                14.949
  Required (ns):               9.769

Path 7
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[9]/U1:D
  Delay (ns):                  9.026
  Slack (ns):                  -5.178
  Arrival (ns):                14.932
  Required (ns):               9.754

Path 8
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[8]/U1:D
  Delay (ns):                  9.012
  Slack (ns):                  -5.143
  Arrival (ns):                14.934
  Required (ns):               9.791

Path 9
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[0]/U1:D
  Delay (ns):                  9.006
  Slack (ns):                  -5.132
  Arrival (ns):                14.912
  Required (ns):               9.780

Path 10
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[20]/U1:D
  Delay (ns):                  9.005
  Slack (ns):                  -5.122
  Arrival (ns):                14.911
  Required (ns):               9.789

Path 11
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[2]/U1:D
  Delay (ns):                  8.913
  Slack (ns):                  -5.044
  Arrival (ns):                14.835
  Required (ns):               9.791

Path 12
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[7]/U1:D
  Delay (ns):                  8.881
  Slack (ns):                  -5.018
  Arrival (ns):                14.787
  Required (ns):               9.769

Path 13
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[18]/U1:D
  Delay (ns):                  8.883
  Slack (ns):                  -5.014
  Arrival (ns):                14.805
  Required (ns):               9.791

Path 14
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[19]/U1:D
  Delay (ns):                  8.879
  Slack (ns):                  -5.010
  Arrival (ns):                14.801
  Required (ns):               9.791

Path 15
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/LoadEnReg/U1:D
  Delay (ns):                  8.846
  Slack (ns):                  -5.009
  Arrival (ns):                14.768
  Required (ns):               9.759

Path 16
  From:                        AHB_timer_0/HADDR_int[3]/U1:CLK
  To:                          AHB_timer_0/DataOut[17]/U1:D
  Delay (ns):                  8.814
  Slack (ns):                  -5.002
  Arrival (ns):                14.736
  Required (ns):               9.734

Path 17
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[8]/U1:D
  Delay (ns):                  8.866
  Slack (ns):                  -4.981
  Arrival (ns):                14.772
  Required (ns):               9.791

Path 18
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[13]/U1:D
  Delay (ns):                  8.838
  Slack (ns):                  -4.975
  Arrival (ns):                14.760
  Required (ns):               9.785

Path 19
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[2]/U1:D
  Delay (ns):                  8.767
  Slack (ns):                  -4.882
  Arrival (ns):                14.673
  Required (ns):               9.791

Path 20
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[16]/U1:D
  Delay (ns):                  8.735
  Slack (ns):                  -4.872
  Arrival (ns):                14.657
  Required (ns):               9.785

Path 21
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[10]/U1:D
  Delay (ns):                  8.735
  Slack (ns):                  -4.861
  Arrival (ns):                14.657
  Required (ns):               9.796

Path 22
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[18]/U1:D
  Delay (ns):                  8.737
  Slack (ns):                  -4.852
  Arrival (ns):                14.643
  Required (ns):               9.791

Path 23
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[19]/U1:D
  Delay (ns):                  8.733
  Slack (ns):                  -4.848
  Arrival (ns):                14.639
  Required (ns):               9.791

Path 24
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/LoadEnReg/U1:D
  Delay (ns):                  8.700
  Slack (ns):                  -4.847
  Arrival (ns):                14.606
  Required (ns):               9.759

Path 25
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[6]/U1:D
  Delay (ns):                  8.686
  Slack (ns):                  -4.828
  Arrival (ns):                14.608
  Required (ns):               9.780

Path 26
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[13]/U1:D
  Delay (ns):                  8.692
  Slack (ns):                  -4.813
  Arrival (ns):                14.598
  Required (ns):               9.785

Path 27
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[12]/U1:D
  Delay (ns):                  8.564
  Slack (ns):                  -4.734
  Arrival (ns):                14.486
  Required (ns):               9.752

Path 28
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[16]/U1:D
  Delay (ns):                  8.589
  Slack (ns):                  -4.710
  Arrival (ns):                14.495
  Required (ns):               9.785

Path 29
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[5]/U1:D
  Delay (ns):                  8.529
  Slack (ns):                  -4.699
  Arrival (ns):                14.451
  Required (ns):               9.752

Path 30
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[10]/U1:D
  Delay (ns):                  8.589
  Slack (ns):                  -4.699
  Arrival (ns):                14.495
  Required (ns):               9.796

Path 31
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[4]/U1:D
  Delay (ns):                  8.577
  Slack (ns):                  -4.692
  Arrival (ns):                14.499
  Required (ns):               9.807

Path 32
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[6]/U1:D
  Delay (ns):                  8.540
  Slack (ns):                  -4.666
  Arrival (ns):                14.446
  Required (ns):               9.780

Path 33
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[17]/U1:D
  Delay (ns):                  8.501
  Slack (ns):                  -4.632
  Arrival (ns):                14.423
  Required (ns):               9.791

Path 34
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[21]/U1:D
  Delay (ns):                  8.528
  Slack (ns):                  -4.628
  Arrival (ns):                14.450
  Required (ns):               9.822

Path 35
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[3]/U1:D
  Delay (ns):                  8.448
  Slack (ns):                  -4.618
  Arrival (ns):                14.370
  Required (ns):               9.752

Path 36
  From:                        AHB_timer_0/HADDR_int[3]/U1:CLK
  To:                          AHB_timer_0/DataOut[10]/U1:D
  Delay (ns):                  8.420
  Slack (ns):                  -4.616
  Arrival (ns):                14.342
  Required (ns):               9.726

Path 37
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[10]/U1:D
  Delay (ns):                  8.441
  Slack (ns):                  -4.605
  Arrival (ns):                14.363
  Required (ns):               9.758

Path 38
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[12]/U1:D
  Delay (ns):                  8.418
  Slack (ns):                  -4.572
  Arrival (ns):                14.324
  Required (ns):               9.752

Path 39
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[11]/U1:D
  Delay (ns):                  8.429
  Slack (ns):                  -4.544
  Arrival (ns):                14.351
  Required (ns):               9.807

Path 40
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[5]/U1:D
  Delay (ns):                  8.383
  Slack (ns):                  -4.537
  Arrival (ns):                14.289
  Required (ns):               9.752

Path 41
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[4]/U1:D
  Delay (ns):                  8.431
  Slack (ns):                  -4.530
  Arrival (ns):                14.337
  Required (ns):               9.807

Path 42
  From:                        AHB_timer_0/HADDR_int[4]/U1:CLK
  To:                          AHB_timer_0/DataOut[17]/U1:D
  Delay (ns):                  8.305
  Slack (ns):                  -4.493
  Arrival (ns):                14.227
  Required (ns):               9.734

Path 43
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[16]/U1:D
  Delay (ns):                  8.326
  Slack (ns):                  -4.490
  Arrival (ns):                14.248
  Required (ns):               9.758

Path 44
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[20]/U1:D
  Delay (ns):                  8.332
  Slack (ns):                  -4.485
  Arrival (ns):                14.254
  Required (ns):               9.769

Path 45
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[14]/U1:D
  Delay (ns):                  8.369
  Slack (ns):                  -4.484
  Arrival (ns):                14.291
  Required (ns):               9.807

Path 46
  From:                        AHB_timer_0/HADDR_int[2]/U1:CLK
  To:                          AHB_timer_0/DataOut[1]/U1:D
  Delay (ns):                  8.295
  Slack (ns):                  -4.480
  Arrival (ns):                14.217
  Required (ns):               9.737

Path 47
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[17]/U1:D
  Delay (ns):                  8.355
  Slack (ns):                  -4.470
  Arrival (ns):                14.261
  Required (ns):               9.791

Path 48
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[21]/U1:D
  Delay (ns):                  8.382
  Slack (ns):                  -4.466
  Arrival (ns):                14.288
  Required (ns):               9.822

Path 49
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[23]/U1:D
  Delay (ns):                  8.307
  Slack (ns):                  -4.460
  Arrival (ns):                14.229
  Required (ns):               9.769

Path 50
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[3]/U1:D
  Delay (ns):                  8.302
  Slack (ns):                  -4.456
  Arrival (ns):                14.208
  Required (ns):               9.752

Path 51
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[8]/U1:D
  Delay (ns):                  8.323
  Slack (ns):                  -4.454
  Arrival (ns):                14.245
  Required (ns):               9.791

Path 52
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[10]/U1:D
  Delay (ns):                  8.295
  Slack (ns):                  -4.443
  Arrival (ns):                14.201
  Required (ns):               9.758

Path 53
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[19]/U1:D
  Delay (ns):                  8.317
  Slack (ns):                  -4.441
  Arrival (ns):                14.239
  Required (ns):               9.798

Path 54
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[9]/U1:D
  Delay (ns):                  8.308
  Slack (ns):                  -4.432
  Arrival (ns):                14.230
  Required (ns):               9.798

Path 55
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[15]/U1:D
  Delay (ns):                  8.308
  Slack (ns):                  -4.432
  Arrival (ns):                14.230
  Required (ns):               9.798

Path 56
  From:                        AHB_timer_0/HADDR_int[3]/U1:CLK
  To:                          AHB_timer_0/DataOut[19]/U1:D
  Delay (ns):                  8.266
  Slack (ns):                  -4.422
  Arrival (ns):                14.188
  Required (ns):               9.766

Path 57
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[11]/U1:D
  Delay (ns):                  8.271
  Slack (ns):                  -4.408
  Arrival (ns):                14.193
  Required (ns):               9.785

Path 58
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[12]/U1:D
  Delay (ns):                  8.271
  Slack (ns):                  -4.408
  Arrival (ns):                14.193
  Required (ns):               9.785

Path 59
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[15]/U1:D
  Delay (ns):                  8.264
  Slack (ns):                  -4.401
  Arrival (ns):                14.186
  Required (ns):               9.785

Path 60
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[14]/U1:D
  Delay (ns):                  8.264
  Slack (ns):                  -4.401
  Arrival (ns):                14.186
  Required (ns):               9.785

Path 61
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[0]/U1:D
  Delay (ns):                  8.264
  Slack (ns):                  -4.390
  Arrival (ns):                14.186
  Required (ns):               9.796

Path 62
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[1]/U1:D
  Delay (ns):                  8.272
  Slack (ns):                  -4.387
  Arrival (ns):                14.194
  Required (ns):               9.807

Path 63
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[11]/U1:D
  Delay (ns):                  8.283
  Slack (ns):                  -4.382
  Arrival (ns):                14.189
  Required (ns):               9.807

Path 64
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[4]/U1:D
  Delay (ns):                  8.244
  Slack (ns):                  -4.377
  Arrival (ns):                14.166
  Required (ns):               9.789

Path 65
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[13]/U1:D
  Delay (ns):                  8.251
  Slack (ns):                  -4.375
  Arrival (ns):                14.173
  Required (ns):               9.798

Path 66
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[17]/U1:D
  Delay (ns):                  8.214
  Slack (ns):                  -4.370
  Arrival (ns):                14.136
  Required (ns):               9.766

Path 67
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[3]/U1:D
  Delay (ns):                  8.200
  Slack (ns):                  -4.331
  Arrival (ns):                14.122
  Required (ns):               9.791

Path 68
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[16]/U1:D
  Delay (ns):                  8.180
  Slack (ns):                  -4.328
  Arrival (ns):                14.086
  Required (ns):               9.758

Path 69
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[20]/U1:D
  Delay (ns):                  8.186
  Slack (ns):                  -4.323
  Arrival (ns):                14.092
  Required (ns):               9.769

Path 70
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[14]/U1:D
  Delay (ns):                  8.223
  Slack (ns):                  -4.322
  Arrival (ns):                14.129
  Required (ns):               9.807

Path 71
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[23]/U1:D
  Delay (ns):                  8.161
  Slack (ns):                  -4.298
  Arrival (ns):                14.067
  Required (ns):               9.769

Path 72
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[8]/U1:D
  Delay (ns):                  8.177
  Slack (ns):                  -4.292
  Arrival (ns):                14.083
  Required (ns):               9.791

Path 73
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[22]/U1:D
  Delay (ns):                  8.135
  Slack (ns):                  -4.288
  Arrival (ns):                14.057
  Required (ns):               9.769

Path 74
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[19]/U1:D
  Delay (ns):                  8.171
  Slack (ns):                  -4.279
  Arrival (ns):                14.077
  Required (ns):               9.798

Path 75
  From:                        AHB_timer_0/HADDR_int[3]/U1:CLK
  To:                          AHB_timer_0/DataOut[1]/U1:D
  Delay (ns):                  8.122
  Slack (ns):                  -4.275
  Arrival (ns):                14.044
  Required (ns):               9.769

Path 76
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[9]/U1:D
  Delay (ns):                  8.162
  Slack (ns):                  -4.270
  Arrival (ns):                14.068
  Required (ns):               9.798

Path 77
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[15]/U1:D
  Delay (ns):                  8.162
  Slack (ns):                  -4.270
  Arrival (ns):                14.068
  Required (ns):               9.798

Path 78
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[11]/U1:D
  Delay (ns):                  8.125
  Slack (ns):                  -4.246
  Arrival (ns):                14.031
  Required (ns):               9.785

Path 79
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[12]/U1:D
  Delay (ns):                  8.125
  Slack (ns):                  -4.246
  Arrival (ns):                14.031
  Required (ns):               9.785

Path 80
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[15]/U1:D
  Delay (ns):                  8.118
  Slack (ns):                  -4.239
  Arrival (ns):                14.024
  Required (ns):               9.785

Path 81
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[14]/U1:D
  Delay (ns):                  8.118
  Slack (ns):                  -4.239
  Arrival (ns):                14.024
  Required (ns):               9.785

Path 82
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[18]/U1:D
  Delay (ns):                  8.135
  Slack (ns):                  -4.235
  Arrival (ns):                14.057
  Required (ns):               9.822

Path 83
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[0]/U1:D
  Delay (ns):                  8.118
  Slack (ns):                  -4.228
  Arrival (ns):                14.024
  Required (ns):               9.796

Path 84
  From:                        AHB_timer_0/HADDR_int[2]/U1:CLK
  To:                          AHB_timer_0/DataOut[0]/U1:D
  Delay (ns):                  8.052
  Slack (ns):                  -4.226
  Arrival (ns):                13.974
  Required (ns):               9.748

Path 85
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[1]/U1:D
  Delay (ns):                  8.126
  Slack (ns):                  -4.225
  Arrival (ns):                14.032
  Required (ns):               9.807

Path 86
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[4]/U1:D
  Delay (ns):                  8.098
  Slack (ns):                  -4.215
  Arrival (ns):                14.004
  Required (ns):               9.789

Path 87
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[13]/U1:D
  Delay (ns):                  8.105
  Slack (ns):                  -4.213
  Arrival (ns):                14.011
  Required (ns):               9.798

Path 88
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[17]/U1:D
  Delay (ns):                  8.068
  Slack (ns):                  -4.208
  Arrival (ns):                13.974
  Required (ns):               9.766

Path 89
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/Load[3]/U1:D
  Delay (ns):                  8.054
  Slack (ns):                  -4.169
  Arrival (ns):                13.960
  Required (ns):               9.791

Path 90
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/DataOut[2]/U1:D
  Delay (ns):                  8.009
  Slack (ns):                  -4.151
  Arrival (ns):                13.931
  Required (ns):               9.780

Path 91
  From:                        AHB_timer_0/HADDR_int[2]/U1:CLK
  To:                          AHB_timer_0/Load[9]/U1:D
  Delay (ns):                  7.969
  Slack (ns):                  -4.137
  Arrival (ns):                13.891
  Required (ns):               9.754

Path 92
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[22]/U1:D
  Delay (ns):                  7.989
  Slack (ns):                  -4.126
  Arrival (ns):                13.895
  Required (ns):               9.769

Path 93
  From:                        AHB_timer_0/HADDR_int[4]/U1:CLK
  To:                          AHB_timer_0/DataOut[10]/U1:D
  Delay (ns):                  7.911
  Slack (ns):                  -4.107
  Arrival (ns):                13.833
  Required (ns):               9.726

Path 94
  From:                        AHB_timer_0/HADDR_int[2]/U1:CLK
  To:                          AHB_timer_0/Load[20]/U1:D
  Delay (ns):                  7.948
  Slack (ns):                  -4.081
  Arrival (ns):                13.870
  Required (ns):               9.789

Path 95
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[18]/U1:D
  Delay (ns):                  7.989
  Slack (ns):                  -4.073
  Arrival (ns):                13.895
  Required (ns):               9.822

Path 96
  From:                        AHB_timer_0/HADDR_int[1]/U1:CLK
  To:                          AHB_timer_0/DataOut[2]/U1:D
  Delay (ns):                  7.863
  Slack (ns):                  -3.989
  Arrival (ns):                13.769
  Required (ns):               9.780

Path 97
  From:                        AHB_timer_0/HADDR_int[2]/U1:CLK
  To:                          AHB_timer_0/DataOut[7]/U1:D
  Delay (ns):                  7.824
  Slack (ns):                  -3.977
  Arrival (ns):                13.746
  Required (ns):               9.769

Path 98
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[7]/U1:D
  Delay (ns):                  7.804
  Slack (ns):                  -3.972
  Arrival (ns):                13.726
  Required (ns):               9.754

Path 99
  From:                        AHB_timer_0/HADDR_int[0]/U1:CLK
  To:                          AHB_timer_0/Load[23]/U1:D
  Delay (ns):                  7.804
  Slack (ns):                  -3.972
  Arrival (ns):                13.726
  Required (ns):               9.754

Path 100
  From:                        AHB_timer_0/HADDR_int[3]/U1:CLK
  To:                          AHB_timer_0/DataOut[20]/U1:D
  Delay (ns):                  7.777
  Slack (ns):                  -3.962
  Arrival (ns):                13.699
  Required (ns):               9.737

