 ** Message System Log
 ** Database: 
 ** Date:   Wed Feb 08 21:47:25 2006


****************
Macro Parameters
****************

Name                            : Shift8_reg
Family                          : Fusion
Output Format                   : VHDL
Type                            : Shift Register
Variation                       : Serial-In/Serial-Out
Shift Enable                    : Active High
Async Clear                     : Active Low
Clock                           : Rising
Width                           : 8

*************
Fanin Control
*************

Signal      Buffering   Max Load   Signal Width
------      ---------   --------   ------------
Shiften       Auto         6
Aclr          Auto         8
Clock         None                      1

Written VHDL netlist to D:/data/datasheets/Fusion/Demo
Design/RTC_demo/smartgen\Shift8_reg\Shift8_reg.vhd.

 ** Log Ended:   Wed Feb 08 21:47:25 2006

