module ANALOG_RTC_assc_wrapper ( CLK,
               NRESET,
               INIT_ADDR,
               INIT_ASSC_WR,
               INIT_DI,
               INIT_DONE,
               USER_ASSC_ADDR,
               USER_ASSC_RD,
               USER_ASSC_RAM_BUSY,
               EV_ASSC_ADDR,
               EV_ASSC_RD,
               EV_EVFLAG,
               EV_DONE,
               TR_TRFLAG,
               TR_DONE,
               ASSC_RAM_WR_BUSY_B,
               ASSC_RAM_ADDR_A,
               ASSC_RAM_RW_A,
               ASSC_RAM_CSN_A,
               ASSC_RAM_DI_A,
               ASSC_RAM_ADDR_B,
               ASSC_RAM_RW_B,
               ASSC_RAM_CSN_B,
               ASSC_RAM_DI_B,
               ASSC_RAM_DO_B,
               ASSC_XMODE,
               ASSC_XTRIG,
               ASSC_SEQJUMP,
               ASSC_SEQIN,
               ASSC_SEQOUT,
               ASSC_SEQCHANGE,
               ASSC_DONE,
               ASSC_WAIT,
               ASSC_SAMPFLAG,
               ASSC_CHSAT,
               ASSC_CHLATD,
               ADC_CALIBRATE,
               ADC_BUSY,
               ADC_RESULT,
               ADC_START,
               ADC_PDOWN,
               ADC_RESET,
               ADC_MODE,
               ADC_VREFSEL,
               ADC_CHNR,
               ADC_STC,
               ADC_DVC,
               CM_STB,
               TM_STB );

    input CLK;
    input NRESET;
    input[8 : 0] INIT_ADDR;
    input INIT_ASSC_WR;
    input[8 : 0] INIT_DI;
    input INIT_DONE;
    input[8 : 0] USER_ASSC_ADDR;
    input USER_ASSC_RD;
    output USER_ASSC_RAM_BUSY;
    input[8 : 0] EV_ASSC_ADDR;
    input EV_ASSC_RD;
    input EV_EVFLAG;
    input EV_DONE;
    input TR_TRFLAG;
    input TR_DONE;
    output ASSC_RAM_WR_BUSY_B;
    output[8 : 0] ASSC_RAM_ADDR_A;
    output ASSC_RAM_RW_A;
    output ASSC_RAM_CSN_A;
    output[8 : 0] ASSC_RAM_DI_A;
    output[8 : 0] ASSC_RAM_ADDR_B;
    output ASSC_RAM_RW_B;
    output ASSC_RAM_CSN_B;
    output[8 : 0] ASSC_RAM_DI_B;
    input[8 : 0] ASSC_RAM_DO_B;
    input ASSC_XMODE;
    input ASSC_XTRIG;
    input ASSC_SEQJUMP;
    input[6-1 : 0] ASSC_SEQIN;
    output[6-1 : 0] ASSC_SEQOUT;
    output ASSC_SEQCHANGE;
    output ASSC_DONE;
    output ASSC_WAIT;
    output ASSC_SAMPFLAG;
    output ASSC_CHSAT;
    output ASSC_CHLATD;
    input ADC_CALIBRATE;
    input ADC_BUSY;
    input[11 : 0] ADC_RESULT;
    output ADC_START;
    output ADC_PDOWN;
    output ADC_RESET;
    output[3 : 0] ADC_MODE;
    output ADC_VREFSEL;
    output[4 : 0] ADC_CHNR;
    output[7 : 0] ADC_STC;
    output[7 : 0] ADC_DVC;
    output[9 : 0] CM_STB;
    output[10 : 0] TM_STB;

    wire CLK;
    wire NRESET;
    wire [8 : 0]INIT_ADDR;
    wire INIT_ASSC_WR;
    wire [8 : 0]INIT_DI;
    wire INIT_DONE;
    wire [8 : 0]USER_ASSC_ADDR;
    wire USER_ASSC_RD;
    wire USER_ASSC_RAM_BUSY;
    wire [8 : 0]EV_ASSC_ADDR;
    wire EV_ASSC_RD;
    wire EV_EVFLAG;
    wire EV_DONE;
    wire TR_TRFLAG;
    wire TR_DONE;
    wire ASSC_RAM_WR_BUSY_B;
    wire [8 : 0]ASSC_RAM_ADDR_A;
    wire ASSC_RAM_RW_A;
    wire ASSC_RAM_CSN_A;
    wire [8 : 0]ASSC_RAM_DI_A;
    wire [8 : 0]ASSC_RAM_ADDR_B;
    wire ASSC_RAM_RW_B;
    wire ASSC_RAM_CSN_B;
    wire [8 : 0]ASSC_RAM_DI_B;
    wire [8 : 0]ASSC_RAM_DO_B;
    wire ASSC_XMODE;
    wire ASSC_XTRIG;
    wire ASSC_SEQJUMP;
    wire [6-1 : 0]ASSC_SEQIN;
    wire [6-1 : 0]ASSC_SEQOUT;
    wire ASSC_SEQCHANGE;
    wire ASSC_DONE;
    wire ASSC_WAIT;
    wire ASSC_SAMPFLAG;
    wire ASSC_CHSAT;
    wire ASSC_CHLATD;
    wire ADC_CALIBRATE;
    wire ADC_BUSY;
    wire [11 : 0]ADC_RESULT;
    wire ADC_START;
    wire ADC_PDOWN;
    wire ADC_RESET;
    wire [3 : 0]ADC_MODE;
    wire ADC_VREFSEL;
    wire [4 : 0]ADC_CHNR;
    wire [7 : 0]ADC_STC;
    wire [7 : 0]ADC_DVC;
    wire [9 : 0]CM_STB;
    wire [10 : 0]TM_STB;

    defparam user_ANALOG_RTC_assc_wrapper.TS_WIDTH = 6;
    defparam user_ANALOG_RTC_assc_wrapper.ALLOW_USER_ASSC = 0;
    defparam user_ANALOG_RTC_assc_wrapper.ALLOW_RPT = 0;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_MODE = 0;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_MODE_CONST = 0000000000000000;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_VREFSEL = 0;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_VREFSEL_CONST = 0000000000000000;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_STC = 0;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_STC_CONST = 0000000000000000;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_TVC = 0;
    defparam user_ANALOG_RTC_assc_wrapper.FIXED_TVC_CONST = 0000000000000000;
    defparam user_ANALOG_RTC_assc_wrapper.ALLOW_CM_STB_BITS = 0;
    defparam user_ANALOG_RTC_assc_wrapper.ALLOW_TM_STB_BITS = 0;

    ASSC user_ANALOG_RTC_assc_wrapper ( 
	.CLK (CLK),
	.NRESET (NRESET),
	.INIT_ADDR (INIT_ADDR),
	.INIT_ASSC_WR (INIT_ASSC_WR),
	.INIT_DI (INIT_DI),
	.INIT_DONE (INIT_DONE),
	.USER_ASSC_ADDR (USER_ASSC_ADDR),
	.USER_ASSC_RD (USER_ASSC_RD),
	.USER_ASSC_RAM_BUSY (USER_ASSC_RAM_BUSY),
	.EV_ASSC_ADDR (EV_ASSC_ADDR),
	.EV_ASSC_RD (EV_ASSC_RD),
	.EV_EVFLAG (EV_EVFLAG),
	.EV_DONE (EV_DONE),
	.TR_TRFLAG (TR_TRFLAG),
	.TR_DONE (TR_DONE),
	.ASSC_RAM_WR_BUSY_B (ASSC_RAM_WR_BUSY_B),
	.ASSC_RAM_ADDR_A (ASSC_RAM_ADDR_A),
	.ASSC_RAM_RW_A (ASSC_RAM_RW_A),
	.ASSC_RAM_CSN_A (ASSC_RAM_CSN_A),
	.ASSC_RAM_DI_A (ASSC_RAM_DI_A),
	.ASSC_RAM_ADDR_B (ASSC_RAM_ADDR_B),
	.ASSC_RAM_RW_B (ASSC_RAM_RW_B),
	.ASSC_RAM_CSN_B (ASSC_RAM_CSN_B),
	.ASSC_RAM_DI_B (ASSC_RAM_DI_B),
	.ASSC_RAM_DO_B (ASSC_RAM_DO_B),
	.ASSC_XMODE (ASSC_XMODE),
	.ASSC_XTRIG (ASSC_XTRIG),
	.ASSC_SEQJUMP (ASSC_SEQJUMP),
	.ASSC_SEQIN (ASSC_SEQIN),
	.ASSC_SEQOUT (ASSC_SEQOUT),
	.ASSC_SEQCHANGE (ASSC_SEQCHANGE),
	.ASSC_DONE (ASSC_DONE),
	.ASSC_WAIT (ASSC_WAIT),
	.ASSC_SAMPFLAG (ASSC_SAMPFLAG),
	.ASSC_CHSAT (ASSC_CHSAT),
	.ASSC_CHLATD (ASSC_CHLATD),
	.ADC_CALIBRATE (ADC_CALIBRATE),
	.ADC_BUSY (ADC_BUSY),
	.ADC_RESULT (ADC_RESULT),
	.ADC_START (ADC_START),
	.ADC_PDOWN (ADC_PDOWN),
	.ADC_RESET (ADC_RESET),
	.ADC_MODE (ADC_MODE),
	.ADC_VREFSEL (ADC_VREFSEL),
	.ADC_CHNR (ADC_CHNR),
	.ADC_STC (ADC_STC),
	.ADC_DVC (ADC_DVC),
	.CM_STB (CM_STB),
	.TM_STB (TM_STB) );

endmodule