library verilog;
use verilog.vl_types.all;
entity PM_CONTEXT_SAVING_TOP is
    port(
        WADDR           : in     vl_logic_vector(5 downto 0);
        RADDR           : in     vl_logic_vector(5 downto 0);
        WD              : in     vl_logic_vector(15 downto 0);
        RD              : out    vl_logic_vector(15 downto 0);
        SYS_RESETn      : in     vl_logic;
        SYS_CLOCK       : out    vl_logic;
        XTL             : in     vl_logic;
        PUB             : in     vl_logic;
        VRPU_IN         : in     vl_logic;
        VAREF           : in     vl_logic;
        SAVE_SRAM_TO_FLASH: in     vl_logic;
        UPDATE_SRAM_FROM_FLASH: in     vl_logic;
        VRPU_AUTO_SHDN_EN: in     vl_logic;
        WENn            : in     vl_logic;
        RENn            : in     vl_logic;
        CONTEXT_DONE    : out    vl_logic;
        FPGAGOOD        : out    vl_logic
    );
end PM_CONTEXT_SAVING_TOP;
