7/27/07,  Actel Corporation


1) This attachment contains two files: CoreABC_Instructions.txt and CoreABC_AFS_TOPLevel.vhd
   

2) CoreABC_Instructions.txt includes the CoreABC instruction set used to implement the CoreABC Fusion 
   design example in Chapter 10 of Fusion FPGA Fabric User's Guide. The instruction code is written for CoreABC configured with 16-bit APB data bus.
   It can be applied as is to 32-bit APB databus configuration. For 9-bit configuration, the immediate values in some instructions
   may have to be modified to fit the APB bus width. 

3)  The instructions in CoreABC_Instructions.txt are written for CoreABC Ver2.3.165. Someinstructions may be modified 
    for different versions of the core. 

4) CoreABC_AFS_TOPLevel.vhd is a custom RTL used as the top level wrapper in design example of Chapter 5. The main functionality of
   in this file is inter-connection of CoreABC system with the embedded Flash memory to boot the CoreABC with program instructions
   in CoreABC_Instructions.txt
   
