//This instructions are written for CoreABC Ver2.3.165. Some
//instructions may be modified for different versions of
//the core
//Parameter definitions for reference
//Address mapping definitions
DEF COREAI         0
DEF ACM_CTRLSTAT 0x00
DEF ACM_ADDR     0x04
DEF ACM_DATA     0x08
DEF ADC_CTRL1    0x0c
DEF ADC_CTRL2    0x10
DEF ADC_CTRL3    0x14
DEF ADC_CTRL4    0x18
DEF ADC_CTRL5    0x1C
DEF ADC_STAT     0x20
//Values to be loaded in ADC_CTRL2 for each used analog
// channel assuming STC = 0
//1.5V supply
DEF V15PS 0x2100
//3.3V supply
DEF V33PS 0x2400
//3.3V current
DEF C33PS 0x2500
//operating temperature
DEF OPTEMP 0x2900

//Reset ACM to load all the quads with default configuration
$reset
    CALL $WaitACMReady
    APBWRT DAT COREAI ACM_CTRLSTAT 1
    CALL $WaitACMReady
//Wait to ensure that ADC power up calibration is completed
$WaitCalibrate
    APBREAD COREAI ADC_STAT
    AND 0x8000
    JUMP IFNOT ZERO $WaitCalibrate
//Configure used analog quads with the desired configuration
//as found in acmtable file
CALL $WaitACMReady
APBWRT DAT COREAI ACM_ADDR 1
APBWRT DAT COREAI ACM_DATA 0x83
CALL $WAIT_ACM_WRITE
APBWRT DAT COREAI ACM_ADDR 5
APBWRT DAT COREAI ACM_DATA 0x92
CALL $WAIT_ACM_WRITE
APBWRT DAT COREAI ACM_ADDR 6
APBWRT DAT COREAI ACM_DATA 0x10
CALL $WAIT_ACM_WRITE
APBWRT DAT COREAI ACM_ADDR 11
APBWRT DAT COREAI ACM_DATA 0x1
CALL $WAIT_ACM_WRITE
APBWRT DAT COREAI ACM_ADDR 12
APBWRT DAT COREAI ACM_DATA 0x10
CALL $WAIT_ACM_WRITE
APBWRT DAT COREAI ACM_ADDR 15
APBWRT DAT COREAI ACM_DATA 0x80
CALL $WAIT_ACM_WRITE
APBWRT DAT COREAI ACM_ADDR 19
APBWRT DAT COREAI ACM_DATA 0x80

$main
//Turing all the gate dirvers off
APBWRT DAT COREAI ADC_CTRL5 0x0000
$monitor_V33PS
  APBWRT DAT COREAI ADC_CTRL2 V33PS
  CALL $ADCWait
  //Check V33PS > 3.1V
  CMPLEQ 0x0C1C
  JUMP IF NEGATIVE $monitor_V33PS
$monitor_V15PS
  APBWRT DAT COREAI ADC_CTRL2 V15PS
  CALL $ADCWait
  //Check V15PS > 1.43V
  CMPLEQ 0x0B2C
  JUMP IF NEGATIVE $monitor_V15PS
//Turn on AG4 to power up V33L line
APBWRT DAT COREAI ADC_CTRL5 0x0010
CALL $Wait_10us
//Turn on AG3 to power up V15L line (Keep AG4 on)
APBWRT DAT COREAI ADC_CTRL5 0x0018
//Clear Flags
IOWRT 0
$Measure_V33PS
  APBWRT DAT COREAI ADC_CTRL2 V33PS
  CALL $ADCWait
  //Check V33PS > 3.1V
  CMPLEQ 0x0C1C
  JUMP IF NEGATIVE $Error_Flag
$Measure_V15PS
  APBWRT DAT COREAI ADC_CTRL2 V15PS
  CALL $ADCWait
  //Check V15PS > 1.43V
  CMPLEQ 0x0B2C
  JUMP IF NEGATIVE $Error_Flag
$Measure_V33PS_Current
   APBWRT DAT COREAI ADC_CTRL3 0x0000
   CALL $Wait_10us
   APBWRT DAT COREAI ADC_CTRL3 0x0002
   APBWRT DAT COREAI ADC_CTRL2 C33PS
   CALL $ADCWait
   PUSH
   APBWRT DAT COREAI ADC_CTRL3 0x0000
   POP
   CMPLEQ 0x0640
   JUMP IFNOT NEGATIVE $Error_Flag
$Measure_Operating_Temperature
  APBWRT DAT COREAI ADC_CTRL4 0x0000
  CALL $Wait_10us
  APBWRT DAT COREAI ADC_CTRL4 0x0004
  APBWRT DAT COREAI ADC_CTRL2 OPTEMP
  Call $ADCWait
  PUSH
  APBWRT DAT COREAI ADC_CTRL4 0x0000
  POP
  CMPLEQ 0x055C
  JUMP IFNOT NEGATIVE $Error_Flag
  JUMP $Measure_V33PS 
// Routine to wait for ACM to be ready
$WaitACMReady
    PUSH
$WaitACMReady1
    APBREAD COREAI ACM_CTRLSTAT
    AND 0x001C
    JUMP IFNOT ZERO $WaitACMReady1
    POP
    RETURN
//routine to make sure ACM write cycle is completed before
//requesting another ACM write
$WAIT_ACM_WRITE
   APBREAD COREAI 0x00
   BITTST 4
   JUMP IFNOT ZERO $WAIT_ACM_WRITE
    RETURN

//Routine to ensure that ADC converstion is completed
//before reading RESULTS
$ADCWait
    APBREAD COREAI ADC_STAT
    BITTST 13
    JUMP IFNOT ZERO $ADCWait
    AND 0x0FFF
//Routine to wait 10us. In many applications, the wait
//time can be elapsed by performing other data processing
//instructions,defined by users, to enhance the performance of the design
//The following routine assumes SYSCLK = 40MHz
// delay = 1/f * (3+3+(loopcount*(3+3))+3+3)  
$Wait_10us
   PUSH
   LOADLOOP 65
  $loop_counter
   DECLOOP
   JUMP IFNOT LOOPZ $loop_counter
   POP
   RETURN

$Error_Flag
   IOWRT 0x1
   JUMP $main

HALT