#Build: Synplify Pro 9.0.2A2, Build 250R, Feb 20 2008 #install: C:\ProgramFiles\Libero83\Synplify\synplify_902A2 #OS: Windows XP 5.1 #Hostname: WXPL-GAUTHIERS #Implementation: synthesis #Fri May 23 08:37:50 2008 $ Start of Compile #Fri May 23 08:37:50 2008 Synplicity Verilog Compiler, version 1.0, Build 145R, built Mar 5 2008 Copyright (C) 1994-2008, Synplicity Inc. All Rights Reserved @I::"C:\ProgramFiles\Libero83\Synplify\synplify_902A2\lib\proasic\fusion.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\InternalOscillator\InternalOscillator.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\pll_main\pll_main.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\hdl\LowRippleDAC.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\alu.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\clkctrl.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\cpu.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\isr.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\memctrl.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\pmu.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\rstctrl.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\ramsfrctrl.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\oci.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\instrdec.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\main8051.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\core8051s_globs_fusion.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\RAM256X8.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\jtagfusion.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\jtag.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\debug.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\trace.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\trigger.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\ocia51.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\RAM256X20.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CORE8051S\rtl\verilog\o\core8051s.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreAPB3\rtl\verilog\o\MuxPtoB3.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreAPB3\rtl\verilog\o\CoreAPB3.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreGPIO\rtl\verilog\o\CoreGPIO.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\Clock_gen.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\Tx_async.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\Tx_sync.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\Rx_async.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\Rx_sync.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\fifo_256x8.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\UART.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\common\CoreUARTapb\rtl\verilog\o\CoreUARTapb.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\coreconsole\ProcessorSystem\ProcessorSystem.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\assc.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\AnalogSystem\AnalogSystem_assc_wrapper.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\AnalogSystem\AnalogSystem_assc_ram.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\calibip_ram512x9_afs.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\calibip_CLRAM.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\calibip_brentkung_24.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\calibip_ripple_24.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\calibip_compute_block.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\calibip.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\AnalogSystem\AnalogSystem_calibip_wrapper.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\AnalogSystem\AnalogSystem.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg_xa.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg_xb.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg_xc.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg_xd.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg_xe.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg_xf.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\common\verilog\initcfg.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\FlashMemorySystem\FlashMemorySystem_init_wrapper.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\smartgen\FlashMemorySystem\FlashMemorySystem.v" @I::"C:\data\Designs\ClosedLoopTrimDemo\hdl\ClosedLoopTrimDemo.v" Verilog syntax check successful! Options changed - recompiling Selecting top level module ClosedLoopTrimDemo @N:CG364 : fusion.v(2935) | Synthesizing module RCOSC @N:CG364 : InternalOscillator.v(5) | Synthesizing module InternalOscillator @N:CG364 : fusion.v(2043) | Synthesizing module VCC @N:CG364 : fusion.v(1224) | Synthesizing module GND @N:CG364 : fusion.v(2974) | Synthesizing module PLL @N:CG364 : pll_main.v(5) | Synthesizing module pll_main @N:CG364 : fusion.v(2135) | Synthesizing module CLKINT @N:CG364 : fusion.v(126) | Synthesizing module AOI1B @N:CG364 : fusion.v(1417) | Synthesizing module MIN3 @N:CG364 : fusion.v(1505) | Synthesizing module NOR2B @N:CG364 : fusion.v(2047) | Synthesizing module XA1 @N:CG364 : fusion.v(91) | Synthesizing module AO1B @N:CG364 : fusion.v(1399) | Synthesizing module MAJ3 @N:CG364 : fusion.v(2106) | Synthesizing module XOR2 @N:CG364 : fusion.v(167) | Synthesizing module AX1D @N:CG364 : fusion.v(2111) | Synthesizing module XOR3 @N:CG364 : fusion.v(1499) | Synthesizing module NOR2A @N:CG364 : fusion.v(2053) | Synthesizing module XA1A @N:CG364 : fusion.v(79) | Synthesizing module AO1 @N:CG364 : fusion.v(43) | Synthesizing module AO13 @N:CG364 : fusion.v(2083) | Synthesizing module XNOR2 @N:CG364 : fusion.v(992) | Synthesizing module DFN1C0 @N:CG364 : fusion.v(1064) | Synthesizing module DFN1P0 @N:CG364 : LowRippleDAC.v(12) | Synthesizing module LowRippleDAC @W:CL168 : LowRippleDAC.v(446) | Pruning instance GND_i - not in use ... @W:CL168 : LowRippleDAC.v(443) | Pruning instance VCC_i - not in use ... @N:CG364 : alu.v(2) | Synthesizing module CORE8051S_llI INCL_MUL_DIV_DA=32'b00000000000000000000000000000000 INSTR_DECNUM=32'b00000000000000000000000001110111 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_llI_Z1 @W:CG133 : alu.v(4448) | No assignment to CORE8051S_lOlOI @W:CG133 : alu.v(4456) | No assignment to CORE8051S_OIlOI @W:CG133 : alu.v(4464) | No assignment to CORE8051S_IIlOI @W:CG133 : alu.v(4472) | No assignment to CORE8051S_lIlOI @W:CG360 : alu.v(4507) | No assignment to wire CORE8051S_I0lOI @W:CG133 : alu.v(4638) | No assignment to CORE8051S_lO1OI @W:CG133 : alu.v(4646) | No assignment to CORE8051S_OI1OI @W:CG360 : alu.v(4657) | No assignment to wire CORE8051S_lI1OI @W:CG360 : alu.v(4665) | No assignment to wire CORE8051S_Ol1OI @N:CG364 : clkctrl.v(2) | Synthesizing module CORE8051S_O1III EN_FF_OPTS=32'b00000000000000000000000000000000 VARIABLE_STRETCH=32'b00000000000000000000000000000000 STRETCH_VAL=32'b00000000000000000000000000000000 VARIABLE_WAIT=32'b00000000000000000000000000000001 WAIT_VAL=32'b00000000000000000000000000000000 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_O1III_Z2 @W:CG133 : clkctrl.v(4249) | No assignment to CORE8051S_OllII @W:CG133 : clkctrl.v(4252) | No assignment to CORE8051S_IllII @W:CL170 : clkctrl.v(4272) | Pruning bit <6> of CORE8051S_OIlII[7:2] - not in use ... @W:CL170 : clkctrl.v(4272) | Pruning bit <5> of CORE8051S_OIlII[7:2] - not in use ... @W:CL170 : clkctrl.v(4272) | Pruning bit <4> of CORE8051S_OIlII[7:2] - not in use ... @W:CL170 : clkctrl.v(4272) | Pruning bit <3> of CORE8051S_OIlII[7:2] - not in use ... @W:CL170 : clkctrl.v(4272) | Pruning bit <2> of CORE8051S_OIlII[7:2] - not in use ... @N:CG364 : cpu.v(2) | Synthesizing module CORE8051S_I00lI INSTR_DECNUM=32'b00000000000000000000000001110111 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_I00lI_Z3 @N:CG364 : isr.v(2) | Synthesizing module CORE8051S_lOO1I EN_FF_OPTS=32'b00000000000000000000000000000000 INSTR_DECNUM=32'b00000000000000000000000001110111 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_lOO1I_Z4 @W:CG133 : isr.v(4762) | No assignment to CORE8051S_ll0Ol @W:CG133 : isr.v(4765) | No assignment to CORE8051S_O00Ol @W:CG133 : isr.v(4768) | No assignment to CORE8051S_I00Ol @W:CG133 : isr.v(4771) | No assignment to CORE8051S_l00Ol @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_I1lOl @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_l1lOl @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_OO0Ol @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_IO0Ol @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_lO0Ol @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_OI0Ol @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_II0Ol @W:CL169 : isr.v(5460) | Pruning Register CORE8051S_lI0Ol @W:CL169 : isr.v(5098) | Pruning Register genblk32.genblk33.CORE8051S_I1I1I[7:0] @W:CL170 : isr.v(5412) | Pruning bit <7> of genblk40.genblk41.CORE8051S_OOl1I[7:0] - not in use ... @W:CL170 : isr.v(5412) | Pruning bit <6> of genblk40.genblk41.CORE8051S_OOl1I[7:0] - not in use ... @W:CL170 : isr.v(5412) | Pruning bit <5> of genblk40.genblk41.CORE8051S_OOl1I[7:0] - not in use ... @W:CL170 : isr.v(5412) | Pruning bit <4> of genblk40.genblk41.CORE8051S_OOl1I[7:0] - not in use ... @W:CL170 : isr.v(5412) | Pruning bit <3> of genblk40.genblk41.CORE8051S_OOl1I[7:0] - not in use ... @W:CL170 : isr.v(5412) | Pruning bit <1> of genblk40.genblk41.CORE8051S_OOl1I[7:0] - not in use ... @W:CL170 : isr.v(5255) | Pruning bit <7> of genblk36.genblk37.CORE8051S_l1I1I[7:0] - not in use ... @W:CL170 : isr.v(5255) | Pruning bit <6> of genblk36.genblk37.CORE8051S_l1I1I[7:0] - not in use ... @W:CL170 : isr.v(5255) | Pruning bit <5> of genblk36.genblk37.CORE8051S_l1I1I[7:0] - not in use ... @W:CL170 : isr.v(5255) | Pruning bit <4> of genblk36.genblk37.CORE8051S_l1I1I[7:0] - not in use ... @W:CL170 : isr.v(5255) | Pruning bit <3> of genblk36.genblk37.CORE8051S_l1I1I[7:0] - not in use ... @W:CL170 : isr.v(5255) | Pruning bit <1> of genblk36.genblk37.CORE8051S_l1I1I[7:0] - not in use ... @W:CL170 : isr.v(4941) | Pruning bit <6> of genblk28.genblk29.CORE8051S_O1I1I[7:0] - not in use ... @W:CL170 : isr.v(4941) | Pruning bit <5> of genblk28.genblk29.CORE8051S_O1I1I[7:0] - not in use ... @W:CL170 : isr.v(4941) | Pruning bit <4> of genblk28.genblk29.CORE8051S_O1I1I[7:0] - not in use ... @W:CL170 : isr.v(4941) | Pruning bit <3> of genblk28.genblk29.CORE8051S_O1I1I[7:0] - not in use ... @W:CL170 : isr.v(4941) | Pruning bit <1> of genblk28.genblk29.CORE8051S_O1I1I[7:0] - not in use ... @W:CL190 : isr.v(7139) | Optimizing register bit CORE8051S_OOIOl to a constant 0 @W:CL190 : isr.v(7139) | Optimizing register bit CORE8051S_l1OOl to a constant 0 @W:CL169 : isr.v(7139) | Pruning Register CORE8051S_OOIOl @W:CL169 : isr.v(7139) | Pruning Register CORE8051S_l1OOl @N:CG364 : memctrl.v(2) | Synthesizing module CORE8051S_OI1Il EN_FF_OPTS=32'b00000000000000000000000000000000 INSTR_DECNUM=32'b00000000000000000000000001110111 APB_DWIDTH=32'b00000000000000000000000000010000 INCL_DPTR1=32'b00000000000000000000000000000000 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_OI1Il_Z5 @W:CG133 : memctrl.v(4599) | No assignment to CORE8051S_OOIll @W:CG133 : memctrl.v(4607) | No assignment to CORE8051S_IOIll @W:CG133 : memctrl.v(4615) | No assignment to CORE8051S_lOIll @W:CG133 : memctrl.v(4623) | No assignment to CORE8051S_OIIll @W:CG133 : memctrl.v(4724) | No assignment to CORE8051S_OO0ll @W:CL207 : memctrl.v(9304) | All reachable assignments to genblk68.genblk70.CORE8051S_l10ll[7:0] assign 0, register removed by optimization @W:CL207 : memctrl.v(9304) | All reachable assignments to genblk68.genblk70.CORE8051S_OO1ll[7:0] assign 0, register removed by optimization @W:CL207 : memctrl.v(8912) | All reachable assignments to genblk62.genblk64.CORE8051S_l00ll[7:0] assign 0, register removed by optimization @W:CL207 : memctrl.v(8912) | All reachable assignments to genblk62.genblk64.CORE8051S_O10ll[7:0] assign 0, register removed by optimization @N:CG364 : pmu.v(2) | Synthesizing module CORE8051S_Il1Il @N:CG364 : rstctrl.v(2) | Synthesizing module CORE8051S_O01Il @N:CG364 : ramsfrctrl.v(2) | Synthesizing module CORE8051S_I11Il INSTR_DECNUM=32'b00000000000000000000000001110111 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_I11Il_Z6 @N:CG364 : oci.v(2) | Synthesizing module CORE8051S_IIOll @N:CG364 : instrdec.v(2) | Synthesizing module CORE8051S_OOO1I INCL_MUL_DIV_DA=32'b00000000000000000000000000000000 INSTR_DECNUM=32'b00000000000000000000000001110111 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_OOO1I_Z7 @N:CG364 : main8051.v(2) | Synthesizing module CORE8051S_OIIlI EN_FF_OPTS=32'b00000000000000000000000000000000 APB_DWIDTH=32'b00000000000000000000000000010000 INCL_DPTR1=32'b00000000000000000000000000000000 INCL_MUL_DIV_DA=32'b00000000000000000000000000000000 VARIABLE_STRETCH=32'b00000000000000000000000000000000 STRETCH_VAL=32'b00000000000000000000000000000000 VARIABLE_WAIT=32'b00000000000000000000000000000001 WAIT_VAL=32'b00000000000000000000000000000000 INSTR_DECNUM=32'b00000000000000000000000001110111 CORE8051S_IO0=7'b0000000 CORE8051S_lO0=7'b0000001 CORE8051S_OI0=7'b0000010 CORE8051S_II0=7'b0000011 CORE8051S_lI0=7'b0000100 CORE8051S_Ol0=7'b0000101 CORE8051S_Il0=7'b0000111 CORE8051S_ll0=7'b0001000 CORE8051S_O00=7'b0001001 CORE8051S_I00=7'b0001010 CORE8051S_l00=7'b0001011 CORE8051S_O10=7'b0001100 CORE8051S_I10=7'b0001101 CORE8051S_l10=7'b0001110 CORE8051S_OO1=7'b0010000 CORE8051S_IO1=7'b0010010 CORE8051S_lO1=7'b0011000 CORE8051S_OI1=7'b0011001 CORE8051S_II1=7'b0011010 CORE8051S_lI1=7'b0011011 CORE8051S_Ol1=7'b0011100 CORE8051S_Il1=7'b0011101 CORE8051S_ll1=7'b0011110 CORE8051S_O01=7'b0011111 CORE8051S_I01=7'b0100000 CORE8051S_l01=7'b0101000 CORE8051S_O11=7'b0101001 CORE8051S_I11=7'b0110000 CORE8051S_l11=7'b0111000 CORE8051S_OOOI=7'b0111001 CORE8051S_IOOI=7'b1010000 CORE8051S_lOOI=7'b1100000 CORE8051S_OIOI=7'b1110000 CORE8051S_IIOI=8'b11111111 CORE8051S_lIOI=8'b00000111 CORE8051S_OlOI=8'b00000000 CORE8051S_IlOI=8'b00000000 CORE8051S_llOI=8'b00000000 CORE8051S_O0OI=8'b00000000 CORE8051S_I0OI=8'b00000000 CORE8051S_l0OI=8'b00000000 CORE8051S_O1OI=8'b00000000 CORE8051S_I1OI=8'b00000000 CORE8051S_l1OI=8'b00000000 CORE8051S_OOII=8'b00000000 CORE8051S_IOII=8'b00000000 CORE8051S_lOII=8'b00000001 CORE8051S_OIII=8'b11111111 CORE8051S_IIII=8'b00000000 CORE8051S_lIII=8'b00000000 CORE8051S_OlII=8'b00000000 CORE8051S_IlII=8'b00000000 CORE8051S_llII=8'b00000000 CORE8051S_O0II=8'b00000000 CORE8051S_I0II=8'b00000000 CORE8051S_l0II=8'b00000000 CORE8051S_O1II=8'b00000000 CORE8051S_I1II=8'b11111111 CORE8051S_l1II=8'b00000000 CORE8051S_OOlI=8'b00000000 CORE8051S_IOlI=8'b11111111 CORE8051S_lOlI=8'b00000000 CORE8051S_OIlI=8'b00000000 CORE8051S_IIlI=8'b00000000 CORE8051S_lIlI=8'b00000000 CORE8051S_OllI=8'b00000000 CORE8051S_IllI=8'b00000000 CORE8051S_lllI=8'b00000001 CORE8051S_O0lI=8'b00000010 CORE8051S_I0lI=8'b00000011 CORE8051S_l0lI=8'b00000100 CORE8051S_O1lI=8'b00000101 CORE8051S_I1lI=8'b00000110 CORE8051S_l1lI=8'b00000111 CORE8051S_OO0I=8'b00001000 CORE8051S_IO0I=8'b00001001 CORE8051S_lO0I=8'b00001010 CORE8051S_OI0I=8'b00001011 CORE8051S_II0I=8'b00001100 CORE8051S_lI0I=8'b00001101 CORE8051S_Ol0I=8'b00001110 CORE8051S_Il0I=8'b00001111 CORE8051S_ll0I=8'b00010000 CORE8051S_O00I=8'b00010001 CORE8051S_I00I=8'b00010010 CORE8051S_l00I=8'b00010011 CORE8051S_O10I=8'b00010100 CORE8051S_I10I=8'b00010101 CORE8051S_l10I=8'b00010110 CORE8051S_OO1I=8'b00010111 CORE8051S_IO1I=8'b00011000 CORE8051S_lO1I=8'b00011001 CORE8051S_OI1I=8'b00011010 CORE8051S_II1I=8'b00011011 CORE8051S_lI1I=8'b00011100 CORE8051S_Ol1I=8'b00011101 CORE8051S_Il1I=8'b00011110 CORE8051S_ll1I=8'b00011111 CORE8051S_O01I=8'b00100000 CORE8051S_I01I=8'b00100001 CORE8051S_l01I=8'b00100010 CORE8051S_O11I=8'b00100011 CORE8051S_I11I=8'b00100100 CORE8051S_l11I=8'b00100101 CORE8051S_OOOl=8'b00100110 CORE8051S_IOOl=8'b00100111 CORE8051S_lOOl=8'b00101000 CORE8051S_OIOl=8'b00101001 CORE8051S_IIOl=8'b00101010 CORE8051S_lIOl=8'b00101011 CORE8051S_OlOl=8'b00101100 CORE8051S_IlOl=8'b00101101 CORE8051S_llOl=8'b00101110 CORE8051S_O0Ol=8'b00101111 CORE8051S_I0Ol=8'b00110000 CORE8051S_l0Ol=8'b00110001 CORE8051S_O1Ol=8'b00110010 CORE8051S_I1Ol=8'b00110011 CORE8051S_l1Ol=8'b00110100 CORE8051S_OOIl=8'b00110101 CORE8051S_IOIl=8'b00110110 CORE8051S_lOIl=8'b00110111 CORE8051S_OIIl=8'b00111000 CORE8051S_IIIl=8'b00111001 CORE8051S_lIIl=8'b00111010 CORE8051S_OlIl=8'b00111011 CORE8051S_IlIl=8'b00111100 CORE8051S_llIl=8'b00111101 CORE8051S_O0Il=8'b00111110 CORE8051S_I0Il=8'b00111111 CORE8051S_l0Il=8'b01000000 CORE8051S_O1Il=8'b01000001 CORE8051S_I1Il=8'b01000010 CORE8051S_l1Il=8'b01000011 CORE8051S_OOll=8'b01000100 CORE8051S_IOll=8'b01000101 CORE8051S_lOll=8'b01000110 CORE8051S_OIll=8'b01000111 CORE8051S_IIll=8'b01001000 CORE8051S_lIll=8'b01001001 CORE8051S_Olll=8'b01001010 CORE8051S_Illl=8'b01001011 CORE8051S_llll=8'b01001100 CORE8051S_O0ll=8'b01001101 CORE8051S_I0ll=8'b01001110 CORE8051S_l0ll=8'b01001111 CORE8051S_O1ll=8'b01010000 CORE8051S_I1ll=8'b01010001 CORE8051S_l1ll=8'b01010010 CORE8051S_OO0l=8'b01010011 CORE8051S_IO0l=8'b01010100 CORE8051S_lO0l=8'b01010101 CORE8051S_OI0l=8'b01010110 CORE8051S_II0l=8'b01010111 CORE8051S_lI0l=8'b01011000 CORE8051S_Ol0l=8'b01011001 CORE8051S_Il0l=8'b01011010 CORE8051S_ll0l=8'b01011011 CORE8051S_O00l=8'b01011100 CORE8051S_I00l=8'b01011101 CORE8051S_l00l=8'b01011110 CORE8051S_O10l=8'b01011111 CORE8051S_I10l=8'b01100000 CORE8051S_l10l=8'b01100001 CORE8051S_OO1l=8'b01100010 CORE8051S_IO1l=8'b01100011 CORE8051S_lO1l=8'b01100100 CORE8051S_OI1l=8'b01100101 CORE8051S_II1l=8'b01100110 CORE8051S_lI1l=8'b01100111 CORE8051S_Ol1l=8'b01101000 CORE8051S_Il1l=8'b01101001 CORE8051S_ll1l=8'b01101010 CORE8051S_O01l=8'b01101011 CORE8051S_I01l=8'b01101100 CORE8051S_l01l=8'b01101101 CORE8051S_O11l=8'b01101110 CORE8051S_I11l=8'b01101111 CORE8051S_l11l=8'b01110000 CORE8051S_OOO0=8'b01110001 CORE8051S_IOO0=8'b01110010 CORE8051S_lOO0=8'b01110011 CORE8051S_OIO0=8'b01110100 CORE8051S_IIO0=8'b01110101 CORE8051S_lIO0=8'b01110110 CORE8051S_OlO0=8'b01110111 CORE8051S_IlO0=8'b01111000 CORE8051S_llO0=8'b01111001 CORE8051S_O0O0=8'b01111010 CORE8051S_I0O0=8'b01111011 CORE8051S_l0O0=8'b01111100 CORE8051S_O1O0=8'b01111101 CORE8051S_I1O0=8'b01111110 CORE8051S_l1O0=8'b01111111 CORE8051S_OOI0=8'b10000000 CORE8051S_IOI0=8'b10000001 CORE8051S_lOI0=8'b10000010 CORE8051S_OII0=8'b10000011 CORE8051S_III0=8'b10000100 CORE8051S_lII0=8'b10000101 CORE8051S_OlI0=8'b10000110 CORE8051S_IlI0=8'b10000111 CORE8051S_llI0=8'b10001000 CORE8051S_O0I0=8'b10001001 CORE8051S_I0I0=8'b10001010 CORE8051S_l0I0=8'b10001011 CORE8051S_O1I0=8'b10001100 CORE8051S_I1I0=8'b10001101 CORE8051S_l1I0=8'b10001110 CORE8051S_OOl0=8'b10001111 CORE8051S_IOl0=8'b10010000 CORE8051S_lOl0=8'b10010001 CORE8051S_OIl0=8'b10010010 CORE8051S_IIl0=8'b10010011 CORE8051S_lIl0=8'b10010100 CORE8051S_Oll0=8'b10010101 CORE8051S_Ill0=8'b10010110 CORE8051S_lll0=8'b10010111 CORE8051S_O0l0=8'b10011000 CORE8051S_I0l0=8'b10011001 CORE8051S_l0l0=8'b10011010 CORE8051S_O1l0=8'b10011011 CORE8051S_I1l0=8'b10011100 CORE8051S_l1l0=8'b10011101 CORE8051S_OO00=8'b10011110 CORE8051S_IO00=8'b10011111 CORE8051S_lO00=8'b10100000 CORE8051S_OI00=8'b10100001 CORE8051S_II00=8'b10100010 CORE8051S_lI00=8'b10100011 CORE8051S_Ol00=8'b10100100 CORE8051S_Il00=8'b10100101 CORE8051S_ll00=8'b10100110 CORE8051S_O000=8'b10100111 CORE8051S_I000=8'b10101000 CORE8051S_l000=8'b10101001 CORE8051S_O100=8'b10101010 CORE8051S_I100=8'b10101011 CORE8051S_l100=8'b10101100 CORE8051S_OO10=8'b10101101 CORE8051S_IO10=8'b10101110 CORE8051S_lO10=8'b10101111 CORE8051S_OI10=8'b10110000 CORE8051S_II10=8'b10110001 CORE8051S_lI10=8'b10110010 CORE8051S_Ol10=8'b10110011 CORE8051S_Il10=8'b10110100 CORE8051S_ll10=8'b10110101 CORE8051S_O010=8'b10110110 CORE8051S_I010=8'b10110111 CORE8051S_l010=8'b10111000 CORE8051S_O110=8'b10111001 CORE8051S_I110=8'b10111010 CORE8051S_l110=8'b10111011 CORE8051S_OOO1=8'b10111100 CORE8051S_IOO1=8'b10111101 CORE8051S_lOO1=8'b10111110 CORE8051S_OIO1=8'b10111111 CORE8051S_IIO1=8'b11000000 CORE8051S_lIO1=8'b11000001 CORE8051S_OlO1=8'b11000010 CORE8051S_IlO1=8'b11000011 CORE8051S_llO1=8'b11000100 CORE8051S_O0O1=8'b11000101 CORE8051S_I0O1=8'b11000110 CORE8051S_l0O1=8'b11000111 CORE8051S_O1O1=8'b11001000 CORE8051S_I1O1=8'b11001001 CORE8051S_l1O1=8'b11001010 CORE8051S_OOI1=8'b11001011 CORE8051S_IOI1=8'b11001100 CORE8051S_lOI1=8'b11001101 CORE8051S_OII1=8'b11001110 CORE8051S_III1=8'b11001111 CORE8051S_lII1=8'b11010000 CORE8051S_OlI1=8'b11010001 CORE8051S_IlI1=8'b11010010 CORE8051S_llI1=8'b11010011 CORE8051S_O0I1=8'b11010100 CORE8051S_I0I1=8'b11010101 CORE8051S_l0I1=8'b11010110 CORE8051S_O1I1=8'b11010111 CORE8051S_I1I1=8'b11011000 CORE8051S_l1I1=8'b11011001 CORE8051S_OOl1=8'b11011010 CORE8051S_IOl1=8'b11011011 CORE8051S_lOl1=8'b11011100 CORE8051S_OIl1=8'b11011101 CORE8051S_IIl1=8'b11011110 CORE8051S_lIl1=8'b11011111 CORE8051S_Oll1=8'b11100000 CORE8051S_Ill1=8'b11100001 CORE8051S_lll1=8'b11100010 CORE8051S_O0l1=8'b11100011 CORE8051S_I0l1=8'b11100100 CORE8051S_l0l1=8'b11100101 CORE8051S_O1l1=8'b11100110 CORE8051S_I1l1=8'b11100111 CORE8051S_l1l1=8'b11101000 CORE8051S_OO01=8'b11101001 CORE8051S_IO01=8'b11101010 CORE8051S_lO01=8'b11101011 CORE8051S_OI01=8'b11101100 CORE8051S_II01=8'b11101101 CORE8051S_lI01=8'b11101110 CORE8051S_Ol01=8'b11101111 CORE8051S_Il01=8'b11110000 CORE8051S_ll01=8'b11110001 CORE8051S_O001=8'b11110010 CORE8051S_I001=8'b11110011 CORE8051S_l001=8'b11110100 CORE8051S_O101=8'b11110101 CORE8051S_I101=8'b11110110 CORE8051S_l101=8'b11110111 CORE8051S_OO11=8'b11111000 CORE8051S_IO11=8'b11111001 CORE8051S_lO11=8'b11111010 CORE8051S_OI11=8'b11111011 CORE8051S_II11=8'b11111100 CORE8051S_lI11=8'b11111101 CORE8051S_Ol11=8'b11111110 CORE8051S_Il11=8'b11111111 CORE8051S_ll11=5'b00000 CORE8051S_O011=4'b0000 CORE8051S_I011=5'b00000 CORE8051S_l011=5'b00001 CORE8051S_O111=5'b00010 CORE8051S_I111=5'b00011 CORE8051S_l111=5'b00100 CORE8051S_OOOOI=5'b00101 CORE8051S_IOOOI=5'b01000 CORE8051S_lOOOI=5'b01001 CORE8051S_OIOOI=5'b01010 CORE8051S_IIOOI=5'b01011 CORE8051S_lIOOI=5'b01100 CORE8051S_OlOOI=5'b01101 CORE8051S_IlOOI=5'b10000 CORE8051S_llOOI=16'b0000000000000000 CORE8051S_O0OOI=8'b00000000 CORE8051S_I0OOI=8'b00000000 CORE8051S_l0OOI=8'b00000000 CORE8051S_O1OOI=32'b00000000000000000000000000000001 Generated name = CORE8051S_OIIlI_Z8 @N:CG364 : core8051s_globs_fusion.v(2) | Synthesizing module CORE8051S_lllII USE_OCI=32'b00000000000000000000000000000000 Generated name = CORE8051S_lllII_0s @W:CG360 : core8051s_globs_fusion.v(63) | No assignment to wire CORE8051S_IO0II @N:CG364 : fusion.v(1394) | Synthesizing module INV @N:CG364 : fusion.v(2267) | Synthesizing module RAM4K9 @N:CG364 : RAM256X8.v(3) | Synthesizing module CORE8051S_lII @N:CG364 : core8051s.v(2) | Synthesizing module CORE8051S USE_OCI=32'b00000000000000000000000000000000 USE_UJTAG=32'b00000000000000000000000000000001 INCL_TRACE=32'b00000000000000000000000000000000 TRIG_NUM=32'b00000000000000000000000000000100 EN_FF_OPTS=32'b00000000000000000000000000000000 APB_DWIDTH=32'b00000000000000000000000000010000 INCL_DPTR1=32'b00000000000000000000000000000000 INCL_MUL_DIV_DA=32'b00000000000000000000000000000000 VARIABLE_STRETCH=32'b00000000000000000000000000000000 STRETCH_VAL=32'b00000000000000000000000000000000 VARIABLE_WAIT=32'b00000000000000000000000000000001 WAIT_VAL=32'b00000000000000000000000000000000 FAMILY=32'b00000000000000000000000000010001 TRACE_DEPTH=32'b00000000000000000000000000000000 Generated name = CORE8051S_Z9 @W:CG360 : core8051s.v(269) | No assignment to wire TDO @W:CG360 : core8051s.v(301) | No assignment to wire CORE8051S_II0II @W:CG360 : core8051s.v(304) | No assignment to wire CORE8051S_lI0II @W:CG360 : core8051s.v(370) | No assignment to wire CORE8051S_l00II @W:CG360 : core8051s.v(378) | No assignment to wire CORE8051S_lll @W:CG360 : core8051s.v(381) | No assignment to wire CORE8051S_O0l @W:CG360 : core8051s.v(384) | No assignment to wire CORE8051S_O10II @W:CG360 : core8051s.v(431) | No assignment to wire CORE8051S_IO1II @N:CG364 : MuxPtoB3.v(3) | Synthesizing module CoreAPB3_ll0 @N:CG364 : CoreAPB3.v(3) | Synthesizing module CoreAPB3 ApbSlot0Enable=32'b00000000000000000000000000000000 ApbSlot1Enable=32'b00000000000000000000000000000000 ApbSlot2Enable=32'b00000000000000000000000000000000 ApbSlot3Enable=32'b00000000000000000000000000000000 ApbSlot4Enable=32'b00000000000000000000000000000001 ApbSlot5Enable=32'b00000000000000000000000000000000 ApbSlot6Enable=32'b00000000000000000000000000000001 ApbSlot7Enable=32'b00000000000000000000000000000000 ApbSlot8Enable=32'b00000000000000000000000000000000 ApbSlot9Enable=32'b00000000000000000000000000000000 ApbSlot10Enable=32'b00000000000000000000000000000000 ApbSlot11Enable=32'b00000000000000000000000000000000 ApbSlot12Enable=32'b00000000000000000000000000000000 ApbSlot13Enable=32'b00000000000000000000000000000000 ApbSlot14Enable=32'b00000000000000000000000000000000 ApbSlot15Enable=32'b00000000000000000000000000000000 RangeSize=32'b00000000000000000000000100000000 Generated name = CoreAPB3_Z10 @N:CG364 : CoreGPIO.v(3) | Synthesizing module CoreGPIO NUM_INPUTS=32'b00000000000000000000000000010000 NUM_OUTPUTS=32'b00000000000000000000000000010000 Generated name = CoreGPIO_16_16 @N:CG364 : UART.v(3) | Synthesizing module CoreUARTapb_I0l TX_FIFO=32'b00000000000000000000000000000000 RX_FIFO=32'b00000000000000000000000000000000 ASYNCHRONOUS=32'b00000000000000000000000000000001 Generated name = CoreUARTapb_I0l_0s_0s_1s @N:CG364 : Clock_gen.v(19) | Synthesizing module CoreUARTapb_II @N:CG364 : Tx_async.v(3) | Synthesizing module CoreUARTapb_OIII TX_FIFO=32'b00000000000000000000000000000000 CoreUARTapb_I0II=32'b00000000000000000000000000000000 CoreUARTapb_l0II=32'b00000000000000000000000000000001 CoreUARTapb_O1II=32'b00000000000000000000000000000010 CoreUARTapb_I1II=32'b00000000000000000000000000000011 CoreUARTapb_l1II=32'b00000000000000000000000000000100 CoreUARTapb_OOlI=32'b00000000000000000000000000000101 CoreUARTapb_IOlI=32'b00000000000000000000000000000110 Generated name = CoreUARTapb_OIII_0s_0s_1s_2s_3s_4s_5s_6s @N:CG179 : Tx_async.v(821) | Removing redundant assignment @W:CG360 : Tx_async.v(170) | No assignment to wire CoreUARTapb_ll1 @W:CL190 : Tx_async.v(251) | Optimizing register bit CoreUARTapb_IllI to a constant 1 @W:CL169 : Tx_async.v(251) | Pruning Register CoreUARTapb_IllI @N:CG364 : Rx_async.v(3) | Synthesizing module CoreUARTapb_OI1 RX_FIFO=32'b00000000000000000000000000000000 CoreUARTapb_OlOI=32'b00000000000000000000000000000000 CoreUARTapb_IlOI=32'b00000000000000000000000000000001 CoreUARTapb_llOI=32'b00000000000000000000000000000010 Generated name = CoreUARTapb_OI1_0s_0s_1s_2s @W:CG360 : UART.v(195) | No assignment to wire CoreUARTapb_OlII @W:CG360 : UART.v(203) | No assignment to wire CoreUARTapb_l00I @W:CG360 : UART.v(233) | No assignment to wire CoreUARTapb_l10I @W:CG360 : UART.v(236) | No assignment to wire CoreUARTapb_OO1I @W:CG360 : UART.v(248) | No assignment to wire CoreUARTapb_OI1I @W:CG360 : UART.v(251) | No assignment to wire CoreUARTapb_II1I @W:CG360 : UART.v(254) | No assignment to wire CoreUARTapb_lI1I @W:CG133 : UART.v(269) | No assignment to CoreUARTapb_ll1I @W:CG133 : UART.v(272) | No assignment to CoreUARTapb_O01I @W:CG133 : UART.v(278) | No assignment to CoreUARTapb_l01I @W:CL169 : UART.v(774) | Pruning Register CoreUARTapb_O11I @W:CL169 : UART.v(725) | Pruning Register CoreUARTapb_O10I[7:0] @W:CL169 : UART.v(607) | Pruning Register CoreUARTapb_O01[1:0] @W:CL169 : UART.v(569) | Pruning Register CoreUARTapb_Il1I @W:CL169 : UART.v(569) | Pruning Register CoreUARTapb_Ol1I @W:CL169 : UART.v(299) | Pruning Register CoreUARTapb_lO1I @N:CG364 : CoreUARTapb.v(3) | Synthesizing module CoreUARTapb TX_FIFO=32'b00000000000000000000000000000000 RX_FIFO=32'b00000000000000000000000000000000 ASYNCHRONOUS=32'b00000000000000000000000000000001 Generated name = CoreUARTapb_0s_0s_1s @N:CG179 : CoreUARTapb.v(503) | Removing redundant assignment @N:CG179 : CoreUARTapb.v(566) | Removing redundant assignment @N:CG364 : ProcessorSystem.v(7) | Synthesizing module ProcessorSystem @W:CS149 : ProcessorSystem.v(250) | Port width mismatch for port PWDATA. Formal has width 16, Actual 32 @W:CS149 : ProcessorSystem.v(254) | Port width mismatch for port PRDATA. Formal has width 16, Actual 32 @N:CG364 : fusion.v(1561) | Synthesizing module OR2 @N:CG364 : fusion.v(3205) | Synthesizing module AB @N:CG364 : fusion.v(3374) | Synthesizing module INBUF_A @N:CG364 : calibip_CLRAM.v(20) | Synthesizing module calibip_CLRAM G_DEBUG=32'b00000000000000000000000000000000 G_USE_SRAM_TILES=32'b00000000000000000000000000000000 Generated name = calibip_CLRAM_0s_0s @N:CG364 : calibip_ram512x9_afs.v(20) | Synthesizing module CCALIBOl01 @W:CG133 : calibip_CLRAM.v(145) | No assignment to CCALIBO0l1 @N:CG364 : calibip_compute_block.v(19) | Synthesizing module COMPUTE_BLOCK G_WIDTH_GAIN=32'b00000000000000000000000000001011 G_WIDTH_OFFSET=32'b00000000000000000000000000001000 G_ADC_BITS_8_10_12=32'b00000000000000000000000000000000 G_OPTIMIZATION=32'b00000000000000000000000000000000 G_SATURATE=32'b00000000000000000000000000000001 CCALIBIO11=32'b00000000000000000000000000001100 CCALIBlO11=32'b00000000000000000000000000010111 CCALIBOI11=32'b00000000000000000000000000010110 CCALIBII11=32'b00000000000000000000000000010111 CCALIBlI11=32'b00000000000000000000000000010100 CCALIBOl11=32'b00000000000000000000000000010110 CCALIBIIOOI=2'b00 CCALIBlIOOI=2'b01 CCALIBOlOOI=2'b10 Generated name = COMPUTE_BLOCK_Z11 @N:CG364 : fusion.v(2) | Synthesizing module AND2 @N:CG364 : calibip_ripple_24.v(20) | Synthesizing module CCALIBllOOI @N:CG364 : calibip.v(20) | Synthesizing module calibip G_DEBUG=32'b00000000000000000000000000000000 G_USE_SRAM_TILES=32'b00000000000000000000000000000000 G_WIDTH_GAIN=32'b00000000000000000000000000001011 G_WIDTH_OFFSET=32'b00000000000000000000000000001000 G_ADC_BITS_8_10_12=32'b00000000000000000000000000000000 G_OPTIMIZATION=32'b00000000000000000000000000000000 G_SATURATE=32'b00000000000000000000000000000001 Generated name = calibip_0s_0s_11s_8s_0s_0s_1s @N:CG364 : AnalogSystem_calibip_wrapper.v(1) | Synthesizing module AnalogSystem_calibip_wrapper @N:CG364 : assc.v(10) | Synthesizing module fmvgpwbdcxs knrjvwspqzm=3'b110 ddqwgtngbxc=6'b000000 whxdkdmhjwj=4'b0000 cpcqjrjtppx=1'b0 pqqkvvvcbmx=1'b0 mqbcdwzwhzc=1'b0 pxzwzhfwkqm=4'b0000 dgsjdxsjscf=1'b0 rcbvmqmwnjn=1'b0 vhxpkfzhvxk=8'b00000000 kksfgnxtcxn=1'b0 dggdcrrffcs=8'b00000000 jphnsqvgftr=10'b0000000000 csnxdprbsgk=11'b00000000000 hnvgngcgxqv=3'b000 nqsmzqnjmrw=3'b001 zzkwmmdbxsp=3'b010 rrkzczwdwsc=3'b011 hjsnsxjgcdh=3'b100 vxcfjzvsvhk=3'b101 tmqfdmdqjts=3'b110 rdqqcddkdwq=3'b111 bjsvghjhbmx=3'b001 chgvmjshrrw=3'b010 bmhfcgnbbxr=3'b011 gdgczndxskv=3'b100 kzqsqsbqhrw=3'b101 wnxmqrmxxnh=3'b110 hbsskxtsqbt=6'b000000 tpbpbbzppsz=8'b11111111 mdqdmchqsjk=4'b0000 zjjmzcsxggj=4'b0001 nvnpbtnnhwb=4'b0010 zgqrpqvjtwm=4'b0011 rvsskdxmcct=4'b0100 ptgdvkqmfxz=4'b0101 rcgmzbqbdhp=4'b0110 xdbhgfkhtkv=4'b0111 bjrtpbmfdvt=4'b1000 jvfmnrmnrsc=4'b1001 gmccksdwzbb=4'b1010 pdtbxbcjmqv=4'b1011 frtsmvmjzjs=4'b1100 dnkbdnxmrsb=4'b1101 dtdsjrnddkb=4'b1110 jqktphcjtcx=4'b1111 Generated name = fmvgpwbdcxs_Z12 @W:CL169 : assc.v(266) | Pruning Register zbhmfptrcmn @W:CL169 : assc.v(266) | Pruning Register gtxqsppgcmn @W:CL169 : assc.v(266) | Pruning Register crgqqkcrfvm @W:CL169 : assc.v(266) | Pruning Register bwngcbddzsh[10:0] @W:CL169 : assc.v(250) | Pruning Register kzdxfwqwvrt @W:CL169 : assc.v(250) | Pruning Register jzwhhbvmkpk @W:CL169 : assc.v(250) | Pruning Register njsdcspkqtt @W:CL169 : assc.v(250) | Pruning Register sxqvnxkkjsh[9:0] @N:CG364 : assc.v(333) | Synthesizing module ASSC TS_WIDTH=3'b110 TS_RST_VALUE=6'b000000 DLYCNT_WIDTH=4'b0000 ALLOW_USER_ASSC=1'b0 ALLOW_RPT=1'b0 FIXED_MODE=1'b0 FIXED_MODE_CONST=4'b0000 FIXED_VREFSEL_CONST=1'b0 FIXED_STC=1'b0 FIXED_STC_CONST=8'b00000000 FIXED_TVC=1'b0 FIXED_TVC_CONST=8'b00000000 ALLOW_CM_STB_BITS=10'b0000000000 ALLOW_TM_STB_BITS=11'b00000000000 Generated name = ASSC_Z13 @N:CG364 : AnalogSystem_assc_wrapper.v(1) | Synthesizing module AnalogSystem_assc_wrapper @N:CG364 : AnalogSystem_assc_ram.v(5) | Synthesizing module AnalogSystem_assc_ram @N:CG364 : AnalogSystem.v(5) | Synthesizing module AnalogSystem @W:CL168 : AnalogSystem.v(268) | Pruning instance VCC_power_inst1 - not in use ... @N:CG364 : initcfg_xa.v(10) | Synthesizing module stnpfdkggvx znbxfhhzvcr=32'b00000000000000000000000000000100 cdczdbxmjcn=32'b00000000000000000000000000000010 tvzdqnwfvfh=3'b000 zmvpjkpbpxm=3'b001 xbwfvwmkpbv=3'b010 qgtqskssqxc=3'b011 ktpjzjzrqtg=3'b100 nnkzhsghqkw=3'b101 mdzgdrhtwkc=3'b110 tdkqfrncvhq=3'b111 Generated name = stnpfdkggvx_4s_2s_0s_1s_2s_3s_4294967292s_4294967293s_4294967294s_4294967295s_14 @N:CG364 : initcfg_xa.v(51) | Synthesizing module INITCFG_XA MAX_CLIENT=32'b00000000000000000000000000000100 MAX_CLIENT_BITS=32'b00000000000000000000000000000010 Generated name = INITCFG_XA_4s_2s @N:CG364 : initcfg_xb.v(10) | Synthesizing module wbsfnwwctpn tmxcpsvwjwc=32'b00000000000000000000000000000100 rchvpvgtdzp=32'b00000000000000000000000000000010 cqppqjpknwn=4'b0000 tjjmqmntzrj=4'b0001 sbbghcmnjcd=4'b0010 phhmrjsbhxm=4'b0011 rqxvwvrbcwj=4'b0100 bfdbzszvjts=4'b0101 fxnsrcgnnwv=4'b0110 wjnfncxbjmm=4'b0111 vqvvxnwqfkz=4'b1000 Generated name = wbsfnwwctpn_Z15 @N:CG364 : initcfg_xb.v(65) | Synthesizing module INITCFG_XB MAX_CLIENT=32'b00000000000000000000000000000100 MAX_CLIENT_BITS=32'b00000000000000000000000000000010 Generated name = INITCFG_XB_4s_2s @N:CG364 : initcfg_xc.v(10) | Synthesizing module ffppvfwnggt rptpxqccxqw=32'b00000000000000000000000000000100 gvwtbkksmbj=32'b00000000000000000000000000000010 zpzqwtrdvbp=32'b00000000000000000000000000001011 Generated name = ffppvfwnggt_4s_2s_11s @N:CG364 : initcfg_xc.v(155) | Synthesizing module INITCFG_XC MAX_CLIENT=32'b00000000000000000000000000000100 MAX_CLIENT_BITS=32'b00000000000000000000000000000010 MAX_WORD_BIT=32'b00000000000000000000000000001011 Generated name = INITCFG_XC_4s_2s_11s @N:CG364 : initcfg_xd.v(10) | Synthesizing module dxwqxgdccxc pjbfkczqqqn=32'b00000000000000000000000000001011 Generated name = dxwqxgdccxc_11s @N:CG364 : initcfg_xd.v(54) | Synthesizing module INITCFG_XD MAX_WORD_BIT=32'b00000000000000000000000000001011 Generated name = INITCFG_XD_11s @N:CG364 : initcfg_xe.v(10) | Synthesizing module gpbdjfttbjd pwsjbpbwfdp=32'b00000000000000000000000000000100 rszdtxvjmkk=32'b00000000000000000000000000000010 Generated name = gpbdjfttbjd_4s_2s @N:CG364 : initcfg_xe.v(26) | Synthesizing module INITCFG_XE MAX_CLIENT=32'b00000000000000000000000000000100 MAX_CLIENT_BITS=32'b00000000000000000000000000000010 Generated name = INITCFG_XE_4s_2s @N:CG364 : initcfg_xf.v(10) | Synthesizing module jhmkpjjmdkx @N:CG364 : initcfg_xf.v(38) | Synthesizing module INITCFG_XF @N:CG364 : initcfg.v(10) | Synthesizing module grwzcnqmqzm hphqhdwdhmf=32'b00000000000000000000000000001011 chwbfzxpgsp=32'b00000000000000000000000000000100 mrffkbssmtq=32'b00000000000000000000000000000010 qwsfndhqmkm=32'b00000000000000000001000000000000 mnzfvzggbgp=32'b00000000000000000000000000101001 dqrxdcfppkj=32'b00000000000000000000000000000000 sgsprpjjzdc=32'b00000000000000000000000000000001 rsgtbhgqwcc=32'b00000000000000000000000000000000 bwstmtzrgsf=32'b00000000000000000010000000000000 krvfnxvdczw=32'b00000000000000000000001000000000 srsmtfkmzzq=32'b00000000000000000000000000000000 dfbxgpzpjqp=32'b00000000000000000000000000000001 cjjhrtwmvpv=32'b00000000000000000000000000000001 jhgkdhvwcfb=32'b00000000000000101011000000000000 htwtmbfrnfz=32'b00000000000000000000000110000000 kgztbhmkskk=32'b00000000000000000000000000000000 bzqvhzjcdph=32'b00000000000000000000000000000001 cnxcpvmknsk=32'b00000000000000000000000000000001 frfwqrrdddg=32'b00000000000000110010000000000000 xkvjnpdmkkm=32'b00000000000000000000011001010100 xnmjhccrpbz=32'b00000000000000000000000000000000 spbwnqbxkkn=32'b00000000000000000000000000000001 fsqrqsfbjhm=32'b00000000000000000000000000000000 tfbkdzcghbt=32'b00000000000000000000000000000000 zzbncfwtcjb=32'b00000000000000000000000000000000 dpkfnwtwdjx=32'b00000000000000000000000000000000 zvxxwrbtgqz=32'b00000000000000000000000000000000 jfjcmxmmgjr=32'b00000000000000000000000000000000 vrnqqtvpznx=32'b00000000000000000000000000000000 czxqdxtxdcd=32'b00000000000000000000000000000000 gvdxfskncvn=32'b00000000000000000000000000000000 qmvrkmnxnbr=32'b00000000000000000000000000000000 mjqhrwtncqv=32'b00000000000000000000000000000000 vnfbfdkcmct=32'b00000000000000000000000000000000 vxjhvxtcdqc=32'b00000000000000000000000000000000 cmdcwdfbsqd=32'b00000000000000000000000000000000 bnjnjsfcbcw=32'b00000000000000000000000000000000 xkvntfssjpv=32'b00000000000000000000000000000000 srpkvvkkrzt=32'b00000000000000000000000000000000 fgkrxwdxwtc=32'b00000000000000000000000000000000 xkjrjgwpqdm=32'b00000000000000000000000000000000 zdqqwkgkhhx=32'b00000000000000000000000000000000 hzgsvvbxngk=32'b00000000000000000000000000000000 sthncdwvjtw=32'b00000000000000000000000000000000 tsqgqxvmnhz=32'b00000000000000000000000000000000 qnzjbnnwknh=32'b00000000000000000000000000000000 pmnbjxmfgxd=32'b00000000000000000000000000000000 nqxzdhmssdr=32'b00000000000000000000000000000000 bnkjcrhcdfs=32'b00000000000000000000000000000000 wmmrphpmvnv=32'b00000000000000000000000000000000 dmxmzjbtdmr=32'b00000000000000000000000000000000 tkftzwrbhbh=32'b00000000000000000000000000000000 svvgxqdxdfv=32'b00000000000000000000000000000000 czrwqbddqjn=32'b00000000000000000000000000000000 nczxtwvzskw=32'b00000000000000000000000000000000 vcvqnbfhntg=32'b00000000000000000000000000000000 zfjxqtzgtfg=32'b00000000000000000000000000000000 tkvdjvhrvvg=32'b00000000000000000000000000000000 hprgsrzhrfm=32'b00000000000000000000000000000000 wvxsdzmgnjr=32'b00000000000000000000000000000000 vmzrgwpkkqm=32'b00000000000000000000000000000000 sktdchbdzgd=32'b00000000000000000000000000000000 tgqmncfnssz=32'b00000000000000000000000000000000 rwbpgntsknz=32'b00000000000000000000000000000000 rtnjmbcbzsp=32'b00000000000000000000000000000000 dxpspzjbxvw=32'b00000000000000000000000000000000 svwmmdmkcxj=32'b00000000000000000000000000000000 fqwvkwrjzqp=32'b00000000000000000000000000000000 hrjrtbfwxrz=32'b00000000000000000000000000000000 ntxtvbcmgpz=32'b00000000000000000000000000000000 vbwxjbjvxxn=32'b00000000000000000000000000000000 rssdfnxtdvc=32'b00000000000000000000000000000000 qqhddwcfdcz=32'b00000000000000000000000000000000 msnmxsssvws=32'b00000000000000000000000000000000 dmvxrrpgczz=32'b00000000000000000000000000000000 mrrhxvjqgwg=32'b00000000000000000000000000000000 xnspvwjhsrt=32'b00000000000000000000000000000000 gsgvwbvcxxh=32'b00000000000000000000000000000000 smgkxmdgnww=32'b00000000000000000000000000000000 bwqtbcpddzs=32'b00000000000000000000000000000000 qmmhqcjngdv=32'b00000000000000000000000000000000 mmncfgsdhxd=32'b00000000000000000000000000000000 fxwwxvbngvv=32'b00000000000000000000000000000000 pxxzhqhrxbb=32'b00000000000000000000000000000000 dqwtkvpgwnq=32'b00000000000000000000000000000000 pvhbxphxmvf=32'b00000000000000000000000000000000 rvkfqjhzvct=32'b00000000000000000000000000000000 rnpdjmgrnth=32'b00000000000000000000000000000000 mknhpztjddj=32'b00000000000000000000000000000000 xqfppbdhtsk=32'b00000000000000000000000000000000 dszbfpkvfbj=32'b00000000000000000000000000000000 xhjkjhvvsnq=32'b00000000000000000000000000000000 rwpszkwsmxz=32'b00000000000000000000000000000000 wxhvvzpspmh=32'b00000000000000000000000000000000 kknpckfzwtf=32'b00000000000000000000000000000000 skfpvdnmxmp=32'b00000000000000000000000000000000 cbjgqdrxwmp=32'b00000000000000000000000000000000 hzwkdjjmxfs=32'b00000000000000000000000000000000 bchrncjjwsv=32'b00000000000000000000000000000000 bfbnckxtmdb=32'b00000000000000000000000000000000 jkvwdrbrfts=32'b00000000000000000000000000000000 bmcbrpctvbr=32'b00000000000000000000000000000000 zdtxzwtxzvs=32'b00000000000000000000000000000000 tpmcsxpqzbn=32'b00000000000000000000000000000000 grvkswpvkwq=32'b00000000000000000000000000000000 jjscqqxjjvv=32'b00000000000000000000000000000000 jccckstbdxm=32'b00000000000000000000000000000000 pxjxdpsnwrw=32'b00000000000000000000000000000000 mrzvztzvgqn=32'b00000000000000000000000000000000 wtfkktxvfmx=32'b00000000000000000000000000000000 nxxhhgrxhqs=32'b00000000000000000000000000000000 mhkvqwkwqbb=32'b00000000000000000000000000000000 pmrrqbmrcgp=32'b00000000000000000000000000000000 fnqrcfmrdzn=32'b00000000000000000000000000000000 vgvrpwwvdss=32'b00000000000000000000000000000000 pfsbjdzqfvg=32'b00000000000000000000000000000000 kspfmtsrdgt=32'b00000000000000000000000000000000 mtvnfqkxztb=32'b00000000000000000000000000000000 ktvcqzbfwsd=32'b00000000000000000000000000000000 bzvfztsfwmw=32'b00000000000000000000000000000000 qdhpcpjhdtx=32'b00000000000000000000000000000000 jzswvrrbxmj=32'b00000000000000000000000000000000 sgrkdxfmpms=32'b00000000000000000000000000000000 ctjqbtwmmbb=32'b00000000000000000000000000000000 rzgvvbpxdbj=32'b00000000000000000000000000000000 szcqjdwxxtb=32'b00000000000000000000000000000000 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SPARE_PAGE_4=32'b00000000000000000000000000000001 WIDTH_4=32'b00000000000000000000000000000000 BASE_ADD_5=32'b00000000000000000000000000000000 WORD_COUNT_5=32'b00000000000000000000000000000000 INIT_SAVE_5=32'b00000000000000000000000000000000 SPARE_PAGE_5=32'b00000000000000000000000000000000 WIDTH_5=32'b00000000000000000000000000000000 BASE_ADD_6=32'b00000000000000000000000000000000 WORD_COUNT_6=32'b00000000000000000000000000000000 INIT_SAVE_6=32'b00000000000000000000000000000000 SPARE_PAGE_6=32'b00000000000000000000000000000000 WIDTH_6=32'b00000000000000000000000000000000 BASE_ADD_7=32'b00000000000000000000000000000000 WORD_COUNT_7=32'b00000000000000000000000000000000 INIT_SAVE_7=32'b00000000000000000000000000000000 SPARE_PAGE_7=32'b00000000000000000000000000000000 WIDTH_7=32'b00000000000000000000000000000000 BASE_ADD_8=32'b00000000000000000000000000000000 WORD_COUNT_8=32'b00000000000000000000000000000000 INIT_SAVE_8=32'b00000000000000000000000000000000 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SPARE_PAGE_12=32'b00000000000000000000000000000000 WIDTH_12=32'b00000000000000000000000000000000 BASE_ADD_13=32'b00000000000000000000000000000000 WORD_COUNT_13=32'b00000000000000000000000000000000 INIT_SAVE_13=32'b00000000000000000000000000000000 SPARE_PAGE_13=32'b00000000000000000000000000000000 WIDTH_13=32'b00000000000000000000000000000000 BASE_ADD_14=32'b00000000000000000000000000000000 WORD_COUNT_14=32'b00000000000000000000000000000000 INIT_SAVE_14=32'b00000000000000000000000000000000 SPARE_PAGE_14=32'b00000000000000000000000000000000 WIDTH_14=32'b00000000000000000000000000000000 BASE_ADD_15=32'b00000000000000000000000000000000 WORD_COUNT_15=32'b00000000000000000000000000000000 INIT_SAVE_15=32'b00000000000000000000000000000000 SPARE_PAGE_15=32'b00000000000000000000000000000000 WIDTH_15=32'b00000000000000000000000000000000 BASE_ADD_16=32'b00000000000000000000000000000000 WORD_COUNT_16=32'b00000000000000000000000000000000 INIT_SAVE_16=32'b00000000000000000000000000000000 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SPARE_PAGE_28=32'b00000000000000000000000000000000 WIDTH_28=32'b00000000000000000000000000000000 BASE_ADD_29=32'b00000000000000000000000000000000 WORD_COUNT_29=32'b00000000000000000000000000000000 INIT_SAVE_29=32'b00000000000000000000000000000000 SPARE_PAGE_29=32'b00000000000000000000000000000000 WIDTH_29=32'b00000000000000000000000000000000 BASE_ADD_30=32'b00000000000000000000000000000000 WORD_COUNT_30=32'b00000000000000000000000000000000 INIT_SAVE_30=32'b00000000000000000000000000000000 SPARE_PAGE_30=32'b00000000000000000000000000000000 WIDTH_30=32'b00000000000000000000000000000000 BASE_ADD_31=32'b00000000000000000000000000000000 WORD_COUNT_31=32'b00000000000000000000000000000000 INIT_SAVE_31=32'b00000000000000000000000000000000 SPARE_PAGE_31=32'b00000000000000000000000000000000 WIDTH_31=32'b00000000000000000000000000000000 BASE_ADD_32=32'b00000000000000000000000000000000 WORD_COUNT_32=32'b00000000000000000000000000000000 INIT_SAVE_32=32'b00000000000000000000000000000000 SPARE_PAGE_32=32'b00000000000000000000000000000000 WIDTH_32=32'b00000000000000000000000000000000 BASE_ADD_33=32'b00000000000000000000000000000000 WORD_COUNT_33=32'b00000000000000000000000000000000 INIT_SAVE_33=32'b00000000000000000000000000000000 SPARE_PAGE_33=32'b00000000000000000000000000000000 WIDTH_33=32'b00000000000000000000000000000000 BASE_ADD_34=32'b00000000000000000000000000000000 WORD_COUNT_34=32'b00000000000000000000000000000000 INIT_SAVE_34=32'b00000000000000000000000000000000 SPARE_PAGE_34=32'b00000000000000000000000000000000 WIDTH_34=32'b00000000000000000000000000000000 BASE_ADD_35=32'b00000000000000000000000000000000 WORD_COUNT_35=32'b00000000000000000000000000000000 INIT_SAVE_35=32'b00000000000000000000000000000000 SPARE_PAGE_35=32'b00000000000000000000000000000000 WIDTH_35=32'b00000000000000000000000000000000 BASE_ADD_36=32'b00000000000000000000000000000000 WORD_COUNT_36=32'b00000000000000000000000000000000 INIT_SAVE_36=32'b00000000000000000000000000000000 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SPARE_PAGE_44=32'b00000000000000000000000000000000 WIDTH_44=32'b00000000000000000000000000000000 BASE_ADD_45=32'b00000000000000000000000000000000 WORD_COUNT_45=32'b00000000000000000000000000000000 INIT_SAVE_45=32'b00000000000000000000000000000000 SPARE_PAGE_45=32'b00000000000000000000000000000000 WIDTH_45=32'b00000000000000000000000000000000 BASE_ADD_46=32'b00000000000000000000000000000000 WORD_COUNT_46=32'b00000000000000000000000000000000 INIT_SAVE_46=32'b00000000000000000000000000000000 SPARE_PAGE_46=32'b00000000000000000000000000000000 WIDTH_46=32'b00000000000000000000000000000000 BASE_ADD_47=32'b00000000000000000000000000000000 WORD_COUNT_47=32'b00000000000000000000000000000000 INIT_SAVE_47=32'b00000000000000000000000000000000 SPARE_PAGE_47=32'b00000000000000000000000000000000 WIDTH_47=32'b00000000000000000000000000000000 BASE_ADD_48=32'b00000000000000000000000000000000 WORD_COUNT_48=32'b00000000000000000000000000000000 INIT_SAVE_48=32'b00000000000000000000000000000000 SPARE_PAGE_48=32'b00000000000000000000000000000000 WIDTH_48=32'b00000000000000000000000000000000 BASE_ADD_49=32'b00000000000000000000000000000000 WORD_COUNT_49=32'b00000000000000000000000000000000 INIT_SAVE_49=32'b00000000000000000000000000000000 SPARE_PAGE_49=32'b00000000000000000000000000000000 WIDTH_49=32'b00000000000000000000000000000000 BASE_ADD_50=32'b00000000000000000000000000000000 WORD_COUNT_50=32'b00000000000000000000000000000000 INIT_SAVE_50=32'b00000000000000000000000000000000 SPARE_PAGE_50=32'b00000000000000000000000000000000 WIDTH_50=32'b00000000000000000000000000000000 BASE_ADD_51=32'b00000000000000000000000000000000 WORD_COUNT_51=32'b00000000000000000000000000000000 INIT_SAVE_51=32'b00000000000000000000000000000000 SPARE_PAGE_51=32'b00000000000000000000000000000000 WIDTH_51=32'b00000000000000000000000000000000 BASE_ADD_52=32'b00000000000000000000000000000000 WORD_COUNT_52=32'b00000000000000000000000000000000 INIT_SAVE_52=32'b00000000000000000000000000000000 SPARE_PAGE_52=32'b00000000000000000000000000000000 WIDTH_52=32'b00000000000000000000000000000000 BASE_ADD_53=32'b00000000000000000000000000000000 WORD_COUNT_53=32'b00000000000000000000000000000000 INIT_SAVE_53=32'b00000000000000000000000000000000 SPARE_PAGE_53=32'b00000000000000000000000000000000 WIDTH_53=32'b00000000000000000000000000000000 BASE_ADD_54=32'b00000000000000000000000000000000 WORD_COUNT_54=32'b00000000000000000000000000000000 INIT_SAVE_54=32'b00000000000000000000000000000000 SPARE_PAGE_54=32'b00000000000000000000000000000000 WIDTH_54=32'b00000000000000000000000000000000 BASE_ADD_55=32'b00000000000000000000000000000000 WORD_COUNT_55=32'b00000000000000000000000000000000 INIT_SAVE_55=32'b00000000000000000000000000000000 SPARE_PAGE_55=32'b00000000000000000000000000000000 WIDTH_55=32'b00000000000000000000000000000000 BASE_ADD_56=32'b00000000000000000000000000000000 WORD_COUNT_56=32'b00000000000000000000000000000000 INIT_SAVE_56=32'b00000000000000000000000000000000 SPARE_PAGE_56=32'b00000000000000000000000000000000 WIDTH_56=32'b00000000000000000000000000000000 BASE_ADD_57=32'b00000000000000000000000000000000 WORD_COUNT_57=32'b00000000000000000000000000000000 INIT_SAVE_57=32'b00000000000000000000000000000000 SPARE_PAGE_57=32'b00000000000000000000000000000000 WIDTH_57=32'b00000000000000000000000000000000 BASE_ADD_58=32'b00000000000000000000000000000000 WORD_COUNT_58=32'b00000000000000000000000000000000 INIT_SAVE_58=32'b00000000000000000000000000000000 SPARE_PAGE_58=32'b00000000000000000000000000000000 WIDTH_58=32'b00000000000000000000000000000000 BASE_ADD_59=32'b00000000000000000000000000000000 WORD_COUNT_59=32'b00000000000000000000000000000000 INIT_SAVE_59=32'b00000000000000000000000000000000 SPARE_PAGE_59=32'b00000000000000000000000000000000 WIDTH_59=32'b00000000000000000000000000000000 BASE_ADD_60=32'b00000000000000000000000000000000 WORD_COUNT_60=32'b00000000000000000000000000000000 INIT_SAVE_60=32'b00000000000000000000000000000000 SPARE_PAGE_60=32'b00000000000000000000000000000000 WIDTH_60=32'b00000000000000000000000000000000 BASE_ADD_61=32'b00000000000000000000000000000000 WORD_COUNT_61=32'b00000000000000000000000000000000 INIT_SAVE_61=32'b00000000000000000000000000000000 SPARE_PAGE_61=32'b00000000000000000000000000000000 WIDTH_61=32'b00000000000000000000000000000000 BASE_ADD_62=32'b00000000000000000000000000000000 WORD_COUNT_62=32'b00000000000000000000000000000000 INIT_SAVE_62=32'b00000000000000000000000000000000 SPARE_PAGE_62=32'b00000000000000000000000000000000 WIDTH_62=32'b00000000000000000000000000000000 BASE_ADD_63=32'b00000000000000000000000000000000 WORD_COUNT_63=32'b00000000000000000000000000000000 INIT_SAVE_63=32'b00000000000000000000000000000000 SPARE_PAGE_63=32'b00000000000000000000000000000000 WIDTH_63=32'b00000000000000000000000000000000 BASE_ADD_64=32'b00000000000000000000000000000000 WORD_COUNT_64=32'b00000000000000000000000000000000 INIT_SAVE_64=32'b00000000000000000000000000000000 SPARE_PAGE_64=32'b00000000000000000000000000000000 WIDTH_64=32'b00000000000000000000000000000000 Generated name = INITCFG_Z17 @N:CG364 : FlashMemorySystem_init_wrapper.v(1) | Synthesizing module FlashMemorySystem_init_wrapper @N:CG364 : fusion.v(3147) | Synthesizing module NVM @N:CG364 : FlashMemorySystem.v(5) | Synthesizing module FlashMemorySystem @W:CL168 : FlashMemorySystem.v(227) | Pruning instance VCC_power_inst1 - not in use ... @N:CG364 : ClosedLoopTrimDemo.v(12) | Synthesizing module ClosedLoopTrimDemo @W:CS149 : ClosedLoopTrimDemo.v(243) | Port width mismatch for port INIT_ADDR. Formal has width 11, Actual 9 @W:CS149 : ClosedLoopTrimDemo.v(266) | Port width mismatch for port INIT_ADDR. Formal has width 11, Actual 9 @W:CG360 : ClosedLoopTrimDemo.v(54) | No assignment to wire mempsacki_pre @W:CG360 : ClosedLoopTrimDemo.v(55) | No assignment to wire int_mem_dout @W:CG360 : ClosedLoopTrimDemo.v(56) | No assignment to wire fm_progmem @N:CL201 : initcfg_xb.v(44) | Trying to extract state machine for register crpwsdfhcqq Extracted state machine for register crpwsdfhcqq State machine has 9 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 @N:CL201 : initcfg_xa.v(37) | Trying to extract state machine for register mwtvnzdkmwm Extracted state machine for register mwtvnzdkmwm State machine has 8 reachable states with original encodings of: 000 001 010 011 100 101 110 111 @N:CL201 : assc.v(243) | Trying to extract state machine for register jzzdfrmzwdj Extracted state machine for register jzzdfrmzwdj State machine has 16 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 @W:CL159 : assc.v(26) | Input vhqjcrxqhqk is unused @W:CL159 : assc.v(27) | Input vhsprbpmpnr is unused @N:CL201 : calibip_compute_block.v(349) | Trying to extract state machine for register genblk257.genblk258.CCALIBl011 Extracted state machine for register genblk257.genblk258.CCALIBl011 State machine has 3 reachable states with original encodings of: 00 01 10 @A:CL153 : calibip_CLRAM.v(145) | *Unassigned bits of CCALIBO0l1 have been referenced and are being tied to 0 - simulation mismatch possible @W:CL159 : calibip_CLRAM.v(46) | Input S_INIT_CLK_IN is unused @N:CL201 : Rx_async.v(584) | Trying to extract state machine for register CoreUARTapb_O01 Extracted state machine for register CoreUARTapb_O01 State machine has 3 reachable states with original encodings of: 00 01 10 @W:CL190 : Tx_async.v(524) | Optimizing register bit CoreUARTapb_lllI to a constant 1 @W:CL190 : Tx_async.v(524) | Optimizing register bit CoreUARTapb_O0II to a constant 1 @W:CL169 : Tx_async.v(524) | Pruning Register CoreUARTapb_O0II @W:CL169 : Tx_async.v(524) | Pruning Register CoreUARTapb_lllI @N:CL201 : Tx_async.v(251) | Trying to extract state machine for register CoreUARTapb_lOlI Extracted state machine for register CoreUARTapb_lOlI State machine has 6 reachable states with original encodings of: 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 00000000000000000000000000000100 00000000000000000000000000000101 @W:CL159 : Tx_async.v(65) | Input CoreUARTapb_OlII is unused @W:CL159 : Tx_async.v(68) | Input CoreUARTapb_IlII is unused @W:CL159 : Tx_async.v(71) | Input CoreUARTapb_llII is unused @W:CL156 : UART.v(930) | *Input CoreUARTapb_OlII[7:0] to this expression [instance] has undriven bits which are being tied to 0 - a simulation mismatch is possible @W:CL156 : UART.v(930) | *Input CoreUARTapb_l10I to this expression [instance] has undriven bits which are being tied to 0 - a simulation mismatch is possible @W:CL156 : UART.v(930) | *Input CoreUARTapb_OI1I to this expression [instance] has undriven bits which are being tied to 0 - a simulation mismatch is possible @W:CL159 : CoreGPIO.v(54) | Input PADDR is unused @W:CL159 : CoreAPB3.v(481) | Input PREADYS0 is unused @W:CL159 : CoreAPB3.v(484) | Input PREADYS1 is unused @W:CL159 : CoreAPB3.v(487) | Input PREADYS2 is unused @W:CL159 : CoreAPB3.v(490) | Input PREADYS3 is unused @W:CL159 : CoreAPB3.v(496) | Input PREADYS5 is unused @W:CL159 : CoreAPB3.v(502) | Input PREADYS7 is unused @W:CL159 : CoreAPB3.v(505) | Input PREADYS8 is unused @W:CL159 : CoreAPB3.v(508) | Input PREADYS9 is unused @W:CL159 : CoreAPB3.v(511) | Input PREADYS10 is unused @W:CL159 : CoreAPB3.v(514) | Input PREADYS11 is unused @W:CL159 : CoreAPB3.v(517) | Input PREADYS12 is unused @W:CL159 : CoreAPB3.v(520) | Input PREADYS13 is unused @W:CL159 : CoreAPB3.v(523) | Input PREADYS14 is unused @W:CL159 : CoreAPB3.v(526) | Input PREADYS15 is unused @W:CL159 : CoreAPB3.v(358) | Input PRDATAS0 is unused @W:CL159 : CoreAPB3.v(366) | Input PRDATAS1 is unused @W:CL159 : CoreAPB3.v(374) | Input PRDATAS2 is unused @W:CL159 : CoreAPB3.v(382) | Input PRDATAS3 is unused @W:CL159 : CoreAPB3.v(398) | Input PRDATAS5 is unused @W:CL159 : CoreAPB3.v(414) | Input PRDATAS7 is unused @W:CL159 : CoreAPB3.v(422) | Input PRDATAS8 is unused @W:CL159 : CoreAPB3.v(430) | Input PRDATAS9 is unused @W:CL159 : CoreAPB3.v(438) | Input PRDATAS10 is unused @W:CL159 : CoreAPB3.v(446) | Input PRDATAS11 is unused @W:CL159 : CoreAPB3.v(454) | Input PRDATAS12 is unused @W:CL159 : CoreAPB3.v(462) | Input PRDATAS13 is unused @W:CL159 : CoreAPB3.v(470) | Input PRDATAS14 is unused @W:CL159 : CoreAPB3.v(478) | Input PRDATAS15 is unused @W:CL159 : CoreAPB3.v(529) | Input PSLVERRS0 is unused @W:CL159 : CoreAPB3.v(532) | Input PSLVERRS1 is unused @W:CL159 : CoreAPB3.v(535) | Input PSLVERRS2 is unused @W:CL159 : CoreAPB3.v(538) | Input PSLVERRS3 is unused @W:CL159 : CoreAPB3.v(544) | Input PSLVERRS5 is unused @W:CL159 : CoreAPB3.v(550) | Input PSLVERRS7 is unused @W:CL159 : CoreAPB3.v(553) | Input PSLVERRS8 is unused @W:CL159 : CoreAPB3.v(556) | Input PSLVERRS9 is unused @W:CL159 : CoreAPB3.v(559) | Input PSLVERRS10 is unused @W:CL159 : CoreAPB3.v(562) | Input PSLVERRS11 is unused @W:CL159 : CoreAPB3.v(565) | Input PSLVERRS12 is unused @W:CL159 : CoreAPB3.v(568) | Input PSLVERRS13 is unused @W:CL159 : CoreAPB3.v(571) | Input PSLVERRS14 is unused @W:CL159 : CoreAPB3.v(574) | Input PSLVERRS15 is unused @W:CL157 : core8051s.v(269) | *Output TDO has undriven bits - a simulation mismatch is possible @W:CL159 : core8051s.v(263) | Input TMS is unused @W:CL159 : core8051s.v(266) | Input TDI is unused @W:CL159 : core8051s.v(272) | Input TRSTN is unused @W:CL159 : core8051s.v(286) | Input MEMBANK is unused @W:CL159 : core8051s.v(257) | Input PSLVERR is unused @W:CL157 : core8051s_globs_fusion.v(63) | *Output CORE8051S_IO0II has undriven bits - a simulation mismatch is possible @W:CL159 : core8051s_globs_fusion.v(54) | Input CORE8051S_l1lII is unused @W:CL159 : core8051s_globs_fusion.v(60) | Input TCK is unused @W:CL234 : ramsfrctrl.v(4397) | Input port bits <0 to 7> of CORE8051S_I0l[0:118] are unused @W:CL234 : ramsfrctrl.v(4397) | Input port bits <9 to 78> of CORE8051S_I0l[0:118] are unused @W:CL234 : ramsfrctrl.v(4397) | Input port bits <80 to 87> of CORE8051S_I0l[0:118] are unused @W:CL234 : ramsfrctrl.v(4397) | Input port bits <89 to 93> of CORE8051S_I0l[0:118] are unused @W:CL234 : pmu.v(4154) | Input port bits <7 to 2> of CORE8051S_Oll[7:0] are unused @N:CL201 : memctrl.v(5045) | Trying to extract state machine for register CORE8051S_lI1ll Extracted state machine for register CORE8051S_lI1ll State machine has 3 reachable states with original encodings of: 00 01 10 @W:CL234 : memctrl.v(4240) | Input port bits <4 to 0> of CORE8051S_IO1lI[7:0] are unused @W:CL234 : memctrl.v(4414) | Input port bits <0 to 64> of CORE8051S_I0l[0:118] are unused @W:CL234 : memctrl.v(4414) | Input port bits <94 to 118> of CORE8051S_I0l[0:118] are unused @W:CL234 : memctrl.v(4463) | Input port bits <7 to 0> of CORE8051S_OlllI[15:0] are unused @W:CL159 : memctrl.v(4296) | Input CORE8051S_lI1Il is unused @W:CL190 : isr.v(7533) | Optimizing register bit CORE8051S_OlI1I to a constant 0 @W:CL190 : isr.v(7422) | Optimizing register bit CORE8051S_IOl1I[2] to a constant 0 @W:CL190 : isr.v(7422) | Optimizing register bit CORE8051S_IOl1I[3] to a constant 0 @W:CL171 : isr.v(7422) | Pruning Register bit <3> of CORE8051S_IOl1I[3:0] @W:CL171 : isr.v(7422) | Pruning Register bit <2> of CORE8051S_IOl1I[3:0] @W:CL169 : isr.v(7533) | Pruning Register CORE8051S_OlI1I @W:CL171 : isr.v(6853) | Pruning Register bit <4> of CORE8051S_Il0Ol[4:0] @W:CL171 : isr.v(6853) | Pruning Register bit <3> of CORE8051S_Il0Ol[4:0] @W:CL171 : isr.v(6853) | Pruning Register bit <2> of CORE8051S_Il0Ol[4:0] @W:CL190 : isr.v(6853) | Optimizing register bit CORE8051S_Il0Ol[0] to a constant 0 @W:CL171 : isr.v(6853) | Pruning Register bit <0> of CORE8051S_Il0Ol[1:0] @W:CL234 : isr.v(4317) | Input port bits <6 to 3> of CORE8051S_Oll[7:0] are unused @W:CL209 : isr.v(4317) | Input port bit <1> of CORE8051S_Oll[7:0] is unused @W:CL234 : isr.v(4346) | Input port bits <0 to 61> of CORE8051S_I0l[0:118] are unused @W:CL234 : isr.v(4346) | Input port bits <64 to 118> of CORE8051S_I0l[0:118] are unused @W:CL159 : isr.v(4208) | Input CORE8051S_OIO1I is unused @W:CL159 : isr.v(4214) | Input CORE8051S_IIO1I is unused @W:CL159 : isr.v(4220) | Input CORE8051S_lIO1I is unused @W:CL159 : isr.v(4223) | Input CORE8051S_OlO1I is unused @W:CL159 : isr.v(4226) | Input CORE8051S_IlO1I is unused @W:CL159 : isr.v(4229) | Input CORE8051S_llO1I is unused @W:CL159 : isr.v(4232) | Input CORE8051S_O0O1I is unused @W:CL159 : isr.v(4235) | Input CORE8051S_I0O1I is unused @W:CL159 : isr.v(4238) | Input CORE8051S_l0O1I is unused @W:CL159 : isr.v(4241) | Input CORE8051S_O1O1I is unused @W:CL159 : isr.v(4244) | Input CORE8051S_I1O1I is unused @W:CL159 : isr.v(4247) | Input CORE8051S_l1O1I is unused @W:CL234 : cpu.v(4307) | Input port bits <0 to 61> of CORE8051S_I0l[0:118] are unused @W:CL209 : cpu.v(4307) | Input port bit <63> of CORE8051S_I0l[0:118] is unused @W:CL234 : cpu.v(4307) | Input port bits <65 to 118> of CORE8051S_I0l[0:118] are unused @W:CL190 : clkctrl.v(4410) | Optimizing register bit CORE8051S_lIlII[2] to a constant 0 @W:CL171 : clkctrl.v(4410) | Pruning Register bit <2> of CORE8051S_lIlII[2:0] @W:CL234 : clkctrl.v(4181) | Input port bits <6 to 0> of CORE8051S_Oll[7:0] are unused @W:CL234 : alu.v(4252) | Input port bits <10 to 11> of CORE8051S_I0l[0:118] are unused @W:CL209 : alu.v(4252) | Input port bit <15> of CORE8051S_I0l[0:118] is unused @W:CL234 : alu.v(4252) | Input port bits <62 to 118> of CORE8051S_I0l[0:118] are unused @W:CL159 : alu.v(4264) | Input CORE8051S_l1l is unused @END Process took 0h:00m:10s realtime, 0h:00m:09s cputime # Fri May 23 08:38:00 2008 ###########################################################] Synplicity Proasic Technology Mapper, Version 9.0.2, Build 065R, Built Mar 5 2008 17:44:07 Copyright (C) 1994-2008, Synplicity Inc. All Rights Reserved Product Version Version 9.0.2A2 @N:MF249 : | Running in 32-bit mode. @N:MF258 : | Gated clock conversion disabled @W:MO111 : core8051s_globs_fusion.v(63) | tristate driver CORE8051S_IO0II on net CORE8051S_IO0II has its enable tied to GND (module CORE8051S_lllII_0s) Automatic dissolve during optimization of view:work.CORE8051S_Z9(verilog) of CORE8051S_llllI(CORE8051S_lllII_0s) @W:MO111 : core8051s.v(269) | tristate driver TDO on net TDO has its enable tied to GND (module CORE8051S_Z9) @W:MO111 : | tristate driver CORE8051S_IO0II_t on net CORE8051S_IO0II has its enable tied to GND (module CORE8051S_Z9) @W:MO111 : | tristate driver un1_Core8051s_00_4_t on net un1_Core8051s_00_4 has its enable tied to GND (module ProcessorSystem) Automatic dissolve during optimization of view:work.AnalogSystem_assc_wrapper(verilog) of user_AnalogSystem_assc_wrapper(ASSC_Z13) Automatic dissolve during optimization of view:work.AnalogSystem(verilog) of AnalogSystem_assc_ram_inst(AnalogSystem_assc_ram) Automatic dissolve during optimization of view:work.AnalogSystem(verilog) of AnalogSystem_assc_wrapper_inst(AnalogSystem_assc_wrapper) Automatic dissolve during optimization of view:work.AnalogSystem(verilog) of AnalogSystem_calibip_wrapper_inst(AnalogSystem_calibip_wrapper) Automatic dissolve during optimization of view:work.grwzcnqmqzm_Z16(verilog) of user_clk_sel(INITCFG_XF) Automatic dissolve during optimization of view:work.grwzcnqmqzm_Z16(verilog) of valid_client(INITCFG_XE_4s_2s) Automatic dissolve during optimization of view:work.grwzcnqmqzm_Z16(verilog) of address_gen(INITCFG_XD_11s) Automatic dissolve during optimization of view:work.grwzcnqmqzm_Z16(verilog) of user_control(INITCFG_XC_4s_2s_11s) Automatic dissolve during optimization of view:work.grwzcnqmqzm_Z16(verilog) of save_fsm(INITCFG_XB_4s_2s) Automatic dissolve during optimization of view:work.grwzcnqmqzm_Z16(verilog) of init_fsm(INITCFG_XA_4s_2s) Automatic dissolve during optimization of view:work.FlashMemorySystem_init_wrapper(verilog) of user_FlashMemorySystem_init_wrapper(INITCFG_Z17) Automatic dissolve during optimization of view:work.FlashMemorySystem(verilog) of FlashMemorySystem_init_wrapper_inst(FlashMemorySystem_init_wrapper) Automatic dissolve during optimization of view:work.ClosedLoopTrimDemo(verilog) of u_pll_main(pll_main) Automatic dissolve during optimization of view:work.ClosedLoopTrimDemo(verilog) of u_RCOSC_100MHz(InternalOscillator) Automatic dissolve at startup in view:work.CORE8051S_OIIlI_Z8(verilog) of CORE8051S_ll1Il(CORE8051S_Il1Il) Automatic dissolve at startup in view:work.CORE8051S_OIIlI_Z8(verilog) of CORE8051S_lO1Il(CORE8051S_lOO1I_Z4) Automatic dissolve at startup in view:work.CORE8051S_OIIlI_Z8(verilog) of CORE8051S_OO1Il(CORE8051S_O1III_Z2) @W:BN116 : pmu.v(4296) | Removing sequential instance CORE8051S_ll1Il.CORE8051S_I0I0l of view:PrimLib.dffs(prim) because there are no references to its outputs @W:BN116 : pmu.v(4350) | Removing sequential instance CORE8051S_ll1Il.CORE8051S_llI0l of view:PrimLib.dffs(prim) because there are no references to its outputs @W:BN116 : isr.v(7596) | Removing sequential instance CORE8051S_lO1Il.CORE8051S_IlI1I of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(7659) | Removing sequential instance CORE8051S_lO1Il.CORE8051S_llI1I of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : clkctrl.v(4272) | Removing sequential instance CORE8051S_OO1Il.CORE8051S_OIlII[7] of view:PrimLib.dffre(prim) because there are no references to its outputs Automatic dissolve at startup in view:work.CORE8051S_Z9(verilog) of CORE8051S_O0llI(CORE8051S_lII) Automatic dissolve at startup in view:work.ProcessorSystem(verilog) of CoreGPIO_00(CoreGPIO_16_16) Automatic dissolve at startup in view:work.ProcessorSystem(verilog) of CoreAPB3_00(CoreAPB3_Z10) Automatic dissolve at startup in view:work.ProcessorSystem(verilog) of Core8051s_00(CORE8051S_Z9) Automatic dissolve at startup in view:work.calibip_CLRAM_0s_0s(verilog) of genblk252\.genblk253\.CCALIBIl01(CCALIBOl01) Automatic dissolve at startup in view:work.COMPUTE_BLOCK_Z11(verilog) of genblk257\.genblk258\.genblk262\.CCALIBO0OOI(CCALIBllOOI) Automatic dissolve at startup in view:work.grwzcnqmqzm_Z16(verilog) of user_clk_sel.u_jhmkpjjmdkx(jhmkpjjmdkx) Automatic dissolve at startup in view:work.ClosedLoopTrimDemo(verilog) of DAC_inst(LowRippleDAC) @W:MO129 : initcfg_xf.v(28) | Sequential instance user_clk_sel.u_jhmkpjjmdkx.bmnfdkrhvvn has been reduced to a combinational gate by constant propagation @W:MO129 : rstctrl.v(4731) | Sequential instance CORE8051S_IOI1l has been reduced to a combinational gate by constant propagation @W:BN132 : rstctrl.v(4814) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_I1O1l, because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_lOI1l @W:BN132 : rstctrl.v(4814) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_l1O1l, because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_OII1l RTL optimization done. Finished RTL optimizations (Time elapsed 0h:00m:02s; Memory used current: 46MB peak: 49MB) @N:MO106 : coreapb3.v(1393) | Found ROM, 'CoreAPB3_00.CoreAPB3_OI0_2[15:0]', 16 words by 16 bits @W:MO129 : coregpio.v(282) | Sequential instance ProcSys_inst.CoreGPIO_00.CoreGPIO_OI[14] has been reduced to a combinational gate by constant propagation @W:MO129 : coregpio.v(282) | Sequential instance ProcSys_inst.CoreGPIO_00.CoreGPIO_OI[15] has been reduced to a combinational gate by constant propagation @W:MO129 : clkctrl.v(4410) | Sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_lIlII[1] has been reduced to a combinational gate by constant propagation @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N: : cpu.v(5035) | Found counter in view:work.CORE8051S_I00lI_Z3(verilog) inst CORE8051S_OOO0I[3:0] @N:MO106 : cpu.v(5231) | Found ROM, 'CORE8051S_IOO0I[3:1]', 255 words by 3 bits @N:MO106 : cpu.v(5231) | Found ROM, 'CORE8051S_lOO0I[1:0]', 255 words by 2 bits @N:MF179 : cpu.v(4613) | Found 4 bit by 4 bit '<' comparator, 'CORE8051S_OOI0I' @N:MF179 : cpu.v(4877) | Found 4 bit by 4 bit '<' comparator, 'CORE8051S_lI1lI' Encoding state machine work.CORE8051S_OI1Il_Z5(verilog)-CORE8051S_lI1ll[2:0] original code -> new code 00 -> 00 01 -> 01 10 -> 10 @N:MF176 : | Default generator successful @N:MF176 : | Default generator successful @N:MF238 : memctrl.v(6478) | Found 16 bit incrementor, 'CORE8051S_O0Oll[15:0]' @N:MF238 : memctrl.v(6661) | Found 16 bit incrementor, 'CORE8051S_I1Oll[15:0]' @N:MF176 : | Default generator successful @N: : clock_gen.v(80) | Found counter in view:work.CoreUARTapb_II(verilog) inst CoreUARTapb_I0[7:0] @N: : clock_gen.v(155) | Found counter in view:work.CoreUARTapb_II(verilog) inst CoreUARTapb_I1[3:0] @N: : tx_async.v(595) | Found counter in view:work.CoreUARTapb_OIII_0s_0s_1s_2s_3s_4s_5s_6s(verilog) inst CoreUARTapb_lIlI[3:0] Encoding state machine work.CoreUARTapb_OIII_0s_0s_1s_2s_3s_4s_5s_6s(verilog)-CoreUARTapb_lOlI[5:0] original code -> new code 00000000000000000000000000000000 -> 000001 00000000000000000000000000000001 -> 000010 00000000000000000000000000000010 -> 000100 00000000000000000000000000000011 -> 001000 00000000000000000000000000000100 -> 010000 00000000000000000000000000000101 -> 100000 @N: : rx_async.v(771) | Found counter in view:work.CoreUARTapb_OI1_0s_0s_1s_2s(verilog) inst CoreUARTapb_l11[3:0] @N: : rx_async.v(374) | Found counter in view:work.CoreUARTapb_OI1_0s_0s_1s_2s(verilog) inst CoreUARTapb_I01[3:0] Encoding state machine work.CoreUARTapb_OI1_0s_0s_1s_2s(verilog)-CoreUARTapb_O01[2:0] original code -> new code 00 -> 00 01 -> 01 10 -> 10 @N: : calibip_clram.v(511) | Found counter in view:work.calibip_CLRAM_0s_0s(verilog) inst CCALIBlIl1[4:0] @N: : calibip_compute_block.v(349) | Found counter in view:work.COMPUTE_BLOCK_Z11(verilog) inst genblk257\.genblk258\.CCALIBIl11[3:0] Encoding state machine work.COMPUTE_BLOCK_Z11(verilog)-genblk257\.genblk258\.CCALIBl011[2:0] original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine work.fmvgpwbdcxs_Z12(verilog)-jzzdfrmzwdj[15:0] original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 Encoding state machine work.stnpfdkggvx_4s_2s_0s_1s_2s_3s_4294967292s_4294967293s_4294967294s_4294967295s_14(verilog)-mwtvnzdkmwm[7:0] original code -> new code 000 -> 00000001 001 -> 00000010 010 -> 00000100 011 -> 00001000 100 -> 00010000 101 -> 00100000 110 -> 01000000 111 -> 10000000 Encoding state machine work.wbsfnwwctpn_Z15(verilog)-crpwsdfhcqq[8:0] original code -> new code 0000 -> 000000001 0001 -> 000000010 0010 -> 000000100 0011 -> 000001000 0100 -> 000010000 0101 -> 000100000 0110 -> 001000000 0111 -> 010000000 1000 -> 100000000 @W:MO129 : initcfg_xb.v(56) | Sequential instance FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.save_fsm.u_wbsfnwwctpn.crpwsdfhcqq[2] has been reduced to a combinational gate by constant propagation @N: : initcfg_xd.v(43) | Found counter in view:work.dxwqxgdccxc_11s(verilog) inst gnmdxrqrdgs[10:0] @N:MF176 : | Default generator successful @W:MO129 : initcfg_xf.v(31) | Sequential instance user_clk_sel.u_jhmkpjjmdkx.zmbsbbtjszd has been reduced to a combinational gate by constant propagation @W:BN132 : memctrl.v(5070) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIllI, because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_lI1ll[1] Automatic dissolve during optimization of view:work.CoreUARTapb_0s_0s_1s(verilog) of CoreUARTapb_l0l(CoreUARTapb_I0l_0s_0s_1s) Auto Dissolve of CoreAPB3_00.CoreAPB3_O00 (inst of view:work.CoreAPB3_ll0(verilog)) Automatic dissolve during optimization of view:work.FlashMemorySystem(verilog) of FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm(grwzcnqmqzm_Z16) Automatic dissolve during optimization of view:work.ClosedLoopTrimDemo(verilog) of FlashSys_inst(FlashMemorySystem) Auto Dissolve of FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt (inst of view:work.ffppvfwnggt_4s_2s_11s(verilog)) Finished factoring (Time elapsed 0h:00m:12s; Memory used current: 62MB peak: 63MB) @W:BN132 : pmu.v(4394) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_ll1Il.CORE8051S_llIlI, because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.WDOGRESN @W:BN116 : assc.v(169) | Removing sequential instance backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.bcmkdjqtngz of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : assc.v(187) | Removing sequential instance backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.ssssgmdwsms of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : coregpio.v(208) | Removing sequential instance ProcSys_inst.CoreGPIO_00.dataOut[14] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : coregpio.v(208) | Removing sequential instance ProcSys_inst.CoreGPIO_00.dataOut[12] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : rx_async.v(1218) | Removing sequential instance ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk228\.genblk229\.CoreUARTapb_lOOl.CoreUARTapb_ll1 of view:PrimLib.dffs(prim) because there are no references to its outputs @W:BN116 : rx_async.v(1218) | Removing sequential instance ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk228\.genblk229\.CoreUARTapb_lOOl.CoreUARTapb_Ol1 of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(7422) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.CORE8051S_IOl1I[1] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(7422) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.CORE8051S_IOl1I[0] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(4941) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk28\.genblk29\.CORE8051S_O1I1I[0] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(4941) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk28\.genblk29\.CORE8051S_O1I1I[2] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(4941) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk28\.genblk29\.CORE8051S_O1I1I[7] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(5255) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk36\.genblk37\.CORE8051S_l1I1I[0] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(5255) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk36\.genblk37\.CORE8051S_l1I1I[2] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(5412) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk40\.genblk41\.CORE8051S_OOl1I[0] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : isr.v(5412) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.genblk40\.genblk41\.CORE8051S_OOl1I[2] of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : oci.v(4277) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.CORE8051S_I00Il of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : ramsfrctrl.v(6273) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_l0l0l of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : memctrl.v(5502) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_l1lll of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : memctrl.v(8372) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_l1IlI of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : memctrl.v(8551) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OOllI of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : cpu.v(5171) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_Ol1lI of view:PrimLib.dffr(prim) because there are no references to its outputs @W:BN116 : cpu.v(4661) | Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_ll1lI of view:PrimLib.dffr(prim) because there are no references to its outputs Finished gated-clock and generated-clock conversion (Time elapsed 0h:00m:12s; Memory used current: 62MB peak: 64MB) @W:MO129 : clkctrl.v(4410) | Sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_lIlII[0] has been reduced to a combinational gate by constant propagation Finished generic timing optimizations - Pass 1 (Time elapsed 0h:00m:15s; Memory used current: 64MB peak: 66MB) Starting Early Timing Optimization (Time elapsed 0h:00m:15s; Memory used current: 65MB peak: 67MB) Finished Early Timing Optimization (Time elapsed 0h:00m:20s; Memory used current: 66MB peak: 67MB) Finished generic timing optimizations - Pass 2 (Time elapsed 0h:00m:20s; Memory used current: 65MB peak: 67MB) Finished preparing to map (Time elapsed 0h:00m:24s; Memory used current: 73MB peak: 73MB) High Fanout Net Report ********************** Driver Instance / Pin Name Fanout, notes ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- DAC_rstn_gl / Y 29 : 16 asynchronous set/reset backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.jzzdfrmzwdj[3] / Q 14 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr / Q 46 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt.jsnhqgkgbcr.un1_sdcfzkxtrzd_1 / Y 24 backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.jzzdfrmzwdj[1] / Q 18 backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.vjxvhntknbb / Q 33 backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.jzzdfrmzwdj[11] / Q 13 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.CCALIBO011[23] / Q 14 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.CCALIBIl11[1] / Q 13 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.CCALIBl011_0[0] / Q 29 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.CCALIBl011[1] / Q 30 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.WDOGRESN / Q 636 : 633 asynchronous set/reset ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol1Il / Q 14 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[0] / Q 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[1] / Q 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[2] / Q 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_lOl0l[0] / Q 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_lOl0l[4] / Q 20 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_lOl0l[5] / Q 18 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_O0l0l / Q 20 ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk223.genblk224.CoreUARTapb_OOOl.CoreUARTapb_l0 / Q 22 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OOIOI[7] / Q 21 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[1] / Q 15 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[3] / Q 26 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[4] / Q 24 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[5] / Q 21 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[6] / Q 19 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[7] / Q 20 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[4] / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[5] / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[6] / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[7] / Y 15 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.un1_CORE8051S_I0l_1 / Y 23 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[7] / Y 20 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_0_m2[4] / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[5] / Y 18 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_m2[6] / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[1] / Y 26 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_O1l_0_a2_1_a6 / Y 30 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[4] / Y 35 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[5] / Y 37 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[6] / Y 29 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[7] / Y 30 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l0l_0_a2_0_a6 / Y 46 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[2] / Y 25 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[0] / Y 28 ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[3] / Y 25 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_II1lI_0_a6 / Y 27 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_l0I_1 / Y 13 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.un1_genblk257.genblk258.CCALIBl011_3_0_o2 / Y 50 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.CCALIBl011_s0_0_a3_0_a2 / Y 52 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt.cpqqthwwhvc[8] / Y 15 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt.ttkcwbrgmjd / Y 14 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_I1l_0_a2_0_a2 / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i / Y 32 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_IlIll / Y 21 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un2020_CORE8051S_IOO1I_i_o2_1 / Y 19 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1 / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un576_CORE8051S_IOO1I_i / Y 20 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.genblk77.genblk78.un179_CORE8051S_IOO1I_i_o2 / Y 14 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2 / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_Ollll_1 / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un908_CORE8051S_IOO1I_i / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un7[8] / Y 22 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.G_2 / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OlIll8 / Y 14 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_m2[3] / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[2] / Y 14 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_0_m2[0] / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[1] / Y 13 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un75_CORE8051S_IOO1I_i_o2 / Y 15 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_OlIll8 / Y 16 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_OIlll_1 / Y 24 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 / Y 16 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_O1I0l9 / Y 19 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.genblk77.genblk78.un176_CORE8051S_IOO1I_i_o2 / Y 14 ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk228.genblk229.CoreUARTapb_lOOl.CoreUARTapb_l11e_0_a2_0 / Y 13 ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk228.genblk229.CoreUARTapb_lOOl.CoreUARTapb_O01_s0_0_a2_0_a2 / Y 17 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_Ollll_5 / Y 16 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un905_CORE8051S_IOO1I_i / Y 24 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_llIll / Y 17 ProcSys_inst.CoreAPB3_00.CoreAPB3_O00.PRDATA_0_a2_0_a3_0[13] / Y 16 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.un1_CORE8051S_I10lI_2_0 / Y 14 ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk223.genblk224.CoreUARTapb_OOOl.CoreUARTapb_O0 / Y 14 ProcSys_inst.CoreGPIO_00.CoreGPIO_I_0_a3 / Y 14 backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.SV_GAIN_IN_pmux_iv / Y 24 ProcSys_inst.CoreGPIO_00.CoreGPIO_l_3_i_a3[13] / Y 14 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_OlIll8_2 / Y 16 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_14_sn_m2 / Y 16 ===================================================================================================================================================================================================== Promoting Net proc_rstn on CLKINT I_261 Promoting Net backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257\.genblk258\.CCALIBl011_260_d on CLKINT I_262 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_14_sn_m2, fanout 16 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_OlIll8_2, fanout 16 segments 2 Replicating Combinational Instance ProcSys_inst.CoreGPIO_00.CoreGPIO_l_3_i_a3[13], fanout 14 segments 2 Replicating Combinational Instance backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.SV_GAIN_IN_pmux_iv, fanout 24 segments 2 Replicating Combinational Instance ProcSys_inst.CoreGPIO_00.CoreGPIO_I_0_a3, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk223.genblk224.CoreUARTapb_OOOl.CoreUARTapb_O0, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.un1_CORE8051S_I10lI_2_0, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.CoreAPB3_00.CoreAPB3_O00.PRDATA_0_a2_0_a3_0[13], fanout 18 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_llIll, fanout 18 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un905_CORE8051S_IOO1I_i, fanout 24 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_Ollll_5, fanout 16 segments 2 Replicating Combinational Instance ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk228.genblk229.CoreUARTapb_lOOl.CoreUARTapb_O01_s0_0_a2_0_a2, fanout 17 segments 2 Replicating Combinational Instance ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk228.genblk229.CoreUARTapb_lOOl.CoreUARTapb_l11e_0_a2_0, fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.genblk77.genblk78.un176_CORE8051S_IOO1I_i_o2, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_O1I0l9, fanout 19 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1, fanout 16 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_OIlll_1, fanout 24 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_OlIll8, fanout 16 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un75_CORE8051S_IOO1I_i_o2, fanout 15 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[1], fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_0_m2[0], fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[2], fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_m2[3], fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OlIll8, fanout 16 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.G_2, fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un7[8], fanout 22 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un908_CORE8051S_IOO1I_i, fanout 17 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_Ollll_1, fanout 18 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2, fanout 19 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.genblk77.genblk78.un179_CORE8051S_IOO1I_i_o2, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un576_CORE8051S_IOO1I_i, fanout 20 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un2020_CORE8051S_IOO1I_i_o2_1, fanout 19 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_IlIll, fanout 23 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i, fanout 34 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_I1l_0_a2_0_a2, fanout 17 segments 2 Replicating Combinational Instance FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt.ttkcwbrgmjd, fanout 14 segments 2 Replicating Combinational Instance FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt.cpqqthwwhvc[8], fanout 15 segments 2 Replicating Combinational Instance backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.un1_genblk257.genblk258.CCALIBl011_3_0_o2, fanout 50 segments 5 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_l0I_1, fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_II1lI_0_a6, fanout 28 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[3], fanout 25 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[0], fanout 28 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[2], fanout 25 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l0l_0_a2_0_a6, fanout 46 segments 4 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[7], fanout 30 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[6], fanout 29 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[5], fanout 37 segments 4 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[4], fanout 35 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_O1l_0_a2_1_a6, fanout 30 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_l0OlI_0[1], fanout 26 segments 3 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_m2[6], fanout 17 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[5], fanout 18 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_i_0_m2[4], fanout 17 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OIIOI_1_m_i_m3[7], fanout 20 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.un1_CORE8051S_I0l_1, fanout 23 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[7], fanout 15 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[6], fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[5], fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_IIIOI[4], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[7], fanout 20 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[6], fanout 19 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[5], fanout 21 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[4], fanout 24 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[3], fanout 27 segments 3 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[1], fanout 15 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_OOIOI[7], fanout 21 segments 2 Replicating Sequential Instance ProcSys_inst.CoreUARTapb_00.CoreUARTapb_l0l.genblk223.genblk224.CoreUARTapb_OOOl.CoreUARTapb_l0, fanout 23 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_O0l0l, fanout 20 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_lOl0l[5], fanout 18 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_lOl0l[4], fanout 20 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.CORE8051S_lOl0l[0], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[2], fanout 14 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[1], fanout 14 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[0], fanout 14 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol1Il, fanout 14 segments 2 Replicating Sequential Instance backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.genblk257.genblk258.CCALIBIl11[1], fanout 13 segments 2 Replicating Sequential Instance backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.jzzdfrmzwdj[11], fanout 13 segments 2 Replicating Sequential Instance backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.vjxvhntknbb, fanout 33 segments 3 Replicating Sequential Instance backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.jzzdfrmzwdj[1], fanout 18 segments 2 Replicating Combinational Instance FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_control.u_ffppvfwnggt.jsnhqgkgbcr.un1_sdcfzkxtrzd_1, fanout 25 segments 3 Replicating Sequential Instance FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr, fanout 46 segments 4 Replicating Sequential Instance backbone_inst.AnalogSystem_assc_wrapper_inst.user_AnalogSystem_assc_wrapper.u_fmvgpwbdcxs.jzzdfrmzwdj[3], fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.un1_CORE8051S_I10lI_2_0, fanout 14 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un2302_CORE8051S_IOO1I_i_o2, fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1037_CORE8051S_IOO1I_0, fanout 16 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[2], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[7], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[6], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[5], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[4], fanout 13 segments 2 Replicating Sequential Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.CORE8051S_I1OOI[3], fanout 13 segments 2 Replicating Sequential Instance FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.qqqjcnjzntg, fanout 13 segments 2 Replicating Combinational Instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l10Il.un1_CORE8051S_ll1OI_1_sqmuxa, fanout 16 segments 2 Finished technology mapping (Time elapsed 0h:00m:27s; Memory used current: 93MB peak: 97MB) Finished technology timing optimizations and critical path resynthesis (Time elapsed 0h:00m:27s; Memory used current: 93MB peak: 97MB) Added 0 Buffers Added 116 Cells via replication Added 33 Sequential Cells via replication Added 83 Combinational Cells via replication Finished restoring hierarchy (Time elapsed 0h:00m:27s; Memory used current: 94MB peak: 97MB) Writing Analyst data base C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo.srm @N:BN225 : | Writing default property annotation file C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo.map. Writing EDIF Netlist and constraint files Version 9.0.2A2 Found clock ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock with period 25.00ns Found clock ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock with period 25.00ns Found clock ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock with period 25.00ns Found clock grwzcnqmqzm_Z16|user_clk_sel.u_jhmkpjjmdkx.qpkbfhrprrz_inferred_clock with period 25.00ns ##### START OF TIMING REPORT #####[ # Timing Report written on Fri May 23 08:38:39 2008 # Top view: ClosedLoopTrimDemo Library name: fusion Operating conditions: COMWC-1 ( T = 70.0, V = 1.42, P = 1.48, tree_type = balanced_tree ) Requested Frequency: 40.0 MHz Wire load mode: top Wire load model: fusion Paths requested: 5 Constraint File(s): @N:MT320 : | This timing report estimates place and route data. Please look at the place and route timing report for final timing.. @N:MT322 : | Clock constraints cover only FF-to-FF paths associated with the clock.. Performance Summary ******************* Worst slack in design: -11.422 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group -------------------------------------------------------------------------------------------------------------------------------------------------------------- ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock 40.0 MHz 101.3 MHz 25.000 9.875 15.125 inferred Inferred_clkgroup_0 ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock 40.0 MHz 471.2 MHz 25.000 2.122 22.878 inferred Inferred_clkgroup_2 ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock 40.0 MHz 27.5 MHz 25.000 36.422 -11.422 inferred Inferred_clkgroup_1 ============================================================================================================================================================== Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock | 25.000 15.125 | No paths - | No paths - | No paths - ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock | Diff grp - | No paths - | No paths - | No paths - ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock | 25.000 -11.422 | No paths - | 12.500 -3.637 | 12.500 11.182 ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock | Diff grp - | No paths - | No paths - | No paths - ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock grwzcnqmqzm_Z16|user_clk_sel.u_jhmkpjjmdkx.qpkbfhrprrz_inferred_clock | Diff grp - | No paths - | No paths - | No paths - ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock | Diff grp - | No paths - | No paths - | No paths - ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock | 25.000 22.878 | No paths - | No paths - | No paths - grwzcnqmqzm_Z16|user_clk_sel.u_jhmkpjjmdkx.qpkbfhrprrz_inferred_clock ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock | Diff grp - | No paths - | No paths - | No paths - ======================================================================================================================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------- DAC_reg[2] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1E1C0 Q DAC_reg[2] 0.627 15.125 DAC_inst.acc_Z[2] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 Q acc[2] 0.627 15.222 DAC_reg[4] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1E1C0 Q DAC_reg[4] 0.627 15.457 DAC_reg[0] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1E1C0 Q DAC_reg[0] 0.627 15.522 DAC_inst.acc_Z[0] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 Q acc[0] 0.627 15.618 DAC_inst.acc_Z[4] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1P0 Q acc_i_0[4] 0.494 15.796 DAC_reg[3] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1E1C0 Q DAC_reg[3] 0.627 15.849 DAC_reg[6] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1E1C0 Q DAC_reg[6] 0.627 15.948 DAC_inst.acc_Z[3] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 Q acc[3] 0.627 16.035 DAC_reg[7] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1E1C0 Q DAC_reg[7] 0.627 16.110 ===================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------ DAC_inst.acc_Z[11] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 D ADD_12x12_medium_area_I65_Y 24.512 15.125 DAC_inst.acc_Z[9] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 D ADD_12x12_medium_area_I63_Y 24.512 15.962 DAC_inst.acc_Z[10] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1P0 D ADD_12x12_medium_area_I64_Y 24.542 16.646 DAC_inst.acc_Z[7] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 D ADD_12x12_medium_area_I61_Y 24.512 16.735 DAC_inst.acc_Z[12] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 D ADD_12x12_medium_area_I35_Y 24.512 17.441 DAC_inst.acc_Z[8] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1P0 D ADD_12x12_medium_area_I62_Y 24.542 17.483 DAC_inst.acc_Z[5] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 D ADD_12x12_medium_area_I59_Y 24.512 17.572 DAC_inst.acc_Z[6] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1P0 D ADD_12x12_medium_area_I60_Y 24.512 17.628 DAC_inst.acc_Z[4] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1P0 D ADD_12x12_medium_area_I58_Y 24.512 18.465 DAC_inst.acc_Z[3] ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock DFN1C0 D ADD_12x12_medium_area_I57_Y 24.512 19.402 ====================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 25.000 - Setup time: 0.488 = Required time: 24.512 - Propagation time: 9.387 = Slack (non-critical) : 15.125 Number of logic level(s): 7 Starting point: DAC_reg[2] / Q Ending point: DAC_inst.acc_Z[11] / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.DAC_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------------------------------------------- DAC_reg[2] DFN1E1C0 Q Out 0.627 0.627 - DAC_reg[2] Net - - 1.007 - 4 DAC_inst.un5_acc.ADD_12x12_medium_area_I2_CO1 NOR2B B In - 1.634 - DAC_inst.un5_acc.ADD_12x12_medium_area_I2_CO1 NOR2B Y Out 0.534 2.168 - un5_acc\.ADD_12x12_medium_area_I2_CO1 Net - - 0.328 - 2 DAC_inst.un5_acc.ADD_12x12_medium_area_I27_Y_0_cZ MIN3 C In - 2.496 - DAC_inst.un5_acc.ADD_12x12_medium_area_I27_Y_0_cZ MIN3 Y Out 0.600 3.097 - un5_acc\.ADD_12x12_medium_area_I27_Y_0_cZ Net - - 0.274 - 1 DAC_inst.un5_acc.ADD_12x12_medium_area_I27_Y AO1B C In - 3.370 - DAC_inst.un5_acc.ADD_12x12_medium_area_I27_Y AO1B Y Out 0.558 3.928 - un5_acc\.ADD_12x12_medium_area_I27_Y Net - - 1.007 - 4 DAC_inst.un5_acc.ADD_12x12_medium_area_I28_Y AO1B A In - 4.935 - DAC_inst.un5_acc.ADD_12x12_medium_area_I28_Y AO1B Y Out 0.427 5.362 - un5_acc\.ADD_12x12_medium_area_I28_Y Net - - 1.007 - 4 DAC_inst.un5_acc.ADD_12x12_medium_area_I42_Y AO1 B In - 6.370 - DAC_inst.un5_acc.ADD_12x12_medium_area_I42_Y AO1 Y Out 0.509 6.878 - un5_acc\.ADD_12x12_medium_area_I42_Y Net - - 0.328 - 2 DAC_inst.un5_acc.ADD_12x12_medium_area_I50_Y AO13 B In - 7.207 - DAC_inst.un5_acc.ADD_12x12_medium_area_I50_Y AO13 Y Out 0.794 8.001 - un5_acc\.ADD_12x12_medium_area_I50_Y Net - - 0.274 - 1 DAC_inst.un5_acc.ADD_12x12_medium_area_I65_Y XOR3 C In - 8.274 - DAC_inst.un5_acc.ADD_12x12_medium_area_I65_Y XOR3 Y Out 0.839 9.113 - ADD_12x12_medium_area_I65_Y Net - - 0.274 - 1 DAC_inst.acc_Z[11] DFN1C0 D In - 9.387 - ==================================================================================================================== Total path delay (propagation time + setup) of 9.875 is 5.376(54.4%) logic and 4.499(45.6%) route. ==================================== Detailed Report for Clock: ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.crmctgwbctb ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock DFN1C0 Q crmctgwbctb 0.627 22.878 ============================================================================================================================================================================================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock DFN1C0 D crmctgwbctb 24.512 22.878 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr_0 ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock DFN1C0 D crmctgwbctb 24.512 22.878 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr_1 ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock DFN1C0 D crmctgwbctb 24.512 22.878 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr_2 ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock DFN1C0 D crmctgwbctb 24.512 22.878 ================================================================================================================================================================================================================================================================ Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 25.000 - Setup time: 0.488 = Required time: 24.512 - Propagation time: 1.634 = Slack (non-critical) : 22.878 Number of logic level(s): 0 Starting point: FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.crmctgwbctb / Q Ending point: FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.NVM_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.crmctgwbctb DFN1C0 Q Out 0.627 0.627 - crmctgwbctb Net - - 1.007 - 4 FlashSys_inst.FlashMemorySystem_init_wrapper_inst.user_FlashMemorySystem_init_wrapper.u_grwzcnqmqzm.user_clk_sel.u_jhmkpjjmdkx.hrgmtcpsdzr DFN1C0 D In - 1.634 - =========================================================================================================================================================================================================== Total path delay (propagation time + setup) of 2.122 is 1.115(52.5%) logic and 1.007(47.5%) route. ==================================== Detailed Report for Clock: ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI_0[3] 0.627 -11.422 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[2] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI_0[2] 0.627 -11.419 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[0] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[0] 0.627 -10.938 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[4] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[4] 0.627 -10.913 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[7] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[7] 0.627 -10.596 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[5] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[5] 0.627 -10.574 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[3] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[3] 0.627 -10.521 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[2] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[2] 0.627 -10.431 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[1] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[1] 0.627 -10.422 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI[6] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 Q CORE8051S_IO1lI[6] 0.494 -10.336 ============================================================================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1C0 D CORE8051S_O0lll_13[1] 24.512 -11.422 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[0] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1C0 D CORE8051S_O0lll_13_0_iv_i_0[0] 24.512 -11.411 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I1lll ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 E un1_CORE8051S_I1lll10 24.482 -10.793 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_lOllI ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E0C0 D CORE8051S_ll0ll 24.542 -10.719 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_l1lIl ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1P0 D CORE8051S_l1lIl_2 24.542 -10.657 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol1Il ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1C0 D CORE8051S_Il0ll_i 24.542 -10.183 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol1Il_0 ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1C0 D CORE8051S_Il0ll_i 24.542 -10.183 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_lI1ll[0] ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1C0 D CORE8051S_lI1ll_ns[0] 24.542 -10.030 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I1I ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1C0 D CORE8051S_I1I21 24.512 -9.885 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I1lll ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock DFN1E1C0 D CORE8051S_I1lll10 24.571 -9.880 ======================================================================================================================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 25.000 - Setup time: 0.488 = Required time: 24.512 - Propagation time: 35.934 = Slack (critical) : -11.422 Number of logic level(s): 27 Starting point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] / Q Ending point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] DFN1E1C0 Q Out 0.627 0.627 - CORE8051S_IO1lI_0[3] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 A In - 2.047 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 Y Out 0.432 2.479 - un42_CORE8051S_IOl0l_1_0 Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A B In - 3.777 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A Y Out 0.550 4.327 - N_206_0 Net - - 1.454 - 10 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A C In - 5.781 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A Y Out 0.639 6.420 - CORE8051S_I0l_i[55] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E A In - 7.840 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E Y Out 0.825 8.665 - CORE8051S_IOl_sn_N_2 Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A C In - 10.085 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A Y Out 0.546 10.631 - CORE8051S_l0I_0_N_18 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A S In - 11.317 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A Y Out 0.337 11.654 - CORE8051S_l0I_0_N_19 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B A In - 12.340 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B Y Out 0.427 12.768 - un1_CORE8051S_IIIlI Net - - 1.696 - 12 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 A In - 14.464 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 Y Out 0.432 14.896 - un4_CORE8051S_Ol0ll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A B In - 15.170 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A Y Out 0.438 15.607 - CORE8051S_Ol0ll Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A A In - 16.294 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A Y Out 0.447 16.740 - un4_CORE8051S_OIlll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B A In - 17.014 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B Y Out 0.438 17.451 - CORE8051S_OIlll Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A B In - 18.459 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A Y Out 0.438 18.896 - un1_CORE8051S_IlIll_inv_0_i Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 A In - 20.195 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 Y Out 0.309 20.504 - un2_CORE8051S_IIlll_1 Net - - 1.395 - 8 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B A In - 21.899 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B Y Out 0.438 22.337 - genblk48\.genblk49\.CORE8051S_O1Oll_m_0[3] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 C In - 22.610 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 Y Out 0.639 23.249 - un1_CORE8051S_llOll_3_iv_3[3] Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 B In - 23.935 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 Y Out 0.550 24.485 - N214 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B B In - 25.172 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B Y Out 0.534 25.706 - N272 Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B B In - 26.713 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B Y Out 0.534 27.247 - I64_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 B In - 27.520 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 Y Out 0.550 28.070 - N302_0 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A B In - 28.399 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A Y Out 0.550 28.949 - N371 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C C In - 29.277 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C Y Out 0.546 29.823 - I94_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D A In - 30.096 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D Y Out 0.852 30.948 - ADD_16x16_fast_I119_Y Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C A In - 31.277 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C Y Out 0.395 31.671 - CORE8051S_Il0ll8_2 Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B A In - 31.945 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B Y Out 0.438 32.383 - CORE8051S_Il0ll8 Net - - 1.211 - 6 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A A In - 33.594 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A Y Out 0.457 34.051 - CORE8051S_I0lll Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A A In - 34.379 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A Y Out 0.395 34.774 - un25_CORE8051S_O0lll_m[1] Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_0_iv[1] AO1B C In - 35.102 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_0_iv[1] AO1B Y Out 0.558 35.660 - CORE8051S_O0lll_13[1] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] DFN1C0 D In - 35.934 - =========================================================================================================================================================================== Total path delay (propagation time + setup) of 36.422 is 14.806(40.7%) logic and 21.615(59.3%) route. Path information for path number 2: Requested Period: 25.000 - Setup time: 0.488 = Required time: 24.512 - Propagation time: 35.931 = Slack (non-critical) : -11.419 Number of logic level(s): 27 Starting point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[2] / Q Ending point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[2] DFN1E1C0 Q Out 0.627 0.627 - CORE8051S_IO1lI_0[2] Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 B In - 1.926 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 Y Out 0.550 2.476 - un42_CORE8051S_IOl0l_1_0 Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A B In - 3.774 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A Y Out 0.550 4.324 - N_206_0 Net - - 1.454 - 10 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A C In - 5.778 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A Y Out 0.639 6.417 - CORE8051S_I0l_i[55] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E A In - 7.837 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E Y Out 0.825 8.662 - CORE8051S_IOl_sn_N_2 Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A C In - 10.082 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A Y Out 0.546 10.628 - CORE8051S_l0I_0_N_18 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A S In - 11.314 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A Y Out 0.337 11.651 - CORE8051S_l0I_0_N_19 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B A In - 12.338 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B Y Out 0.427 12.765 - un1_CORE8051S_IIIlI Net - - 1.696 - 12 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 A In - 14.461 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 Y Out 0.432 14.893 - un4_CORE8051S_Ol0ll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A B In - 15.167 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A Y Out 0.438 15.604 - CORE8051S_Ol0ll Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A A In - 16.291 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A Y Out 0.447 16.737 - un4_CORE8051S_OIlll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B A In - 17.011 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B Y Out 0.438 17.449 - CORE8051S_OIlll Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A B In - 18.456 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A Y Out 0.438 18.894 - un1_CORE8051S_IlIll_inv_0_i Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 A In - 20.192 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 Y Out 0.309 20.501 - un2_CORE8051S_IIlll_1 Net - - 1.395 - 8 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B A In - 21.896 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B Y Out 0.438 22.334 - genblk48\.genblk49\.CORE8051S_O1Oll_m_0[3] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 C In - 22.607 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 Y Out 0.639 23.246 - un1_CORE8051S_llOll_3_iv_3[3] Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 B In - 23.932 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 Y Out 0.550 24.483 - N214 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B B In - 25.169 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B Y Out 0.534 25.703 - N272 Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B B In - 26.710 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B Y Out 0.534 27.244 - I64_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 B In - 27.517 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 Y Out 0.550 28.067 - N302_0 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A B In - 28.396 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A Y Out 0.550 28.946 - N371 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C C In - 29.274 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C Y Out 0.546 29.820 - I94_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D A In - 30.093 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D Y Out 0.852 30.945 - ADD_16x16_fast_I119_Y Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C A In - 31.274 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C Y Out 0.395 31.669 - CORE8051S_Il0ll8_2 Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B A In - 31.942 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B Y Out 0.438 32.380 - CORE8051S_Il0ll8 Net - - 1.211 - 6 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A A In - 33.591 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A Y Out 0.457 34.048 - CORE8051S_I0lll Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A A In - 34.376 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A Y Out 0.395 34.771 - un25_CORE8051S_O0lll_m[1] Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_0_iv[1] AO1B C In - 35.099 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_0_iv[1] AO1B Y Out 0.558 35.657 - CORE8051S_O0lll_13[1] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] DFN1C0 D In - 35.931 - =========================================================================================================================================================================== Total path delay (propagation time + setup) of 36.419 is 14.924(41.0%) logic and 21.494(59.0%) route. Path information for path number 3: Requested Period: 25.000 - Setup time: 0.458 = Required time: 24.542 - Propagation time: 35.942 = Slack (non-critical) : -11.401 Number of logic level(s): 27 Starting point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] / Q Ending point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[0] / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] DFN1E1C0 Q Out 0.627 0.627 - CORE8051S_IO1lI_0[3] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 A In - 2.047 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 Y Out 0.432 2.479 - un42_CORE8051S_IOl0l_1_0 Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A B In - 3.777 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A Y Out 0.550 4.327 - N_206_0 Net - - 1.454 - 10 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A C In - 5.781 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A Y Out 0.639 6.420 - CORE8051S_I0l_i[55] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E A In - 7.840 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E Y Out 0.825 8.665 - CORE8051S_IOl_sn_N_2 Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A C In - 10.085 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A Y Out 0.546 10.631 - CORE8051S_l0I_0_N_18 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A S In - 11.317 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A Y Out 0.337 11.654 - CORE8051S_l0I_0_N_19 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B A In - 12.340 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B Y Out 0.427 12.768 - un1_CORE8051S_IIIlI Net - - 1.696 - 12 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 A In - 14.464 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 Y Out 0.432 14.896 - un4_CORE8051S_Ol0ll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A B In - 15.170 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A Y Out 0.438 15.607 - CORE8051S_Ol0ll Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A A In - 16.294 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A Y Out 0.447 16.740 - un4_CORE8051S_OIlll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B A In - 17.014 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B Y Out 0.438 17.451 - CORE8051S_OIlll Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A B In - 18.459 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A Y Out 0.438 18.896 - un1_CORE8051S_IlIll_inv_0_i Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 A In - 20.195 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 Y Out 0.309 20.504 - un2_CORE8051S_IIlll_1 Net - - 1.395 - 8 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B A In - 21.899 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B Y Out 0.438 22.337 - genblk48\.genblk49\.CORE8051S_O1Oll_m_0[3] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 C In - 22.610 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 Y Out 0.639 23.249 - un1_CORE8051S_llOll_3_iv_3[3] Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 B In - 23.935 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 Y Out 0.550 24.485 - N214 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B B In - 25.172 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B Y Out 0.534 25.706 - N272 Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B B In - 26.713 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B Y Out 0.534 27.247 - I64_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 B In - 27.520 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 Y Out 0.550 28.070 - N302_0 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A B In - 28.399 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A Y Out 0.550 28.949 - N371 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C C In - 29.277 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C Y Out 0.546 29.823 - I94_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D A In - 30.096 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D Y Out 0.852 30.948 - ADD_16x16_fast_I119_Y Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C A In - 31.277 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C Y Out 0.395 31.671 - CORE8051S_Il0ll8_2 Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B A In - 31.945 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B Y Out 0.438 32.383 - CORE8051S_Il0ll8 Net - - 1.211 - 6 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A A In - 33.594 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A Y Out 0.457 34.051 - CORE8051S_I0lll Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A A In - 34.379 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A Y Out 0.395 34.774 - un25_CORE8051S_O0lll_m[1] Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_iv[0] NOR3C C In - 35.102 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_iv[0] NOR3C Y Out 0.566 35.669 - CORE8051S_O0lll_13_0_iv_i_0[0] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[0] DFN1C0 D In - 35.942 - =========================================================================================================================================================================== Total path delay (propagation time + setup) of 36.401 is 14.785(40.6%) logic and 21.615(59.4%) route. Path information for path number 4: Requested Period: 25.000 - Setup time: 0.458 = Required time: 24.542 - Propagation time: 35.940 = Slack (non-critical) : -11.398 Number of logic level(s): 27 Starting point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[2] / Q Ending point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[0] / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[2] DFN1E1C0 Q Out 0.627 0.627 - CORE8051S_IO1lI_0[2] Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 B In - 1.926 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 Y Out 0.550 2.476 - un42_CORE8051S_IOl0l_1_0 Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A B In - 3.774 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A Y Out 0.550 4.324 - N_206_0 Net - - 1.454 - 10 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A C In - 5.778 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A Y Out 0.639 6.417 - CORE8051S_I0l_i[55] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E A In - 7.837 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E Y Out 0.825 8.662 - CORE8051S_IOl_sn_N_2 Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A C In - 10.082 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A Y Out 0.546 10.628 - CORE8051S_l0I_0_N_18 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A S In - 11.314 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A Y Out 0.337 11.651 - CORE8051S_l0I_0_N_19 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B A In - 12.338 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B Y Out 0.427 12.765 - un1_CORE8051S_IIIlI Net - - 1.696 - 12 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 A In - 14.461 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 Y Out 0.432 14.893 - un4_CORE8051S_Ol0ll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A B In - 15.167 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A Y Out 0.438 15.604 - CORE8051S_Ol0ll Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A A In - 16.291 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A Y Out 0.447 16.737 - un4_CORE8051S_OIlll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B A In - 17.011 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B Y Out 0.438 17.449 - CORE8051S_OIlll Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A B In - 18.456 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A Y Out 0.438 18.894 - un1_CORE8051S_IlIll_inv_0_i Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 A In - 20.192 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un2_CORE8051S_IIlll_1 NOR2 Y Out 0.309 20.501 - un2_CORE8051S_IIlll_1 Net - - 1.395 - 8 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B A In - 21.896 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.genblk48.genblk49.CORE8051S_O1Oll_m_0[3] NOR2B Y Out 0.438 22.334 - genblk48\.genblk49\.CORE8051S_O1Oll_m_0[3] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 C In - 22.607 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 Y Out 0.639 23.246 - un1_CORE8051S_llOll_3_iv_3[3] Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 B In - 23.932 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 Y Out 0.550 24.483 - N214 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B B In - 25.169 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B Y Out 0.534 25.703 - N272 Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B B In - 26.710 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B Y Out 0.534 27.244 - I64_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 B In - 27.517 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 Y Out 0.550 28.067 - N302_0 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A B In - 28.396 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A Y Out 0.550 28.946 - N371 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C C In - 29.274 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C Y Out 0.546 29.820 - I94_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D A In - 30.093 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D Y Out 0.852 30.945 - ADD_16x16_fast_I119_Y Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C A In - 31.274 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C Y Out 0.395 31.669 - CORE8051S_Il0ll8_2 Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B A In - 31.942 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B Y Out 0.438 32.380 - CORE8051S_Il0ll8 Net - - 1.211 - 6 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A A In - 33.591 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A Y Out 0.457 34.048 - CORE8051S_I0lll Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A A In - 34.376 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A Y Out 0.395 34.771 - un25_CORE8051S_O0lll_m[1] Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_iv[0] NOR3C C In - 35.099 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_iv[0] NOR3C Y Out 0.566 35.666 - CORE8051S_O0lll_13_0_iv_i_0[0] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[0] DFN1C0 D In - 35.940 - =========================================================================================================================================================================== Total path delay (propagation time + setup) of 36.398 is 14.904(40.9%) logic and 21.494(59.1%) route. Path information for path number 5: Requested Period: 25.000 - Setup time: 0.488 = Required time: 24.512 - Propagation time: 35.868 = Slack (non-critical) : -11.356 Number of logic level(s): 27 Starting point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] / Q Ending point: ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] / D The start point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK The end point is clocked by ClosedLoopTrimDemo|u_pll_main.proc_clk_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_IO1Il.CORE8051S_l01lI_0[3] DFN1E1C0 Q Out 0.627 0.627 - CORE8051S_IO1lI_0[3] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 A In - 2.047 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_l11Il.un42_CORE8051S_IOl0l_1_0 OR2 Y Out 0.432 2.479 - un42_CORE8051S_IOl0l_1_0 Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A B In - 3.777 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un887_CORE8051S_IOO1I_i_o2_0_1 OR2A Y Out 0.550 4.327 - N_206_0 Net - - 1.454 - 10 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A C In - 5.781 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OlOll.un1825_CORE8051S_IOO1I_0_a2 OR3A Y Out 0.639 6.420 - CORE8051S_I0l_i[55] Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E A In - 7.840 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_x3 AX1E Y Out 0.825 8.665 - CORE8051S_IOl_sn_N_2 Net - - 1.420 - 9 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A C In - 10.085 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lIOll.un1_CORE8051S_I01II_m11_i_o5 NOR3A Y Out 0.546 10.631 - CORE8051S_l0I_0_N_18 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A S In - 11.317 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i_m4 MX2A Y Out 0.337 11.654 - CORE8051S_l0I_0_N_19 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B A In - 12.340 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_OO1Il.CORE8051S_l0I_0_m12_i AO1B Y Out 0.427 12.768 - un1_CORE8051S_IIIlI Net - - 1.696 - 12 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 A In - 14.464 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_Ol0ll NOR2 Y Out 0.432 14.896 - un4_CORE8051S_Ol0ll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A B In - 15.170 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Ol0ll OR2A Y Out 0.438 15.607 - CORE8051S_Ol0ll Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A A In - 16.294 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un4_CORE8051S_OIlll OR3A Y Out 0.447 16.740 - un4_CORE8051S_OIlll Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B A In - 17.014 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OIlll OR2B Y Out 0.438 17.451 - CORE8051S_OIlll Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A B In - 18.459 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlIll_inv_0 OR2A Y Out 0.438 18.896 - un1_CORE8051S_IlIll_inv_0_i Net - - 1.299 - 7 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlOll25 NOR3 C In - 20.195 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_IlOll25 NOR3 Y Out 0.581 20.776 - un1_CORE8051S_IlOll25 Net - - 1.089 - 5 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OlOlI_m[3] NOR2B A In - 21.865 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_OlOlI_m[3] NOR2B Y Out 0.438 22.302 - CORE8051S_OlOlI_m[3] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 B In - 22.576 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_3_iv_3[3] OR3 Y Out 0.608 23.184 - un1_CORE8051S_llOll_3_iv_3[3] Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 B In - 23.870 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I3_P0N OR2 Y Out 0.550 24.420 - N214 Net - - 0.686 - 3 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B B In - 25.107 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I37_Y NOR2B Y Out 0.534 25.640 - N272 Net - - 1.007 - 4 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B B In - 26.648 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_un1_Y NOR2B Y Out 0.534 27.182 - I64_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 B In - 27.455 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I64_Y OR2 Y Out 0.550 28.005 - N302_0 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A B In - 28.334 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I87_Y OR2A Y Out 0.550 28.884 - N371 Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C C In - 29.212 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I94_un1_Y NOR3C Y Out 0.546 29.758 - I94_un1_Y Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D A In - 30.031 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un1_CORE8051S_llOll_5.ADD_16x16_fast_I119_Y AX1D Y Out 0.852 30.883 - ADD_16x16_fast_I119_Y Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C A In - 31.211 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8_2 NOR3C Y Out 0.395 31.606 - CORE8051S_Il0ll8_2 Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B A In - 31.880 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_Il0ll8 OR2B Y Out 0.438 32.318 - CORE8051S_Il0ll8 Net - - 1.211 - 6 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A A In - 33.529 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_I0lll OR2A Y Out 0.457 33.986 - CORE8051S_I0lll Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A A In - 34.314 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.un25_CORE8051S_O0lll_m[1] OR3A Y Out 0.395 34.709 - un25_CORE8051S_O0lll_m[1] Net - - 0.328 - 2 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_0_iv[1] AO1B C In - 35.037 - ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll_13_0_0_iv[1] AO1B Y Out 0.558 35.595 - CORE8051S_O0lll_13[1] Net - - 0.274 - 1 ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_II1Il.CORE8051S_O0lll[1] DFN1C0 D In - 35.868 - =========================================================================================================================================================================== Total path delay (propagation time + setup) of 36.356 is 15.047(41.4%) logic and 21.309(58.6%) route. ##### END OF TIMING REPORT #####] -------------------------------------------------------------------------------- Report for cell ClosedLoopTrimDemo.verilog Core Cell usage: cell count area count*area AND2 43 1.0 43.0 AND2A 2 1.0 2.0 AND3 27 1.0 27.0 AO1 83 1.0 83.0 AO13 14 1.0 14.0 AO16 1 1.0 1.0 AO18 12 1.0 12.0 AO1A 36 1.0 36.0 AO1B 49 1.0 49.0 AO1C 39 1.0 39.0 AO1D 28 1.0 28.0 AOI1 31 1.0 31.0 AOI1A 4 1.0 4.0 AOI1B 122 1.0 122.0 AX1 1 1.0 1.0 AX1A 6 1.0 6.0 AX1B 4 1.0 4.0 AX1C 12 1.0 12.0 AX1D 17 1.0 17.0 AX1E 10 1.0 10.0 AXOI1 1 1.0 1.0 AXOI5 1 1.0 1.0 AXOI7 2 1.0 2.0 CLKINT 3 0.0 0.0 GND 52 0.0 0.0 INV 7 1.0 7.0 MAJ3 39 1.0 39.0 MAJ3XI 1 1.0 1.0 MIN3 3 1.0 3.0 MX2 237 1.0 237.0 MX2A 39 1.0 39.0 MX2B 40 1.0 40.0 MX2C 146 1.0 146.0 NAND2 6 1.0 6.0 NOR2 117 1.0 117.0 NOR2A 183 1.0 183.0 NOR2B 200 1.0 200.0 NOR3 34 1.0 34.0 NOR3A 57 1.0 57.0 NOR3B 66 1.0 66.0 NOR3C 139 1.0 139.0 OA1 36 1.0 36.0 OA1A 53 1.0 53.0 OA1B 19 1.0 19.0 OA1C 26 1.0 26.0 OAI1 26 1.0 26.0 OR2 166 1.0 166.0 OR2A 186 1.0 186.0 OR2B 257 1.0 257.0 OR3 33 1.0 33.0 OR3A 48 1.0 48.0 OR3B 79 1.0 79.0 OR3C 132 1.0 132.0 PLL 1 0.0 0.0 RCOSC 1 0.0 0.0 VCC 52 0.0 0.0 XA1 14 1.0 14.0 XA1A 15 1.0 15.0 XA1B 10 1.0 10.0 XA1C 5 1.0 5.0 XAI1 1 1.0 1.0 XNOR2 45 1.0 45.0 XNOR3 8 1.0 8.0 XO1 16 1.0 16.0 XO1A 6 1.0 6.0 XOR2 127 1.0 127.0 XOR3 37 1.0 37.0 ZOR3 1 1.0 1.0 DFN0 1 1.0 1.0 DFN0P0 1 1.0 1.0 DFN1 5 1.0 5.0 DFN1C0 287 1.0 287.0 DFN1E0C0 166 1.0 166.0 DFN1E0P0 2 1.0 2.0 DFN1E1C0 220 1.0 220.0 DFN1E1P0 5 1.0 5.0 DFN1P0 16 1.0 16.0 NVM 1 0.0 0.0 RAM4K9 3 0.0 0.0 ----- ---------- TOTAL 4021 3908.0 IO Cell usage: cell count AB 1 INBUF 2 INBUF_A 1 OUTBUF 2 ----- TOTAL 6 Core Cells : 3908 of 13824 (28%) IO Cells : 6 of 172 (3%) RAM/ROM Usage Summary Block Rams : 3 of 24 (12%) Mapper successful! Process took 0h:00m:33s realtime, 0h:00m:32s cputime # Fri May 23 08:38:39 2008 ###########################################################] Total runtime: 00h:00m:50s realtime