nvm_set_engine \
   -toplevel "FlashMemorySystem" \
   -HDL Verilog \
   -die M7AFS600 \
   -package "484 FBGA" \
   -workdir {.} \
   -commondir {./common} \
   -verbosity 0
nvm_set_system \
   -pipe 0
nvm_set_analogsystem_config -config_file {AnalogSystem}
nvm_set_data_storage_client \
   -client_name "ProcessorCode" \
   -base_address 0 \
   -number_of_words 8192 \
   -word_size 8 \
   -memory_file_format "INTELHEX" \
   -memory_file {C:\Data\Designs\ClosedLoopTrimDemo\software\ClosedLoopDemo.hex} \
   -jtag_read 0\
   -jtag_write 0\
   -lock_address 0
