Synplicity Proasic Technology Mapper, Version 9.0.2, Build 065R, Built Mar  5 2008 17:44:07
Copyright (C) 1994-2008, Synplicity Inc.  All Rights Reserved
Product Version Version 9.0.2A2
@N: MF249 |Running in 32-bit mode.
@N: MF258 |Gated clock conversion disabled 


@W: MO111 :|tristate driver un1_Core8051s_00_4_t on net un1_Core8051s_00_4 has its enable tied to GND (module ProcessorSystem) 
@W: MO111 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\core8051s.v":269:0:269:2|tristate driver TDO on net TDO has its enable tied to GND (module CORE8051S_Z9) 
@W: MO111 :|tristate driver CORE8051S_IO0II_t on net CORE8051S_IO0II has its enable tied to GND (module CORE8051S_Z9) 
@W: MO111 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\core8051s_globs_fusion.v":63:0:63:14|tristate driver CORE8051S_IO0II on net CORE8051S_IO0II has its enable tied to GND (module CORE8051S_lllII_0s) 
@W: BN132 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\isr.v":6853:0:6853:5|Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.CORE8051S_Il0Ol[1],  because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_lO1Il.CORE8051S_IOIOl
@W: BN132 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\rstctrl.v":4814:0:4814:5|Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_I1O1l,  because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_lOI1l
@W: BN132 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\rstctrl.v":4814:0:4814:5|Removing sequential instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_l1O1l,  because it is equivalent to instance ProcSys_inst.Core8051s_00.CORE8051S_IIIlI.CORE8051S_I01Il.CORE8051S_OII1l
@W: BN126 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\core8051s.v":2:0:2:8|*Net "TDO" in work.CORE8051S_Z9(verilog) is missing a driver 
@W: BN126 :"c:\data\designs\closedlooptrimdemo\coreconsole\common\core8051s\rtl\verilog\o\core8051s_globs_fusion.v":2:0:2:14|*Net "CORE8051S_IO0II" in work.CORE8051S_lllII_0s(verilog) is missing a driver 
@N: BN225 |Writing default property annotation file C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo.sap.
Process took 0h:00m:03s realtime, 0h:00m:02s cputime
# Fri May 23 08:38:05 2008

###########################################################]
