<?xml version="1.0" encoding="UTF-8" standalone="no" ?><Component xmlns="http://actel.com/sweng/afi"><name>pll_main</name><vendor/><library/><version/><fileSets><fileSet fileSetId="HDL_FILESET"><file fileid="0"><name>pll_main.v</name><fileType>verilogSource</fileType></file></fileSet><fileSet fileSetId="OTHER_FILESET"><file fileid="1"><name>pll_main.gen</name><fileType><userFileType type="GEN"/></fileType></file><file fileid="2"><name>pll_main.log</name><fileType><userFileType type="LOG"/></fileType></file></fileSet></fileSets><hwModel><views><view><fileSetRef>HDL_FILESET</fileSetRef><name>HDL</name></view><view><fileSetRef>OTHER_FILESET</fileSetRef><name>OTHER</name></view></views></hwModel><category>Clock Conditioning / PLL</category><function>Static PLL</function><variation>Static PLL</variation><vendor/><version>2.1</version><busInterfaces><busInterface><name>A_RCOscClk_bif</name><busType library="busdef.clock" name="RCOscClk" vendor="Actel" version="1.0"/><slave/><signalMap><signal><componentSignalName>CLKA</componentSignalName><busSignalName>RCCLKOUT</busSignalName></signal></signalMap></busInterface></busInterfaces><model><signals><signal><name>POWERDOWN</name><direction>in</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal><signal><name>CLKA</name><direction>in</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal><signal><name>LOCK</name><direction>out</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal><signal><name>GLA</name><direction>out</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal><signal><name>GLB</name><direction>out</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal><signal><name>GLC</name><direction>out</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal><signal><name>OADIVRST</name><direction>in</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal></signals></model></Component>