Actel Designer Software
Version: 8.3.0.22
Release: v8.3


 Netlist Reading Time = 1.0 seconds
Imported the files:
   C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo.edn
   C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo_sdc.sdc

The Import command succeeded ( 00:00:40 )
The design C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.adb was last
modified by software version 8.3.0.22.
Opened an existing Libero design
C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.adb.
Warning: Your ACTEL_SUMMIT license will expire in 6 days.
'BA_NAME' set to 'ClosedLoopTrimDemo_ba'

The Execute Script command succeeded ( 00:00:00 )
=====================================================================
Parameters used to run compile:
===============================

Family      : Fusion
Device      : M7AFS600
Package     : 484 FBGA
Source      : C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo.edn
              C:\data\Designs\ClosedLoopTrimDemo\synthesis\ClosedLoopTrimDemo_sdc.sdc
Format      : EDIF
Topcell     : ClosedLoopTrimDemo
Speed grade : STD
Temp        : 0:25:70
Voltage     : 1.58:1.50:1.42

Keep Existing Physical Constraints : Yes
Keep Existing Timing Constraints   : Yes

pdc_abort_on_error                 : Yes
pdc_eco_display_unmatched_objects  : No
pdc_eco_max_warnings               : 10000

demote_globals                     : No
promote_globals                    : No
localclock_max_shared_instances    : 12
localclock_buffer_tree_max_fanout  : 12

combine_register                   : No
delete_buffer_tree                 : No

report_high_fanout_nets_limit      : 10

=====================================================================
Compile starts ...

BLK007: No CoreConsole Database file imported for an M7 device.
Warning: CMP201: Net: FlashSys_inst/fm_dout[9] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[10] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[11] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[12] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[13] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[14] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[15] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[16] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[17] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[18] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[19] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[20] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[21] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[22] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[23] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[24] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[25] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[26] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[27] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[28] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[29] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[30] is floating
Warning: CMP201: Net: FlashSys_inst/fm_dout[31] is floating
Warning: CMP201: Net: FlashSys_inst/NVM_INST_CALIBRATIONDATA_STATUS[0] is floating
Warning: CMP201: Net: FlashSys_inst/NVM_INST_CALIBRATIONDATA_STATUS[1] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[0] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[1] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[2] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[3] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[4] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[5] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[6] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_ACMRDATA[7] is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT0 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT1 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT2 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT3 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT4 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT5 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT6 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT7 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT8 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DACOUT9 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT0 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT1 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT2 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT3 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT4 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT5 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT6 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT7 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT8 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DATOUT9 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT0 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT1 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT2 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT3 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT4 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT5 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT6 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT7 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT8 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_DAVOUT9 is floating
Warning: CMP201: Net: backbone_inst/AB_INST_RTCMATCH is floating
Warning: CMP201: Net: backbone_inst/AB_INST_SAMPLE is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA0 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA1 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA2 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA3 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA4 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA5 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA6 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA7 is floating
Warning: CMP201: Net:
         backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_cl\
         ram/genblk252_genblk253_CCALIBIl01/CCALIBOOIOI_DOUTA8 is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA0
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA1
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA2
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA3
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA4
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA5
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA6
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA7
         is floating
Warning: CMP201: Net: backbone_inst/AnalogSystem_assc_ram_inst/AnalogSystem_assc_ram_R0C0_DOUTA8
         is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA0 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA1 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA2 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA3 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA4 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA5 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA6 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA7 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTA8 is floating
Warning: CMP201: Net: ProcSys_inst/Core8051s_00/CORE8051S_O0llI/CORE8051S_OlI_DOUTB8 is floating
Warning: CMP201: Net: u_pll_main/Core_LOCK is floating
Warning: CMP201: Net: u_pll_main/Core_YB is floating
Warning: CMP201: Net: u_pll_main/Core_YC is floating

Netlist Optimization Report
===========================

Optimized macros:
  - Dangling net drivers:   0
  - Buffers:                0
  - Inverters:              0
  - Tieoff:                 1
  - Logic combining:        107

    Total macros optimized  108

There were 0 error(s) and 96 warning(s) in this design.
=====================================================================

Reading previous post-compile physical placement constraints.


There were 0 error(s) and 0 warning(s).

=====================================================================
Compile report:
===============

    CORE                     Used:   3800  Total:  13824   (27.49%)
    IO (W/ clocks)           Used:      4  Total:    172   (2.33%)
    Differential IO          Used:      0  Total:     86   (0.00%)
    GLOBAL (Chip+Quadrant)   Used:      6  Total:     18   (33.33%)
    PLL                      Used:      1  Total:      2   (50.00%)
    RAM/FIFO                 Used:      3  Total:     24   (12.50%)
    Low Static ICC           Used:      0  Total:      1   (0.00%)
    FlashROM                 Used:      0  Total:      1   (0.00%)
    User JTAG                Used:      0  Total:      1   (0.00%)
    RC oscillator            Used:      1  Total:      1   (100.00%)
    XTL oscillator           Used:      0  Total:      1   (0.00%)
    NVM                      Used:      1  Total:      2   (50.00%)
    AB                       Used:      1  Total:      1   (100.00%)
    AnalogIO                 Used:      1  Total:     46   (2.17%)
    VRPSM                    Used:      0  Total:      1   (0.00%)
    No-Glitch MUX            Used:      0  Total:      2   (0.00%)

Global Information:

    Type            | Used   | Total
    ----------------|--------|-------------
    Chip global     | 6      | 6  (100.00%)
    Quadrant global | 0      | 12 (0.00%)

Core Information:

    Type    | Instances    | Core tiles
    --------|--------------|-----------
    COMB    | 3097         | 3097
    SEQ     | 703          | 703

I/O Function:

    Type                          | w/o register  | w/ register  | w/ DDR register
    ------------------------------|---------------|--------------|----------------
    Input I/O                     | 2             | 0            | 0
    Output I/O                    | 2             | 0            | 0
    Bidirectional I/O             | 0             | 0            | 0
    Differential Input I/O Pairs  | 0             | 0            | 0
    Differential Output I/O Pairs | 0             | 0            | 0

I/O Technology:

                                    |   Voltages    |             I/Os
    --------------------------------|-------|-------|-------|--------|--------------
    I/O Standard(s)                 | Vcci  | Vref  | Input | Output | Bidirectional
    --------------------------------|-------|-------|-------|--------|--------------
    LVTTL                           | 3.30v | N/A   | 2     | 2      | 0

Net information report:
=======================

The following nets have been assigned to a chip global resource:
    Fanout  Type          Name
    --------------------------
    676     CLK_NET       Net   : proc_clk
                          Driver: u_pll_main/Core
                          Source: ESSENTIAL
    669     SET/RESET_NET Net   : proc_rstn
                          Driver: I_261/U_CLKSRC
                          Source: NETLIST
    52      INT_NET       Net   :
backbone_inst.AnalogSystem_calibip_wrapper_inst.user_AnalogSystem_calibip_wrapper.u_compute.gen\
blk257.genblk258.CCALIBl011_260_d
                          Driver: I_262/U_CLKSRC
                          Source: NETLIST
    31      CLK_NET       Net   : DAC_clk
                          Driver: u_pll_main/Core
                          Source: ESSENTIAL
    29      SET/RESET_NET Net   : DAC_rstn
                          Driver: DAC_rstn_gl/U_CLKSRC
                          Source: NETLIST
    6       CLK_NET       Net   : NVM_clk
                          Driver: u_pll_main/Core
                          Source: ESSENTIAL

High fanout nets in the post compile netlist:
    Fanout  Type          Name
    --------------------------
    34      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011[1]
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011[1]
    29      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011[0]
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011_0[0]
    14      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBO011[23]
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBO011[23]
    12      INT_NET       Net   : DAC_update
                          Driver: DAC_update
    12      INT_NET       Net   : FlashSys_inst.NVM_BUSY_net
                          Driver: FlashSys_inst/NVM_INST_CALIBRATIONDATA
    12      INT_NET       Net   : INIT_DONE_0
                          Driver:
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/hrgmtcpsdzr_0
    12      INT_NET       Net   : INIT_DONE_1
                          Driver:
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/hrgmtcpsdzr_1
    12      INT_NET       Net   : INIT_DONE_2
                          Driver:
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/hrgmtcpsdzr_2
    12      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux_0
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux_iv_0_0
    12      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux_iv

Nets that are candidates for clock assignment and the resulting fanout:
    Fanout  Type          Name
    --------------------------
    35      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011[1]
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011[1]
    29      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011[0]
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBl011_0[0]
    14      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBO011[23]
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.CCALIBO011[23]
    12      INT_NET       Net   : DAC_update
                          Driver: DAC_update
    12      INT_NET       Net   : FlashSys_inst.NVM_BUSY_net
                          Driver: FlashSys_inst/NVM_INST_CALIBRATIONDATA
    12      INT_NET       Net   : INIT_DONE_0
                          Driver:
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/hrgmtcpsdzr_0
    12      INT_NET       Net   : INIT_DONE_1
                          Driver:
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/hrgmtcpsdzr_1
    12      INT_NET       Net   : INIT_DONE_2
                          Driver:
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/hrgmtcpsdzr_2
    12      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux_0
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux_iv_0_0
    12      INT_NET       Net   :
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux
                          Driver:
backbone_inst/AnalogSystem_calibip_wrapper_inst/user_AnalogSystem_calibip_wrapper/u_compute/gen\
blk257.genblk258.SV_GAIN_IN_pmux_iv
While analyzing gated clock network, ambiguities have been found on gates
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/rntfrjgxqfn:Y.
The timing models of these gates have been simplified for Static Timing Analysis.


SDC Import: Begin processing constraints...



SDC Import: End processing constraints


The Compile command succeeded ( 00:00:40 )
I/O Bank Assigner detected (5) out of (5) I/O Bank(s) with locked I/O technologies.
I/O Bank Assigner is running in incremental mode. All pre-assigned I/O Bank technologies will
not be changed.
All I/O Banks have locked technologies. Skipping I/O Bank Assigner.

Planning global net placement...


Global net placement completed successfully.


                        o - o - o - o - o - o



Timing-driven Placer Started: Fri May 23 08:42:37 2008



Placer Finished: Fri May 23 08:43:01 2008

Total Placer CPU Time:     00:00:24



                        o - o - o - o - o - o



While analyzing gated clock network, ambiguities have been found on gates
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/rntfrjgxqfn:Y.
The timing models of these gates have been simplified for Static Timing Analysis.
INFO: Writing the file:
C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.dtf\swloc


Timing-driven Router 

Design: ClosedLoopTrimDemo              Started: Fri May 23 08:43:59 2008



289 nets of 3861 have to be routed incrementally.

 



Timing-driven Router completed successfully.



Design: ClosedLoopTrimDemo              

Finished: Fri May 23 08:45:10 2008

Total CPU Time:     00:01:11            Total Elapsed Time: 00:01:11

                        o - o - o - o - o - o



Loading the Timing data for the design.
While analyzing gated clock network, ambiguities have been found on gates
FlashSys_inst/FlashMemorySystem_init_wrapper_inst/user_FlashMemorySystem_init_wrapper/u_grwzcnq\
mqzm/user_clk_sel/u_jhmkpjjmdkx/rntfrjgxqfn:Y.
The timing models of these gates have been simplified for Static Timing Analysis.
Finished loading the Timing data.
TIMER: Max delay timing requirements have been met.

The Layout command succeeded ( 00:04:57 )
Warning: The following files already exist:
         
         C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.pdb
         
         Do you want to replace the files? [YES]

The Export-map command succeeded ( 00:00:33 )
Warning: Overwriting the existing file:
         C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.pdb.
Wrote to the file: C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.pdb
CHECKSUM: B410

The Generate programming file command succeeded ( 00:00:42 )
Design saved to file C:\data\Designs\ClosedLoopTrimDemo\designer\impl1\ClosedLoopTrimDemo.adb.
Design closed.

