## MPUCFG

This section provides information on the MPUCFG Module Instance. Each of the module registers is described below.

Return to pfsoc_mss_regmap

## MPUCFG Register Mapping Summary

### MPUCFG Register Summary

Register Name | Type | Register Width (Bits) | Register Reset | Address Offset | Physical Address
PMPCFG_FIC0_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x000 | 0x2000 5000
PMPCFG_FIC0_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x008 | 0x2000 5008
PMPCFG_FIC0_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x010 | 0x2000 5010
PMPCFG_FIC0_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x018 | 0x2000 5018
PMPCFG_FIC0_4 | RW | 64 | 0x0000 0000 0000 01FF | 0x020 | 0x2000 5020
PMPCFG_FIC0_5 | RW | 64 | 0x0000 0000 0000 01FF | 0x028 | 0x2000 5028
PMPCFG_FIC0_6 | RW | 64 | 0x0000 0000 0000 01FF | 0x030 | 0x2000 5030
PMPCFG_FIC0_7 | RW | 64 | 0x0000 0000 0000 01FF | 0x038 | 0x2000 5038
PMPCFG_FIC0_8 | RW | 64 | 0x0000 0000 0000 01FF | 0x040 | 0x2000 5040
PMPCFG_FIC0_9 | RW | 64 | 0x0000 0000 0000 01FF | 0x048 | 0x2000 5048
PMPCFG_FIC0_10 | RW | 64 | 0x0000 0000 0000 01FF | 0x050 | 0x2000 5050
PMPCFG_FIC0_11 | RW | 64 | 0x0000 0000 0000 01FF | 0x058 | 0x2000 5058
PMPCFG_FIC0_12 | RW | 64 | 0x0000 0000 0000 01FF | 0x060 | 0x2000 5060
PMPCFG_FIC0_13 | RW | 64 | 0x0000 0000 0000 01FF | 0x068 | 0x2000 5068
PMPCFG_FIC0_14 | RW | 64 | 0x0000 0000 0000 01FF | 0x070 | 0x2000 5070
PMPCFG_FIC0_15 | RW | 64 | 0x0000 0000 0000 01FF | 0x078 | 0x2000 5078
STATUS_FIC0 | RO | 64 | 0x0000 0000 0000 0000 | 0x080 | 0x2000 5080
PMPCFG_FIC1_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x100 | 0x2000 5100
PMPCFG_FIC1_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x108 | 0x2000 5108
PMPCFG_FIC1_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x110 | 0x2000 5110
PMPCFG_FIC1_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x118 | 0x2000 5118
PMPCFG_FIC1_4 | RW | 64 | 0x0000 0000 0000 01FF | 0x120 | 0x2000 5120
PMPCFG_FIC1_5 | RW | 64 | 0x0000 0000 0000 01FF | 0x128 | 0x2000 5128
PMPCFG_FIC1_6 | RW | 64 | 0x0000 0000 0000 01FF | 0x130 | 0x2000 5130
PMPCFG_FIC1_7 | RW | 64 | 0x0000 0000 0000 01FF | 0x138 | 0x2000 5138
PMPCFG_FIC1_8 | RW | 64 | 0x0000 0000 0000 01FF | 0x140 | 0x2000 5140
PMPCFG_FIC1_9 | RW | 64 | 0x0000 0000 0000 01FF | 0x148 | 0x2000 5148
PMPCFG_FIC1_10 | RW | 64 | 0x0000 0000 0000 01FF | 0x150 | 0x2000 5150
PMPCFG_FIC1_11 | RW | 64 | 0x0000 0000 0000 01FF | 0x158 | 0x2000 5158
PMPCFG_FIC1_12 | RW | 64 | 0x0000 0000 0000 01FF | 0x160 | 0x2000 5160
PMPCFG_FIC1_13 | RW | 64 | 0x0000 0000 0000 01FF | 0x168 | 0x2000 5168
PMPCFG_FIC1_14 | RW | 64 | 0x0000 0000 0000 01FF | 0x170 | 0x2000 5170
PMPCFG_FIC1_15 | RW | 64 | 0x0000 0000 0000 01FF | 0x178 | 0x2000 5178
STATUS_FIC1 | RO | 64 | 0x0000 0000 0000 0000 | 0x180 | 0x2000 5180
PMPCFG_FIC2_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x200 | 0x2000 5200
PMPCFG_FIC2_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x208 | 0x2000 5208
PMPCFG_FIC2_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x210 | 0x2000 5210
PMPCFG_FIC2_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x218 | 0x2000 5218
PMPCFG_FIC2_4 | RW | 64 | 0x0000 0000 0000 01FF | 0x220 | 0x2000 5220
PMPCFG_FIC2_5 | RW | 64 | 0x0000 0000 0000 01FF | 0x228 | 0x2000 5228
PMPCFG_FIC2_6 | RW | 64 | 0x0000 0000 0000 01FF | 0x230 | 0x2000 5230
PMPCFG_FIC2_7 | RW | 64 | 0x0000 0000 0000 01FF | 0x238 | 0x2000 5238
STATUS_FIC2 | RO | 64 | 0x0000 0000 0000 0000 | 0x280 | 0x2000 5280
PMPCFG_CRYPTO_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x300 | 0x2000 5300
PMPCFG_CRYPTO_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x308 | 0x2000 5308
PMPCFG_CRYPTO_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x310 | 0x2000 5310
PMPCFG_CRYPTO_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x318 | 0x2000 5318
STATUS_CRYPTO | RO | 64 | 0x0000 0000 0000 0000 | 0x380 | 0x2000 5380
PMPCFG_ETHERNET0_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x400 | 0x2000 5400
PMPCFG_ETHERNET0_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x408 | 0x2000 5408
PMPCFG_ETHERNET0_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x410 | 0x2000 5410
PMPCFG_ETHERNET0_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x418 | 0x2000 5418
PMPCFG_ETHERNET0_4 | RW | 64 | 0x0000 0000 0000 01FF | 0x420 | 0x2000 5420
PMPCFG_ETHERNET0_5 | RW | 64 | 0x0000 0000 0000 01FF | 0x428 | 0x2000 5428
PMPCFG_ETHERNET0_6 | RW | 64 | 0x0000 0000 0000 01FF | 0x430 | 0x2000 5430
PMPCFG_ETHERNET0_7 | RW | 64 | 0x0000 0000 0000 01FF | 0x438 | 0x2000 5438
STATUS_ETHERNET0 | RO | 64 | 0x0000 0000 0000 0000 | 0x480 | 0x2000 5480
PMPCFG_ETHERNET1_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x500 | 0x2000 5500
PMPCFG_ETHERNET1_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x508 | 0x2000 5508
PMPCFG_ETHERNET1_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x510 | 0x2000 5510
PMPCFG_ETHERNET1_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x518 | 0x2000 5518
PMPCFG_ETHERNET1_4 | RW | 64 | 0x0000 0000 0000 01FF | 0x520 | 0x2000 5520
PMPCFG_ETHERNET1_5 | RW | 64 | 0x0000 0000 0000 01FF | 0x528 | 0x2000 5528
PMPCFG_ETHERNET1_6 | RW | 64 | 0x0000 0000 0000 01FF | 0x530 | 0x2000 5530
PMPCFG_ETHERNET1_7 | RW | 64 | 0x0000 0000 0000 01FF | 0x538 | 0x2000 5538
STATUS_ETHERNET1 | RO | 64 | 0x0000 0000 0000 0000 | 0x580 | 0x2000 5580
PMPCFG_USB_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x600 | 0x2000 5600
PMPCFG_USB_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x608 | 0x2000 5608
PMPCFG_USB_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x610 | 0x2000 5610
PMPCFG_USB_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x618 | 0x2000 5618
STATUS_USB | RO | 64 | 0x0000 0000 0000 0000 | 0x680 | 0x2000 5680
PMPCFG_MMC_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x700 | 0x2000 5700
PMPCFG_MMC_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x708 | 0x2000 5708
PMPCFG_MMC_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x710 | 0x2000 5710
PMPCFG_MMC_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x718 | 0x2000 5718
STATUS_MMC | RO | 64 | 0x0000 0000 0000 0000 | 0x780 | 0x2000 5780
PMPCFG_SCB_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x800 | 0x2000 5800
PMPCFG_SCB_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x808 | 0x2000 5808
PMPCFG_SCB_2 | RW | 64 | 0x0000 0000 0000 01FF | 0x810 | 0x2000 5810
PMPCFG_SCB_3 | RW | 64 | 0x0000 0000 0000 01FF | 0x818 | 0x2000 5818
PMPCFG_SCB_4 | RW | 64 | 0x0000 0000 0000 01FF | 0x820 | 0x2000 5820
PMPCFG_SCB_5 | RW | 64 | 0x0000 0000 0000 01FF | 0x828 | 0x2000 5828
PMPCFG_SCB_6 | RW | 64 | 0x0000 0000 0000 01FF | 0x830 | 0x2000 5830
PMPCFG_SCB_7 | RW | 64 | 0x0000 0000 0000 01FF | 0x838 | 0x2000 5838
STATUS_SCB | RO | 64 | 0x0000 0000 0000 0000 | 0x880 | 0x2000 5880
PMPCFG_TRACE_0 | RW | 64 | 0x0000 0000 0000 01FF | 0x900 | 0x2000 5900
PMPCFG_TRACE_1 | RW | 64 | 0x0000 0000 0000 01FF | 0x908 | 0x2000 5908
STATUS_TRACE | RO | 64 | 0x0000 0000 0000 0000 | 0x980 | 0x2000 5980
SEG_REG0 | RW | 64 | 0x0000 0000 0000 0000 | 0xD00 | 0x2000 5D00
SEG_REG1 | RW | 64 | 0x0000 0000 0000 0000 | 0xD08 | 0x2000 5D08
SEG_REG2 | RW | 64 | 0x0000 0000 0000 0000 | 0xD10 | 0x2000 5D10
SEG_REG3 | RW | 64 | 0x0000 0000 0000 0000 | 0xD18 | 0x2000 5D18
SEG_REG4 | RW | 64 | 0x0000 0000 0000 0000 | 0xD20 | 0x2000 5D20
SEG_REG5 | RW | 64 | 0x0000 0000 0000 0000 | 0xD28 | 0x2000 5D28
SEG_REG6 | RW | 64 | 0x0000 0000 0000 0000 | 0xD30 | 0x2000 5D30

## MPUCFG Register Descriptions

### MPUCFG : PMPCFG_FIC0_0

Address offset | 0x000
Physical address | 0x2000 5000 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_1

Address offset | 0x008
Physical address | 0x2000 5008 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_2

Address offset | 0x010
Physical address | 0x2000 5010 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_3

Address offset | 0x018
Physical address | 0x2000 5018 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_4

Address offset | 0x020
Physical address | 0x2000 5020 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_5

Address offset | 0x028
Physical address | 0x2000 5028 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_6

Address offset | 0x030
Physical address | 0x2000 5030 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_7

Address offset | 0x038
Physical address | 0x2000 5038 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_8

Address offset | 0x040
Physical address | 0x2000 5040 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_9

Address offset | 0x048
Physical address | 0x2000 5048 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_10

Address offset | 0x050
Physical address | 0x2000 5050 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_11

Address offset | 0x058
Physical address | 0x2000 5058 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_12

Address offset | 0x060
Physical address | 0x2000 5060 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_13

Address offset | 0x068
Physical address | 0x2000 5068 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_14

Address offset | 0x070
Physical address | 0x2000 5070 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC0_15

Address offset | 0x078
Physical address | 0x2000 5078 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_FIC0

Address offset | 0x080
Physical address | 0x2000 5080 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_FIC1_0

Address offset | 0x100
Physical address | 0x2000 5100 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_1

Address offset | 0x108
Physical address | 0x2000 5108 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_2

Address offset | 0x110
Physical address | 0x2000 5110 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_3

Address offset | 0x118
Physical address | 0x2000 5118 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_4

Address offset | 0x120
Physical address | 0x2000 5120 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_5

Address offset | 0x128
Physical address | 0x2000 5128 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_6

Address offset | 0x130
Physical address | 0x2000 5130 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_7

Address offset | 0x138
Physical address | 0x2000 5138 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_8

Address offset | 0x140
Physical address | 0x2000 5140 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_9

Address offset | 0x148
Physical address | 0x2000 5148 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_10

Address offset | 0x150
Physical address | 0x2000 5150 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_11

Address offset | 0x158
Physical address | 0x2000 5158 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_12

Address offset | 0x160
Physical address | 0x2000 5160 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_13

Address offset | 0x168
Physical address | 0x2000 5168 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_14

Address offset | 0x170
Physical address | 0x2000 5170 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC1_15

Address offset | 0x178
Physical address | 0x2000 5178 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_FIC1

Address offset | 0x180
Physical address | 0x2000 5180 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_FIC2_0

Address offset | 0x200
Physical address | 0x2000 5200 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_1

Address offset | 0x208
Physical address | 0x2000 5208 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_2

Address offset | 0x210
Physical address | 0x2000 5210 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_3

Address offset | 0x218
Physical address | 0x2000 5218 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_4

Address offset | 0x220
Physical address | 0x2000 5220 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_5

Address offset | 0x228
Physical address | 0x2000 5228 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_6

Address offset | 0x230
Physical address | 0x2000 5230 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_FIC2_7

Address offset | 0x238
Physical address | 0x2000 5238 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_FIC2

Address offset | 0x280
Physical address | 0x2000 5280 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_CRYPTO_0

Address offset | 0x300
Physical address | 0x2000 5300 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_CRYPTO_1

Address offset | 0x308
Physical address | 0x2000 5308 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_CRYPTO_2

Address offset | 0x310
Physical address | 0x2000 5310 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_CRYPTO_3

Address offset | 0x318
Physical address | 0x2000 5318 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_CRYPTO

Address offset | 0x380
Physical address | 0x2000 5380 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_ETHERNET0_0

Address offset | 0x400
Physical address | 0x2000 5400 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_1

Address offset | 0x408
Physical address | 0x2000 5408 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_2

Address offset | 0x410
Physical address | 0x2000 5410 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_3

Address offset | 0x418
Physical address | 0x2000 5418 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_4

Address offset | 0x420
Physical address | 0x2000 5420 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_5

Address offset | 0x428
Physical address | 0x2000 5428 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_6

Address offset | 0x430
Physical address | 0x2000 5430 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET0_7

Address offset | 0x438
Physical address | 0x2000 5438 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_ETHERNET0

Address offset | 0x480
Physical address | 0x2000 5480 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_ETHERNET1_0

Address offset | 0x500
Physical address | 0x2000 5500 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_1

Address offset | 0x508
Physical address | 0x2000 5508 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_2

Address offset | 0x510
Physical address | 0x2000 5510 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_3

Address offset | 0x518
Physical address | 0x2000 5518 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_4

Address offset | 0x520
Physical address | 0x2000 5520 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_5

Address offset | 0x528
Physical address | 0x2000 5528 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_6

Address offset | 0x530
Physical address | 0x2000 5530 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_ETHERNET1_7

Address offset | 0x538
Physical address | 0x2000 5538 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_ETHERNET1

Address offset | 0x580
Physical address | 0x2000 5580 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_USB_0

Address offset | 0x600
Physical address | 0x2000 5600 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_USB_1

Address offset | 0x608
Physical address | 0x2000 5608 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_USB_2

Address offset | 0x610
Physical address | 0x2000 5610 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_USB_3

Address offset | 0x618
Physical address | 0x2000 5618 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_USB

Address offset | 0x680
Physical address | 0x2000 5680 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_MMC_0

Address offset | 0x700
Physical address | 0x2000 5700 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_MMC_1

Address offset | 0x708
Physical address | 0x2000 5708 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_MMC_2

Address offset | 0x710
Physical address | 0x2000 5710 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_MMC_3

Address offset | 0x718
Physical address | 0x2000 5718 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_MMC

Address offset | 0x780
Physical address | 0x2000 5780 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_SCB_0

Address offset | 0x800
Physical address | 0x2000 5800 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_1

Address offset | 0x808
Physical address | 0x2000 5808 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_2

Address offset | 0x810
Physical address | 0x2000 5810 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_3

Address offset | 0x818
Physical address | 0x2000 5818 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_4

Address offset | 0x820
Physical address | 0x2000 5820 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_5

Address offset | 0x828
Physical address | 0x2000 5828 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_6

Address offset | 0x830
Physical address | 0x2000 5830 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_SCB_7

Address offset | 0x838
Physical address | 0x2000 5838 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_SCB

Address offset | 0x880
Physical address | 0x2000 5880 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : PMPCFG_TRACE_0

Address offset | 0x900
Physical address | 0x2000 5900 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : PMPCFG_TRACE_1

Address offset | 0x908
Physical address | 0x2000 5908 | Instance | MPUCFG
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
63:56 | MODE | Bit 63: LOCKED When set to 1 the configuration cannot be changed until a reset occurs. Bits 62 : 61 reserved Bits 60:59: Match 00=OFF 01=TOR 10=NA4 11=NAPOT Only 00 and 11 are supported, TOR and NAT settings are equivalent to off Bit 58: Execute enable Bit 57: Write Enable Bit 56: Read Enable | RW | 0x00
55:36 | Reserved |  | RO Rreturns0s | 0x0 0000
35:0 | PMP | The PMP Value, bits 8:0 are hardwired to 9'h1ff forcing a minimum block size of 4K bytes | RW | 0x0 0000 01FF

### MPUCFG : STATUS_TRACE

Address offset | 0x980
Physical address | 0x2000 5980 | Instance | MPUCFG
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
63:44 | Reserved |  | RO Rreturns0s | 0x0 0000
43 | FAILED | Indicates Failure occurred, cleared via a system register bit | RW | 0
42:39 | ID | AXI ID of failure (4-bits) | RW | 0x0
38 | WRITE | 0=Read 1=Write | RW | 0
37:0 | ADDRESS | 38-bit failed address | RW | 0x00 0000 0000

### MPUCFG : SEG_REG0

Address offset | 0xD00
Physical address | 0x2000 5D00 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

### MPUCFG : SEG_REG1

Address offset | 0xD08
Physical address | 0x2000 5D08 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

### MPUCFG : SEG_REG2

Address offset | 0xD10
Physical address | 0x2000 5D10 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

### MPUCFG : SEG_REG3

Address offset | 0xD18
Physical address | 0x2000 5D18 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

### MPUCFG : SEG_REG4

Address offset | 0xD20
Physical address | 0x2000 5D20 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

### MPUCFG : SEG_REG5

Address offset | 0xD28
Physical address | 0x2000 5D28 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

### MPUCFG : SEG_REG6

Address offset | 0xD30
Physical address | 0x2000 5D30 | Instance | MPUCFG
Description | Cached access at 0x00_8000_0000
Type | RW

Bits | Field Name | Description | Type | Reset
63:32 | Reserved |  | RO Rreturns0s | 0x0000 0000
31 | LOCKED | When set to '1' the configuration cannot be changed until a reset occurs. | RW | 0
30:15 | Reserved |  | RW | 0x0000
14:0 | Address_Offset | This sets offset that is added to address bits [37:24] to convert the Corecomplex address to DDR address. Value is twos complement allowing the value to be decremented. | RW | 0x0000

MPUCFG has no common memories.