## FRQMETER

This section provides information on the FRQMETER Module Instance. Each of the module registers is described below.

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## FRQMETER Register Mapping Summary

### FRQMETER Register Summary

Register Name | Type | Register Width (Bits) | Register Reset | Address Offset | Physical Address
CONTROL | RW | 32 | 0x0000 0000 | 0x000 | 0x2000 6000
CLKSEL | RW | 32 | 0x0000 0000 | 0x004 | 0x2000 6004
RUNTIME | RW | 32 | 0x0000 2710 | 0x008 | 0x2000 6008
MODE | RW | 32 | 0x0000 0000 | 0x00C | 0x2000 600C
COUNT0 | RO | 32 | 0x0000 0000 | 0x010 | 0x2000 6010
COUNT1 | RO | 32 | 0x0000 0000 | 0x014 | 0x2000 6014
COUNT2 | RO | 32 | 0x0000 0000 | 0x018 | 0x2000 6018
COUNT3 | RO | 32 | 0x0000 0000 | 0x01C | 0x2000 601C
COUNT4 | RO | 32 | 0x0000 0000 | 0x020 | 0x2000 6020
COUNT5 | RO | 32 | 0x0000 0000 | 0x024 | 0x2000 6024
COUNT6 | RO | 32 | 0x0000 0000 | 0x028 | 0x2000 6028
COUNT7 | RO | 32 | 0x0000 0000 | 0x02C | 0x2000 602C

## FRQMETER Register Descriptions

### FRQMETER : CONTROL

Address offset | 0x000
Physical address | 0x2000 6000 | Instance | FRQMETER
Description | control register
Type | RW

Bits | Field Name | Description | Type | Reset
31:2 | Reserved |  | RO Rreturns0s | 0x0000 0000
1 | STOP | Writing a '1' will cause the current measurement to be stopped. This bit is used to terminate a time measurement activity, or abort a frequency measurement The abort process may take several clock cycles and when complete the BUSY bit will return to '0' | WO | 0
0 | START | Writing a '1' to this bit causes the measurement circuitry to start This bit will go back to a '0' when the measurement is complete | RW | 0

### FRQMETER : CLKSEL

Address offset | 0x004
Physical address | 0x2000 6004 | Instance | FRQMETER
Description | clock select register
Type | RW RO

Bits | Field Name | Description | Type | Reset
31:12 | Reserved |  | RO Rreturns0s | 0x0 0000
11 | MONEN | Enables the clock monitor output | RW | 0
10:8 | MONSEL | Selects which channel drives the clock monitor output 0 to 7. | RW | 0x0
7:6 | Reserved |  | RO Rreturns0s | 0x0
5 | REFSEL1 | When in timer mode allows the ATPG (Corners) / clkref3 (controller) clock input to clock the channel counters. This clock input is expected to be sourced from an on-chip PLL to support at-speed testing. This allows the timer to clocked off a much higher clock frequency than the reference counter that is limited to 100MHz. | RW | 0
4 | REFSEL0 | Selects the reference input 0: clkref1 1: clkref2 | RW | 0
3 | Reserved |  | RO Rreturns0s | 0x0
2:0 | CLKSEL | Selects which group of clock inputs are selected by the channels, controls the input multiplexer | RW | 0x0

### FRQMETER : RUNTIME

Address offset | 0x008
Physical address | 0x2000 6008 | Instance | FRQMETER
Description |
Type | RW

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO Rreturns0s | 0x00
23:0 | REFCOUNT | Sets the reference count. When set to 0x000000 the timer will run forever i.e. until stopped by the CPU. This setting should not be used for frequency measurement. | RW | 0x00 2710

### FRQMETER : MODE

Address offset | 0x00C
Physical address | 0x2000 600C | Instance | FRQMETER
Description | Sets the measurement mode of channel: 2'b00: Disabled 2'b01: Frequency Mode 2'b11: Time Mode 2'b10: Reserved When N is less than 8 unimplemented channels will return disabled and cannot be enabled
Type | RW

Bits | Field Name | Description | Type | Reset
31:16 | Reserved |  | RO Rreturns0s | 0x0000
15:14 | Channel7 |  | RW | 0x0
13:12 | Channel6 |  | RW | 0x0
11:10 | Channel5 |  | RW | 0x0
9:8 | Channel4 |  | RW | 0x0
7:6 | Channel3 |  | RW | 0x0
5:4 | Channel2 |  | RW | 0x0
3:2 | Channel1 |  | RW | 0x0
1:0 | Channel0 |  | RW | 0x0

### FRQMETER : COUNT0

Address offset | 0x010
Physical address | 0x2000 6010 | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO Rreturns0s | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT1

Address offset | 0x014
Physical address | 0x2000 6014 | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT2

Address offset | 0x018
Physical address | 0x2000 6018 | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT3

Address offset | 0x01C
Physical address | 0x2000 601C | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT4

Address offset | 0x020
Physical address | 0x2000 6020 | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT5

Address offset | 0x024
Physical address | 0x2000 6024 | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT6

Address offset | 0x028
Physical address | 0x2000 6028 | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

### FRQMETER : COUNT7

Address offset | 0x02C
Physical address | 0x2000 602C | Instance | FRQMETER
Description |
Type | RO

Bits | Field Name | Description | Type | Reset
31:24 | Reserved |  | RO | 0x00
23:0 | COUNT | Returns the count value | RO | 0x00 0000

FRQMETER has no common memories.