Microchip Technology Inc
MG2RT
DATA SHEET
(06/01/2005)

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MG2RT

In Production

Microchip 0.5-micron, array based, CMOS product covering most system integration needs with arrays of up to 270K gates. It is manufactured using a 0.5 micron drawn, three metal layers, CMOS process called SCMOS 3/2RTP. Its base cell architecture provides a high routability of logic with extremely dense compiled RAM and DPRAM. ROM can be generated using synthesis tools. Accurate control of clock distribution can be achieved with PLL hardware and clock tree synthesis software. New noise prevention techniques are applied in the array and in the periphery.

 
    Parameter Name
    Value
    Temp# Range (deg C)
    -55 to 125
    Operating Voltage (Vcc)
    3 and 5
    Documentation
    Data Sheets
    06/01/2005
    220KB
    Data Sheets
    06/01/2005
    220KB
      Brochures
     
     
     
    Brochures
    06/01/2015
    785KB
    Brochures
    06/01/2015
    294KB
      Quick Start Guides
     
     
     
     
    Quick Start Guides
    06/01/2014
    172KB