Microchip Technology Inc
AT40K05AL
DATA SHEET
(09/01/2013)

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AT40K05AL

In Production

This 5,000 to 10,000-gate fully PCI-compliant, SRAM-based FPGA features distributed 10-ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic® ability (partially or fully reconfigurable without loss of data), and automatic component generators. It has a 128 I/O count and supports 3.3-V designs. This FPGA can be used as a coprocessor for high-speed (DSP/processor-based) designs by implementing a variety of computation intensive, arithmetic functions. It is designed to quickly implement high-performance, large gate count designs through the use of synthesis and schematic-based tools used on a PC or Sun platform.

 
    Parameter Name
    Value
    Max# Operating Freq# (MHz)
    100
    Speed
    -1
    Max I/O Pins
    128
    F#max (MHz)
    100
    Operating Voltage Max (V)
    3.6
    Registers
    496
    Memory
    2048
    Usable Gates Range (K)
    5 to 10
    Operating Voltage Min (V)
    3
    Documentation
    Data Sheets
    09/01/2013
    1174KB
    Data Sheets
    09/01/2013
    119KB
      Application Notes
     
     
     
     
    AppNote
    03/01/2002
    112KB