Microchip Technology Inc
AT40K05
DATA SHEET
(06/01/2013)

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AT40K05

In Production

This 5,000 to 10,000-gate coprocessor is a fully PCI-compliant, SRAM-based FPGA with distributed 10-ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic® ability (partially or fully reconfigurable without loss of data), and automatic component generators. It has a 128 I/O count and supports a 5-V design. It can be used as a coprocessor for high-speed (DSP/processor-based) designs by implementing a variety of computation intensive, arithmetic functions. It is designed to quickly implement high-performance, large gate count designs through the use of synthesis and schematic-based tools used on a PC or Sun platform.

 
    Parameter Name
    Value
    Max# Operating Freq# (MHz)
    100
    Speed
    -2
    Max I/O Pins
    128
    F#max (MHz)
    100
    Operating Voltage Max (V)
    5.5
    Registers
    256
    Memory
    2048
    Usable Gates Range (K)
    5 to 10
    Operating Voltage Min (V)
    4.5
    Documentation
    Data Sheets
    06/01/2013
    1302KB
    Data Sheets
    05/01/2002
    79KB
      Application Notes
     
     
     
    AppNote
    12/01/2008
    135KB
    AppNote
    07/01/2000
    158KB
    AppNote
    08/01/2001
    116KB
    AppNote
    04/01/2001
    76KB
    AppNote
    03/01/2002
    112KB