Microchip Technology Inc

PIC16F183xx Product Family

Peripheral Integration to Enable Functions

The PIC16F183xx products feature a high level of core independent peripherals that can be combined to perform a wide variety of functions without the core. The integration of peripherals brings a new level of interconnection that enables unsurpassed flexibility in creating functions for a wide range of applications, including consumer electronics, Internet of Things (IoT) and wearable technology applications. These products also include new power-conserving functionality, including Idle/Doze operating modes and Peripheral Module Disable (PMD), in addition to eXtreme Low Power (XLP) technology.

Easy Complementary Output Generation

Any of the 10-bit Pulse Width Modulations (PWMs) or Capture/Compare/PWMs (CCP) can be combined with the Complementary Waveform Generator (CWG) which enables automated complementary output control with control of dead-band and auto-shutdown modes. Once configured, the complementary outputs run completely independent of the core, allowing the core to perform other tasks.

Integrated Analog

The onboard 10-bit ADC, 5-bit DAC, internal voltage references and comparators can be connected internally to create closed-loop feedback without requiring pins or PCB space or can be used for other functions within the applications. The versatile 10-bit ADC can be used to implement buttons or sliders using Microchip's mTouch® Capacitive Sensing solution.

Increased Low-Power Functionality

New Idle and Doze low-power modes allow applications to optimize device performance and power consumption. The Peripheral Module Disable (PMD) allows unused peripherals to be turned off individually, further lowering power consumption.

Flexible PCB Routing

The Peripheral Pin Select (PPS) functionality allows for I/O pin remapping of the digital peripherals for increased flexibility and ease of PCB layout and improved utilization by accessing multiple peripherals on the same I/O port.

Communicate With Others

These products include SPI, I2C and EUSART peripherals, which enable a wide range of communication protocols. This allows for intelligent applications where communication with a host or master device is required.

Key Attributes

  • 32 MHz internal oscillator
  • Up to 14 KB self-write program flash memory
  • Up to 1 KB RAM
  • 256B of EEPROM Data Flash Memory
  • Two 10-bit PWMs
  • Up to 4 capture-compare PWMs (CCP)
  • Up to 2 comparators
  • 10-bit ADC, up to 17 channels
  • Numerically-controlled oscillator
  • Data-signal modulator
  • Up to 4 Configurable Logic Cells (CLC)
  • 5-bit DAC
  • Up to 2 Complementary Waveform Generator (CWG)
  • Up to 2 SPI/I2C
  • EUSART
  • Temperature indicator
  • mTouch® Capacitive Sensing
  • Peripheral pin select
  • Available in 8, 14 and 20 pins

Building Blocks for Function Enablement

10-bit PWM
10-bit PWM provides edge-aligned output, which can be used with the Complementary Waveform Generator.
Capture Compare PWM (CCP)
CCP provides 16-bit signal capture and compare, as well as 10-bit PWM output functionality.
Complementary Waveform Generator (CWG)

CWG provides a complementary waveform with rising and falling edge dead band control. It enables high-efficiency synchronous switching, with no processor overhead. CWG also incorporates auto shutdown, auto restart, and can interface directly with other peripherals/external inputs.

Read more about Complementary Waveform Generator.
Closed Loop Control (CLC)
With the additional 10-bit ADC, 5-bit DAC and Comparator, control loops for closed loop feedback control can be created or used for other functions within the application. Using Microchip's mTouch Capacitive Sensing solution, the 10-bit ADC can be used to create buttons or sliders.
Peripheral Pin Select (PPS)

PPS provides ultimate flexibility when routing digital signals to device pins. With PPS, any digital peripheral can be connected to any I/O pin on-the-fly for a customized layout. This allows users to maintain layout compatibility with older PIC® MCUs, even as new features are implemented. 

Read more about Peripheral Pin Select.
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