8-bit PIC® Microcontrollers
8-bit Architecture Overview
- Increased efficiency single cycle instructions
- Available data EEPROM
- Unified toolset for all cores
- Instructions and data on separate busses
- Simultaneous data & instruction bus access
- Wide program memory buses (12, 14 & 16-bit)
Compare 8-bit PIC® MCU Architectures
| Baseline Architecture | Mid-Range Architecture | Enhanced Mid-Range Architecture | PIC18 Architecture | |
|---|---|---|---|---|
| Pin Count | 6-40 | 8-64 | 8-64 | 18-100 |
| Interrupts | No | Single interrupt capability | Single interrupt capability with hardware context save | Multiple interrupt capability with hardware context save |
| Performance | 5 MIPS | 5 MIPS | 8 MIPS | Up to 16 MIPS |
| Instructions | 33, 12-bit | 35, 14-bit | 49, 14-bit | 83, 16-bit |
| Program Memory | Up to 3 KB | Up to 14 KB | Up to 28 KB | Up to 128 KB |
| Data Memory | Up to 138 Bytes | Up to 368 Bytes | Up to 1,5 KB | Up to 4 KB |
| Hardware Stack | 2 level | 8 level | 16 level | 32 level |
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| Highlights | Lowest cost in the smallest form factor | Optimal cost to performance ratio | Cost effective with more performance and memory | High performance, optimized for C programming, advanced peripherals |
| Total Number of Devices | 16 | 58 | 29 | 193 |
| Families | PIC10, PIC12, PIC16 | PIC12, PIC16 | PIC12FXXX, PIC16F1XX | PIC18 |




