Hot!Threadsave 32-bit timer reads on PIC32MZ

Author
henk.martijn@airtarget.se
New Member
  • Total Posts : 3
  • Reward points : 0
  • Joined: 2016/10/06 04:24:30
  • Location: 0
  • Status: offline
2018/02/22 10:35:50 (permalink)
0

Threadsave 32-bit timer reads on PIC32MZ

Hi!
 
just noticed that using:
      timer = PLIB_TMR_Counter32BitGet(TMR_ID_2);
can cause problems due to the two 16 bit reads to the two different timers involved not beeing optimized into one 32 bit. 
I see frequent inconsistent results.
 
However if I hand-code the access:
      timer=((volatile tmr_registers_t*)TMR_ID_2)->TMRx;
it works well.
 
Has anybody else seen this problem?
I consider this a bug in the PLIB implementation.
#1

6 Replies Related Threads

    Autofahrn
    New Member
    • Total Posts : 5
    • Reward points : 0
    • Joined: 2018/02/15 21:14:06
    • Location: 0
    • Status: offline
    Re: Threadsave 32-bit timer reads on PIC32MZ 2018/02/25 09:35:42 (permalink)
    0
    I guess the hand coded access "works" since it only reads the low part of the counter.
    To read the full 32 Bit counter the low-part needs to be re-read if the high part changes, so I'd do something like this (omitting index check):
     
    PLIB_TEMPLATE uint32_t TMR_Counter32BitGet_In16BitRegister_Safe( TMR_MODULE_ID index )
    {
        tmr_registers_t volatile * tmrLow = ((tmr_registers_t *)(index));
        tmr_registers_t volatile * tmrHigh = ((tmr_registers_t *)(index + 0x0200u));
        uint32_t valLow, valHigh;
        do {
            valHigh = (uint32_t)(tmrHigh->TMRx);
            valLow = (uint32_t)(tmrLow->TMRx);
            }
        while(valHigh != (uint32_t)(tmrHigh->TMRx)); // repeat if HighPart changed
        return((valHigh << 16u) | valLow);
        }
     
    #2
    henk.martijn@airtarget.se
    New Member
    • Total Posts : 3
    • Reward points : 0
    • Joined: 2016/10/06 04:24:30
    • Location: 0
    • Status: offline
    Re: Threadsave 32-bit timer reads on PIC32MZ 2018/03/05 01:04:08 (permalink)
    0
    Actually it does an 32 bit read and reads the complete counter! This is not documented! The datasheet states it should return 0 in the upper 16 bit. However it does return the correct high bits. Can someone from Microchip confirm this?
     
    I ended up writing the following:
     
    uint32_t Counter32BitGetSave(TMR_MODULE_ID index)
    {
       uint32_t val1 = 0;
       if( _TMR_MODULE_ID_IS_EVEN(index) )
       {
          val1 = (uint32_t)((tmr_registers_t volatile *)index)->TMRx;
       }
       else
       {
          PLIB_ASSERT(false, "This Timer instance does not support PLIB_TMR_Counter32BitGet");
       }
    return ( val1 );
    }
    #3
    Autofahrn
    New Member
    • Total Posts : 5
    • Reward points : 0
    • Joined: 2018/02/15 21:14:06
    • Location: 0
    • Status: offline
    Re: Threadsave 32-bit timer reads on PIC32MZ 2018/03/08 16:52:36 (permalink)
    0
    nice find. wink: wink
    #4
    andersm
    Super Member
    • Total Posts : 2381
    • Reward points : 0
    • Joined: 2012/10/07 14:57:44
    • Location: 0
    • Status: offline
    Re: Threadsave 32-bit timer reads on PIC32MZ 2018/03/08 23:59:23 (permalink)
    5 (1)
    See section 14.3.2.1, "32-bit Timer Considerations" of the FRM:
    TMRx and TMRy count register pairs can be read as well as written as a single 32-bit value

    #5
    henk.martijn@airtarget.se
    New Member
    • Total Posts : 3
    • Reward points : 0
    • Joined: 2016/10/06 04:24:30
    • Location: 0
    • Status: offline
    Re: Threadsave 32-bit timer reads on PIC32MZ 2018/03/09 00:44:56 (permalink)
    0
    OK! Thanks for confirming Andersm!
    #6
    moser
    Super Member
    • Total Posts : 335
    • Reward points : 0
    • Joined: 2015/06/16 02:53:47
    • Location: 0
    • Status: offline
    Re: Threadsave 32-bit timer reads on PIC32MZ 2018/03/09 09:25:06 (permalink)
    3 (1)
    I think someone should report it to the support, so maybe it might get fixed in a future PLIB implementation. Any volunteers? wink: wink
    #7
    Jump to:
    © 2018 APG vNext Commercial Version 4.5