Hot!PIC16F690 - SPI issues

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Re: PIC16F690 - SPI issues 2018/02/14 07:40:40 (permalink)
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I hooked up a LED to PORTA,0 and added this code to the end of the loop for the slave 

        banksel SSPCON

        btfss   SSPCON,7

        goto    loop

        banksel PORTA

        bsf     PORTA,0

        banksel SSPCON

        bcf     SSPCON,7

        movlw   0x10

        banksel SSPBUF

        movwf   SSPBUF

        goto    loop


 
The WCOL bit of SSPCON is indeed set. but even after clearing and loading SSPBUF I don't manage to transfer any data from the slave. 
 
From the PIC16F887 datasheet:
"Any write to the SSPBUF register during transmission/reception of data will be ignored, and the write collision detect bit WCOL of the SSPCON register will be set.." 
 
I'm guessing this is my issue. But I can't see what kind of control i should use in the slave-code to assure that i'm write to SSPBUF at the correct time. 
#21
x909x
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Re: PIC16F690 - SPI issues 2018/02/14 16:30:56 (permalink)
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After i few alterations to the code I solved the issue, data is now going in both directions.
 
In the end i needed a pullup resistor to pull up the PIC16F887 SDO from an average of about 20mV to over 1.5V for the PIC16F690 to see the signal. Is this normal ? I read somewhere (can't remember where) that pullup resistors are not very common in SPI-bus setups.
 
Anyways, thanks for all the help from everyone here!
 
 
#22
qɥb
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Re: PIC16F690 - SPI issues 2018/02/14 17:03:43 (permalink)
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Please post the final code you ended up with at both ends.
You're right, a pullup shouldn't be necessary.
Observing the signals with a storage scope would be very informative at this stage...
 
 
On a separate subject, for your debig output code, why are
        banksel TXREG
        movwf   TXREG   ; send character from W

not inside the TXCHAR subroutine?
 
It's actually more efficient to wait for TXIF high before you write to TXREG, rather that TRMT high after writing to TXREG.
That just makes you needlessly wait while the USART is doing its job, when you could be doing other useful things.
 

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#23
x909x
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Re: PIC16F690 - SPI issues 2018/02/14 17:24:56 (permalink)
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qɥb
Please post the final code you ended up with at both ends.
You're right, a pullup shouldn't be necessary.
Observing the signals with a storage scope would be very informative at this stage...
 

 
Scope is on my wish list at the moment for sure. 
 
qɥb
On a separate subject, for your debig output code, why are
        banksel TXREG
        movwf   TXREG   ; send character from W

not inside the TXCHAR subroutine?
 
It's actually more efficient to wait for TXIF high before you write to TXREG, rather that TRMT high after writing to TXREG.
That just makes you needlessly wait while the USART is doing its job, when you could be doing other useful things.
 

 
Thanks again for a good suggestion. Next step is to learn more about how interrupts works in these transfers. Will check for TXIF and SSPIF bits.
 
Here is the code i ended up with.
 
Master: 

;

 LIST p=16F690

 include "P16F690.inc"

;

 

        __CONFIG  _INTRC_OSC_NOCLKOUT & _FOSC_HS & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_ON & _IESO_ON & _FCMEN_ON

 

 

        cblock 0x20

                d1

                d2

                ctrl

                CC_data

                count1

        endc

 

Reset_Vector    CODE    0x000

        goto start

 

start

 

;---    Initilize UARTfor MIDI Data Transfer

 

        banksel BAUDCTL

        bcf     BAUDCTL,3       ; clearing BRG16 bit

        banksel PIE1

        bcf     PIE1, 4         ; Clearing TXIE of the inerupt registers

        bcf     TXSTA, 2        ; Clearing BRGH bit

        clrf    SPBRGH          ; 

        movlw   b'00000001'     ; 

        movwf   SPBRG           ; Approx 31500 Baud

        bcf     TXSTA, 4        ; Clearing sync

        banksel RCSTA

        bsf     RCSTA, 7        ; Setting Spen bit (serial transfer eanabled)

        banksel TXSTA

        bcf     TXSTA, 6        ; clearing TX9, only 8bit transer needed

        bsf     TXSTA, 5        ; setting TXEN, same bank

;---

 

; - SPI-Master mode

        banksel OPTION_REG

        bcf     OPTION_REG,7    ; enable pull-ups

        banksel WPUB

        bsf     WPUB,4

        banksel PORTA

        clrf    PORTA           ; Init PORTA

        clrf    PORTC           ; Init PORTC

        clrf    PORTB           ; Init PORTB

        banksel ANSEL

        clrf    ANSEL           ; All digital

        banksel ANSELH

        clrf    ANSELH          ; All digital

        banksel CM1CON0

        bcf     CM1CON0,7       ;

        bcf     CM2CON0,7       ; No comparatprs

        banksel TRISC

        movlw   b'00000000'     ; SDO Out

        movwf   TRISC           ; 

        movlw   b'00000000'     ;  

        movwf   TRISA           ; all output

        movwf   b'00010000'     ; SCK Out, SDI in 

        movwf   TRISB

        banksel PORTA

        bsf     PORTA,2

        banksel SSPSTAT

        movlw   b'01000000'     ; Rising edge of SCK

        movwf   SSPSTAT

        banksel SSPCON

        movlw   b'00110001'     ; enable as master

        movwf   SSPCON

        movlw   b'11111111'

        movwf   count1

        goto    loop

 

loop

        banksel PORTA

        bcf     PORTA,2         ; slave select on

        movf    count1,w        ; 

        banksel SSPBUF

        movwf   SSPBUF          ; load SSPBUF

        banksel SSPSTAT

char1   btfss   SSPSTAT,BF      ; Check buffer full flag

        goto    char1

        banksel SSPBUF

        movf    SSPBUF,w        ; get recived data

        movwf   ctrl

        banksel PORTA

        bsf     PORTA,2         ; slave select off

        incf    count1,f

        movlw   d'10'

        movwf   CC_data

        call    sendCC

        goto    loop

 

sendCC  movlw   b'10111001'

        banksel TXREG

        movwf   TXREG   ; send character from W

        call    txchar

 

        movf    CC_data,W

        andlw   07Fh

        banksel TXREG

        movwf   TXREG   ; send character from W

        call    txchar

 

        movf    ctrl,W

        andlw   07Fh

        banksel TXREG

        movwf   TXREG   ; send character from W

        call    txchar

        return

 

txchar  bsf     STATUS,RP0

        banksel TXSTA

        btfss   TXSTA,1   ; test for end of transmission

        goto    $-1

        bcf   STATUS,RP0

        return


 
Slave
 

 

 LIST p=16F887

 include "P16F887.inc"

;

 

 __CONFIG _CONFIG1, _FOSC_INTRC_NOCLKOUT & _FOSC_HS & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_ON & _IESO_ON & _FCMEN_ON & _LVP_OFF

 __CONFIG _CONFIG2, _BOR4V_BOR40V & _WRT_OFF

 

 

Reset_Vector    CODE    0x000

        goto start

 

start

 

; - init SPI

        banksel ANSEL

        clrf    ANSEL           ; All digital(for SS)

        banksel PORTA

        clrf    PORTA           ; Init PORTA

        clrf    PORTC           ; init PORTCi

        clrf    PORTB

        banksel CM1CON0

        bcf     CM1CON0,7       ; Comparator 1 off

        bcf     CM2CON0,7       ; Comparator 2 off

        banksel TRISC           ;

        movlw   b'00011000'     ; SCK,SDA IN. SDO out

        movwf   TRISC           ; 

        movlw   b'00100000'     ; SS - in 

        movwf   TRISA

        movlw   b'00000000'     ; all out

        movwf   PORTB

        banksel SSPSTAT         ;

        movlw   b'01000000'     ; Rising edge of SCK

        movwf   SSPSTAT

        banksel SSPCON

        movlw   b'00110100'     ; SSP enable, CCP, Slave mode SS pin control

        movwf   SSPCON

        banksel SSPBUF          ; pre-load the SSPBUF

        movlw   0x12

        movwf   SSPBUF

        goto    loop

 

loop    

        banksel PORTA

        btfsc   PORTA,5         ;

        goto    loop            ; wait until SS goes low

char1   banksel SSPSTAT

        btfss   SSPSTAT,BF      ; Check id BF (Buffer full) is set

        goto    char1           ; Wait until buffer full is set

        banksel SSPBUF

        movf    SSPBUF,w        ; empty buffer

        banksel PORTB           ; display on portb

        movwf   PORTB

sen     btfss   PORTA,5         ;wait here until SS goes high 

        goto    sen

        banksel SSPBUF          ;load next vaules into SSPBUF

        movlw   0x16            ; used fixed value or 8bit count

        movwf   SSPBUF

        banksel SSPCON          ;did we have a collision ?

        btfss   SSPCON,7

        goto    loop            ; no, go back

        banksel PORTA

        bsf     PORTA,0         ; yes, flag it

        banksel SSPCON

        bcf     SSPCON,7        ; clear it

        goto    loop

        END


 
Not sure if it's really needed to poll the status of the SS pin like this. But it stopped the issues with write collisions. 
#24
qɥb
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Re: PIC16F690 - SPI issues 2018/02/14 17:36:54 (permalink)
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x909x
...
Thanks again for a good suggestion. Next step is to learn more about how interrupts works in these transfers. Will check for TXIF and SSPIF bits.

Note, my suggestion has nothing to do with using interrupts. It just happens to be the same flag used to trigger an interrupt that you are polling.
 

PicForum "it just works"
#25
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