Hot!PIC24FJ256GA705 - I2C

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DPerez
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2018/01/15 06:30:30 (permalink)
5 (1)

PIC24FJ256GA705 - I2C

Hello there!

Has anyone tried to use the I2C1 for the PIC24FJ256GA705 microcontroller? I have been able to work with the second one (I mean, the I2C2), but when I try the other one, nothing happens (I can confirm this because I have a logic analizer both in SDA and in SCL).

The code seems not to be the problem because it has been revised for more than 5 times, so the suspect here is a possible hardware problem, but I do not want to assure that without a first oppinion from the forum.

Although I am practicaly sure that the configuration words are fine, I am also attaching them here, because I can see that it is possible to alternate the I2C1 from one possition or another:
 

        // FSEC
        #pragma config BWRP = OFF // Boot Segment Write Protect (Boot segment may be written)
        #pragma config BSS = DISABLED // Boot segment Protect (No Protection (other than BWRP))
        #pragma config BSEN = OFF // Boot Segment Control bit (No Boot Segment)
        #pragma config GWRP = OFF // General Segment Write Protect (Writes to program memory are allowed)
        #pragma config GSS = DISABLED // General Segment Code Protect (Code protection is disabled)
        #pragma config CWRP = OFF // Configuration Segment Program Write Protection bit (Configuration Segment may be written)
        #pragma config CSS = DISABLED // Configuration Segment Code Protection Level bits (No Protection (other than CWRP))
        #pragma config AIVTDIS = OFF // Alternate Interrupt Vector Table Enable bit (Enable AIVT)

        // FBSLIM
        #pragma config BSLIM = 0x1FFF // Boot Segment Code Flash Page Address Limit bits (Boot Segment Flash page address limit)

        // FSIGN

        // FOSCSEL
        #pragma config FNOSC = PRI // Oscillator Select (Primary oscillator (PRI))
        #pragma config PLLMODE = DISABLED // Frequency Multiplier Select Bits (No PLL used; PLLEN bit is not available)
        #pragma config IESO = OFF // Internal External Switchover (Start up with user-selected oscillator source)

        // FOSC
        #pragma config POSCMD = HS // Primary Oscillator Select (HS Oscillator mode selected)
        #pragma config OSCIOFCN = OFF // OSCO Pin Configuration (OSCO/CLKO/RC15 functions as CLKO (FOSC/2))
        #pragma config SOSCSEL = ON // SOSC Power Selection Configuration bits (SOSC is used in crystal (SOSCI/SOSCO) mode)
        #pragma config PLLSS = PLL_PRI // PLL Secondary Selection Configuration bit (PLL is fed by the Primary oscillator)
        #pragma config IOL1WAY = OFF // IOLOCK One-Way Set Enable (The IOLOCK bit can be set and cleared using the unlock sequence)
        #pragma config FCKSM = CSECMD // Clock Switching and Monitor Selection (Clock switching is enabled, Fail-Safe Clock Monitor is disabled)

        // FWDT
        #pragma config WDTPS = PS32768 // Watchdog Timer Postscaler (1:32,768)
        #pragma config FWPSA = PR128 // WDT Prescaler (Prescaler ratio of 1:128)
        #pragma config FWDTEN = ON_SWDTEN // Watchdog Timer Enable bits (WDT Enabled/Disabled (controlled using SWDTEN bit))
        #pragma config WINDIS = OFF // Windowed Watchdog Timer Disable bit (Standard Watchdog Timer enabled (Windowed-mode is disabled))
        #pragma config WDTWIN = WIN25 // Watchdog Window Select bits (Watch Dog Timer Window Width is 25 percent)
        #pragma config WDTCMX = WDTCLK // WDT Clock Source Select bits (WDT clock source is determined by the WDTCLK Configuration bits)
        #pragma config WDTCLK = LPRC // WDT Clock Source Select bits (WDT uses LPRC)

        // FPOR
        #pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset Enable)
        #pragma config LPCFG = OFF // Low power regulator control (Disabled)
        #pragma config DNVPEN = ENABLE // Downside Voltage Protection Enable bit (Downside protection enabled using ZPBOR when BOR is inactive)

        // FICD
        #pragma config ICS = PGD1 // Emulator Pin Placement Select bits (Emulator functions are shared with PGEC1/PGED1)
        #pragma config JTAGEN = OFF // JTAG Port Enable (JTAG port is disabled)

        // FDEVOPT1
        #pragma config ALTCMPI = DISABLE // Alternate Comparator Input Enable bit (C1INC, C2INC, and C3INC are on their standard pin locations)
        #pragma config TMPRPIN = OFF // Tamper Pin Enable bit (TMPRN pin function is disabled)
        #pragma config SOSCHP = ON // SOSC High Power Enable bit (valid only when SOSCSEL = 1 (Enable SOSC high power mode (default))
        #pragma config ALTI2C1 = ALTI2CEN // Alternate I2C pin Location (SDA1 and SCL1 on RB9 and RB8)

 
Any suggestion would be appreciated! Looking forward to hearing from you soon.
 
Best regards.
Daniel.
#1

8 Replies Related Threads

    rodims
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 07:32:33 (permalink)
    0
    Note: I did not yet test that on the GA705
     
    The code seems not to be the problem because it has been revised for more than 5 times, so the suspect here is a possible hardware problem, but I do not want to assure that without a first oppinion from the forum

     
    You do not provide enough information to help without starting guessing. Probability is extremely low that this is a chip hardware issue, the errata only contains a problem with slave mode, and also not related to i2c1 or i2c2 specifically.
     
    You do not describe what you test, what you expect and what you see.  You do not provide code.
    Which pins did you measure, and does it fit to your configuration "Alternate I2C pin Location (SDA1 and SCL1 on RB9 and RB8)"
    You still might have a hardware issue like missing pullup resistors or shortcuts or whatever. Is this a custom board ?
     
    Of course a functional i2c2 is a good starting point, but no proof that your board hardware or the code is correct.
    Checking the code 5 times also only proves that YOU think it is correct.  
     
    To all for reference
    Pin
    1    C1INC/C2INC/C3INC/TMPRN/RP9/SDA1/T1CK/CTED4/PMD3/RB9
    48   RP8/SCL1/OCM1B/CTED10/PMD4/RB8
    45   PGC3/RP6/ASCL1/OCM1F/PMD6/RB6
    45   PGD3/RP5/ASDA1/OCM1E/PMD7/RB5
    46   PGC3/RP6/ASCL1/OCM1F/PMD6/RB6

     
    post edited by rodims - 2018/01/15 08:38:46
    #2
    DavidBLit
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 07:32:37 (permalink)
    5 (3)
    DPerez
    ...
    The code seems not to be the problem because it has been revised for more than 5 times,
    ...

    That's pretty hilarious!  Wish I could revise all my code just 5 times and it be flawless...  wink: wink
     
    We need to see some code, particularly the initialization.  Are the pullups in place?  Are the ANSEL bits correct?

    Yeah, "//Code and stuff".
    #3
    Jim Nickerson
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 07:47:23 (permalink)
    0
    I agree with DavidBLit.
    Quoted to preserve post. smile:
    DPerez
    Hello there!

    Has anyone tried to use the I2C1 for the PIC24FJ256GA705 microcontroller? I have been able to work with the second one (I mean, the I2C2), but when I try the other one, nothing happens (I can confirm this because I have a logic analizer both in SDA and in SCL).

    The code seems not to be the problem because it has been revised for more than 5 times, so the suspect here is a possible hardware problem, but I do not want to assure that without a first oppinion from the forum.

    Although I am practicaly sure that the configuration words are fine, I am also attaching them here, because I can see that it is possible to alternate the I2C1 from one possition or another:
     

     
     
     
     
     
     
     
            // FSEC
            #pragma config BWRP = OFF // Boot Segment Write Protect (Boot segment may be written)
            #pragma config BSS = DISABLED // Boot segment Protect (No Protection (other than BWRP))
            #pragma config BSEN = OFF // Boot Segment Control bit (No Boot Segment)
            #pragma config GWRP = OFF // General Segment Write Protect (Writes to program memory are allowed)
            #pragma config GSS = DISABLED // General Segment Code Protect (Code protection is disabled)
            #pragma config CWRP = OFF // Configuration Segment Program Write Protection bit (Configuration Segment may be written)
            #pragma config CSS = DISABLED // Configuration Segment Code Protection Level bits (No Protection (other than CWRP))
            #pragma config AIVTDIS = OFF // Alternate Interrupt Vector Table Enable bit (Enable AIVT)

            // FBSLIM
            #pragma config BSLIM = 0x1FFF // Boot Segment Code Flash Page Address Limit bits (Boot Segment Flash page address limit)

            // FSIGN

            // FOSCSEL
            #pragma config FNOSC = PRI // Oscillator Select (Primary oscillator (PRI))
            #pragma config PLLMODE = DISABLED // Frequency Multiplier Select Bits (No PLL used; PLLEN bit is not available)
            #pragma config IESO = OFF // Internal External Switchover (Start up with user-selected oscillator source)

            // FOSC
            #pragma config POSCMD = HS // Primary Oscillator Select (HS Oscillator mode selected)
            #pragma config OSCIOFCN = OFF // OSCO Pin Configuration (OSCO/CLKO/RC15 functions as CLKO (FOSC/2))
            #pragma config SOSCSEL = ON // SOSC Power Selection Configuration bits (SOSC is used in crystal (SOSCI/SOSCO) mode)
            #pragma config PLLSS = PLL_PRI // PLL Secondary Selection Configuration bit (PLL is fed by the Primary oscillator)
            #pragma config IOL1WAY = OFF // IOLOCK One-Way Set Enable (The IOLOCK bit can be set and cleared using the unlock sequence)
            #pragma config FCKSM = CSECMD // Clock Switching and Monitor Selection (Clock switching is enabled, Fail-Safe Clock Monitor is disabled)

            // FWDT
            #pragma config WDTPS = PS32768 // Watchdog Timer Postscaler (1:32,768)
            #pragma config FWPSA = PR128 // WDT Prescaler (Prescaler ratio of 1:128)
            #pragma config FWDTEN = ON_SWDTEN // Watchdog Timer Enable bits (WDT Enabled/Disabled (controlled using SWDTEN bit))
            #pragma config WINDIS = OFF // Windowed Watchdog Timer Disable bit (Standard Watchdog Timer enabled (Windowed-mode is disabled))
            #pragma config WDTWIN = WIN25 // Watchdog Window Select bits (Watch Dog Timer Window Width is 25 percent)
            #pragma config WDTCMX = WDTCLK // WDT Clock Source Select bits (WDT clock source is determined by the WDTCLK Configuration bits)
            #pragma config WDTCLK = LPRC // WDT Clock Source Select bits (WDT uses LPRC)

            // FPOR
            #pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset Enable)
            #pragma config LPCFG = OFF // Low power regulator control (Disabled)
            #pragma config DNVPEN = ENABLE // Downside Voltage Protection Enable bit (Downside protection enabled using ZPBOR when BOR is inactive)

            // FICD
            #pragma config ICS = PGD1 // Emulator Pin Placement Select bits (Emulator functions are shared with PGEC1/PGED1)
            #pragma config JTAGEN = OFF // JTAG Port Enable (JTAG port is disabled)

            // FDEVOPT1
            #pragma config ALTCMPI = DISABLE // Alternate Comparator Input Enable bit (C1INC, C2INC, and C3INC are on their standard pin locations)
            #pragma config TMPRPIN = OFF // Tamper Pin Enable bit (TMPRN pin function is disabled)
            #pragma config SOSCHP = ON // SOSC High Power Enable bit (valid only when SOSCSEL = 1 (Enable SOSC high power mode (default))
            #pragma config ALTI2C1 = ALTI2CEN // Alternate I2C pin Location (SDA1 and SCL1 on RB9 and RB8)

     
    Any suggestion would be appreciated! Looking forward to hearing from you soon.
     
    Best regards.
    Daniel.




    post edited by Jim Nickerson - 2018/01/15 07:48:39
    #4
    DPerez
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 08:14:57 (permalink)
    5 (1)
    Hello there!

    I found the mistake. According to the datasheet, there is no possibility of configuring signal on pin number 1 as digital or analogic.

    1    C1INC/C2INC/C3INC/TMPRN/RP9/SDA1/T1CK/CTED4/PMD3/RB9
    48   RP8/SCL1/OCM1B/CTED10/PMD4/RB8
    45   PGC3/RP6/ASCL1/OCM1F/PMD6/RB6
    46   PGC3/RP6/ASCL1/OCM1F/PMD6/RB6

     
    But it is actually false, if you seek inside the p24FJ256GA705, the ANS register has that possibility for that pin, but not for the clock one. So by adding this line the issue is solved:
    ANSBbits.ANSB9 = 0;

     
    Sorry for the inconveniences, I hope this could help anyone else who has the same problem.
     
    Best regards.
    Daniel.
    #5
    rodims
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 08:46:42 (permalink)
    0
    DPerezBut it is actually false, if you seek inside the p24FJ256GA705, the ANS register has that possibility for that pin, but not for the clock one

    #pragma config ALTI2C1 = ALTI2CEN // Alternate I2C pin Location (SDA1 and SCL1 on RB9 and RB8)
    For completeness: Probably should have worked then with your config settings of Alternate i2c1 because they use RB6 and RB7, which don't have ANSELB bit.
    #6
    DPerez
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 09:05:51 (permalink)
    0

    For completeness: Probably should have worked then with your config settings of Alternate i2c1 because they use RB6 and RB7, which don't have ANSELB bit.

     
    It is not possible I am afraid, because the device has already been routed the SDA1/SCL1 signals :( But anyway, this problem has not been bad at all because it has given us a great knowledge which could help other users.
     
    Best regards.
    Daniel.
    post edited by DPerez - 2018/01/15 09:11:12
    #7
    qɥb
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    Re: PIC24FJ256GA705 - I2C 2018/01/15 12:09:38 (permalink)
    5 (1)
    DPerez
    I found the mistake. According to the datasheet, there is no possibility of configuring signal on pin number 1 as digital or analogic.

    1    C1INC/C2INC/C3INC/TMPRN/RP9/SDA1/T1CK/CTED4/PMD3/RB9

    ...

    That is where you were mistaken.
    "Analog input" does not just mean ADC inputs.
    C1INC/C2INC/C3INC are all analog inputs.

    PicForum "it just works"
    #8
    DPerez
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    Re: PIC24FJ256GA705 - I2C 2018/01/16 00:14:29 (permalink)
    0

    "Analog input" does not just mean ADC inputs.
    C1INC/C2INC/C3INC are all analog inputs.

     
    Oh cool! That completes the piece of the puzzle which was missing! I will never forget it! Thanks you very much qµb!

    Best regards.
    Daniel.
     
    #9
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