Re: dsPIC33EP128GS804 - guard ring around crystal
OK - there's 1 pin inbetween.
What might be feasible: the "vulnerable" pin is OSCI. Making the pin between this and Vss a "slow signal" pin would not be perfect, but some reasonably good compromise.
Regarding routing traces between 0.5 mm spaced pins: it is possible although PCBs with such tiny structures do not come cheap. Sometimes you have to take compromises.
Most times the bug is in front of the keyboard.