Re: Ring modulator DDS sine generation whine in output from DAC MCP4822
Well, the bigger sine table improved things, but the basic issue is with Timers not behaving as I think they should. I have worked around the problem by using less timers and stopping/changing/restarting them as needed and the sine timer runs much faster. Either there is something wrong with timers in this chip, or I don't understand them properly (more likely ;) ).
An example, with everything working, not using Timer4, just the act of enabling Timer4 without any interrupts caused he main loop to misbehave. I don't understand why simply enabling it should have any effect let alone such a large one.
Now to sort out a switch statement or change the ADC to read a Pot in between ADC samples.