- Field Programmable Gate Array
- FPGA Configuration Memory
A full-featured EDA suite with state-of-the-art, Mentor Graphics synthesis and simulation tools integrated into a user-friendly design environment. The software supports VHDL and Verilog design flows for the ATF15xx family of complex programmable logic devices. This suite also includes a JTAG in-system programming utility and fitter technologies to enable logic doubling in ATF15xx CPLDs. Optional add-on tools support schematic and CUPL design flows.